Re: [PATCH v2 2/4] soc: mediatek: pwrap: add arbiter capability

2020-07-24 Thread Nicolas Boichat
On Thu, Jul 23, 2020 at 11:40 AM Hsin-Hsiung Wang
 wrote:
>
> Add arbiter capability for pwrap driver.
> This patch is preparing for adding mt6873/8192 pwrap support.
>
> Signed-off-by: Hsin-Hsiung Wang 
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c | 67 
> ++--
>  1 file changed, 56 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c 
> b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index c897205..8d76ed4 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -24,11 +24,13 @@
>  #define PWRAP_MT8135_BRIDGE_WDT_SRC_EN 0x54
>
>  /* macro for wrapper status */
> +#define PWRAP_GET_SWINF_2_FSM(x)   (((x) >> 1) & 0x0007)

I find this macro name a bit weird, because you are actually using
this mask on PWRAP_WACS2_RDATA register value (just like
PWRAP_GET_WACS_FSM below).

Should it be something like PWRAP_GET_WACS_ARB_FSM?!

>  #define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x)
>  #define PWRAP_GET_WACS_FSM(x)  (((x) >> 16) & 0x0007)
>  #define PWRAP_GET_WACS_REQ(x)  (((x) >> 19) & 0x0001)
>  #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
>  #define PWRAP_STATE_INIT_DONE0 BIT(21)
> +#define PWRAP_STATE_INIT_DONE1 BIT(15)
>
>  /* macro for WACS FSM */
>  #define PWRAP_WACS_FSM_IDLE0x00
> @@ -74,6 +76,7 @@
>  #define PWRAP_CAP_DCM  BIT(2)
>  #define PWRAP_CAP_INT1_EN  BIT(3)
>  #define PWRAP_CAP_WDT_SRC1 BIT(4)
> +#define PWRAP_CAP_ARB  BIT(5)
>
>  /* defines for slave device wrapper registers */
>  enum dew_regs {
> @@ -340,6 +343,8 @@ enum pwrap_regs {
> PWRAP_DCM_DBC_PRD,
> PWRAP_EINT_STA0_ADR,
> PWRAP_EINT_STA1_ADR,
> +   PWRAP_SWINF_2_WDATA_31_0,
> +   PWRAP_SWINF_2_RDATA_31_0,
>
> /* MT2701 only regs */
> PWRAP_ADC_CMD_ADDR,
> @@ -1108,16 +1113,30 @@ static void pwrap_writel(struct pmic_wrapper *wrp, 
> u32 val, enum pwrap_regs reg)
>
>  static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
>  {
> -   u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +   u32 val;
> +   bool ret;
> +
> +   val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +   ret = (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE);
> +   else
> +   ret = (PWRAP_GET_SWINF_2_FSM(val) == PWRAP_WACS_FSM_IDLE);
>
> -   return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> +   return ret;

Those !HAS_CAP tests are a little hard to read. Also, ret isn't really needed.

So I'd do this:
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
return PWRAP_GET_SWINF_2_FSM(val) == PWRAP_WACS_FSM_IDLE;

return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;

>  }
>
>  static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
>  {
> -   u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +   u32 val;
> +   bool ret;
> +
> +   val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +   ret = (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR);
> +   else
> +   ret = (PWRAP_GET_SWINF_2_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR);
>
> -   return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> +   return ret;

ditto

>  }
>
>  /*
> @@ -1172,13 +1191,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 
> adr, u32 *rdata)
> return ret;
> }
>
> -   pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> +   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))

ditto, I'd reverse all these tests.

> +   pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> +   else
> +   pwrap_writel(wrp, adr, PWRAP_WACS2_CMD);

Not 100% convinced if worth it, but you could also do:

if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
   val = adr;
else
   val = (adr >> 1) << 16;

pwrap_writel(wrp, val, PWRAP_WACS2_CMD);

>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> if (ret)
> return ret;
>
> -   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> +   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp,
> + PWRAP_WACS2_RDATA));
> +   else
> +   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp,
> + PWRAP_SWINF_2_RDATA_31_0));

Similarly:

if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
   val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
else
   val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);

*rdata = PWRAP_GET_WACS_RDATA(val);

(or set the register address in an `reg` variable)

>
> pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>
> @@ -1228,8 +1255,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 
> adr, u32 wdata)
>  

[PATCH v2 2/4] soc: mediatek: pwrap: add arbiter capability

2020-07-22 Thread Hsin-Hsiung Wang
Add arbiter capability for pwrap driver.
This patch is preparing for adding mt6873/8192 pwrap support.

Signed-off-by: Hsin-Hsiung Wang 
---
 drivers/soc/mediatek/mtk-pmic-wrap.c | 67 ++--
 1 file changed, 56 insertions(+), 11 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c 
b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205..8d76ed4 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -24,11 +24,13 @@
 #define PWRAP_MT8135_BRIDGE_WDT_SRC_EN 0x54
 
 /* macro for wrapper status */
+#define PWRAP_GET_SWINF_2_FSM(x)   (((x) >> 1) & 0x0007)
 #define PWRAP_GET_WACS_RDATA(x)(((x) >> 0) & 0x)
 #define PWRAP_GET_WACS_FSM(x)  (((x) >> 16) & 0x0007)
 #define PWRAP_GET_WACS_REQ(x)  (((x) >> 19) & 0x0001)
 #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
 #define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
 
 /* macro for WACS FSM */
 #define PWRAP_WACS_FSM_IDLE0x00
@@ -74,6 +76,7 @@
 #define PWRAP_CAP_DCM  BIT(2)
 #define PWRAP_CAP_INT1_EN  BIT(3)
 #define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB  BIT(5)
 
 /* defines for slave device wrapper registers */
 enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+   PWRAP_SWINF_2_WDATA_31_0,
+   PWRAP_SWINF_2_RDATA_31_0,
 
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1108,16 +1113,30 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 
val, enum pwrap_regs reg)
 
 static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
 {
-   u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+   u32 val;
+   bool ret;
+
+   val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+   ret = (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE);
+   else
+   ret = (PWRAP_GET_SWINF_2_FSM(val) == PWRAP_WACS_FSM_IDLE);
 
-   return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
+   return ret;
 }
 
 static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
 {
-   u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+   u32 val;
+   bool ret;
+
+   val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+   ret = (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR);
+   else
+   ret = (PWRAP_GET_SWINF_2_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR);
 
-   return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
+   return ret;
 }
 
 /*
@@ -1172,13 +1191,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 
adr, u32 *rdata)
return ret;
}
 
-   pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+   pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+   else
+   pwrap_writel(wrp, adr, PWRAP_WACS2_CMD);
 
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
 
-   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp,
+ PWRAP_WACS2_RDATA));
+   else
+   *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp,
+ PWRAP_SWINF_2_RDATA_31_0));
 
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
 
@@ -1228,8 +1255,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 
adr, u32 wdata)
return ret;
}
 
-   pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
-PWRAP_WACS2_CMD);
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+   pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+PWRAP_WACS2_CMD);
+   } else {
+   pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+   pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+   }
 
return 0;
 }
@@ -2022,6 +2054,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
 static int pwrap_probe(struct platform_device *pdev)
 {
int ret, irq;
+   u32 rdata;
struct pmic_wrapper *wrp;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_slave_id = NULL;
@@ -2116,14 +2149,22 @@ static int pwrap_probe(struct platform_device *pdev)
}
}
 
-   if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
+   if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+   rdata = pwrap_readl(wrp, PWRAP_WACS2_RDATA) &
+   PWRAP_STATE_INIT_DONE0;
+   else
+   rdata =