[PATCH v2 2/9] arm64: dts: hi3660: add L2 cache topology

[Guodong Xu]

From: Leo Yan 

This patch adds the L2 cache topology on 96boards Hikey960.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <2>;
};
};
+
+   A53_L2: l2-cache0 {
+   compatible = "cache";
+   };
+
+   A73_L2: l2-cache1 {
+   compatible = "cache";
+   };
};
 
gic: interrupt-controller@e82b {
-- 
2.10.2

[PATCH v2 2/9] arm64: dts: hi3660: add L2 cache topology

[Guodong Xu]

From: Leo Yan 

This patch adds the L2 cache topology on 96boards Hikey960.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8921310..1cdd03b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -58,6 +58,7 @@
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -66,6 +67,7 @@
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -74,6 +76,7 @@
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <_SLEEP _SLEEP_0>;
};
 
@@ -90,6 +94,7 @@
device_type = "cpu";
reg = <0x0 0x100>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -102,6 +107,7 @@
device_type = "cpu";
reg = <0x0 0x101>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -114,6 +120,7 @@
device_type = "cpu";
reg = <0x0 0x102>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -126,6 +133,7 @@
device_type = "cpu";
reg = <0x0 0x103>;
enable-method = "psci";
+   next-level-cache = <_L2>;
cpu-idle-states = <
_NAP
_SLEEP
@@ -171,6 +179,14 @@
min-residency-us = <2>;
};
};
+
+   A53_L2: l2-cache0 {
+   compatible = "cache";
+   };
+
+   A73_L2: l2-cache1 {
+   compatible = "cache";
+   };
};
 
gic: interrupt-controller@e82b {
-- 
2.10.2