RE: [EXT] Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
> -Original Message-
> From: Lucas Stach
> Sent: Wednesday, March 24, 2021 5:30 PM
> To: Richard Zhu ; andrew.smir...@gmail.com;
> shawn...@kernel.org; k...@linux.com; bhelg...@google.com;
> ste...@agner.ch; lorenzo.pieral...@arm.com
> Cc: linux-...@vger.kernel.org; dl-linux-imx ;
> linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
> ker...@pengutronix.de
> Subject: Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph
> voltage is 3v3
> Am Mittwoch, dem 24.03.2021 um 13:34 +0800 schrieb Richard Zhu:
> > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> > the VREG_BYPASS bits of GPR registers should be cleared from default
> > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> > turned on.
> >
> > Signed-off-by: Richard Zhu
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 23 +++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 853ea8e82952..beca085a9300 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -37,6 +37,7 @@
> > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
> > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10)
> > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11)
> > +#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12)
> > #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8)
> > #define IMX8MQ_PCIE2_BASE_ADDR
> 0x33c0
> >
> >
> >
> >
> > @@ -80,6 +81,7 @@ struct imx6_pcie {
> > u32 tx_swing_full;
> > u32 tx_swing_low;
> > struct regulator*vpcie;
> > + struct regulator*vph;
> > void __iomem*phy_base;
> >
> >
> >
> >
> > /* power domain for pcie */
> > @@ -611,6 +613,8 @@ static void imx6_pcie_configure_type(struct
> > imx6_pcie *imx6_pcie)
> >
> >
> >
> >
> > static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) {
> > + int phy_uv;
> > +
> No need for this variable...
[Richard Zhu] Thanks, would be removed later.
>
> > switch (imx6_pcie->drvdata->variant) {
> > case IMX8MQ:
> > /*
> > @@ -621,6 +625,18 @@ static void imx6_pcie_init_phy(struct imx6_pcie
> *imx6_pcie)
> > imx6_pcie_grp_offset(imx6_pcie),
> >
> IMX8MQ_GPR_PCIE_REF_USE_PAD,
> >
> IMX8MQ_GPR_PCIE_REF_USE_PAD);
> > + /*
> > + * Regarding to the datasheet, the PCIE_VPH is suggested
> > + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
> > + * VREG_BYPASS should be cleared to zero.
> > + */
> > + if (imx6_pcie->vph)
> > + phy_uv =
> regulator_get_voltage(imx6_pcie->vph);
> > + if (phy_uv > 300)
> > + regmap_update_bits(imx6_pcie->iomuxc_gpr,
> > +
> imx6_pcie_grp_offset(imx6_pcie),
> > +
> IMX8MQ_GPR_PCIE_VREG_BYPASS,
> > +0);
>
> ...if you just fold this into a single condition. Right now phy_uv might be
> used
> uninitialized when the vph-supply is not specified in the DT. Better write
> this
> as:
>
> if (imx6_pcie->vph && regulator_get_voltage(imx6_pcie->vph) > 300)
[Richard Zhu] Thanks. Would be changed as this way.
>
> Regards,
> Lucas
>
> > break;
> > case IMX7D:
> > regmap_update_bits(imx6_pcie->iomuxc_gpr,
> IOMUXC_GPR12,
> > @@ -1130,6 +1146,13 @@ static int imx6_pcie_probe(struct
> platform_device *pdev)
> > imx6_pcie->vpcie = NULL;
> > }
> >
> >
> >
> >
> >
> >
> >
> >
> > + imx6_pcie->vph = devm_regulator_get_optional(>dev,
> "vph");
> > + if (IS_ERR(imx6_pcie->vph)) {
> > + if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
> > + return PTR_ERR(imx6_pcie->vph);
> > + imx6_pcie->vph = NULL;
> > + }
> > +
> > platform_set_drvdata(pdev, imx6_pcie);
> >
> >
> >
> >
> >
> >
> >
> >
> > ret = imx6_pcie_attach_pd(dev);
>
Re: [PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
Am Mittwoch, dem 24.03.2021 um 13:34 +0800 schrieb Richard Zhu:
> Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> the VREG_BYPASS bits of GPR registers should be cleared from default
> value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> turned on.
>
> Signed-off-by: Richard Zhu
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> b/drivers/pci/controller/dwc/pci-imx6.c
> index 853ea8e82952..beca085a9300 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -37,6 +37,7 @@
> #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
> #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10)
> #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11)
> +#define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12)
> #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8)
> #define IMX8MQ_PCIE2_BASE_ADDR 0x33c0
>
>
>
>
> @@ -80,6 +81,7 @@ struct imx6_pcie {
> u32 tx_swing_full;
> u32 tx_swing_low;
> struct regulator*vpcie;
> + struct regulator*vph;
> void __iomem*phy_base;
>
>
>
>
> /* power domain for pcie */
> @@ -611,6 +613,8 @@ static void imx6_pcie_configure_type(struct imx6_pcie
> *imx6_pcie)
>
>
>
>
> static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> + int phy_uv;
> +
No need for this variable...
> switch (imx6_pcie->drvdata->variant) {
> case IMX8MQ:
> /*
> @@ -621,6 +625,18 @@ static void imx6_pcie_init_phy(struct imx6_pcie
> *imx6_pcie)
> imx6_pcie_grp_offset(imx6_pcie),
> IMX8MQ_GPR_PCIE_REF_USE_PAD,
> IMX8MQ_GPR_PCIE_REF_USE_PAD);
> + /*
> + * Regarding to the datasheet, the PCIE_VPH is suggested
> + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
> + * VREG_BYPASS should be cleared to zero.
> + */
> + if (imx6_pcie->vph)
> + phy_uv = regulator_get_voltage(imx6_pcie->vph);
> + if (phy_uv > 300)
> + regmap_update_bits(imx6_pcie->iomuxc_gpr,
> +imx6_pcie_grp_offset(imx6_pcie),
> +IMX8MQ_GPR_PCIE_VREG_BYPASS,
> +0);
...if you just fold this into a single condition. Right now phy_uv
might be used uninitialized when the vph-supply is not specified in the
DT. Better write this as:
if (imx6_pcie->vph && regulator_get_voltage(imx6_pcie->vph) > 300)
Regards,
Lucas
> break;
> case IMX7D:
> regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> @@ -1130,6 +1146,13 @@ static int imx6_pcie_probe(struct platform_device
> *pdev)
> imx6_pcie->vpcie = NULL;
> }
>
>
>
>
>
>
>
>
> + imx6_pcie->vph = devm_regulator_get_optional(>dev, "vph");
> + if (IS_ERR(imx6_pcie->vph)) {
> + if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
> + return PTR_ERR(imx6_pcie->vph);
> + imx6_pcie->vph = NULL;
> + }
> +
> platform_set_drvdata(pdev, imx6_pcie);
>
>
>
>
>
>
>
>
> ret = imx6_pcie_attach_pd(dev);
[PATCH v2 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
Signed-off-by: Richard Zhu
---
drivers/pci/controller/dwc/pci-imx6.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c
b/drivers/pci/controller/dwc/pci-imx6.c
index 853ea8e82952..beca085a9300 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -37,6 +37,7 @@
#define IMX8MQ_GPR_PCIE_REF_USE_PADBIT(9)
#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_ENBIT(10)
#define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11)
+#define IMX8MQ_GPR_PCIE_VREG_BYPASSBIT(12)
#define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPEGENMASK(11, 8)
#define IMX8MQ_PCIE2_BASE_ADDR 0x33c0
@@ -80,6 +81,7 @@ struct imx6_pcie {
u32 tx_swing_full;
u32 tx_swing_low;
struct regulator*vpcie;
+ struct regulator*vph;
void __iomem*phy_base;
/* power domain for pcie */
@@ -611,6 +613,8 @@ static void imx6_pcie_configure_type(struct imx6_pcie
*imx6_pcie)
static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
{
+ int phy_uv;
+
switch (imx6_pcie->drvdata->variant) {
case IMX8MQ:
/*
@@ -621,6 +625,18 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
imx6_pcie_grp_offset(imx6_pcie),
IMX8MQ_GPR_PCIE_REF_USE_PAD,
IMX8MQ_GPR_PCIE_REF_USE_PAD);
+ /*
+* Regarding to the datasheet, the PCIE_VPH is suggested
+* to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the
+* VREG_BYPASS should be cleared to zero.
+*/
+ if (imx6_pcie->vph)
+ phy_uv = regulator_get_voltage(imx6_pcie->vph);
+ if (phy_uv > 300)
+ regmap_update_bits(imx6_pcie->iomuxc_gpr,
+ imx6_pcie_grp_offset(imx6_pcie),
+ IMX8MQ_GPR_PCIE_VREG_BYPASS,
+ 0);
break;
case IMX7D:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
@@ -1130,6 +1146,13 @@ static int imx6_pcie_probe(struct platform_device *pdev)
imx6_pcie->vpcie = NULL;
}
+ imx6_pcie->vph = devm_regulator_get_optional(>dev, "vph");
+ if (IS_ERR(imx6_pcie->vph)) {
+ if (PTR_ERR(imx6_pcie->vph) != -ENODEV)
+ return PTR_ERR(imx6_pcie->vph);
+ imx6_pcie->vph = NULL;
+ }
+
platform_set_drvdata(pdev, imx6_pcie);
ret = imx6_pcie_attach_pd(dev);
--
2.17.1
