Re: [PATCH v2 3/4] soundwire: qcom: add support for mmio soundwire master devices

[Jonathan Marek]

On 9/8/20 9:56 AM, Pierre-Louis Bossart wrote:




@@ -764,8 +786,11 @@ static int qcom_swrm_probe(struct platform_device 
*pdev)

  if (!ctrl->regmap)
  return -EINVAL;
  } else {
-    /* Only WCD based SoundWire controller is supported */
-    return -ENOTSUPP;
+    ctrl->reg_read = qcom_swrm_cpu_reg_read;
+    ctrl->reg_write = qcom_swrm_cpu_reg_write;
+    ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
+    if (IS_ERR(ctrl->mmio))
+    return PTR_ERR(ctrl->mmio);


Shouldn't this be conditional on SLIMBUS being enabled, as done in your 
patch2?




No, the case above is the SLIMBUS case. This patch is adding support for 
the non-SLIMBUS case.



  }
  ctrl->irq = of_irq_get(dev->of_node, 0);

Re: [PATCH v2 3/4] soundwire: qcom: add support for mmio soundwire master devices

[Pierre-Louis Bossart]

@@ -764,8 +786,11 @@ static int qcom_swrm_probe(struct platform_device *pdev)
if (!ctrl->regmap)
return -EINVAL;
} else {
-   /* Only WCD based SoundWire controller is supported */
-   return -ENOTSUPP;
+   ctrl->reg_read = qcom_swrm_cpu_reg_read;
+   ctrl->reg_write = qcom_swrm_cpu_reg_write;
+   ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
+   if (IS_ERR(ctrl->mmio))
+   return PTR_ERR(ctrl->mmio);


Shouldn't this be conditional on SLIMBUS being enabled, as done in your 
patch2?



}
  
  	ctrl->irq = of_irq_get(dev->of_node, 0);

[PATCH v2 3/4] soundwire: qcom: add support for mmio soundwire master devices

[Jonathan Marek]

Adds support for qcom soundwire devices with memory mapped IO registers.

Signed-off-by: Jonathan Marek 
---
 drivers/soundwire/qcom.c | 29 +++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 6401ad451eee..ff28794868ca 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -34,6 +34,7 @@
 #define SWRM_INTERRUPT_STATUS_SPECIAL_CMD_ID_FINISHED  BIT(10)
 #define SWRM_INTERRUPT_MASK_ADDR   0x204
 #define SWRM_INTERRUPT_CLEAR   0x208
+#define SWRM_INTERRUPT_CPU_EN  0x210
 #define SWRM_CMD_FIFO_WR_CMD   0x300
 #define SWRM_CMD_FIFO_RD_CMD   0x304
 #define SWRM_CMD_FIFO_CMD  0x308
@@ -90,6 +91,7 @@ struct qcom_swrm_ctrl {
struct sdw_bus bus;
struct device *dev;
struct regmap *regmap;
+   void __iomem *mmio;
struct completion *comp;
struct work_struct slave_work;
/* read/write lock */
@@ -154,6 +156,20 @@ static int qcom_swrm_ahb_reg_write(struct qcom_swrm_ctrl 
*ctrl,
return SDW_CMD_OK;
 }
 
+static int qcom_swrm_cpu_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,
+ u32 *val)
+{
+   *val = readl(ctrl->mmio + reg);
+   return SDW_CMD_OK;
+}
+
+static int qcom_swrm_cpu_reg_write(struct qcom_swrm_ctrl *ctrl, int reg,
+  int val)
+{
+   writel(val, ctrl->mmio + reg);
+   return SDW_CMD_OK;
+}
+
 static int qcom_swrm_cmd_fifo_wr_cmd(struct qcom_swrm_ctrl *ctrl, u8 cmd_data,
 u8 dev_addr, u16 reg_addr)
 {
@@ -310,6 +326,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,
SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK |
SWRM_COMP_CFG_ENABLE_MSK);
+
+   /* enable CPU IRQs */
+   if (ctrl->mmio) {
+   ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,
+   SWRM_INTERRUPT_STATUS_RMSK);
+   }
return 0;
 }
 
@@ -764,8 +786,11 @@ static int qcom_swrm_probe(struct platform_device *pdev)
if (!ctrl->regmap)
return -EINVAL;
} else {
-   /* Only WCD based SoundWire controller is supported */
-   return -ENOTSUPP;
+   ctrl->reg_read = qcom_swrm_cpu_reg_read;
+   ctrl->reg_write = qcom_swrm_cpu_reg_write;
+   ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
+   if (IS_ERR(ctrl->mmio))
+   return PTR_ERR(ctrl->mmio);
}
 
ctrl->irq = of_irq_get(dev->of_node, 0);
-- 
2.26.1