[PATCH v2 4/7] arm64: Add a description on 48-bit address space with 4KB pages
This patch adds memory layout and translation lookup information about 48-bit address space with 4K pages. The description is based on 4 levels of translation tables. Signed-off-by: Jungseok Lee Reviewed-by: Sungjinn Chung --- Documentation/arm64/memory.txt | 59 ++-- 1 file changed, 51 insertions(+), 8 deletions(-) diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt index d50fa61..8142709 100644 --- a/Documentation/arm64/memory.txt +++ b/Documentation/arm64/memory.txt @@ -8,10 +8,11 @@ This document describes the virtual memory layout used by the AArch64 Linux kernel. The architecture allows up to 4 levels of translation tables with a 4KB page size and up to 3 levels with a 64KB page size. -AArch64 Linux uses 3 levels of translation tables with the 4KB page -configuration, allowing 39-bit (512GB) virtual addresses for both user -and kernel. With 64KB pages, only 2 levels of translation tables are -used but the memory layout is the same. +AArch64 Linux uses 3 levels and 4 levels of translation tables with +the 4KB page configuration, allowing 39-bit (512GB) and 48-bit (256TB) +virtual addresses, respectively, for both user and kernel. With 64KB +pages, only 2 levels of translation tables are used but the memory layout +is the same. User addresses have bits 63:39 set to 0 while the kernel addresses have the same bits set to 1. TTBRx selection is given by bit 63 of the @@ -21,7 +22,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to TTBR0. -AArch64 Linux memory layout with 4KB pages: +AArch64 Linux memory layout with 4KB pages + 3 levels: Start End SizeUse --- @@ -48,7 +49,34 @@ ffbffc00 ffbf 64MB modules ffc0 256GB kernel logical memory map -AArch64 Linux memory layout with 64KB pages: +AArch64 Linux memory layout with 4KB pages + 4 levels: + +Start End SizeUse +--- + 256TB user + + 7bfe~124TB vmalloc + +7bff 7bff 64KB [guard page] + +7c00 7dff 2TB vmemmap + +7e00 7bbf ~2TB [guard, future vmmemap] + +7a00 7aff 16MB PCI I/O space + +7b00 7bbf 12MB [guard] + +7bc0 7bdf 2MB earlyprintk device + +7be0 7bff 2MB [guard] + +7c00 7fff 64MB modules + +8000 128TB kernel logical memory map + + +AArch64 Linux memory layout with 64KB pages + 2 levels: Start End SizeUse --- @@ -75,7 +103,7 @@ fdfffc00 fdff 64MB modules fe00 2TB kernel logical memory map -Translation table lookup with 4KB pages: +Translation table lookup with 4KB pages + 3 levels: +++++++++ |6356|5548|4740|3932|3124|2316|15 8|7 0| @@ -90,7 +118,22 @@ Translation table lookup with 4KB pages: +-> [63] TTBR0/1 -Translation table lookup with 64KB pages: +Translation table lookup with 4KB pages + 4 levels: + ++++++++++ +|6356|5548|4740|3932|3124|2316|15 8|7 0| ++++++++++ + | | | | | | + | | | | | v + | | | | | [11:0] in-page offset + | | | | +-> [20:12] L3 index + | | | +---> [29:21] L2 index + | | +-> [38:30] L1 index + | +---> [47:39] L0 index + +-> [63] TTBR0/1 + + +Translation table lookup with 64KB pages + 2 levels: +++++++++ |6356|5548|4740|3932|3124|2316|15 8|7 0| -- 1.7.10.4 -- To unsubscribe from
[PATCH v2 4/7] arm64: Add a description on 48-bit address space with 4KB pages
This patch adds memory layout and translation lookup information about 48-bit address space with 4K pages. The description is based on 4 levels of translation tables. Signed-off-by: Jungseok Lee jays@samsung.com Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com --- Documentation/arm64/memory.txt | 59 ++-- 1 file changed, 51 insertions(+), 8 deletions(-) diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt index d50fa61..8142709 100644 --- a/Documentation/arm64/memory.txt +++ b/Documentation/arm64/memory.txt @@ -8,10 +8,11 @@ This document describes the virtual memory layout used by the AArch64 Linux kernel. The architecture allows up to 4 levels of translation tables with a 4KB page size and up to 3 levels with a 64KB page size. -AArch64 Linux uses 3 levels of translation tables with the 4KB page -configuration, allowing 39-bit (512GB) virtual addresses for both user -and kernel. With 64KB pages, only 2 levels of translation tables are -used but the memory layout is the same. +AArch64 Linux uses 3 levels and 4 levels of translation tables with +the 4KB page configuration, allowing 39-bit (512GB) and 48-bit (256TB) +virtual addresses, respectively, for both user and kernel. With 64KB +pages, only 2 levels of translation tables are used but the memory layout +is the same. User addresses have bits 63:39 set to 0 while the kernel addresses have the same bits set to 1. TTBRx selection is given by bit 63 of the @@ -21,7 +22,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to TTBR0. -AArch64 Linux memory layout with 4KB pages: +AArch64 Linux memory layout with 4KB pages + 3 levels: Start End SizeUse --- @@ -48,7 +49,34 @@ ffbffc00 ffbf 64MB modules ffc0 256GB kernel logical memory map -AArch64 Linux memory layout with 64KB pages: +AArch64 Linux memory layout with 4KB pages + 4 levels: + +Start End SizeUse +--- + 256TB user + + 7bfe~124TB vmalloc + +7bff 7bff 64KB [guard page] + +7c00 7dff 2TB vmemmap + +7e00 7bbf ~2TB [guard, future vmmemap] + +7a00 7aff 16MB PCI I/O space + +7b00 7bbf 12MB [guard] + +7bc0 7bdf 2MB earlyprintk device + +7be0 7bff 2MB [guard] + +7c00 7fff 64MB modules + +8000 128TB kernel logical memory map + + +AArch64 Linux memory layout with 64KB pages + 2 levels: Start End SizeUse --- @@ -75,7 +103,7 @@ fdfffc00 fdff 64MB modules fe00 2TB kernel logical memory map -Translation table lookup with 4KB pages: +Translation table lookup with 4KB pages + 3 levels: +++++++++ |6356|5548|4740|3932|3124|2316|15 8|7 0| @@ -90,7 +118,22 @@ Translation table lookup with 4KB pages: +- [63] TTBR0/1 -Translation table lookup with 64KB pages: +Translation table lookup with 4KB pages + 4 levels: + ++++++++++ +|6356|5548|4740|3932|3124|2316|15 8|7 0| ++++++++++ + | | | | | | + | | | | | v + | | | | | [11:0] in-page offset + | | | | +- [20:12] L3 index + | | | +--- [29:21] L2 index + | | +- [38:30] L1 index + | +--- [47:39] L0 index + +- [63] TTBR0/1 + + +Translation table lookup with 64KB pages + 2 levels: +++++++++ |6356|5548|4740|3932|3124|2316|15 8|7
