[PATCH v2 40/40] arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4
Use assigned-clock properties to configure pllc4 as the parent clock for sdmmc4 on Tegra210. pllc4 offers better jitter perfomance than the default pllp and is required by HS200 and HS400 modes. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 0951acc..14da98a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1057,6 +1057,11 @@ nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; nvidia,default-tap = <0x2>; nvidia,default-trim = <0x4>; + assigned-clocks = <_car TEGRA210_CLK_SDMMC4>, + <_car TEGRA210_CLK_PLL_C4_OUT0>, + <_car TEGRA210_CLK_PLL_C4>; + assigned-clock-parents = <_car TEGRA210_CLK_PLL_C4_OUT0>; + assigned-clock-rates = <2>, <10>, <10>; status = "disabled"; }; @@ -1107,6 +1112,9 @@ nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; nvidia,default-tap = <0x8>; nvidia,default-trim = <0x0>; + assigned-clocks = <_car TEGRA210_CLK_SDMMC4>, + <_car TEGRA210_CLK_PLL_C4_OUT0>; + assigned-clock-parents = <_car TEGRA210_CLK_PLL_C4_OUT0>; status = "disabled"; }; -- 2.7.4
[PATCH v2 40/40] arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4
Use assigned-clock properties to configure pllc4 as the parent clock for sdmmc4 on Tegra210. pllc4 offers better jitter perfomance than the default pllp and is required by HS200 and HS400 modes. Signed-off-by: Aapo Vienamo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 0951acc..14da98a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1057,6 +1057,11 @@ nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>; nvidia,default-tap = <0x2>; nvidia,default-trim = <0x4>; + assigned-clocks = <_car TEGRA210_CLK_SDMMC4>, + <_car TEGRA210_CLK_PLL_C4_OUT0>, + <_car TEGRA210_CLK_PLL_C4>; + assigned-clock-parents = <_car TEGRA210_CLK_PLL_C4_OUT0>; + assigned-clock-rates = <2>, <10>, <10>; status = "disabled"; }; @@ -1107,6 +1112,9 @@ nvidia,pad-autocal-pull-down-offset-1v8 = <0x05>; nvidia,default-tap = <0x8>; nvidia,default-trim = <0x0>; + assigned-clocks = <_car TEGRA210_CLK_SDMMC4>, + <_car TEGRA210_CLK_PLL_C4_OUT0>; + assigned-clock-parents = <_car TEGRA210_CLK_PLL_C4_OUT0>; status = "disabled"; }; -- 2.7.4
