Re: [PATCH v3, 05/15] drm/mediatek: add component POSTMASK

2021-01-26 Thread Hsin-Yi Wang
On Mon, Jan 11, 2021 at 3:44 PM Yongqiang Niu
 wrote:
>
> This patch add component POSTMASK,
>
> Signed-off-by: Yongqiang Niu 
> ---
>  drivers/gpu/drm/mediatek/Makefile|   1 +
>  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 
> +++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |   2 +
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
>  6 files changed, 168 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile 
> b/drivers/gpu/drm/mediatek/Makefile
> index 17a08e2..ce5ad59 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -3,6 +3,7 @@
>  mediatek-drm-y := mtk_disp_color.o \
>   mtk_disp_gamma.o \
>   mtk_disp_ovl.o \
> + mtk_disp_postmask.o \
>   mtk_disp_rdma.o \
>   mtk_drm_crtc.o \
>   mtk_drm_ddp.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> new file mode 100644
> index 000..736224c
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> @@ -0,0 +1,160 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_POSTMASK_EN   0x
> +#define POSTMASK_ENBIT(0)
> +#define DISP_POSTMASK_CFG  0x0020
> +#define POSTMASK_RELAY_MODEBIT(0)
> +#define DISP_POSTMASK_SIZE 0x0030
> +
> +struct mtk_disp_postmask_data {
> +   u32 reserved;
> +};
> +

Will there be more data and config for different soc in the future? If
not, it can be put in mtk_drm_ddp_comp.c and use struct
mtk_ddp_comp_dev, like ddp_dither or ddp_aal.


> +/**
> + * struct mtk_disp_postmask - DISP_postmask driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_postmask {
> +   struct mtk_ddp_comp ddp_comp;
> +   const struct mtk_disp_postmask_data *data;
> +};
> +
> +static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp 
> *comp)
> +{
> +   return container_of(comp, struct mtk_disp_postmask, ddp_comp);
> +}
> +
> +static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
> +   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
> +}
> +
> +static void mtk_postmask_start(struct mtk_ddp_comp *comp)
> +{
> +   writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
> +{
> +   writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {
> +   .config = mtk_postmask_config,
> +   .start = mtk_postmask_start,
> +   .stop = mtk_postmask_stop,
> +};
> +
> +static int mtk_disp_postmask_bind(struct device *dev, struct device *master, 
> void *data)
> +{
> +   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> +   struct drm_device *drm_dev = data;
> +   int ret;
> +
> +   ret = mtk_ddp_comp_register(drm_dev, >ddp_comp);
> +   if (ret < 0) {
> +   dev_err(dev, "Failed to register component %pOF: %d\n",
> +   dev->of_node, ret);
> +   return ret;
> +   }
> +
> +   return 0;
> +}
> +
> +static void mtk_disp_postmask_unbind(struct device *dev, struct device 
> *master,
> + void *data)
> +{
> +   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> +   struct drm_device *drm_dev = data;
> +
> +   mtk_ddp_comp_unregister(drm_dev, >ddp_comp);
> +}
> +
> +static const struct component_ops mtk_disp_postmask_component_ops = {
> +   .bind   = mtk_disp_postmask_bind,
> +   .unbind = mtk_disp_postmask_unbind,
> +};
> +
> +static int mtk_disp_postmask_probe(struct platform_device *pdev)
> +{
> +   struct device *dev = >dev;
> +   struct mtk_disp_postmask *priv;
> +   int comp_id;
> +   int ret;
> +
> +   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +   if (!priv)
> +   return -ENOMEM;
> +
> +   comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_POSTMASK);
> +   if (comp_id < 

Re: [PATCH v3, 05/15] drm/mediatek: add component POSTMASK

2021-01-11 Thread Chun-Kuang Hu
Hi, Yongqiang:

Yongqiang Niu  於 2021年1月11日 週一 下午3:44寫道:
>
> This patch add component POSTMASK,

This patch has conflicts with the series "Decouple Mediatek DRM sub
driver" [1] which has been applied to mediatek-drm-next, so please
rebase this patch onto mediatek-drm-next.

[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=399915

Regards,
Chun-Kuang.

>
> Signed-off-by: Yongqiang Niu 
> ---
>  drivers/gpu/drm/mediatek/Makefile|   1 +
>  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 
> +++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |   2 +
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
>  6 files changed, 168 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile 
> b/drivers/gpu/drm/mediatek/Makefile
> index 17a08e2..ce5ad59 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -3,6 +3,7 @@
>  mediatek-drm-y := mtk_disp_color.o \
>   mtk_disp_gamma.o \
>   mtk_disp_ovl.o \
> + mtk_disp_postmask.o \
>   mtk_disp_rdma.o \
>   mtk_drm_crtc.o \
>   mtk_drm_ddp.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> new file mode 100644
> index 000..736224c
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> @@ -0,0 +1,160 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_POSTMASK_EN   0x
> +#define POSTMASK_ENBIT(0)
> +#define DISP_POSTMASK_CFG  0x0020
> +#define POSTMASK_RELAY_MODEBIT(0)
> +#define DISP_POSTMASK_SIZE 0x0030
> +
> +struct mtk_disp_postmask_data {
> +   u32 reserved;
> +};
> +
> +/**
> + * struct mtk_disp_postmask - DISP_postmask driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_postmask {
> +   struct mtk_ddp_comp ddp_comp;
> +   const struct mtk_disp_postmask_data *data;
> +};
> +
> +static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp 
> *comp)
> +{
> +   return container_of(comp, struct mtk_disp_postmask, ddp_comp);
> +}
> +
> +static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
> +   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
> +}
> +
> +static void mtk_postmask_start(struct mtk_ddp_comp *comp)
> +{
> +   writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
> +{
> +   writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
> +}
> +
> +static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {
> +   .config = mtk_postmask_config,
> +   .start = mtk_postmask_start,
> +   .stop = mtk_postmask_stop,
> +};
> +
> +static int mtk_disp_postmask_bind(struct device *dev, struct device *master, 
> void *data)
> +{
> +   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> +   struct drm_device *drm_dev = data;
> +   int ret;
> +
> +   ret = mtk_ddp_comp_register(drm_dev, >ddp_comp);
> +   if (ret < 0) {
> +   dev_err(dev, "Failed to register component %pOF: %d\n",
> +   dev->of_node, ret);
> +   return ret;
> +   }
> +
> +   return 0;
> +}
> +
> +static void mtk_disp_postmask_unbind(struct device *dev, struct device 
> *master,
> + void *data)
> +{
> +   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
> +   struct drm_device *drm_dev = data;
> +
> +   mtk_ddp_comp_unregister(drm_dev, >ddp_comp);
> +}
> +
> +static const struct component_ops mtk_disp_postmask_component_ops = {
> +   .bind   = mtk_disp_postmask_bind,
> +   .unbind = mtk_disp_postmask_unbind,
> +};
> +
> +static int mtk_disp_postmask_probe(struct platform_device *pdev)
> +{
> +   struct device *dev = >dev;
> +   struct mtk_disp_postmask *priv;
> +   int comp_id;
> +   int ret;
> +
> +   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +   if (!priv)
> +   return 

[PATCH v3, 05/15] drm/mediatek: add component POSTMASK

2021-01-10 Thread Yongqiang Niu
This patch add component POSTMASK,

Signed-off-by: Yongqiang Niu 
---
 drivers/gpu/drm/mediatek/Makefile|   1 +
 drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 +++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |   2 +
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
 drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
 6 files changed, 168 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c

diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index 17a08e2..ce5ad59 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -3,6 +3,7 @@
 mediatek-drm-y := mtk_disp_color.o \
  mtk_disp_gamma.o \
  mtk_disp_ovl.o \
+ mtk_disp_postmask.o \
  mtk_disp_rdma.o \
  mtk_drm_crtc.o \
  mtk_drm_ddp.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
new file mode 100644
index 000..736224c
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
@@ -0,0 +1,160 @@
+/*
+ * SPDX-License-Identifier:
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_drm_crtc.h"
+#include "mtk_drm_ddp_comp.h"
+
+#define DISP_POSTMASK_EN   0x
+#define POSTMASK_ENBIT(0)
+#define DISP_POSTMASK_CFG  0x0020
+#define POSTMASK_RELAY_MODEBIT(0)
+#define DISP_POSTMASK_SIZE 0x0030
+
+struct mtk_disp_postmask_data {
+   u32 reserved;
+};
+
+/**
+ * struct mtk_disp_postmask - DISP_postmask driver structure
+ * @ddp_comp - structure containing type enum and hardware resources
+ * @crtc - associated crtc to report irq events to
+ */
+struct mtk_disp_postmask {
+   struct mtk_ddp_comp ddp_comp;
+   const struct mtk_disp_postmask_data *data;
+};
+
+static inline struct mtk_disp_postmask *comp_to_postmask(struct mtk_ddp_comp 
*comp)
+{
+   return container_of(comp, struct mtk_disp_postmask, ddp_comp);
+}
+
+static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+   mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
+   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, comp, DISP_POSTMASK_CFG);
+}
+
+static void mtk_postmask_start(struct mtk_ddp_comp *comp)
+{
+   writel(POSTMASK_EN, comp->regs + DISP_POSTMASK_EN);
+}
+
+static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
+{
+   writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
+}
+
+static const struct mtk_ddp_comp_funcs mtk_disp_postmask_funcs = {
+   .config = mtk_postmask_config,
+   .start = mtk_postmask_start,
+   .stop = mtk_postmask_stop,
+};
+
+static int mtk_disp_postmask_bind(struct device *dev, struct device *master, 
void *data)
+{
+   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
+   struct drm_device *drm_dev = data;
+   int ret;
+
+   ret = mtk_ddp_comp_register(drm_dev, >ddp_comp);
+   if (ret < 0) {
+   dev_err(dev, "Failed to register component %pOF: %d\n",
+   dev->of_node, ret);
+   return ret;
+   }
+
+   return 0;
+}
+
+static void mtk_disp_postmask_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+   struct mtk_disp_postmask *priv = dev_get_drvdata(dev);
+   struct drm_device *drm_dev = data;
+
+   mtk_ddp_comp_unregister(drm_dev, >ddp_comp);
+}
+
+static const struct component_ops mtk_disp_postmask_component_ops = {
+   .bind   = mtk_disp_postmask_bind,
+   .unbind = mtk_disp_postmask_unbind,
+};
+
+static int mtk_disp_postmask_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct mtk_disp_postmask *priv;
+   int comp_id;
+   int ret;
+
+   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+
+   comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_POSTMASK);
+   if (comp_id < 0) {
+   dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
+   return comp_id;
+   }
+
+   ret = mtk_ddp_comp_init(dev, dev->of_node, >ddp_comp, comp_id,
+   _disp_postmask_funcs);
+   if (ret) {
+   if (ret != -EPROBE_DEFER)
+   dev_err(dev, "Failed to initialize component: %d\n",
+   ret);
+
+   return ret;
+   }
+
+   priv->data = of_device_get_match_data(dev);
+
+