Re: [PATCH v3] serial: Add Milbeaut serial control
Hi,
Thank you for pointing out.
On 2019/04/27 3:15, Alan Cox wrote:
O
+static void mlb_usio_set_termios(struct uart_port *port,
+ struct ktermios *termios, struct ktermios *old)
+{
+ unsigned int escr, smr = MLB_USIO_SMR_SOE;
+ unsigned long flags, baud, quot;
+
+ switch (termios->c_cflag & CSIZE) {
+ case CS5:
+ escr = MLB_USIO_ESCR_L_5BIT;
+ break;
+ case CS6:
+ escr = MLB_USIO_ESCR_L_6BIT;
+ break;
+ case CS7:
+ escr = MLB_USIO_ESCR_L_7BIT;
+ break;
+ case CS8:
+ default:
+ escr = MLB_USIO_ESCR_L_8BIT;
+ break;
+ }
+
+ if (termios->c_cflag & CSTOPB)
+ smr |= MLB_USIO_SMR_SBL;
+
+ if (termios->c_cflag & PARENB) {
+ escr |= MLB_USIO_ESCR_PEN;
+ if (termios->c_cflag & PARODD)
+ escr |= MLB_USIO_ESCR_P;
+ }
If you don't suport CMSPAR then clear that bit in termios as well
OK, clear the bit because of not supported.
+ /* Set hard flow control */
+ if (of_property_read_bool(port->dev->of_node, "auto-flow-control") ||
+ (termios->c_cflag & CRTSCTS))
+ escr |= MLB_USIO_ESCR_FLWEN;
That's just broken. The termios bits are the definitive things for the
port, and in addition even if they are forced you need to correct the
termios data.
You might want to control flow control *at boot* with an OF property but
doing it post boot is just busted.
Ah, Yes.
I think OF property should not be here, and it may only be used to determine
the characteristics of the port.
I try to make a fixes patch.
Thanks,
Sugaya Taichi
Alan
Re: [PATCH v3] serial: Add Milbeaut serial control
O
> +static void mlb_usio_set_termios(struct uart_port *port,
> + struct ktermios *termios, struct ktermios *old)
> +{
> + unsigned int escr, smr = MLB_USIO_SMR_SOE;
> + unsigned long flags, baud, quot;
> +
> + switch (termios->c_cflag & CSIZE) {
> + case CS5:
> + escr = MLB_USIO_ESCR_L_5BIT;
> + break;
> + case CS6:
> + escr = MLB_USIO_ESCR_L_6BIT;
> + break;
> + case CS7:
> + escr = MLB_USIO_ESCR_L_7BIT;
> + break;
> + case CS8:
> + default:
> + escr = MLB_USIO_ESCR_L_8BIT;
> + break;
> + }
> +
> + if (termios->c_cflag & CSTOPB)
> + smr |= MLB_USIO_SMR_SBL;
> +
> + if (termios->c_cflag & PARENB) {
> + escr |= MLB_USIO_ESCR_PEN;
> + if (termios->c_cflag & PARODD)
> + escr |= MLB_USIO_ESCR_P;
> + }
If you don't suport CMSPAR then clear that bit in termios as well
> + /* Set hard flow control */
> + if (of_property_read_bool(port->dev->of_node, "auto-flow-control") ||
> + (termios->c_cflag & CRTSCTS))
> + escr |= MLB_USIO_ESCR_FLWEN;
That's just broken. The termios bits are the definitive things for the
port, and in addition even if they are forced you need to correct the
termios data.
You might want to control flow control *at boot* with an OF property but
doing it post boot is just busted.
Alan
Re: [PATCH v3] serial: Add Milbeaut serial control
Hi, On 2019/04/18 14:17, Greg Kroah-Hartman wrote: On Thu, Apr 18, 2019 at 11:51:56AM +0900, Sugaya Taichi wrote: Add Milbeaut serial control including earlycon and console. Signed-off-by: Sugaya Taichi --- Changes from v2: - Fix build warning. No, I only need an incremental patch fixing the one sparse warning found, not a whole new patch as I have already merged your original patch, right? Sorry for my misunderstanding. I got it. Thanks, Sugaya Taichi thanks, greg k-h
Re: [PATCH v3] serial: Add Milbeaut serial control
On Thu, Apr 18, 2019 at 11:51:56AM +0900, Sugaya Taichi wrote: > Add Milbeaut serial control including earlycon and console. > > Signed-off-by: Sugaya Taichi > --- > Changes from v2: > - Fix build warning. No, I only need an incremental patch fixing the one sparse warning found, not a whole new patch as I have already merged your original patch, right? thanks, greg k-h
[PATCH v3] serial: Add Milbeaut serial control
Add Milbeaut serial control including earlycon and console. Signed-off-by: Sugaya Taichi --- Changes from v2: - Fix build warning. Changes from v1: - Add "COMPILE_TEST" dependency for coverage test. drivers/tty/serial/Kconfig | 26 ++ drivers/tty/serial/Makefile| 1 + drivers/tty/serial/milbeaut_usio.c | 621 + include/uapi/linux/serial_core.h | 3 + 4 files changed, 651 insertions(+) create mode 100644 drivers/tty/serial/milbeaut_usio.c diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 72966bc..d1971a8 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1582,6 +1582,32 @@ config SERIAL_RDA_CONSOLE Say 'Y' here if you wish to use the RDA8810PL UART as the system console. Only earlycon is implemented currently. +config SERIAL_MILBEAUT_USIO + tristate "Milbeaut USIO/UART serial port support" + depends on ARCH_MILBEAUT || (COMPILE_TEST && OF) + default ARCH_MILBEAUT + select SERIAL_CORE + help + This selects the USIO/UART IP found in Socionext Milbeaut SoCs. + +config SERIAL_MILBEAUT_USIO_PORTS + int "Maximum number of CSIO/UART ports (1-8)" + range 1 8 + depends on SERIAL_MILBEAUT_USIO + default "4" + +config SERIAL_MILBEAUT_USIO_CONSOLE + bool "Support for console on MILBEAUT USIO/UART serial port" + depends on SERIAL_MILBEAUT_USIO=y + default y + select SERIAL_CORE_CONSOLE + select SERIAL_EARLYCON + help + Say 'Y' here if you wish to use a USIO/UART of Socionext Milbeaut + SoCs as the system console (the system console is the device which + receives all kernel messages and warnings and which allows logins in + single user mode). + endmenu config SERIAL_MCTRL_GPIO diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index 40b702a..43ca2d0 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -92,6 +92,7 @@ obj-$(CONFIG_SERIAL_PIC32)+= pic32_uart.o obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o obj-$(CONFIG_SERIAL_OWL) += owl-uart.o obj-$(CONFIG_SERIAL_RDA) += rda-uart.o +obj-$(CONFIG_SERIAL_MILBEAUT_USIO) += milbeaut_usio.o # GPIOLIB helpers for modem control lines obj-$(CONFIG_SERIAL_MCTRL_GPIO)+= serial_mctrl_gpio.o diff --git a/drivers/tty/serial/milbeaut_usio.c b/drivers/tty/serial/milbeaut_usio.c new file mode 100644 index 000..4a10604 --- /dev/null +++ b/drivers/tty/serial/milbeaut_usio.c @@ -0,0 +1,621 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Socionext Inc. + */ + +#if defined(CONFIG_SERIAL_MILBEAUT_USIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif + +#include +#include +#include +#include +#include +#include +#include +#include + +#define USIO_NAME "mlb-usio-uart" +#define USIO_UART_DEV_NAME "ttyUSI" + +static struct uart_port mlb_usio_ports[CONFIG_SERIAL_MILBEAUT_USIO_PORTS]; + +#define RX 0 +#define TX 1 +static int mlb_usio_irq[CONFIG_SERIAL_MILBEAUT_USIO_PORTS][2]; + +#define MLB_USIO_REG_SMR 0 +#define MLB_USIO_REG_SCR 1 +#define MLB_USIO_REG_ESCR 2 +#define MLB_USIO_REG_SSR 3 +#define MLB_USIO_REG_DR4 +#define MLB_USIO_REG_BGR 6 +#define MLB_USIO_REG_FCR 12 +#define MLB_USIO_REG_FBYTE 14 + +#define MLB_USIO_SMR_SOE BIT(0) +#define MLB_USIO_SMR_SBL BIT(3) +#define MLB_USIO_SCR_TXE BIT(0) +#define MLB_USIO_SCR_RXE BIT(1) +#define MLB_USIO_SCR_TBIE BIT(2) +#define MLB_USIO_SCR_TIE BIT(3) +#define MLB_USIO_SCR_RIE BIT(4) +#define MLB_USIO_SCR_UPCL BIT(7) +#define MLB_USIO_ESCR_L_8BIT 0 +#define MLB_USIO_ESCR_L_5BIT 1 +#define MLB_USIO_ESCR_L_6BIT 2 +#define MLB_USIO_ESCR_L_7BIT 3 +#define MLB_USIO_ESCR_PBIT(3) +#define MLB_USIO_ESCR_PEN BIT(4) +#define MLB_USIO_ESCR_FLWENBIT(7) +#define MLB_USIO_SSR_TBI BIT(0) +#define MLB_USIO_SSR_TDRE BIT(1) +#define MLB_USIO_SSR_RDRF BIT(2) +#define MLB_USIO_SSR_ORE BIT(3) +#define MLB_USIO_SSR_FRE BIT(4) +#define MLB_USIO_SSR_PEBIT(5) +#define MLB_USIO_SSR_REC BIT(7) +#define MLB_USIO_SSR_BRK BIT(8) +#define MLB_USIO_FCR_FE1 BIT(0) +#define MLB_USIO_FCR_FE2 BIT(1) +#define MLB_USIO_FCR_FCL1 BIT(2) +#define MLB_USIO_FCR_FCL2 BIT(3) +#define MLB_USIO_FCR_FSET BIT(4) +#define MLB_USIO_FCR_FTIE BIT(9) +#define MLB_USIO_FCR_FDRQ BIT(10) +#define MLB_USIO_FCR_FRIIE BIT(11) + +static void
