Re: [PATCH v3 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller

[Rob Herring]

On Sat, Aug 12, 2017 at 09:31:04AM +0800, Ryder Lee wrote:
> Add DT bindings for the onboard SATA controller present on the MediaTek
> SoCs.
> 
> Signed-off-by: Ryder Lee 
> ---
>  Documentation/devicetree/bindings/ata/ahci-mtk.txt | 51 
> ++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-mtk.txt 
> b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
> new file mode 100644
> index 000..96c8d22
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
> @@ -0,0 +1,51 @@
> +MediaTek Serial ATA controller
> +
> +Required properties:
> + - compatible   : Must be "mediatek,soc-model-ahci", 
> "mediatek,mtk-ahci".

Instead of "soc-model", pick something checkpatch.pl understands. IIRC, 
"" is one.

With that,

Acked-by: Rob Herring 

Re: [PATCH v3 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller

[Rob Herring]

On Sat, Aug 12, 2017 at 09:31:04AM +0800, Ryder Lee wrote:
> Add DT bindings for the onboard SATA controller present on the MediaTek
> SoCs.
> 
> Signed-off-by: Ryder Lee 
> ---
>  Documentation/devicetree/bindings/ata/ahci-mtk.txt | 51 
> ++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-mtk.txt 
> b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
> new file mode 100644
> index 000..96c8d22
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
> @@ -0,0 +1,51 @@
> +MediaTek Serial ATA controller
> +
> +Required properties:
> + - compatible   : Must be "mediatek,soc-model-ahci", 
> "mediatek,mtk-ahci".

Instead of "soc-model", pick something checkpatch.pl understands. IIRC, 
"" is one.

With that,

Acked-by: Rob Herring 

[PATCH v3 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller

[Ryder Lee]

Add DT bindings for the onboard SATA controller present on the MediaTek
SoCs.

Signed-off-by: Ryder Lee 
---
 Documentation/devicetree/bindings/ata/ahci-mtk.txt | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt

diff --git a/Documentation/devicetree/bindings/ata/ahci-mtk.txt 
b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
new file mode 100644
index 000..96c8d22
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
@@ -0,0 +1,51 @@
+MediaTek Serial ATA controller
+
+Required properties:
+ - compatible : Must be "mediatek,soc-model-ahci", "mediatek,mtk-ahci".
+When using "mediatek,mtk-ahci" compatible strings, you
+need SoC specific ones in addition, one of:
+- "mediatek,mt7622-ahci"
+ - reg: Physical base addresses and length of register sets.
+ - interrupts : Interrupt associated with the SATA device.
+ - interrupt-names : Associated name must be: "hostc".
+ - clocks : A list of phandle and clock specifier pairs, one for each
+entry in clock-names.
+ - clock-names: Associated names must be: "ahb", "axi", "asic", "rbc", 
"pm".
+ - phys   : A phandle and PHY specifier pair for the PHY port.
+ - phy-names  : Associated name must be: "sata-phy".
+ - ports-implemented : See ./ahci-platform.txt for details.
+
+Optional properties:
+ - power-domains   : A phandle and power domain specifier pair to the power
+domain which is responsible for collapsing and restoring
+power to the peripheral.
+ - resets : Must contain an entry for each entry in reset-names.
+See ../reset/reset.txt for details.
+ - reset-names: Associated names must be: "axi", "sw", "reg".
+ - mediatek,phy-mode : A phandle to the system controller, used to enable
+  SATA function.
+
+Example:
+
+   sata: sata@1a20 {
+   compatible = "mediatek,mt7622-ahci",
+"mediatek,mtk-ahci";
+   reg = <0 0x1a20 0 0x1100>;
+   interrupts = ;
+   interrupt-names = "hostc";
+   clocks = < CLK_SATA_AHB_EN>,
+< CLK_SATA_AXI_EN>,
+< CLK_SATA_ASIC_EN>,
+< CLK_SATA_RBC_EN>,
+< CLK_SATA_PM_EN>;
+   clock-names = "ahb", "axi", "asic", "rbc", "pm";
+   phys = < PHY_TYPE_SATA>;
+   phy-names = "sata-phy";
+   ports-implemented = <0x1>;
+   power-domains = < MT7622_POWER_DOMAIN_HIF0>;
+   resets = < MT7622_SATA_AXI_BUS_RST>,
+< MT7622_SATA_PHY_SW_RST>,
+< MT7622_SATA_PHY_REG_RST>;
+   reset-names = "axi", "sw", "reg";
+   mediatek,phy-mode = <>;
+   };
-- 
1.9.1

[PATCH v3 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller

[Ryder Lee]

Add DT bindings for the onboard SATA controller present on the MediaTek
SoCs.

Signed-off-by: Ryder Lee 
---
 Documentation/devicetree/bindings/ata/ahci-mtk.txt | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt

diff --git a/Documentation/devicetree/bindings/ata/ahci-mtk.txt 
b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
new file mode 100644
index 000..96c8d22
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-mtk.txt
@@ -0,0 +1,51 @@
+MediaTek Serial ATA controller
+
+Required properties:
+ - compatible : Must be "mediatek,soc-model-ahci", "mediatek,mtk-ahci".
+When using "mediatek,mtk-ahci" compatible strings, you
+need SoC specific ones in addition, one of:
+- "mediatek,mt7622-ahci"
+ - reg: Physical base addresses and length of register sets.
+ - interrupts : Interrupt associated with the SATA device.
+ - interrupt-names : Associated name must be: "hostc".
+ - clocks : A list of phandle and clock specifier pairs, one for each
+entry in clock-names.
+ - clock-names: Associated names must be: "ahb", "axi", "asic", "rbc", 
"pm".
+ - phys   : A phandle and PHY specifier pair for the PHY port.
+ - phy-names  : Associated name must be: "sata-phy".
+ - ports-implemented : See ./ahci-platform.txt for details.
+
+Optional properties:
+ - power-domains   : A phandle and power domain specifier pair to the power
+domain which is responsible for collapsing and restoring
+power to the peripheral.
+ - resets : Must contain an entry for each entry in reset-names.
+See ../reset/reset.txt for details.
+ - reset-names: Associated names must be: "axi", "sw", "reg".
+ - mediatek,phy-mode : A phandle to the system controller, used to enable
+  SATA function.
+
+Example:
+
+   sata: sata@1a20 {
+   compatible = "mediatek,mt7622-ahci",
+"mediatek,mtk-ahci";
+   reg = <0 0x1a20 0 0x1100>;
+   interrupts = ;
+   interrupt-names = "hostc";
+   clocks = < CLK_SATA_AHB_EN>,
+< CLK_SATA_AXI_EN>,
+< CLK_SATA_ASIC_EN>,
+< CLK_SATA_RBC_EN>,
+< CLK_SATA_PM_EN>;
+   clock-names = "ahb", "axi", "asic", "rbc", "pm";
+   phys = < PHY_TYPE_SATA>;
+   phy-names = "sata-phy";
+   ports-implemented = <0x1>;
+   power-domains = < MT7622_POWER_DOMAIN_HIF0>;
+   resets = < MT7622_SATA_AXI_BUS_RST>,
+< MT7622_SATA_PHY_SW_RST>,
+< MT7622_SATA_PHY_REG_RST>;
+   reset-names = "axi", "sw", "reg";
+   mediatek,phy-mode = <>;
+   };
-- 
1.9.1