Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
On Thu, 2018-07-12 at 17:53 +1000, Joel Stanley wrote: > On 12 July 2018 at 13:48, Benjamin Herrenschmidt > wrote: > > The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which > > is currently unused on OpenPower systems. > > > > This adds an alternative to the fsi-master-gpio driver that > > uses that coprocessor instead of bit banging from the ARM > > core itself. The end result is about 4 times faster. > > > > The firmware for the coprocessor and its source code can be > > found at https://github.com/ozbenh/cf-fsi and is system specific. > > > > Signed-off-by: Benjamin Herrenschmidt > > --- > > drivers/fsi/Kconfig |9 + > > drivers/fsi/Makefile |1 + > > drivers/fsi/cf-fsi-fw.h | 157 +++ > > drivers/fsi/fsi-master-ast-cf.c | 1438 ++ > > include/trace/events/fsi_master_ast_cf.h | 150 +++ > > 5 files changed, 1755 insertions(+) > > create mode 100644 drivers/fsi/cf-fsi-fw.h > > create mode 100644 drivers/fsi/fsi-master-ast-cf.c > > create mode 100644 include/trace/events/fsi_master_ast_cf.h > > > > diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig > > index 322cec393cf2..e0220d1e1357 100644 > > --- a/drivers/fsi/Kconfig > > +++ b/drivers/fsi/Kconfig > > @@ -27,6 +27,15 @@ config FSI_MASTER_HUB > > allow chaining of FSI links to an arbitrary depth. This allows for > > a high target device fanout. > > > > +config FSI_MASTER_AST_CF > > + tristate "FSI master based on Aspeed ColdFire coprocessor" > > + depends on GPIOLIB > > + depends on GPIO_ASPEED > > + ---help--- > > + This option enables a FSI master using the AST2400 and AST2500 GPIO > > + lines driven by the internal ColdFire coprocessor. This requires > > + the corresponding machine specific ColdFire firmware to be > > available. > > The "machine specific" part isn't true anymore, is it? Right, I'll fixup the changelog before pushing if that's the last spin. > I gave this a spin on a palmetto and it appeared to work fine for me. > > Tested-by: Joel Stanley Thanks ! Cheers, Ben .
Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
On Thu, 2018-07-12 at 17:53 +1000, Joel Stanley wrote: > On 12 July 2018 at 13:48, Benjamin Herrenschmidt > wrote: > > The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which > > is currently unused on OpenPower systems. > > > > This adds an alternative to the fsi-master-gpio driver that > > uses that coprocessor instead of bit banging from the ARM > > core itself. The end result is about 4 times faster. > > > > The firmware for the coprocessor and its source code can be > > found at https://github.com/ozbenh/cf-fsi and is system specific. > > > > Signed-off-by: Benjamin Herrenschmidt > > --- > > drivers/fsi/Kconfig |9 + > > drivers/fsi/Makefile |1 + > > drivers/fsi/cf-fsi-fw.h | 157 +++ > > drivers/fsi/fsi-master-ast-cf.c | 1438 ++ > > include/trace/events/fsi_master_ast_cf.h | 150 +++ > > 5 files changed, 1755 insertions(+) > > create mode 100644 drivers/fsi/cf-fsi-fw.h > > create mode 100644 drivers/fsi/fsi-master-ast-cf.c > > create mode 100644 include/trace/events/fsi_master_ast_cf.h > > > > diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig > > index 322cec393cf2..e0220d1e1357 100644 > > --- a/drivers/fsi/Kconfig > > +++ b/drivers/fsi/Kconfig > > @@ -27,6 +27,15 @@ config FSI_MASTER_HUB > > allow chaining of FSI links to an arbitrary depth. This allows for > > a high target device fanout. > > > > +config FSI_MASTER_AST_CF > > + tristate "FSI master based on Aspeed ColdFire coprocessor" > > + depends on GPIOLIB > > + depends on GPIO_ASPEED > > + ---help--- > > + This option enables a FSI master using the AST2400 and AST2500 GPIO > > + lines driven by the internal ColdFire coprocessor. This requires > > + the corresponding machine specific ColdFire firmware to be > > available. > > The "machine specific" part isn't true anymore, is it? Right, I'll fixup the changelog before pushing if that's the last spin. > I gave this a spin on a palmetto and it appeared to work fine for me. > > Tested-by: Joel Stanley Thanks ! Cheers, Ben .
Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
On 12 July 2018 at 13:48, Benjamin Herrenschmidt wrote: > The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which > is currently unused on OpenPower systems. > > This adds an alternative to the fsi-master-gpio driver that > uses that coprocessor instead of bit banging from the ARM > core itself. The end result is about 4 times faster. > > The firmware for the coprocessor and its source code can be > found at https://github.com/ozbenh/cf-fsi and is system specific. > > Signed-off-by: Benjamin Herrenschmidt > --- > drivers/fsi/Kconfig |9 + > drivers/fsi/Makefile |1 + > drivers/fsi/cf-fsi-fw.h | 157 +++ > drivers/fsi/fsi-master-ast-cf.c | 1438 ++ > include/trace/events/fsi_master_ast_cf.h | 150 +++ > 5 files changed, 1755 insertions(+) > create mode 100644 drivers/fsi/cf-fsi-fw.h > create mode 100644 drivers/fsi/fsi-master-ast-cf.c > create mode 100644 include/trace/events/fsi_master_ast_cf.h > > diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig > index 322cec393cf2..e0220d1e1357 100644 > --- a/drivers/fsi/Kconfig > +++ b/drivers/fsi/Kconfig > @@ -27,6 +27,15 @@ config FSI_MASTER_HUB > allow chaining of FSI links to an arbitrary depth. This allows for > a high target device fanout. > > +config FSI_MASTER_AST_CF > + tristate "FSI master based on Aspeed ColdFire coprocessor" > + depends on GPIOLIB > + depends on GPIO_ASPEED > + ---help--- > + This option enables a FSI master using the AST2400 and AST2500 GPIO > + lines driven by the internal ColdFire coprocessor. This requires > + the corresponding machine specific ColdFire firmware to be available. The "machine specific" part isn't true anymore, is it? I gave this a spin on a palmetto and it appeared to work fine for me. Tested-by: Joel Stanley
Re: [PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
On 12 July 2018 at 13:48, Benjamin Herrenschmidt wrote: > The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which > is currently unused on OpenPower systems. > > This adds an alternative to the fsi-master-gpio driver that > uses that coprocessor instead of bit banging from the ARM > core itself. The end result is about 4 times faster. > > The firmware for the coprocessor and its source code can be > found at https://github.com/ozbenh/cf-fsi and is system specific. > > Signed-off-by: Benjamin Herrenschmidt > --- > drivers/fsi/Kconfig |9 + > drivers/fsi/Makefile |1 + > drivers/fsi/cf-fsi-fw.h | 157 +++ > drivers/fsi/fsi-master-ast-cf.c | 1438 ++ > include/trace/events/fsi_master_ast_cf.h | 150 +++ > 5 files changed, 1755 insertions(+) > create mode 100644 drivers/fsi/cf-fsi-fw.h > create mode 100644 drivers/fsi/fsi-master-ast-cf.c > create mode 100644 include/trace/events/fsi_master_ast_cf.h > > diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig > index 322cec393cf2..e0220d1e1357 100644 > --- a/drivers/fsi/Kconfig > +++ b/drivers/fsi/Kconfig > @@ -27,6 +27,15 @@ config FSI_MASTER_HUB > allow chaining of FSI links to an arbitrary depth. This allows for > a high target device fanout. > > +config FSI_MASTER_AST_CF > + tristate "FSI master based on Aspeed ColdFire coprocessor" > + depends on GPIOLIB > + depends on GPIO_ASPEED > + ---help--- > + This option enables a FSI master using the AST2400 and AST2500 GPIO > + lines driven by the internal ColdFire coprocessor. This requires > + the corresponding machine specific ColdFire firmware to be available. The "machine specific" part isn't true anymore, is it? I gave this a spin on a palmetto and it appeared to work fine for me. Tested-by: Joel Stanley
[PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which is currently unused on OpenPower systems. This adds an alternative to the fsi-master-gpio driver that uses that coprocessor instead of bit banging from the ARM core itself. The end result is about 4 times faster. The firmware for the coprocessor and its source code can be found at https://github.com/ozbenh/cf-fsi and is system specific. Signed-off-by: Benjamin Herrenschmidt --- drivers/fsi/Kconfig |9 + drivers/fsi/Makefile |1 + drivers/fsi/cf-fsi-fw.h | 157 +++ drivers/fsi/fsi-master-ast-cf.c | 1438 ++ include/trace/events/fsi_master_ast_cf.h | 150 +++ 5 files changed, 1755 insertions(+) create mode 100644 drivers/fsi/cf-fsi-fw.h create mode 100644 drivers/fsi/fsi-master-ast-cf.c create mode 100644 include/trace/events/fsi_master_ast_cf.h diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig index 322cec393cf2..e0220d1e1357 100644 --- a/drivers/fsi/Kconfig +++ b/drivers/fsi/Kconfig @@ -27,6 +27,15 @@ config FSI_MASTER_HUB allow chaining of FSI links to an arbitrary depth. This allows for a high target device fanout. +config FSI_MASTER_AST_CF + tristate "FSI master based on Aspeed ColdFire coprocessor" + depends on GPIOLIB + depends on GPIO_ASPEED + ---help--- + This option enables a FSI master using the AST2400 and AST2500 GPIO + lines driven by the internal ColdFire coprocessor. This requires + the corresponding machine specific ColdFire firmware to be available. + config FSI_SCOM tristate "SCOM FSI client device driver" ---help--- diff --git a/drivers/fsi/Makefile b/drivers/fsi/Makefile index 75fdc6d8cfc4..62687ec86d2e 100644 --- a/drivers/fsi/Makefile +++ b/drivers/fsi/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_FSI) += fsi-core.o obj-$(CONFIG_FSI_MASTER_HUB) += fsi-master-hub.o obj-$(CONFIG_FSI_MASTER_GPIO) += fsi-master-gpio.o +obj-$(CONFIG_FSI_MASTER_AST_CF) += fsi-master-ast-cf.o obj-$(CONFIG_FSI_SCOM) += fsi-scom.o obj-$(CONFIG_FSI_SBEFIFO) += fsi-sbefifo.o obj-$(CONFIG_FSI_OCC) += fsi-occ.o diff --git a/drivers/fsi/cf-fsi-fw.h b/drivers/fsi/cf-fsi-fw.h new file mode 100644 index ..712df0461911 --- /dev/null +++ b/drivers/fsi/cf-fsi-fw.h @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0+ +#ifndef __CF_FSI_FW_H +#define __CF_FSI_FW_H + +/* + * uCode file layout + * + * ...03ff : m68k exception vectors + * 0400...04ff : Header info & boot config block + * 0500... : Code & stack + */ + +/* + * Header info & boot config area + * + * The Header info is built into the ucode and provide version and + * platform information. + * + * the Boot config needs to be adjusted by the ARM prior to starting + * the ucode if the Command/Status area isn't at 0x32 in CF space + * (ie. beginning of SRAM). + */ + +#define HDR_OFFSET 0x400 + +/* Info: Signature & version */ +#define HDR_SYS_SIG0x00/* 2 bytes system signature */ +#define SYS_SIG_SHARED0x5348 +#define SYS_SIG_SPLIT 0x5350 +#define HDR_FW_VERS0x02/* 2 bytes Major.Minor */ +#define HDR_API_VERS 0x04/* 2 bytes Major.Minor */ +#define API_VERSION_MAJ 2 /* Current version */ +#define API_VERSION_MIN 1 +#define HDR_FW_OPTIONS 0x08/* 4 bytes option flags */ +#define FW_OPTION_TRACE_EN0x0001 /* FW tracing enabled */ +#define FW_OPTION_CONT_CLOCK 0x0002 /* Continuous clocking supported */ +#define HDR_FW_SIZE0x10/* 4 bytes size for combo image */ + +/* Boot Config: Address of Command/Status area */ +#define HDR_CMD_STAT_AREA 0x80/* 4 bytes CF address */ +#define HDR_FW_CONTROL 0x84/* 4 bytes control flags */ +#define FW_CONTROL_CONT_CLOCK 0x0002 /* Continuous clocking enabled */ +#define FW_CONTROL_DUMMY_RD0x0004 /* Extra dummy read (AST2400) */ +#define FW_CONTROL_USE_STOP0x0008 /* Use STOP instructions */ +#define HDR_CLOCK_GPIO_VADDR 0x90/* 2 bytes offset from GPIO base */ +#define HDR_CLOCK_GPIO_DADDR 0x92/* 2 bytes offset from GPIO base */ +#define HDR_DATA_GPIO_VADDR0x94/* 2 bytes offset from GPIO base */ +#define HDR_DATA_GPIO_DADDR0x96/* 2 bytes offset from GPIO base */ +#define HDR_TRANS_GPIO_VADDR 0x98/* 2 bytes offset from GPIO base */ +#define HDR_TRANS_GPIO_DADDR 0x9a/* 2 bytes offset from GPIO base */ +#define HDR_CLOCK_GPIO_BIT 0x9c/* 1 byte bit number */ +#define HDR_DATA_GPIO_BIT 0x9d/* 1 byte bit number */ +#define HDR_TRANS_GPIO_BIT 0x9e/* 1 byte bit number */ + +/* + * Command/Status area layout: Main part + */ + +/* Command/Status register: + * + * +---+ + * | STAT | RLEN | CLEN | CMD | + * | 8 | 8 | 8 | 8 | + *
[PATCH v3 3/5] fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire
The Aspeed AST2x00 can contain a ColdFire v1 coprocessor which is currently unused on OpenPower systems. This adds an alternative to the fsi-master-gpio driver that uses that coprocessor instead of bit banging from the ARM core itself. The end result is about 4 times faster. The firmware for the coprocessor and its source code can be found at https://github.com/ozbenh/cf-fsi and is system specific. Signed-off-by: Benjamin Herrenschmidt --- drivers/fsi/Kconfig |9 + drivers/fsi/Makefile |1 + drivers/fsi/cf-fsi-fw.h | 157 +++ drivers/fsi/fsi-master-ast-cf.c | 1438 ++ include/trace/events/fsi_master_ast_cf.h | 150 +++ 5 files changed, 1755 insertions(+) create mode 100644 drivers/fsi/cf-fsi-fw.h create mode 100644 drivers/fsi/fsi-master-ast-cf.c create mode 100644 include/trace/events/fsi_master_ast_cf.h diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig index 322cec393cf2..e0220d1e1357 100644 --- a/drivers/fsi/Kconfig +++ b/drivers/fsi/Kconfig @@ -27,6 +27,15 @@ config FSI_MASTER_HUB allow chaining of FSI links to an arbitrary depth. This allows for a high target device fanout. +config FSI_MASTER_AST_CF + tristate "FSI master based on Aspeed ColdFire coprocessor" + depends on GPIOLIB + depends on GPIO_ASPEED + ---help--- + This option enables a FSI master using the AST2400 and AST2500 GPIO + lines driven by the internal ColdFire coprocessor. This requires + the corresponding machine specific ColdFire firmware to be available. + config FSI_SCOM tristate "SCOM FSI client device driver" ---help--- diff --git a/drivers/fsi/Makefile b/drivers/fsi/Makefile index 75fdc6d8cfc4..62687ec86d2e 100644 --- a/drivers/fsi/Makefile +++ b/drivers/fsi/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_FSI) += fsi-core.o obj-$(CONFIG_FSI_MASTER_HUB) += fsi-master-hub.o obj-$(CONFIG_FSI_MASTER_GPIO) += fsi-master-gpio.o +obj-$(CONFIG_FSI_MASTER_AST_CF) += fsi-master-ast-cf.o obj-$(CONFIG_FSI_SCOM) += fsi-scom.o obj-$(CONFIG_FSI_SBEFIFO) += fsi-sbefifo.o obj-$(CONFIG_FSI_OCC) += fsi-occ.o diff --git a/drivers/fsi/cf-fsi-fw.h b/drivers/fsi/cf-fsi-fw.h new file mode 100644 index ..712df0461911 --- /dev/null +++ b/drivers/fsi/cf-fsi-fw.h @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0+ +#ifndef __CF_FSI_FW_H +#define __CF_FSI_FW_H + +/* + * uCode file layout + * + * ...03ff : m68k exception vectors + * 0400...04ff : Header info & boot config block + * 0500... : Code & stack + */ + +/* + * Header info & boot config area + * + * The Header info is built into the ucode and provide version and + * platform information. + * + * the Boot config needs to be adjusted by the ARM prior to starting + * the ucode if the Command/Status area isn't at 0x32 in CF space + * (ie. beginning of SRAM). + */ + +#define HDR_OFFSET 0x400 + +/* Info: Signature & version */ +#define HDR_SYS_SIG0x00/* 2 bytes system signature */ +#define SYS_SIG_SHARED0x5348 +#define SYS_SIG_SPLIT 0x5350 +#define HDR_FW_VERS0x02/* 2 bytes Major.Minor */ +#define HDR_API_VERS 0x04/* 2 bytes Major.Minor */ +#define API_VERSION_MAJ 2 /* Current version */ +#define API_VERSION_MIN 1 +#define HDR_FW_OPTIONS 0x08/* 4 bytes option flags */ +#define FW_OPTION_TRACE_EN0x0001 /* FW tracing enabled */ +#define FW_OPTION_CONT_CLOCK 0x0002 /* Continuous clocking supported */ +#define HDR_FW_SIZE0x10/* 4 bytes size for combo image */ + +/* Boot Config: Address of Command/Status area */ +#define HDR_CMD_STAT_AREA 0x80/* 4 bytes CF address */ +#define HDR_FW_CONTROL 0x84/* 4 bytes control flags */ +#define FW_CONTROL_CONT_CLOCK 0x0002 /* Continuous clocking enabled */ +#define FW_CONTROL_DUMMY_RD0x0004 /* Extra dummy read (AST2400) */ +#define FW_CONTROL_USE_STOP0x0008 /* Use STOP instructions */ +#define HDR_CLOCK_GPIO_VADDR 0x90/* 2 bytes offset from GPIO base */ +#define HDR_CLOCK_GPIO_DADDR 0x92/* 2 bytes offset from GPIO base */ +#define HDR_DATA_GPIO_VADDR0x94/* 2 bytes offset from GPIO base */ +#define HDR_DATA_GPIO_DADDR0x96/* 2 bytes offset from GPIO base */ +#define HDR_TRANS_GPIO_VADDR 0x98/* 2 bytes offset from GPIO base */ +#define HDR_TRANS_GPIO_DADDR 0x9a/* 2 bytes offset from GPIO base */ +#define HDR_CLOCK_GPIO_BIT 0x9c/* 1 byte bit number */ +#define HDR_DATA_GPIO_BIT 0x9d/* 1 byte bit number */ +#define HDR_TRANS_GPIO_BIT 0x9e/* 1 byte bit number */ + +/* + * Command/Status area layout: Main part + */ + +/* Command/Status register: + * + * +---+ + * | STAT | RLEN | CLEN | CMD | + * | 8 | 8 | 8 | 8 | + *
