Re: [PATCH v3 3/7] dt-bindings: clock: Add Keem Bay clock IDs
On Tue, 2020-07-14 at 15:12 -0600, Rob Herring wrote: > On Tue, Jul 14, 2020 at 05:13:01PM +0100, Daniele Alessandrelli > wrote: > > From: Daniele Alessandrelli > > > > Add clock dt-bindings for Keem Bay SoC. > > Where's the binding schema? I should have specified that they are SCMI clocks. Anyway, when I split the original patchset (change done in v2) I had to remove SCMI support from the DT, so these bindings (and the power domain ones) are currently unused. So, probably, the right thing to do is to drop them for now. I'll do that in v4. > > > Signed-off-by: Daniele Alessandrelli < > > daniele.alessandre...@intel.com> > > --- > > include/dt-bindings/clock/keembay-clocks.h | 188 > > + > > 1 file changed, 188 insertions(+) > > create mode 100644 include/dt-bindings/clock/keembay-clocks.h > > > > diff --git a/include/dt-bindings/clock/keembay-clocks.h > > b/include/dt-bindings/clock/keembay-clocks.h > > new file mode 100644 > > index ..4ad6616ee8e0 > > --- /dev/null > > +++ b/include/dt-bindings/clock/keembay-clocks.h > > @@ -0,0 +1,188 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ > > +/* > > + * Copyright (c) 2020 Intel Corporation. > > + * > > + * Device tree defines for clocks in Keem Bay. > > + */ > > + > > +#ifndef __DT_BINDINGS_KEEMBAY_CLOCKS_H > > +#define __DT_BINDINGS_KEEMBAY_CLOCKS_H > > + > > +/* CPR_PLL region. CLK_ID: 0 - 11 */ > > +#define KEEM_BAY_A53_PLL_START_ID (0) > > +#define KEEM_BAY_A53_PLL_0_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 0) > > +#define KEEM_BAY_A53_PLL_0_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 1) > > +#define KEEM_BAY_A53_PLL_0_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 2) > > +#define KEEM_BAY_A53_PLL_0_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 3) > > +#define KEEM_BAY_A53_PLL_1_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 4) > > +#define KEEM_BAY_A53_PLL_1_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 5) > > +#define KEEM_BAY_A53_PLL_1_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 6) > > +#define KEEM_BAY_A53_PLL_1_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 7) > > +#define KEEM_BAY_A53_PLL_2_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 8) > > +#define KEEM_BAY_A53_PLL_2_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 9) > > +#define KEEM_BAY_A53_PLL_2_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 10) > > +#define KEEM_BAY_A53_PLL_2_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 11) > > +#define KEEM_BAY_A53_PLL_MAX_ID (KEEM_BAY_A53_PLL_2_OUT_3) > > + > > +/* A53_CPR region. CLK_ID: 12 - 30 */ > > +#define KEEM_BAY_A53_START_ID (KEEM_BAY_A53_PLL_MAX_ID + 1) > > +#define KEEM_BAY_A53_AON (KEEM_BAY_A53_START_ID + 0) > > +#define KEEM_BAY_A53_NOC (KEEM_BAY_A53_START_ID + 1) > > +#define KEEM_BAY_A53_FUSE (KEEM_BAY_A53_START_ID + 2) > > +#define KEEM_BAY_A53_ROM (KEEM_BAY_A53_START_ID + 3) > > +#define KEEM_BAY_A53_ICB (KEEM_BAY_A53_START_ID + 4) > > +#define KEEM_BAY_A53_GIC (KEEM_BAY_A53_START_ID + 5) > > +#define KEEM_BAY_A53_TIM (KEEM_BAY_A53_START_ID + 6) > > +#define KEEM_BAY_A53_GPIO (KEEM_BAY_A53_START_ID + 7) > > +#define KEEM_BAY_A53_JTAG (KEEM_BAY_A53_START_ID + 8) > > +#define KEEM_BAY_A53_MBIST_0 (KEEM_BAY_A53_START_ID + 9) > > +#define KEEM_BAY_A53_DSS (KEEM_BAY_A53_START_ID + 10) > > +#define KEEM_BAY_A53_MSS (KEEM_BAY_A53_START_ID + 11) > > +#define KEEM_BAY_A53_PSS (KEEM_BAY_A53_START_ID + 12) > > +#define KEEM_BAY_A53_PCIE (KEEM_BAY_A53_START_ID + 13) > > +#define KEEM_BAY_A53_VENC (KEEM_BAY_A53_START_ID + 14) > > +#define KEEM_BAY_A53_VDEC (KEEM_BAY_A53_START_ID + 15) > > +#define KEEM_BAY_A53_MBIST_1 (KEEM_BAY_A53_START_ID + 16) > > +#define KEEM_BAY_A53_MBIST_2 (KEEM_BAY_A53_START_ID + 17) > > +#define KEEM_BAY_A53_MBIST_3 (KEEM_BAY_A53_START_ID + 18) > > +#define KEEM_BAY_A53_MAX_ID (KEEM_BAY_A53_MBIST_3) > > + > > +/* A53_CPR_AUX region. CLK_ID: 31 - 57 */ > > +#define KEEM_BAY_A53_AUX_START_ID (KEEM_BAY_A53_MAX_ID + 1) > > +#define KEEM_BAY_A53_AUX_32KHZ (KEEM_BAY_A53_AUX_START_ID + 0) > > +#define KEEM_BAY_A53_AUX_CPR (KEEM_BAY_A53_AUX_START_ID + 1) > > +#define KEEM_BAY_A53_AUX_TSENS (KEEM_BAY_A53_AUX_START_ID + 2) > > +#define KEEM_BAY_A53_AUX_GPIO0 (KEEM_BAY_A53_AUX_START_ID + 3) > > +#define KEEM_BAY_A53_AUX_GPIO1 (KEEM_BAY_A53_AUX_START_ID + 4) > > +#define KEEM_BAY_A53_AUX_GPIO2 (KEEM_BAY_A53_AUX_START_ID + 5) > > +#define KEEM_BAY_A53_AUX_GPIO3 (KEEM_BAY_A53_AUX_START_ID + 6) > > +#define KEEM_BAY_A53_AUX_DDR_REF (KEEM_BAY_A53_AUX_START_ID + 7) > > +#define KEEM_BAY_A53_AUX_DDR_REF_BYPASS (KEEM_BAY_A53_AUX_START_ID > > + 8) > > +#define KEEM_BAY_A53_AUX_RESERVED1 (KEEM_BAY_A53_AUX_START_ID + 9) > > +#define KEEM_BAY_A53_AUX_VENC (KEEM_BAY_A53_AUX_START_ID + 10) > > +#define KEEM_BAY_A53_AUX_VDEC (KEEM_BAY_A53_AUX_START_ID + 11) > > +#define KEEM_BAY_A53_AUX_USOC_USB_CTRL (KEEM_BAY_A53_AUX_START_ID > > + 12) > > +#define KEEM_BAY_A53_AUX_USB (KEEM_BAY_A53_AUX_START_ID + 13) > > +#define KEEM_BAY_A53_AUX_USB_REF (KEEM_BAY_A53_AUX_START_ID + 14) > > +#define KEEM_BAY_A53_AUX_USB_ALT_REF (KEEM_BAY_A53_AUX_START_ID + > > 15) > > +#define KEEM_BAY_A53_AUX_USB_SUSPEND
Re: [PATCH v3 3/7] dt-bindings: clock: Add Keem Bay clock IDs
On Tue, Jul 14, 2020 at 05:13:01PM +0100, Daniele Alessandrelli wrote: > From: Daniele Alessandrelli > > Add clock dt-bindings for Keem Bay SoC. Where's the binding schema? > > Signed-off-by: Daniele Alessandrelli > --- > include/dt-bindings/clock/keembay-clocks.h | 188 + > 1 file changed, 188 insertions(+) > create mode 100644 include/dt-bindings/clock/keembay-clocks.h > > diff --git a/include/dt-bindings/clock/keembay-clocks.h > b/include/dt-bindings/clock/keembay-clocks.h > new file mode 100644 > index ..4ad6616ee8e0 > --- /dev/null > +++ b/include/dt-bindings/clock/keembay-clocks.h > @@ -0,0 +1,188 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ > +/* > + * Copyright (c) 2020 Intel Corporation. > + * > + * Device tree defines for clocks in Keem Bay. > + */ > + > +#ifndef __DT_BINDINGS_KEEMBAY_CLOCKS_H > +#define __DT_BINDINGS_KEEMBAY_CLOCKS_H > + > +/* CPR_PLL region. CLK_ID: 0 - 11 */ > +#define KEEM_BAY_A53_PLL_START_ID (0) > +#define KEEM_BAY_A53_PLL_0_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 0) > +#define KEEM_BAY_A53_PLL_0_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 1) > +#define KEEM_BAY_A53_PLL_0_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 2) > +#define KEEM_BAY_A53_PLL_0_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 3) > +#define KEEM_BAY_A53_PLL_1_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 4) > +#define KEEM_BAY_A53_PLL_1_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 5) > +#define KEEM_BAY_A53_PLL_1_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 6) > +#define KEEM_BAY_A53_PLL_1_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 7) > +#define KEEM_BAY_A53_PLL_2_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 8) > +#define KEEM_BAY_A53_PLL_2_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 9) > +#define KEEM_BAY_A53_PLL_2_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 10) > +#define KEEM_BAY_A53_PLL_2_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 11) > +#define KEEM_BAY_A53_PLL_MAX_ID (KEEM_BAY_A53_PLL_2_OUT_3) > + > +/* A53_CPR region. CLK_ID: 12 - 30 */ > +#define KEEM_BAY_A53_START_ID (KEEM_BAY_A53_PLL_MAX_ID + 1) > +#define KEEM_BAY_A53_AON (KEEM_BAY_A53_START_ID + 0) > +#define KEEM_BAY_A53_NOC (KEEM_BAY_A53_START_ID + 1) > +#define KEEM_BAY_A53_FUSE (KEEM_BAY_A53_START_ID + 2) > +#define KEEM_BAY_A53_ROM (KEEM_BAY_A53_START_ID + 3) > +#define KEEM_BAY_A53_ICB (KEEM_BAY_A53_START_ID + 4) > +#define KEEM_BAY_A53_GIC (KEEM_BAY_A53_START_ID + 5) > +#define KEEM_BAY_A53_TIM (KEEM_BAY_A53_START_ID + 6) > +#define KEEM_BAY_A53_GPIO (KEEM_BAY_A53_START_ID + 7) > +#define KEEM_BAY_A53_JTAG (KEEM_BAY_A53_START_ID + 8) > +#define KEEM_BAY_A53_MBIST_0 (KEEM_BAY_A53_START_ID + 9) > +#define KEEM_BAY_A53_DSS (KEEM_BAY_A53_START_ID + 10) > +#define KEEM_BAY_A53_MSS (KEEM_BAY_A53_START_ID + 11) > +#define KEEM_BAY_A53_PSS (KEEM_BAY_A53_START_ID + 12) > +#define KEEM_BAY_A53_PCIE (KEEM_BAY_A53_START_ID + 13) > +#define KEEM_BAY_A53_VENC (KEEM_BAY_A53_START_ID + 14) > +#define KEEM_BAY_A53_VDEC (KEEM_BAY_A53_START_ID + 15) > +#define KEEM_BAY_A53_MBIST_1 (KEEM_BAY_A53_START_ID + 16) > +#define KEEM_BAY_A53_MBIST_2 (KEEM_BAY_A53_START_ID + 17) > +#define KEEM_BAY_A53_MBIST_3 (KEEM_BAY_A53_START_ID + 18) > +#define KEEM_BAY_A53_MAX_ID (KEEM_BAY_A53_MBIST_3) > + > +/* A53_CPR_AUX region. CLK_ID: 31 - 57 */ > +#define KEEM_BAY_A53_AUX_START_ID (KEEM_BAY_A53_MAX_ID + 1) > +#define KEEM_BAY_A53_AUX_32KHZ (KEEM_BAY_A53_AUX_START_ID + 0) > +#define KEEM_BAY_A53_AUX_CPR (KEEM_BAY_A53_AUX_START_ID + 1) > +#define KEEM_BAY_A53_AUX_TSENS (KEEM_BAY_A53_AUX_START_ID + 2) > +#define KEEM_BAY_A53_AUX_GPIO0 (KEEM_BAY_A53_AUX_START_ID + 3) > +#define KEEM_BAY_A53_AUX_GPIO1 (KEEM_BAY_A53_AUX_START_ID + 4) > +#define KEEM_BAY_A53_AUX_GPIO2 (KEEM_BAY_A53_AUX_START_ID + 5) > +#define KEEM_BAY_A53_AUX_GPIO3 (KEEM_BAY_A53_AUX_START_ID + 6) > +#define KEEM_BAY_A53_AUX_DDR_REF (KEEM_BAY_A53_AUX_START_ID + 7) > +#define KEEM_BAY_A53_AUX_DDR_REF_BYPASS (KEEM_BAY_A53_AUX_START_ID + 8) > +#define KEEM_BAY_A53_AUX_RESERVED1 (KEEM_BAY_A53_AUX_START_ID + 9) > +#define KEEM_BAY_A53_AUX_VENC (KEEM_BAY_A53_AUX_START_ID + 10) > +#define KEEM_BAY_A53_AUX_VDEC (KEEM_BAY_A53_AUX_START_ID + 11) > +#define KEEM_BAY_A53_AUX_USOC_USB_CTRL (KEEM_BAY_A53_AUX_START_ID + 12) > +#define KEEM_BAY_A53_AUX_USB (KEEM_BAY_A53_AUX_START_ID + 13) > +#define KEEM_BAY_A53_AUX_USB_REF (KEEM_BAY_A53_AUX_START_ID + 14) > +#define KEEM_BAY_A53_AUX_USB_ALT_REF (KEEM_BAY_A53_AUX_START_ID + 15) > +#define KEEM_BAY_A53_AUX_USB_SUSPEND (KEEM_BAY_A53_AUX_START_ID + 16) > +#define KEEM_BAY_A53_AUX_RESERVED2 (KEEM_BAY_A53_AUX_START_ID + 17) > +#define KEEM_BAY_A53_AUX_PCIE (KEEM_BAY_A53_AUX_START_ID + 18) > +#define KEEM_BAY_A53_AUX_DBG_CLK (KEEM_BAY_A53_AUX_START_ID + 19) > +#define KEEM_BAY_A53_AUX_DBG_TRACE (KEEM_BAY_A53_AUX_START_ID + 20) > +#define KEEM_BAY_A53_AUX_DBG_DAP (KEEM_BAY_A53_AUX_START_ID + 21) > +#define KEEM_BAY_A53_AUX_ARM_CLKIN (KEEM_BAY_A53_AUX_START_ID + 22) > +#define KEEM_BAY_A53_AUX_ARM_AXI (KEEM_BAY_A53_AUX_START_ID + 23) > +#define KEEM_BAY_A53_AUX_USOC (KEEM_BAY_A53_AUX_START_ID + 24) > +#define
[PATCH v3 3/7] dt-bindings: clock: Add Keem Bay clock IDs
From: Daniele Alessandrelli Add clock dt-bindings for Keem Bay SoC. Signed-off-by: Daniele Alessandrelli --- include/dt-bindings/clock/keembay-clocks.h | 188 + 1 file changed, 188 insertions(+) create mode 100644 include/dt-bindings/clock/keembay-clocks.h diff --git a/include/dt-bindings/clock/keembay-clocks.h b/include/dt-bindings/clock/keembay-clocks.h new file mode 100644 index ..4ad6616ee8e0 --- /dev/null +++ b/include/dt-bindings/clock/keembay-clocks.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ +/* + * Copyright (c) 2020 Intel Corporation. + * + * Device tree defines for clocks in Keem Bay. + */ + +#ifndef __DT_BINDINGS_KEEMBAY_CLOCKS_H +#define __DT_BINDINGS_KEEMBAY_CLOCKS_H + +/* CPR_PLL region. CLK_ID: 0 - 11 */ +#define KEEM_BAY_A53_PLL_START_ID (0) +#define KEEM_BAY_A53_PLL_0_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 0) +#define KEEM_BAY_A53_PLL_0_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 1) +#define KEEM_BAY_A53_PLL_0_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 2) +#define KEEM_BAY_A53_PLL_0_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 3) +#define KEEM_BAY_A53_PLL_1_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 4) +#define KEEM_BAY_A53_PLL_1_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 5) +#define KEEM_BAY_A53_PLL_1_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 6) +#define KEEM_BAY_A53_PLL_1_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 7) +#define KEEM_BAY_A53_PLL_2_OUT_0 (KEEM_BAY_A53_PLL_START_ID + 8) +#define KEEM_BAY_A53_PLL_2_OUT_1 (KEEM_BAY_A53_PLL_START_ID + 9) +#define KEEM_BAY_A53_PLL_2_OUT_2 (KEEM_BAY_A53_PLL_START_ID + 10) +#define KEEM_BAY_A53_PLL_2_OUT_3 (KEEM_BAY_A53_PLL_START_ID + 11) +#define KEEM_BAY_A53_PLL_MAX_ID (KEEM_BAY_A53_PLL_2_OUT_3) + +/* A53_CPR region. CLK_ID: 12 - 30 */ +#define KEEM_BAY_A53_START_ID (KEEM_BAY_A53_PLL_MAX_ID + 1) +#define KEEM_BAY_A53_AON (KEEM_BAY_A53_START_ID + 0) +#define KEEM_BAY_A53_NOC (KEEM_BAY_A53_START_ID + 1) +#define KEEM_BAY_A53_FUSE (KEEM_BAY_A53_START_ID + 2) +#define KEEM_BAY_A53_ROM (KEEM_BAY_A53_START_ID + 3) +#define KEEM_BAY_A53_ICB (KEEM_BAY_A53_START_ID + 4) +#define KEEM_BAY_A53_GIC (KEEM_BAY_A53_START_ID + 5) +#define KEEM_BAY_A53_TIM (KEEM_BAY_A53_START_ID + 6) +#define KEEM_BAY_A53_GPIO (KEEM_BAY_A53_START_ID + 7) +#define KEEM_BAY_A53_JTAG (KEEM_BAY_A53_START_ID + 8) +#define KEEM_BAY_A53_MBIST_0 (KEEM_BAY_A53_START_ID + 9) +#define KEEM_BAY_A53_DSS (KEEM_BAY_A53_START_ID + 10) +#define KEEM_BAY_A53_MSS (KEEM_BAY_A53_START_ID + 11) +#define KEEM_BAY_A53_PSS (KEEM_BAY_A53_START_ID + 12) +#define KEEM_BAY_A53_PCIE (KEEM_BAY_A53_START_ID + 13) +#define KEEM_BAY_A53_VENC (KEEM_BAY_A53_START_ID + 14) +#define KEEM_BAY_A53_VDEC (KEEM_BAY_A53_START_ID + 15) +#define KEEM_BAY_A53_MBIST_1 (KEEM_BAY_A53_START_ID + 16) +#define KEEM_BAY_A53_MBIST_2 (KEEM_BAY_A53_START_ID + 17) +#define KEEM_BAY_A53_MBIST_3 (KEEM_BAY_A53_START_ID + 18) +#define KEEM_BAY_A53_MAX_ID (KEEM_BAY_A53_MBIST_3) + +/* A53_CPR_AUX region. CLK_ID: 31 - 57 */ +#define KEEM_BAY_A53_AUX_START_ID (KEEM_BAY_A53_MAX_ID + 1) +#define KEEM_BAY_A53_AUX_32KHZ (KEEM_BAY_A53_AUX_START_ID + 0) +#define KEEM_BAY_A53_AUX_CPR (KEEM_BAY_A53_AUX_START_ID + 1) +#define KEEM_BAY_A53_AUX_TSENS (KEEM_BAY_A53_AUX_START_ID + 2) +#define KEEM_BAY_A53_AUX_GPIO0 (KEEM_BAY_A53_AUX_START_ID + 3) +#define KEEM_BAY_A53_AUX_GPIO1 (KEEM_BAY_A53_AUX_START_ID + 4) +#define KEEM_BAY_A53_AUX_GPIO2 (KEEM_BAY_A53_AUX_START_ID + 5) +#define KEEM_BAY_A53_AUX_GPIO3 (KEEM_BAY_A53_AUX_START_ID + 6) +#define KEEM_BAY_A53_AUX_DDR_REF (KEEM_BAY_A53_AUX_START_ID + 7) +#define KEEM_BAY_A53_AUX_DDR_REF_BYPASS (KEEM_BAY_A53_AUX_START_ID + 8) +#define KEEM_BAY_A53_AUX_RESERVED1 (KEEM_BAY_A53_AUX_START_ID + 9) +#define KEEM_BAY_A53_AUX_VENC (KEEM_BAY_A53_AUX_START_ID + 10) +#define KEEM_BAY_A53_AUX_VDEC (KEEM_BAY_A53_AUX_START_ID + 11) +#define KEEM_BAY_A53_AUX_USOC_USB_CTRL (KEEM_BAY_A53_AUX_START_ID + 12) +#define KEEM_BAY_A53_AUX_USB (KEEM_BAY_A53_AUX_START_ID + 13) +#define KEEM_BAY_A53_AUX_USB_REF (KEEM_BAY_A53_AUX_START_ID + 14) +#define KEEM_BAY_A53_AUX_USB_ALT_REF (KEEM_BAY_A53_AUX_START_ID + 15) +#define KEEM_BAY_A53_AUX_USB_SUSPEND (KEEM_BAY_A53_AUX_START_ID + 16) +#define KEEM_BAY_A53_AUX_RESERVED2 (KEEM_BAY_A53_AUX_START_ID + 17) +#define KEEM_BAY_A53_AUX_PCIE (KEEM_BAY_A53_AUX_START_ID + 18) +#define KEEM_BAY_A53_AUX_DBG_CLK (KEEM_BAY_A53_AUX_START_ID + 19) +#define KEEM_BAY_A53_AUX_DBG_TRACE (KEEM_BAY_A53_AUX_START_ID + 20) +#define KEEM_BAY_A53_AUX_DBG_DAP (KEEM_BAY_A53_AUX_START_ID + 21) +#define KEEM_BAY_A53_AUX_ARM_CLKIN (KEEM_BAY_A53_AUX_START_ID + 22) +#define KEEM_BAY_A53_AUX_ARM_AXI (KEEM_BAY_A53_AUX_START_ID + 23) +#define KEEM_BAY_A53_AUX_USOC (KEEM_BAY_A53_AUX_START_ID + 24) +#define KEEM_BAY_A53_AUX_USOC_REF (KEEM_BAY_A53_AUX_START_ID + 25) +#define KEEM_BAY_A53_AUX_USOC_ALT_REF (KEEM_BAY_A53_AUX_START_ID + 26) +#define KEEM_BAY_A53_AUX_MAX_ID (KEEM_BAY_A53_AUX_USOC_ALT_REF) + +/* PSS_CPR region CLK_ID: CLK_ID: 58 - 82 */ +#define KEEM_BAY_PSS_START_ID (KEEM_BAY_A53_AUX_MAX_ID + 1)
