Re: [PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Kishon Vijay Abraham I]

Hi

On Sunday 20 December 2015 09:08 AM, Rob Herring wrote:
> On Tue, Dec 15, 2015 at 02:46:05PM +0530, Kishon Vijay Abraham I wrote:
>> Deprecate using phy-omap-control driver to power on/off the PHY and
>> use *syscon* framework to do the same.
>>
>> Signed-off-by: Kishon Vijay Abraham I 
>> ---
>>  Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
>>  drivers/phy/phy-ti-pipe3.c   |   90 
>> ++
>>  2 files changed, 85 insertions(+), 15 deletions(-)
> 
> For the binding:
> 
> Acked-by: Rob Herring 
> 
> One comment on the driver though.
> 
> [...]
> 
>> --- a/drivers/phy/phy-ti-pipe3.c
>> +++ b/drivers/phy/phy-ti-pipe3.c
> 
> [...]
> 
>> @@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 
>> *phy);
>>  
>>  static int ti_pipe3_power_off(struct phy *x)
>>  {
>> +u32 val;
>> +int ret;
>>  struct ti_pipe3 *phy = phy_get_drvdata(x);
>>  
>> -omap_control_phy_power(phy->control_dev, 0);
>> +if (phy->phy_power_syscon) {
> 
> Writing this as:
> 
> if (!phy->phy_power_syscon) {
>   ...
>   return 0;
> }
> 
> //regmap code
> 
> 
> will make it simpler to remove the deprecated code later.

hmm.. I will make this change in all the applicable patches.

Thanks
Kishon
> 
> 
>> +val = PIPE3_PHY_TX_RX_POWEROFF <<
>> +PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
>> +
>> +ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
>> + PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
>> +if (ret < 0)
>> +return ret;
>> +} else {
>> +omap_control_phy_power(phy->control_dev, 0);
>> +}
>>  
>>  return 0;
--
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Re: [PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Kishon Vijay Abraham I]

Hi

On Sunday 20 December 2015 09:08 AM, Rob Herring wrote:
> On Tue, Dec 15, 2015 at 02:46:05PM +0530, Kishon Vijay Abraham I wrote:
>> Deprecate using phy-omap-control driver to power on/off the PHY and
>> use *syscon* framework to do the same.
>>
>> Signed-off-by: Kishon Vijay Abraham I 
>> ---
>>  Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
>>  drivers/phy/phy-ti-pipe3.c   |   90 
>> ++
>>  2 files changed, 85 insertions(+), 15 deletions(-)
> 
> For the binding:
> 
> Acked-by: Rob Herring 
> 
> One comment on the driver though.
> 
> [...]
> 
>> --- a/drivers/phy/phy-ti-pipe3.c
>> +++ b/drivers/phy/phy-ti-pipe3.c
> 
> [...]
> 
>> @@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 
>> *phy);
>>  
>>  static int ti_pipe3_power_off(struct phy *x)
>>  {
>> +u32 val;
>> +int ret;
>>  struct ti_pipe3 *phy = phy_get_drvdata(x);
>>  
>> -omap_control_phy_power(phy->control_dev, 0);
>> +if (phy->phy_power_syscon) {
> 
> Writing this as:
> 
> if (!phy->phy_power_syscon) {
>   ...
>   return 0;
> }
> 
> //regmap code
> 
> 
> will make it simpler to remove the deprecated code later.

hmm.. I will make this change in all the applicable patches.

Thanks
Kishon
> 
> 
>> +val = PIPE3_PHY_TX_RX_POWEROFF <<
>> +PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
>> +
>> +ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
>> + PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
>> +if (ret < 0)
>> +return ret;
>> +} else {
>> +omap_control_phy_power(phy->control_dev, 0);
>> +}
>>  
>>  return 0;
--
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Re: [PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Rob Herring]

On Tue, Dec 15, 2015 at 02:46:05PM +0530, Kishon Vijay Abraham I wrote:
> Deprecate using phy-omap-control driver to power on/off the PHY and
> use *syscon* framework to do the same.
> 
> Signed-off-by: Kishon Vijay Abraham I 
> ---
>  Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
>  drivers/phy/phy-ti-pipe3.c   |   90 
> ++
>  2 files changed, 85 insertions(+), 15 deletions(-)

For the binding:

Acked-by: Rob Herring 

One comment on the driver though.

[...]

> --- a/drivers/phy/phy-ti-pipe3.c
> +++ b/drivers/phy/phy-ti-pipe3.c

[...]

> @@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 
> *phy);
>  
>  static int ti_pipe3_power_off(struct phy *x)
>  {
> + u32 val;
> + int ret;
>   struct ti_pipe3 *phy = phy_get_drvdata(x);
>  
> - omap_control_phy_power(phy->control_dev, 0);
> + if (phy->phy_power_syscon) {

Writing this as:

if (!phy->phy_power_syscon) {
...
return 0;
}

//regmap code


will make it simpler to remove the deprecated code later.


> + val = PIPE3_PHY_TX_RX_POWEROFF <<
> + PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
> +
> + ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
> +  PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
> + if (ret < 0)
> + return ret;
> + } else {
> + omap_control_phy_power(phy->control_dev, 0);
> + }
>  
>   return 0;
--
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Re: [PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Rob Herring]

On Tue, Dec 15, 2015 at 02:46:05PM +0530, Kishon Vijay Abraham I wrote:
> Deprecate using phy-omap-control driver to power on/off the PHY and
> use *syscon* framework to do the same.
> 
> Signed-off-by: Kishon Vijay Abraham I 
> ---
>  Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
>  drivers/phy/phy-ti-pipe3.c   |   90 
> ++
>  2 files changed, 85 insertions(+), 15 deletions(-)

For the binding:

Acked-by: Rob Herring 

One comment on the driver though.

[...]

> --- a/drivers/phy/phy-ti-pipe3.c
> +++ b/drivers/phy/phy-ti-pipe3.c

[...]

> @@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 
> *phy);
>  
>  static int ti_pipe3_power_off(struct phy *x)
>  {
> + u32 val;
> + int ret;
>   struct ti_pipe3 *phy = phy_get_drvdata(x);
>  
> - omap_control_phy_power(phy->control_dev, 0);
> + if (phy->phy_power_syscon) {

Writing this as:

if (!phy->phy_power_syscon) {
...
return 0;
}

//regmap code


will make it simpler to remove the deprecated code later.


> + val = PIPE3_PHY_TX_RX_POWEROFF <<
> + PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
> +
> + ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
> +  PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
> + if (ret < 0)
> + return ret;
> + } else {
> + omap_control_phy_power(phy->control_dev, 0);
> + }
>  
>   return 0;
--
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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Kishon Vijay Abraham I]

Deprecate using phy-omap-control driver to power on/off the PHY and
use *syscon* framework to do the same.

Signed-off-by: Kishon Vijay Abraham I 
---
 Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
 drivers/phy/phy-ti-pipe3.c   |   90 ++
 2 files changed, 85 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 9cf9446..e06f980 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -77,8 +77,6 @@ Required properties:
* "div-clk" - apll clock
 
 Optional properties:
- - ctrl-module : phandle of the control module used by PHY driver to power on
-   the PHY.
  - id: If there are multiple instance of the same type, in order to
differentiate between each instance "id" can be used (e.g., multi-lane PCIe
PHY). If "id" is not provided, it is set to default value of '1'.
@@ -86,6 +84,14 @@ Optional properties:
CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
 
+Deprecated properties:
+ - ctrl-module : phandle of the control module used by PHY driver to power on
+   the PHY.
+
+Recommended properies:
+ - syscon-phy-power : phandle/offset pair. Phandle to the system control
+   module and the register offset to power on/off the PHY.
+
 This is usually a subnode of ocp2scp to which it is connected.
 
 usb3phy@4a084400 {
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 0ce4194..bc03625 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -56,6 +56,15 @@
 
 #define SATA_PLL_SOFT_RESETBIT(18)
 
+#define PIPE3_PHY_PWRCTL_CLK_CMD_MASK  0x003FC000
+#define PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 14
+
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC0
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT22
+
+#define PIPE3_PHY_TX_RX_POWERON0x3
+#define PIPE3_PHY_TX_RX_POWEROFF   0x0
+
 /*
  * This is an Empirical value that works, need to confirm the actual
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -86,8 +95,10 @@ struct ti_pipe3 {
struct clk  *refclk;
struct clk  *div_clk;
struct pipe3_dpll_map   *dpll_map;
+   struct regmap   *phy_power_syscon; /* ctrl. reg. acces */
struct regmap   *dpll_reset_syscon; /* ctrl. reg. acces */
unsigned intdpll_reset_reg; /* reg. index within syscon */
+   unsigned intpower_reg; /* power reg. index within syscon */
boolsata_refclk_enabled;
 };
 
@@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
 
 static int ti_pipe3_power_off(struct phy *x)
 {
+   u32 val;
+   int ret;
struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-   omap_control_phy_power(phy->control_dev, 0);
+   if (phy->phy_power_syscon) {
+   val = PIPE3_PHY_TX_RX_POWEROFF <<
+   PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+
+   ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
+   if (ret < 0)
+   return ret;
+   } else {
+   omap_control_phy_power(phy->control_dev, 0);
+   }
 
return 0;
 }
 
 static int ti_pipe3_power_on(struct phy *x)
 {
+   u32 val;
+   u32 mask;
+   int ret;
+   unsigned long rate;
struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-   omap_control_phy_power(phy->control_dev, 1);
+   if (phy->phy_power_syscon) {
+   rate = clk_get_rate(phy->sys_clk);
+   if (!rate) {
+   dev_err(phy->dev, "Invalid clock rate\n");
+   return -EINVAL;
+   }
+   rate = rate / 100;
+   mask = OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK;
+   val = PIPE3_PHY_TX_RX_POWERON <<
+   PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+   val |= rate << OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
+
+   ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+mask, val);
+   if (ret < 0)
+   return ret;
+   } else {
+   omap_control_phy_power(phy->control_dev, 1);
+   }
 
return 0;
 }
@@ -334,7 +380,8 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy)
phy->wkupclk = ERR_PTR(-ENODEV);
}
 
-   if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
+   if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie") ||
+   phy->phy_power_syscon) {
phy->sys_clk = 

[PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

[Kishon Vijay Abraham I]

Deprecate using phy-omap-control driver to power on/off the PHY and
use *syscon* framework to do the same.

Signed-off-by: Kishon Vijay Abraham I 
---
 Documentation/devicetree/bindings/phy/ti-phy.txt |   10 ++-
 drivers/phy/phy-ti-pipe3.c   |   90 ++
 2 files changed, 85 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 9cf9446..e06f980 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -77,8 +77,6 @@ Required properties:
* "div-clk" - apll clock
 
 Optional properties:
- - ctrl-module : phandle of the control module used by PHY driver to power on
-   the PHY.
  - id: If there are multiple instance of the same type, in order to
differentiate between each instance "id" can be used (e.g., multi-lane PCIe
PHY). If "id" is not provided, it is set to default value of '1'.
@@ -86,6 +84,14 @@ Optional properties:
CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
 
+Deprecated properties:
+ - ctrl-module : phandle of the control module used by PHY driver to power on
+   the PHY.
+
+Recommended properies:
+ - syscon-phy-power : phandle/offset pair. Phandle to the system control
+   module and the register offset to power on/off the PHY.
+
 This is usually a subnode of ocp2scp to which it is connected.
 
 usb3phy@4a084400 {
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 0ce4194..bc03625 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -56,6 +56,15 @@
 
 #define SATA_PLL_SOFT_RESETBIT(18)
 
+#define PIPE3_PHY_PWRCTL_CLK_CMD_MASK  0x003FC000
+#define PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 14
+
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC0
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT22
+
+#define PIPE3_PHY_TX_RX_POWERON0x3
+#define PIPE3_PHY_TX_RX_POWEROFF   0x0
+
 /*
  * This is an Empirical value that works, need to confirm the actual
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -86,8 +95,10 @@ struct ti_pipe3 {
struct clk  *refclk;
struct clk  *div_clk;
struct pipe3_dpll_map   *dpll_map;
+   struct regmap   *phy_power_syscon; /* ctrl. reg. acces */
struct regmap   *dpll_reset_syscon; /* ctrl. reg. acces */
unsigned intdpll_reset_reg; /* reg. index within syscon */
+   unsigned intpower_reg; /* power reg. index within syscon */
boolsata_refclk_enabled;
 };
 
@@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
 
 static int ti_pipe3_power_off(struct phy *x)
 {
+   u32 val;
+   int ret;
struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-   omap_control_phy_power(phy->control_dev, 0);
+   if (phy->phy_power_syscon) {
+   val = PIPE3_PHY_TX_RX_POWEROFF <<
+   PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+
+   ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
+   if (ret < 0)
+   return ret;
+   } else {
+   omap_control_phy_power(phy->control_dev, 0);
+   }
 
return 0;
 }
 
 static int ti_pipe3_power_on(struct phy *x)
 {
+   u32 val;
+   u32 mask;
+   int ret;
+   unsigned long rate;
struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-   omap_control_phy_power(phy->control_dev, 1);
+   if (phy->phy_power_syscon) {
+   rate = clk_get_rate(phy->sys_clk);
+   if (!rate) {
+   dev_err(phy->dev, "Invalid clock rate\n");
+   return -EINVAL;
+   }
+   rate = rate / 100;
+   mask = OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK;
+   val = PIPE3_PHY_TX_RX_POWERON <<
+   PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+   val |= rate << OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
+
+   ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+mask, val);
+   if (ret < 0)
+   return ret;
+   } else {
+   omap_control_phy_power(phy->control_dev, 1);
+   }
 
return 0;
 }
@@ -334,7 +380,8 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy)
phy->wkupclk = ERR_PTR(-ENODEV);
}
 
-   if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
+   if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie") ||
+   phy->phy_power_syscon) {