Re: [PATCH v4 05/10] clk: mediatek: add clk support for MT6797

2017-04-19 Thread Stephen Boyd 
On 04/08, Mars Cheng wrote:
> From: Kevin-CW Chen 
> 
> Add MT6797 clock support, include topckgen, apmixedsys, infracfg
> and subsystem clocks
> 
> Signed-off-by: Kevin-CW Chen 
> Signed-off-by: Mars Cheng 
> Tested-by: Matthias Brugger 
> Acked-by: Stephen Boyd 
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH v4 05/10] clk: mediatek: add clk support for MT6797

2017-04-19 Thread Stephen Boyd 
On 04/08, Mars Cheng wrote:
> From: Kevin-CW Chen 
> 
> Add MT6797 clock support, include topckgen, apmixedsys, infracfg
> and subsystem clocks
> 
> Signed-off-by: Kevin-CW Chen 
> Signed-off-by: Mars Cheng 
> Tested-by: Matthias Brugger 
> Acked-by: Stephen Boyd 
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH v4 05/10] clk: mediatek: add clk support for MT6797

2017-04-07 Thread Mars Cheng 
From: Kevin-CW Chen 

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen 
Signed-off-by: Mars Cheng 
Tested-by: Matthias Brugger 
Acked-by: Stephen Boyd 
---
 drivers/clk/mediatek/Kconfig   |   32 ++
 drivers/clk/mediatek/Makefile  |5 +
 drivers/clk/mediatek/clk-mt6797-img.c  |   76 
 drivers/clk/mediatek/clk-mt6797-mm.c   |  136 ++
 drivers/clk/mediatek/clk-mt6797-vdec.c |   93 +
 drivers/clk/mediatek/clk-mt6797-venc.c |   78 
 drivers/clk/mediatek/clk-mt6797.c  |  714 
 7 files changed, 1134 insertions(+)
 create mode 100644 drivers/clk/mediatek/clk-mt6797-img.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-mm.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-vdec.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-venc.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797.c

diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index a01ef78..28739a9 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
@@ -50,6 +50,38 @@ config COMMON_CLK_MT2701_BDPSYS
---help---
  This driver supports Mediatek MT2701 bdpsys clocks.
 
+config COMMON_CLK_MT6797
+   bool "Clock driver for Mediatek MT6797"
+   depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST
+   select COMMON_CLK_MEDIATEK
+   default ARCH_MEDIATEK && ARM64
+   ---help---
+ This driver supports Mediatek MT6797 basic clocks.
+
+config COMMON_CLK_MT6797_MMSYS
+   bool "Clock driver for Mediatek MT6797 mmsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 mmsys clocks.
+
+config COMMON_CLK_MT6797_IMGSYS
+   bool "Clock driver for Mediatek MT6797 imgsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 imgsys clocks.
+
+config COMMON_CLK_MT6797_VDECSYS
+   bool "Clock driver for Mediatek MT6797 vdecsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 vdecsys clocks.
+
+config COMMON_CLK_MT6797_VENCSYS
+   bool "Clock driver for Mediatek MT6797 vencsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 vencsys clocks.
+
 config COMMON_CLK_MT8135
bool "Clock driver for Mediatek MT8135"
depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 19ae7ef..5c3afb8 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,5 +1,10 @@
 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o 
clk-apmixed.o
 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
+obj-$(CONFIG_COMMON_CLK_MT6797) += clk-mt6797.o
+obj-$(CONFIG_COMMON_CLK_MT6797_IMGSYS) += clk-mt6797-img.o
+obj-$(CONFIG_COMMON_CLK_MT6797_MMSYS) += clk-mt6797-mm.o
+obj-$(CONFIG_COMMON_CLK_MT6797_VDECSYS) += clk-mt6797-vdec.o
+obj-$(CONFIG_COMMON_CLK_MT6797_VENCSYS) += clk-mt6797-venc.o
 obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o
 obj-$(CONFIG_COMMON_CLK_MT2701_BDPSYS) += clk-mt2701-bdp.o
 obj-$(CONFIG_COMMON_CLK_MT2701_ETHSYS) += clk-mt2701-eth.o
diff --git a/drivers/clk/mediatek/clk-mt6797-img.c 
b/drivers/clk/mediatek/clk-mt6797-img.c
new file mode 100644
index 000..94cc480
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6797-img.c
@@ -0,0 +1,76 @@
+/* Copyright (c) 2017 MediaTek Inc.
+ * Author: Kevin Chen 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include "clk-mtk.h"
+#include "clk-gate.h"
+
+static const struct mtk_gate_regs img_cg_regs = {
+   .set_ofs = 0x0004,
+   .clr_ofs = 0x0008,
+   .sta_ofs = 0x,
+};
+
+#define GATE_IMG(_id, _name, _parent, _shift) {\
+   .id = _id,  \
+   .name = _name,  \
+   .parent_name = _parent, \
+   .regs = _cg_regs,   \
+   .shift = _shift,\
+   .ops = _clk_gate_ops_setclr,\
+   }
+
+static const struct mtk_gate img_clks[] = {
+   GATE_IMG(CLK_IMG_FDVT, "img_fdvt", "mm_sel", 11),
+   GATE_IMG(CLK_IMG_DPE, "img_dpe", "mm_sel", 10),
+   GATE_IMG(CLK_IMG_DIP,

[PATCH v4 05/10] clk: mediatek: add clk support for MT6797

2017-04-07 Thread Mars Cheng 
From: Kevin-CW Chen 

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen 
Signed-off-by: Mars Cheng 
Tested-by: Matthias Brugger 
Acked-by: Stephen Boyd 
---
 drivers/clk/mediatek/Kconfig   |   32 ++
 drivers/clk/mediatek/Makefile  |5 +
 drivers/clk/mediatek/clk-mt6797-img.c  |   76 
 drivers/clk/mediatek/clk-mt6797-mm.c   |  136 ++
 drivers/clk/mediatek/clk-mt6797-vdec.c |   93 +
 drivers/clk/mediatek/clk-mt6797-venc.c |   78 
 drivers/clk/mediatek/clk-mt6797.c  |  714 
 7 files changed, 1134 insertions(+)
 create mode 100644 drivers/clk/mediatek/clk-mt6797-img.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-mm.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-vdec.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797-venc.c
 create mode 100644 drivers/clk/mediatek/clk-mt6797.c

diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index a01ef78..28739a9 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
@@ -50,6 +50,38 @@ config COMMON_CLK_MT2701_BDPSYS
---help---
  This driver supports Mediatek MT2701 bdpsys clocks.
 
+config COMMON_CLK_MT6797
+   bool "Clock driver for Mediatek MT6797"
+   depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST
+   select COMMON_CLK_MEDIATEK
+   default ARCH_MEDIATEK && ARM64
+   ---help---
+ This driver supports Mediatek MT6797 basic clocks.
+
+config COMMON_CLK_MT6797_MMSYS
+   bool "Clock driver for Mediatek MT6797 mmsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 mmsys clocks.
+
+config COMMON_CLK_MT6797_IMGSYS
+   bool "Clock driver for Mediatek MT6797 imgsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 imgsys clocks.
+
+config COMMON_CLK_MT6797_VDECSYS
+   bool "Clock driver for Mediatek MT6797 vdecsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 vdecsys clocks.
+
+config COMMON_CLK_MT6797_VENCSYS
+   bool "Clock driver for Mediatek MT6797 vencsys"
+   depends on COMMON_CLK_MT6797
+   ---help---
+ This driver supports Mediatek MT6797 vencsys clocks.
+
 config COMMON_CLK_MT8135
bool "Clock driver for Mediatek MT8135"
depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 19ae7ef..5c3afb8 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,5 +1,10 @@
 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o 
clk-apmixed.o
 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
+obj-$(CONFIG_COMMON_CLK_MT6797) += clk-mt6797.o
+obj-$(CONFIG_COMMON_CLK_MT6797_IMGSYS) += clk-mt6797-img.o
+obj-$(CONFIG_COMMON_CLK_MT6797_MMSYS) += clk-mt6797-mm.o
+obj-$(CONFIG_COMMON_CLK_MT6797_VDECSYS) += clk-mt6797-vdec.o
+obj-$(CONFIG_COMMON_CLK_MT6797_VENCSYS) += clk-mt6797-venc.o
 obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o
 obj-$(CONFIG_COMMON_CLK_MT2701_BDPSYS) += clk-mt2701-bdp.o
 obj-$(CONFIG_COMMON_CLK_MT2701_ETHSYS) += clk-mt2701-eth.o
diff --git a/drivers/clk/mediatek/clk-mt6797-img.c 
b/drivers/clk/mediatek/clk-mt6797-img.c
new file mode 100644
index 000..94cc480
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6797-img.c
@@ -0,0 +1,76 @@
+/* Copyright (c) 2017 MediaTek Inc.
+ * Author: Kevin Chen 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include "clk-mtk.h"
+#include "clk-gate.h"
+
+static const struct mtk_gate_regs img_cg_regs = {
+   .set_ofs = 0x0004,
+   .clr_ofs = 0x0008,
+   .sta_ofs = 0x,
+};
+
+#define GATE_IMG(_id, _name, _parent, _shift) {\
+   .id = _id,  \
+   .name = _name,  \
+   .parent_name = _parent, \
+   .regs = _cg_regs,   \
+   .shift = _shift,\
+   .ops = _clk_gate_ops_setclr,\
+   }
+
+static const struct mtk_gate img_clks[] = {
+   GATE_IMG(CLK_IMG_FDVT, "img_fdvt", "mm_sel", 11),
+   GATE_IMG(CLK_IMG_DPE, "img_dpe", "mm_sel", 10),
+   GATE_IMG(CLK_IMG_DIP, "img_dip", "mm_sel", 6),
+   GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0),
+};
+
+static const struct of_device_id of_match_clk_mt6797_img[] = {
+