Re: [PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding

2018-05-31 Thread Vladimir Zapolskiy
Hi Clément,

On 05/30/2018 03:03 PM, Clément Péron wrote:
> From: Clément Peron 
> 
> Add devicetree binding document for NXP's i.MX SoC specific
> EPIT timer driver.
> 
> Signed-off-by: Clément Peron 
> ---
>  .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt 
> b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> new file mode 100644
> index ..90112d58af10
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> @@ -0,0 +1,24 @@
> +Binding for the i.MX EPIT timer
> +
> +This binding uses the common clock binding[1].
> +
> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> +

no, this leftover reference to clock-bindings.txt is invalid, please remove it.

Instead you may add a simple description of the timer module.

> +Required properties:
> +- compatible: should be "fsl,imx31-epit"

To satisfy compatibles with multiple SoCs, apparently you may follow a model,
which is used with other Freescale controllers, for instance

gpio/fsl-imx-gpio.txt   - compatible : Should be "fsl,-gpio"
mmc/fsl-imx-esdhc.txt   - compatible : Should be "fsl,-esdhc"
serial/fsl-imx-uart.txt - compatible : Should be "fsl,-uart"
timer/fsl,imxgpt.txt- compatible : should be "fsl,-gpt"

and so on, I hope it would cover Rob's ask.

> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +- interrupts: Should contain EPIT controller interrupt
> +- clocks: list of clock specifiers, must contain an entry for each required
> +  entry in clock-names
> +- clock-names : should include entries "ipg", "per"
> +
> +Example for i.MX6QDL:
> + epit1: epit@20d {
> + compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
> + reg = <0x020d 0x4000>;
> + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6QDL_CLK_IPG_PER>,
> + <&clks IMX6QDL_CLK_EPIT1>;
> + clock-names = "ipg", "per";
> + };
> 

--
With best wishes,
Vladimir


Re: [PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding

2018-05-30 Thread Rob Herring
On Wed, May 30, 2018 at 02:03:25PM +0200, Clément Péron wrote:
> From: Clément Peron 

"dt-bindings: timer: ..." is the preferred subject prefix.

> 
> Add devicetree binding document for NXP's i.MX SoC specific
> EPIT timer driver.
> 
> Signed-off-by: Clément Peron 
> ---
>  .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++
>  1 file changed, 24 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt 
> b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> new file mode 100644
> index ..90112d58af10
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
> @@ -0,0 +1,24 @@
> +Binding for the i.MX EPIT timer
> +
> +This binding uses the common clock binding[1].
> +
> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

No need to state this. Listing "clocks" tells us that.

> +
> +Required properties:
> +- compatible: should be "fsl,imx31-epit"

What about imx6q listed below?

> +- reg: physical base address of the controller and length of memory mapped
> +  region.
> +- interrupts: Should contain EPIT controller interrupt
> +- clocks: list of clock specifiers, must contain an entry for each required
> +  entry in clock-names
> +- clock-names : should include entries "ipg", "per"
> +
> +Example for i.MX6QDL:
> + epit1: epit@20d {

timer@...

> + compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
> + reg = <0x020d 0x4000>;
> + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6QDL_CLK_IPG_PER>,
> + <&clks IMX6QDL_CLK_EPIT1>;
> + clock-names = "ipg", "per";
> + };
> -- 
> 2.17.0
> 


[PATCH v4 3/5] Documentation: DT: add i.MX EPIT timer binding

2018-05-30 Thread Clément Péron
From: Clément Peron 

Add devicetree binding document for NXP's i.MX SoC specific
EPIT timer driver.

Signed-off-by: Clément Peron 
---
 .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt

diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt 
b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
new file mode 100644
index ..90112d58af10
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt
@@ -0,0 +1,24 @@
+Binding for the i.MX EPIT timer
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: should be "fsl,imx31-epit"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: Should contain EPIT controller interrupt
+- clocks: list of clock specifiers, must contain an entry for each required
+  entry in clock-names
+- clock-names : should include entries "ipg", "per"
+
+Example for i.MX6QDL:
+   epit1: epit@20d {
+   compatible = "fsl,imx6q-epit", "fsl,imx31-epit";
+   reg = <0x020d 0x4000>;
+   interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <&clks IMX6QDL_CLK_IPG_PER>,
+   <&clks IMX6QDL_CLK_EPIT1>;
+   clock-names = "ipg", "per";
+   };
-- 
2.17.0