Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
>> Yes i will fix your hints tomorrow and send a v6 of my patchset.
>> Thank you for your hints and time
>> It would be nice if you could fix ACPI problemmatik.
>
> I would like to see the ACPI dump for that...
See
https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576
In this comment Michał Żygowski appended to this thread the missing
files you want to have.
So, let me clarify what we have:
- some platforms are in the wild with old BIOS with broken ACPI tables
correct
- you still may fix the things for new BIOS version for all affected
platforms
I have seen that this is a lot of work and I didn't think it was so
complicated!
To get the GPIO support for APU2/APU3 merged into the gpio subsystem.
I am little confused what i should do now. By the way I only have one
board (APU3).
- you need to support both
That is not necessary from my point of view. I am fine if the driver
supports at least
the current BIOS version. And if the coreboot maintainer fixes the ACPI
problem
then we could extend the driver and add the ACPI stuff.
But this not in my hand, right?
For broken firmware you need to do the following:
- create an MFD driver, which would instantiate GPIO and GPIO keys
support (at least)
- create one of each above drivers w/o any DMI crap (should be done
as a part of MFD driver)
I will have a look how to achieve this.
If we want to support all BIOS version.
And is a must have to get the driver into mainline.
For fixed BIOS you need to add the following (example, not a fully
correct solution) at the level behind SB:
I do not understand how I could fix this. I have no idea from ACPI.
I have not found any driver where I can inspire myself.
Scope (SB)
{
Device(GPIO)
{
After updating firmware you would need just an ACPI ID table to be
added to the GPIO driver. MFD driver should not be enumerated at all.
That's maybe coming next when the coreboot maintainers have their bios
fixed, right?
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
>> Yes i will fix your hints tomorrow and send a v6 of my patchset.
>> Thank you for your hints and time
>> It would be nice if you could fix ACPI problemmatik.
>
> I would like to see the ACPI dump for that...
See
https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576
In this comment Michał Żygowski appended to this thread the missing
files you want to have.
So, let me clarify what we have:
- some platforms are in the wild with old BIOS with broken ACPI tables
correct
- you still may fix the things for new BIOS version for all affected
platforms
I have seen that this is a lot of work and I didn't think it was so
complicated!
To get the GPIO support for APU2/APU3 merged into the gpio subsystem.
I am little confused what i should do now. By the way I only have one
board (APU3).
- you need to support both
That is not necessary from my point of view. I am fine if the driver
supports at least
the current BIOS version. And if the coreboot maintainer fixes the ACPI
problem
then we could extend the driver and add the ACPI stuff.
But this not in my hand, right?
For broken firmware you need to do the following:
- create an MFD driver, which would instantiate GPIO and GPIO keys
support (at least)
- create one of each above drivers w/o any DMI crap (should be done
as a part of MFD driver)
I will have a look how to achieve this.
If we want to support all BIOS version.
And is a must have to get the driver into mainline.
For fixed BIOS you need to add the following (example, not a fully
correct solution) at the level behind SB:
I do not understand how I could fix this. I have no idea from ACPI.
I have not found any driver where I can inspire myself.
Scope (SB)
{
Device(GPIO)
{
After updating firmware you would need just an ACPI ID table to be
added to the GPIO driver. MFD driver should not be enumerated at all.
That's maybe coming next when the coreboot maintainers have their bios
fixed, right?
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Mon, Dec 3, 2018 at 9:58 AM Florian Eckert wrote:
> >> > Btw, is the statement in above email still actual? "...I can fix
> >> > required things."
> >
> >> Yes i will fix your hints tomorrow and send a v6 of my patchset.
> >> Thank you for your hints and time
> >> It would be nice if you could fix ACPI problemmatik.
> >
> > I would like to see the ACPI dump for that...
>
> See https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576
> In this comment Michał Żygowski appended to this thread the missing
> files you want to have.
Thanks!
So, let me clarify what we have:
- some platforms are in the wild with old BIOS with broken ACPI tables
- you still may fix the things for new BIOS version for all affected platforms
- you need to support both
Is this all correct?
For broken firmware you need to do the following:
- create an MFD driver, which would instantiate GPIO and GPIO keys
support (at least)
- create one of each above drivers w/o any DMI crap (should be done
as a part of MFD driver)
For fixed BIOS you need to add the following (example, not a fully
correct solution) at the level behind SB:
Scope (SB)
{
Device(GPIO)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "AMD") // One ID per platform, so, APU2 :
1, APU 3: 1 => 2 unique IDs, in this case no need to add neither _HRV
nor _UID
Name (_HRV, 2) // Other approach is to have one ID
but different _HRV: e.g. 2 for APU2, 3 for APU3
Name (_UID, Zero)// Another approach is to have one
device per community of pins and several _UID:s
Name (_DDN, "AMD APU General Purpose Input/Output (GPIO) controller")
Method (_CRS, 0, NotSerialized)
{
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFED8 // + offset + community0 offset
0x, // + size of the community0
)
...
Memory32Fixed (ReadWrite,
0xFED8 // + offset + communityN offset
0x, // + size of the communityN
)
/* IRQ resource if needed and present on real HW */
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00xx,
}
})
Return (RBUF) /* \_SB_.GPIO._CRS.RBUF */
}
Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
}
Device (BTNS)
{
Name (_HID, "PRP0001")
Name (_DDN, "GPIO buttons device")
Name (_CRS, ResourceTemplate () {
GpioIo (
Exclusive, // Not shared
PullUp, // Pull up the line
0, // Debounce timeout
0, // Drive strength
IoRestrictionInputOnly, // Only used as input
"\\_SB.GPIO", // GPIO controller
0) // Must be 0
{
x0, // GPIO pin offset in
corresponding controller for Button 0
x1, // for Button 1, and so on
...
}
})
Name (_DSD, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {"compatible", "gpio-keys-polled"},
Package () {"poll-interval", 100},
Package () {"autorepeat", 1}
},
ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () {"button-0", "BTN0"},
Package () {"button-1", "BTN1"},
...
}
})
// For more information about these bindings see:
// Documentation/devicetree/bindings/input/gpio-keys-polled.txt
// and Documentation/acpi/gpio-properties.txt.
Name (BTN0, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {"linux,code", 105},
Package () {"linux,input-type", 1},
Package () {"gpios", Package () {^BTNS, 0, 0, 1}}
}
})
}
}
After updating firmware you would need just an ACPI ID table to be
added to the GPIO driver. MFD driver should not be enumerated at all.
--
With Best Regards,
Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Mon, Dec 3, 2018 at 9:58 AM Florian Eckert wrote:
> >> > Btw, is the statement in above email still actual? "...I can fix
> >> > required things."
> >
> >> Yes i will fix your hints tomorrow and send a v6 of my patchset.
> >> Thank you for your hints and time
> >> It would be nice if you could fix ACPI problemmatik.
> >
> > I would like to see the ACPI dump for that...
>
> See https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576
> In this comment Michał Żygowski appended to this thread the missing
> files you want to have.
Thanks!
So, let me clarify what we have:
- some platforms are in the wild with old BIOS with broken ACPI tables
- you still may fix the things for new BIOS version for all affected platforms
- you need to support both
Is this all correct?
For broken firmware you need to do the following:
- create an MFD driver, which would instantiate GPIO and GPIO keys
support (at least)
- create one of each above drivers w/o any DMI crap (should be done
as a part of MFD driver)
For fixed BIOS you need to add the following (example, not a fully
correct solution) at the level behind SB:
Scope (SB)
{
Device(GPIO)
{
Name (_ADR, Zero) // _ADR: Address
Name (_HID, "AMD") // One ID per platform, so, APU2 :
1, APU 3: 1 => 2 unique IDs, in this case no need to add neither _HRV
nor _UID
Name (_HRV, 2) // Other approach is to have one ID
but different _HRV: e.g. 2 for APU2, 3 for APU3
Name (_UID, Zero)// Another approach is to have one
device per community of pins and several _UID:s
Name (_DDN, "AMD APU General Purpose Input/Output (GPIO) controller")
Method (_CRS, 0, NotSerialized)
{
Name (RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0xFED8 // + offset + community0 offset
0x, // + size of the community0
)
...
Memory32Fixed (ReadWrite,
0xFED8 // + offset + communityN offset
0x, // + size of the communityN
)
/* IRQ resource if needed and present on real HW */
Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
{
0x00xx,
}
})
Return (RBUF) /* \_SB_.GPIO._CRS.RBUF */
}
Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
}
Device (BTNS)
{
Name (_HID, "PRP0001")
Name (_DDN, "GPIO buttons device")
Name (_CRS, ResourceTemplate () {
GpioIo (
Exclusive, // Not shared
PullUp, // Pull up the line
0, // Debounce timeout
0, // Drive strength
IoRestrictionInputOnly, // Only used as input
"\\_SB.GPIO", // GPIO controller
0) // Must be 0
{
x0, // GPIO pin offset in
corresponding controller for Button 0
x1, // for Button 1, and so on
...
}
})
Name (_DSD, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {"compatible", "gpio-keys-polled"},
Package () {"poll-interval", 100},
Package () {"autorepeat", 1}
},
ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () {"button-0", "BTN0"},
Package () {"button-1", "BTN1"},
...
}
})
// For more information about these bindings see:
// Documentation/devicetree/bindings/input/gpio-keys-polled.txt
// and Documentation/acpi/gpio-properties.txt.
Name (BTN0, Package () {
ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {"linux,code", 105},
Package () {"linux,input-type", 1},
Package () {"gpios", Package () {^BTNS, 0, 0, 1}}
}
})
}
}
After updating firmware you would need just an ACPI ID table to be
added to the GPIO driver. MFD driver should not be enumerated at all.
--
With Best Regards,
Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Hello Andy > Btw, is the statement in above email still actual? "...I can fix > required things." Yes i will fix your hints tomorrow and send a v6 of my patchset. Thank you for your hints and time It would be nice if you could fix ACPI problemmatik. I would like to see the ACPI dump for that... See https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576 In this comment Michał Żygowski appended to this thread the missing files you want to have. Regards Flo
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Hello Andy > Btw, is the statement in above email still actual? "...I can fix > required things." Yes i will fix your hints tomorrow and send a v6 of my patchset. Thank you for your hints and time It would be nice if you could fix ACPI problemmatik. I would like to see the ACPI dump for that... See https://github.com/openwrt/openwrt/pull/1232#issuecomment-443224576 In this comment Michał Żygowski appended to this thread the missing files you want to have. Regards Flo
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Thu, Nov 29, 2018 at 4:02 PM Florian Eckert wrote: > > >> Thank you very very much for your code review "again" I will update my > >> patch set with your hints. > >> Should I send v6 or should i wait till I get feedback from you about > >> ACPI? > >> > >> >> > >> >> Until now it was not possible to get more information to detect the > >> >> MMIO_BASE address from the ACPI subsystem. > >> > > >> > I'm sorry if I already asked, please, remind me where dump of ACPI > >> > tables can be found? > >> > >> https://www.spinics.net/lists/kernel/msg2887290.html > > > > Unfortunately the file had been removed. > > > > Btw, is the statement in above email still actual? "...I can fix > > required things." > Yes i will fix your hints tomorrow and send a v6 of my patchset. > Thank you for your hints and time > It would be nice if you could fix ACPI problemmatik. I would like to see the ACPI dump for that... -- With Best Regards, Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Thu, Nov 29, 2018 at 4:02 PM Florian Eckert wrote: > > >> Thank you very very much for your code review "again" I will update my > >> patch set with your hints. > >> Should I send v6 or should i wait till I get feedback from you about > >> ACPI? > >> > >> >> > >> >> Until now it was not possible to get more information to detect the > >> >> MMIO_BASE address from the ACPI subsystem. > >> > > >> > I'm sorry if I already asked, please, remind me where dump of ACPI > >> > tables can be found? > >> > >> https://www.spinics.net/lists/kernel/msg2887290.html > > > > Unfortunately the file had been removed. > > > > Btw, is the statement in above email still actual? "...I can fix > > required things." > Yes i will fix your hints tomorrow and send a v6 of my patchset. > Thank you for your hints and time > It would be nice if you could fix ACPI problemmatik. I would like to see the ACPI dump for that... -- With Best Regards, Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Thank you very very much for your code review "again" I will update my patch set with your hints. Should I send v6 or should i wait till I get feedback from you about ACPI? >> >> Until now it was not possible to get more information to detect the >> MMIO_BASE address from the ACPI subsystem. > > I'm sorry if I already asked, please, remind me where dump of ACPI > tables can be found? https://www.spinics.net/lists/kernel/msg2887290.html Unfortunately the file had been removed. Btw, is the statement in above email still actual? "...I can fix required things." Yes i will fix your hints tomorrow and send a v6 of my patchset. Thank you for your hints and time It would be nice if you could fix ACPI problemmatik. Best regards Florian Eckert
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Thank you very very much for your code review "again" I will update my patch set with your hints. Should I send v6 or should i wait till I get feedback from you about ACPI? >> >> Until now it was not possible to get more information to detect the >> MMIO_BASE address from the ACPI subsystem. > > I'm sorry if I already asked, please, remind me where dump of ACPI > tables can be found? https://www.spinics.net/lists/kernel/msg2887290.html Unfortunately the file had been removed. Btw, is the statement in above email still actual? "...I can fix required things." Yes i will fix your hints tomorrow and send a v6 of my patchset. Thank you for your hints and time It would be nice if you could fix ACPI problemmatik. Best regards Florian Eckert
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Thu, Nov 29, 2018 at 12:15 PM Florian Eckert wrote: > > Hello Andy, > > Thank you very very much for your code review "again" I will update my > patch set with your hints. > Should I send v6 or should i wait till I get feedback from you about > ACPI? > > >> > >> Until now it was not possible to get more information to detect the > >> MMIO_BASE address from the ACPI subsystem. > > > > I'm sorry if I already asked, please, remind me where dump of ACPI > > tables can be found? > > https://www.spinics.net/lists/kernel/msg2887290.html Unfortunately the file had been removed. Btw, is the statement in above email still actual? "...I can fix required things." > > Also would be nice to have the output of `lspci -nk -vv -xxx` on such > > platform. > 00:14.3 0601: 1022:780e (rev 11) > Subsystem: 1022:780e > Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- > Stepping- SERR- FastB2B- DisINTx- > Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- > SERR- Latency: 0 > 00: 22 10 0e 78 0f 00 20 02 11 00 01 06 00 00 80 00 > 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0e 78 > 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 40: 04 00 00 00 d5 ff 03 ff 07 ff 20 00 00 00 00 00 > 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 60: 00 00 00 00 00 0e 10 00 0e 00 0f 00 00 ff ff ff > 70: 67 45 23 00 00 00 00 00 90 00 00 00 05 0a 00 00 > 80: 08 00 03 a8 00 00 00 00 00 00 00 00 00 00 00 00 > 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > a0: 02 00 c1 fe 2f 01 00 00 00 00 00 00 00 00 00 00 > b0: 00 00 00 00 00 00 00 00 04 00 e9 3d 00 00 00 00 > c0: 00 00 00 00 00 00 00 00 00 00 00 80 47 10 82 ff > d0: 86 ff ff 08 42 00 00 00 00 00 00 00 00 00 00 00 > e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Thanks. -- With Best Regards, Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Thu, Nov 29, 2018 at 12:15 PM Florian Eckert wrote: > > Hello Andy, > > Thank you very very much for your code review "again" I will update my > patch set with your hints. > Should I send v6 or should i wait till I get feedback from you about > ACPI? > > >> > >> Until now it was not possible to get more information to detect the > >> MMIO_BASE address from the ACPI subsystem. > > > > I'm sorry if I already asked, please, remind me where dump of ACPI > > tables can be found? > > https://www.spinics.net/lists/kernel/msg2887290.html Unfortunately the file had been removed. Btw, is the statement in above email still actual? "...I can fix required things." > > Also would be nice to have the output of `lspci -nk -vv -xxx` on such > > platform. > 00:14.3 0601: 1022:780e (rev 11) > Subsystem: 1022:780e > Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- > Stepping- SERR- FastB2B- DisINTx- > Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- > SERR- Latency: 0 > 00: 22 10 0e 78 0f 00 20 02 11 00 01 06 00 00 80 00 > 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0e 78 > 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 40: 04 00 00 00 d5 ff 03 ff 07 ff 20 00 00 00 00 00 > 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 60: 00 00 00 00 00 0e 10 00 0e 00 0f 00 00 ff ff ff > 70: 67 45 23 00 00 00 00 00 90 00 00 00 05 0a 00 00 > 80: 08 00 03 a8 00 00 00 00 00 00 00 00 00 00 00 00 > 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > a0: 02 00 c1 fe 2f 01 00 00 00 00 00 00 00 00 00 00 > b0: 00 00 00 00 00 00 00 00 04 00 e9 3d 00 00 00 00 > c0: 00 00 00 00 00 00 00 00 00 00 00 80 47 10 82 ff > d0: 86 ff ff 08 42 00 00 00 00 00 00 00 00 00 00 00 > e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Thanks. -- With Best Regards, Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Hello Andy, Thank you very very much for your code review "again" I will update my patch set with your hints. Should I send v6 or should i wait till I get feedback from you about ACPI? Until now it was not possible to get more information to detect the MMIO_BASE address from the ACPI subsystem. I'm sorry if I already asked, please, remind me where dump of ACPI tables can be found? https://www.spinics.net/lists/kernel/msg2887290.html Also would be nice to have the output of `lspci -nk -vv -xxx` on such platform. 00:00.0 0600: 1022:1566 Subsystem: 1022:1566 Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- Latency: 0 lspci: Unable to load libkmod resources: error -12 00: 22 10 66 15 04 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 66 15 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 00 50: 22 10 66 15 00 00 00 00 00 00 00 00 00 00 00 00 60: 46 00 00 00 63 10 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 80: 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 7f 2c 00 00 00 02 02 19 00 00 00 00 00 a0: 01 80 30 01 ef be ad de 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 04 00 10 c2 03 00 00 00 c0: 00 00 00 00 00 00 00 00 01 00 12 00 00 00 14 00 d0: b6 14 30 01 00 00 00 00 00 00 00 00 00 00 00 00 e0: 10 00 40 01 01 11 e3 80 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 80 80 00 00 00 00 00 05 00 00 00 00:02.0 0600: 1022:156b Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- 00: 22 10 6b 15 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:02.2 0604: 1022:1439 (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 24 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 1000-1fff [size=4K] Memory behind bridge: fe50-fe5f [size=1M] Prefetchable memory behind bridge: None Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 512 bytes, PhantFunc 0 ExtTag+ RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 256 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #0, PowerLimit 0.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable-
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Hello Andy, Thank you very very much for your code review "again" I will update my patch set with your hints. Should I send v6 or should i wait till I get feedback from you about ACPI? Until now it was not possible to get more information to detect the MMIO_BASE address from the ACPI subsystem. I'm sorry if I already asked, please, remind me where dump of ACPI tables can be found? https://www.spinics.net/lists/kernel/msg2887290.html Also would be nice to have the output of `lspci -nk -vv -xxx` on such platform. 00:00.0 0600: 1022:1566 Subsystem: 1022:1566 Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- Latency: 0 lspci: Unable to load libkmod resources: error -12 00: 22 10 66 15 04 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 66 15 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 00 50: 22 10 66 15 00 00 00 00 00 00 00 00 00 00 00 00 60: 46 00 00 00 63 10 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 80: 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 7f 2c 00 00 00 02 02 19 00 00 00 00 00 a0: 01 80 30 01 ef be ad de 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 04 00 10 c2 03 00 00 00 c0: 00 00 00 00 00 00 00 00 01 00 12 00 00 00 14 00 d0: b6 14 30 01 00 00 00 00 00 00 00 00 00 00 00 00 e0: 10 00 40 01 01 11 e3 80 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 80 80 00 00 00 00 00 05 00 00 00 00:02.0 0600: 1022:156b Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- 00: 22 10 6b 15 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:02.2 0604: 1022:1439 (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 24 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 1000-1fff [size=4K] Memory behind bridge: fe50-fe5f [size=1M] Prefetchable memory behind bridge: None Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Root Port (Slot+), MSI 00 DevCap: MaxPayload 512 bytes, PhantFunc 0 ExtTag+ RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ MaxPayload 256 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #0, PowerLimit 0.000W; Interlock- NoCompl+ SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable-
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Tue, Nov 27, 2018 at 3:25 PM Florian Eckert wrote: > Changes v5: > gpio-apu.c > - Remove GPIO_GENERIC select from Kconfig > - Make gpio_chip real member of apu_gpio_pdata > - Use BIT macro for get_data and get_dir functions > - Pass platform data to devm_gpiochip_add_data to get data > per-instance state container > - Remove DEVNAME define > - Remove platfrom_device member from apu_gpio_pdata this > - Clean up init function > - Remove MODULE_ALIAS > > Until now it was not possible to get more information to detect the > MMIO_BASE address from the ACPI subsystem. I'm sorry if I already asked, please, remind me where dump of ACPI tables can be found? Also would be nice to have the output of `lspci -nk -vv -xxx` on such platform. -- With Best Regards, Andy Shevchenko
Re: [PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
On Tue, Nov 27, 2018 at 3:25 PM Florian Eckert wrote: > Changes v5: > gpio-apu.c > - Remove GPIO_GENERIC select from Kconfig > - Make gpio_chip real member of apu_gpio_pdata > - Use BIT macro for get_data and get_dir functions > - Pass platform data to devm_gpiochip_add_data to get data > per-instance state container > - Remove DEVNAME define > - Remove platfrom_device member from apu_gpio_pdata this > - Clean up init function > - Remove MODULE_ALIAS > > Until now it was not possible to get more information to detect the > MMIO_BASE address from the ACPI subsystem. I'm sorry if I already asked, please, remind me where dump of ACPI tables can be found? Also would be nice to have the output of `lspci -nk -vv -xxx` on such platform. -- With Best Regards, Andy Shevchenko
[PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Changes v2: - Update SPDX short identifier - Remove gpio-keys-polled device moved to arch/x86/platform - Fix styling - Use spinnlock only there where it is useful - Removed useless output on driver load - Do bit manipulation later not on IO - Add additional GPIOs handling mpci2_reset and mpcie3_reset. - Add name to GPIOs exported via sysfs Changes v3: - Add a new platform device for the frontpanel push button. - Get global variables from the heap - Fix errors/warnings generated by ./scripts/checkpatch.pl Changes v4: gpio-apu.c - Move bit shifting out of spinnlock - Change declaration of int to unsigned int - Remove redundant blank line - Use dmi table callback - Remove noise pcengines-apu-platform.c - Move platform device to drivers/platform/x86 - Remove needless include - Add dmi information so that this device is only present on APU2 APU3 boards from PC Engines Changes v5: gpio-apu.c - Remove GPIO_GENERIC select from Kconfig - Make gpio_chip real member of apu_gpio_pdata - Use BIT macro for get_data and get_dir functions - Pass platform data to devm_gpiochip_add_data to get data per-instance state container - Remove DEVNAME define - Remove platfrom_device member from apu_gpio_pdata this - Clean up init function - Remove MODULE_ALIAS Until now it was not possible to get more information to detect the MMIO_BASE address from the ACPI subsystem. Florian Eckert (2): gpio: Add driver for PC Engines APU boards platform: Add reset button device for PC Engines APU boards drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-apu.c | 288 ++ drivers/platform/x86/Kconfig | 11 + drivers/platform/x86/Makefile | 1 + drivers/platform/x86/pcengines-apu-platform.c | 114 ++ 6 files changed, 422 insertions(+) create mode 100644 drivers/gpio/gpio-apu.c create mode 100644 drivers/platform/x86/pcengines-apu-platform.c -- 2.11.0
[PATCH v5 0/2] Add device driver for APU2/APU3 GPIOs
Changes v2: - Update SPDX short identifier - Remove gpio-keys-polled device moved to arch/x86/platform - Fix styling - Use spinnlock only there where it is useful - Removed useless output on driver load - Do bit manipulation later not on IO - Add additional GPIOs handling mpci2_reset and mpcie3_reset. - Add name to GPIOs exported via sysfs Changes v3: - Add a new platform device for the frontpanel push button. - Get global variables from the heap - Fix errors/warnings generated by ./scripts/checkpatch.pl Changes v4: gpio-apu.c - Move bit shifting out of spinnlock - Change declaration of int to unsigned int - Remove redundant blank line - Use dmi table callback - Remove noise pcengines-apu-platform.c - Move platform device to drivers/platform/x86 - Remove needless include - Add dmi information so that this device is only present on APU2 APU3 boards from PC Engines Changes v5: gpio-apu.c - Remove GPIO_GENERIC select from Kconfig - Make gpio_chip real member of apu_gpio_pdata - Use BIT macro for get_data and get_dir functions - Pass platform data to devm_gpiochip_add_data to get data per-instance state container - Remove DEVNAME define - Remove platfrom_device member from apu_gpio_pdata this - Clean up init function - Remove MODULE_ALIAS Until now it was not possible to get more information to detect the MMIO_BASE address from the ACPI subsystem. Florian Eckert (2): gpio: Add driver for PC Engines APU boards platform: Add reset button device for PC Engines APU boards drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-apu.c | 288 ++ drivers/platform/x86/Kconfig | 11 + drivers/platform/x86/Makefile | 1 + drivers/platform/x86/pcengines-apu-platform.c | 114 ++ 6 files changed, 422 insertions(+) create mode 100644 drivers/gpio/gpio-apu.c create mode 100644 drivers/platform/x86/pcengines-apu-platform.c -- 2.11.0
