[PATCH v5 19/27] iommu/mediatek: Add iova reserved function

[Yong Wu]

For multiple iommu_domains, we need to reserve some iova regions. Take a
example, If the default iova region is 0 ~ 4G, but the 0x4000_0000 ~
0x43ff_ffff is only for the special CCU0 domain. Thus we should exclude
this region for the default iova region.

This patch adds iova reserved flow. It's a preparing patch for supporting
multi-domain.

Signed-off-by: Anan sun <anan....@mediatek.com>
Signed-off-by: Chao Hao <chao....@mediatek.com>
Signed-off-by: Yong Wu <yong...@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 28 ++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  5 +++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 0e9c03cbab32..6a909efc984f 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -157,6 +157,11 @@ static LIST_HEAD(m4ulist); /* List all the M4U HWs */
 
 #define for_each_m4u(data)     list_for_each_entry(data, &m4ulist, list)
 
+struct mtk_iommu_iova_region {
+       dma_addr_t              iova_base;
+       unsigned long long      size;
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same 
domain
  * for the performance.
@@ -553,6 +558,27 @@ static int mtk_iommu_of_xlate(struct device *dev, struct 
of_phandle_args *args)
        return iommu_fwspec_add_ids(dev, args->args, 1);
 }
 
+static void mtk_iommu_get_resv_regions(struct device *dev,
+                                      struct list_head *head)
+{
+       struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
+       const struct mtk_iommu_iova_region *resv;
+       struct iommu_resv_region *region;
+       int prot = IOMMU_WRITE | IOMMU_READ;
+       unsigned int i;
+
+       for (i = 0; i < data->plat_data->iova_region_nr; i++) {
+               resv = data->plat_data->iova_region + i;
+
+               region = iommu_alloc_resv_region(resv->iova_base, resv->size,
+                                                prot, IOMMU_RESV_RESERVED);
+               if (!region)
+                       return;
+
+               list_add_tail(&region->list, head);
+       }
+}
+
 static const struct iommu_ops mtk_iommu_ops = {
        .domain_alloc   = mtk_iommu_domain_alloc,
        .domain_free    = mtk_iommu_domain_free,
@@ -567,6 +593,8 @@ static const struct iommu_ops mtk_iommu_ops = {
        .release_device = mtk_iommu_release_device,
        .device_group   = mtk_iommu_device_group,
        .of_xlate       = mtk_iommu_of_xlate,
+       .get_resv_regions = mtk_iommu_get_resv_regions,
+       .put_resv_regions = generic_iommu_put_resv_regions,
        .pgsize_bitmap  = SZ_4K | SZ_64K | SZ_1M | SZ_16M,
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 5e03a029c4dc..e867cd3aeeac 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -45,10 +45,15 @@ enum mtk_iommu_plat {
        M4U_MT8183,
 };
 
+struct mtk_iommu_iova_region;
+
 struct mtk_iommu_plat_data {
        enum mtk_iommu_plat m4u_plat;
        u32                 flags;
        u32                 inv_sel_reg;
+
+       unsigned int        iova_region_nr;
+       const struct mtk_iommu_iova_region   *iova_region;
        unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0