Re: [PATCH v5 3/3] ARM: imx7d-remarkable2.dts: Initial device tree for reMarkable2

2021-03-21 Thread Fabio Estevam
Hi Alistair,

On Mon, Mar 15, 2021 at 11:27 PM Alistair Francis
 wrote:
>
> The reMarkable2 (https://remarkable.com) is an e-ink tablet based on
> the imx7d SoC.
>
> This commit is based on the DTS provide by reMarkable but ported to the
> latest kernel (instead of 4.14). I have removed references to
> non-upstream devices and have changed the UART so that the console can
> be accessed without having to open up the device via the OTG pogo pins.
>
> Currently the kernel boots, but there is no support for the display.
>
> WiFi is untested (no dispaly or UART RX makes it hard to test), but

"display"

> +   memory {
> +   reg = <0x8000 0x4000>;
> +   };

This should be:

memory@8000 {
 device_type = "memory";
 reg = <0x8000 0x4000>;
};

> + {
> +   status = "disabled";
> +};

Why do you need to disable this node?

> +_apbh {
> +   status = "disabled";
> +};

Same here.

> + {
> +   status = "okay";
> +};

No need to enable it in the board file.

> +_lpsr {
> +   pinctrl_digitizer_reg: digitizerreggrp {

This is not referenced from anywhere.


Re: [PATCH v5 3/3] ARM: imx7d-remarkable2.dts: Initial device tree for reMarkable2

2021-03-20 Thread Alistair Francis
On Fri, Mar 19, 2021 at 9:06 AM Marco Felsch  wrote:
>
> Hi Alistair,
>
> the patch looks quite good only a few notes inline.
>
> PS: It would be cool to have a log to previous patch versions.

I'm not sure how I could add that, I will add a changelog for this
version though.

>
> On 21-03-15 22:27, Alistair Francis wrote:
>
> ...
>
> > + {
> > + status = "disabled";
> > +};
>
> Why do you disable the crypto subsystem?
>
> > +_apbh {
> > + status = "disabled";
> > +};
>
> Why do you disable this dma controller?
>
> > +
> > + {
> > + status = "okay";
> > +};
>
> This is the default state so you can drop this node.

You are right, these are all just left over from the vendor DT, I have
removed all 3.

Alistair

>
> Regards,
>   Marco


Re: [PATCH v5 3/3] ARM: imx7d-remarkable2.dts: Initial device tree for reMarkable2

2021-03-19 Thread Marco Felsch
Hi Alistair,

the patch looks quite good only a few notes inline.

PS: It would be cool to have a log to previous patch versions.

On 21-03-15 22:27, Alistair Francis wrote:

...

> + {
> + status = "disabled";
> +};

Why do you disable the crypto subsystem?

> +_apbh {
> + status = "disabled";
> +};

Why do you disable this dma controller?

> +
> + {
> + status = "okay";
> +};

This is the default state so you can drop this node.

Regards,
  Marco


[PATCH v5 3/3] ARM: imx7d-remarkable2.dts: Initial device tree for reMarkable2

2021-03-15 Thread Alistair Francis
The reMarkable2 (https://remarkable.com) is an e-ink tablet based on
the imx7d SoC.

This commit is based on the DTS provide by reMarkable but ported to the
latest kernel (instead of 4.14). I have removed references to
non-upstream devices and have changed the UART so that the console can
be accessed without having to open up the device via the OTG pogo pins.

Currently the kernel boots, but there is no support for the display.

WiFi is untested (no dispaly or UART RX makes it hard to test), but
should work with the current upstream driver. As it's untested it's not
included in this commit.

Signed-off-by: Alistair Francis 
---
 arch/arm/boot/dts/Makefile  |   1 +
 arch/arm/boot/dts/imx7d-remarkable2.dts | 166 
 2 files changed, 167 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx7d-remarkable2.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8e5d4ab4e75e..dc8e378689af 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -660,6 +660,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-hobbit.dtb \
imx7d-pico-nymph.dtb \
imx7d-pico-pi.dtb \
+   imx7d-remarkable2.dtb \
imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
diff --git a/arch/arm/boot/dts/imx7d-remarkable2.dts 
b/arch/arm/boot/dts/imx7d-remarkable2.dts
new file mode 100644
index ..86d555bd33c2
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-remarkable2.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d.dtsi"
+
+/ {
+   model = "reMarkable 2.0";
+   compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
+
+   chosen {
+   stdout-path = 
+   };
+
+   memory {
+   reg = <0x8000 0x4000>;
+   };
+};
+
+ {
+   assigned-clocks = < IMX7D_CLKO2_ROOT_SRC>,
+ < IMX7D_CLKO2_ROOT_DIV>;
+   assigned-clock-parents = < IMX7D_CKIL>;
+   assigned-clock-rates = <0>, <32768>;
+};
+
+ {
+   status = "disabled";
+};
+
+_apbh {
+   status = "disabled";
+};
+
+ {
+   status = "okay";
+};
+
+_pwrkey {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_uart1>;
+   assigned-clocks = < IMX7D_UART1_ROOT_SRC>;
+   assigned-clock-parents = < IMX7D_OSC_24M_CLK>;
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_uart6>;
+   assigned-clocks = < IMX7D_UART6_ROOT_SRC>;
+   assigned-clock-parents = < IMX7D_OSC_24M_CLK>;
+   status = "okay";
+};
+
+ {
+   srp-disable;
+   hnp-disable;
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+   pinctrl-0 = <_usdhc3>;
+   pinctrl-1 = <_usdhc3_100mhz>;
+   pinctrl-2 = <_usdhc3_200mhz>;
+   pinctrl-3 = <_usdhc3>;
+   assigned-clocks = < IMX7D_USDHC3_ROOT_CLK>;
+   assigned-clock-rates = <4>;
+   bus-width = <8>;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_wdog>;
+   fsl,ext-reset-output;
+};
+
+_lpsr {
+   pinctrl_digitizer_reg: digitizerreggrp {
+   fsl,pins = <
+   /* DIGITIZER_PWR_EN */
+   MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14
+   >;
+   };
+};
+
+ {
+   pinctrl_uart1: uart1grp {
+   fsl,pins = <
+   MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX0x79
+   MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX0x79
+   >;
+   };
+
+   pinctrl_uart6: uart6grp {
+   fsl,pins = <
+   MX7D_PAD_EPDC_DATA09__UART6_DCE_TX  0x79
+   MX7D_PAD_EPDC_DATA08__UART6_DCE_RX  0x79
+   >;
+   };
+
+   pinctrl_usdhc3: usdhc3grp {
+   fsl,pins = <
+   MX7D_PAD_SD3_CMD__SD3_CMD   0x59
+   MX7D_PAD_SD3_CLK__SD3_CLK   0x19
+   MX7D_PAD_SD3_DATA0__SD3_DATA0   0x59
+   MX7D_PAD_SD3_DATA1__SD3_DATA1   0x59
+   MX7D_PAD_SD3_DATA2__SD3_DATA2   0x59
+   MX7D_PAD_SD3_DATA3__SD3_DATA3   0x59
+   MX7D_PAD_SD3_DATA4__SD3_DATA4   0x59
+   MX7D_PAD_SD3_DATA5__SD3_DATA5   0x59
+   MX7D_PAD_SD3_DATA6__SD3_DATA6   0x59
+   MX7D_PAD_SD3_DATA7__SD3_DATA7   0x59
+   MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
+   >;
+   };
+
+   pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+   fsl,pins = <
+