[PATCH v7 33/42] ARM: davinci: da850: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/board-omapl138-hawk.c |  12 +-
 arch/arm/mach-davinci/da850.c   | 653 +---
 arch/arm/mach-davinci/da8xx-dt.c|  12 +-
 3 files changed, 3 insertions(+), 674 deletions(-)

diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 2a10cd8..e372dcf 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,22 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-#ifdef CONFIG_COMMON_CLK
+
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9086f2b..8dcefc1 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -36,559 +36,12 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA850_REF_FREQ,
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-   .set_rate   = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
-   .name   = "pll0_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-   .set_rate   = davinci_set_sysclk_rate,
-   .maxrate= 1,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
-   .num= 2,
-   .phys_base  = DA850_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk2 = {
-   

[PATCH v7 33/42] ARM: davinci: da850: Remove legacy clock init

[David Lechner]

This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.

Signed-off-by: David Lechner 
Reviewed-by: Sekhar Nori 
---

v7 changes:
- rebased
- add davinci prefix to commit message

v6 changes:
- rebased

 arch/arm/mach-davinci/board-omapl138-hawk.c |  12 +-
 arch/arm/mach-davinci/da850.c   | 653 +---
 arch/arm/mach-davinci/da8xx-dt.c|  12 +-
 3 files changed, 3 insertions(+), 674 deletions(-)

diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c 
b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 2a10cd8..e372dcf 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -231,22 +231,12 @@ static __init void omapl138_hawk_usb_init(void)
pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
return;
}
-#ifdef CONFIG_COMMON_CLK
+
ret = da8xx_register_usb_phy_clocks();
if (ret)
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
-#else
-   ret = da8xx_register_usb20_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-   __func__, ret);
 
-   ret = da8xx_register_usb11_phy_clk(false);
-   if (ret)
-   pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
-   __func__, ret);
-#endif
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9086f2b..8dcefc1 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -36,559 +36,12 @@
 
 #include "mux.h"
 
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
-   .num= 1,
-   .phys_base  = DA8XX_PLL0_BASE,
-   .flags  = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-   .name   = "ref_clk",
-   .rate   = DA850_REF_FREQ,
-   .set_rate   = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
-   .name   = "pll0",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-   .set_rate   = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
-   .name   = "pll0_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
-   .name   = "pll0_sysclk1",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
-   .name   = "pll0_sysclk2",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-   .name   = "pll0_sysclk3",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV3,
-   .set_rate   = davinci_set_sysclk_rate,
-   .maxrate= 1,
-};
-
-static struct clk pll0_sysclk4 = {
-   .name   = "pll0_sysclk4",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-   .name   = "pll0_sysclk5",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-   .name   = "pll0_sysclk6",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-   .name   = "pll0_sysclk7",
-   .parent = _clk,
-   .flags  = CLK_PLL,
-   .div_reg= PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
-   .num= 2,
-   .phys_base  = DA850_PLL1_BASE,
-   .flags  = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
-   .name   = "pll1",
-   .parent = _clk,
-   .pll_data   = _data,
-   .flags  = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
-   .name   = "pll1_aux_clk",
-   .parent = _clk,
-   .flags  = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk2 = {
-   .name   = "pll1_sysclk2",
-