Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
On Tue, Sep 30, 2014 at 05:53:53PM +0100, Bjorn Helgaas wrote: > On Mon, Sep 22, 2014 at 09:23:51AM +0800, Ming Lei wrote: > > Hi Tanmay, > > > > On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar wrote: > > > Hi Ming Lei, > > > > > > On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei wrote: > > >> Hi Tanmay, > > >> > > >> On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote: > > >>> This patch adds support for AppliedMicro X-Gene PCIe host controller. > > >>> The > > >>> driver is tested on X-Gene platform with different gen1/2/3 PCIe > > >>> endpoint > > >>> cards. > > >>> > > >>> X-Gene PCIe controller driver has depedency on the pcie arm64 arch > > >>> support. > > >>> Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support > > >>> and > > >>> support for creating generic pcie bridge from device tree. Liviu's > > >>> patches > > >>> are available here > > >>> https://lkml.org/lkml/2014/9/8/333 > > >>> > > >>> If someone wishes to test PCIe on X-Gene with this patch set, above > > >>> mentioned > > >>> patches from Liviu must be applied before the patches in this patch > > >>> set. Also > > >>> please use latest xgene u-boot firmware. > > >>> > > >>> changes since V8: > > >>> 1. Add 'dma-coherent' attribute in device node. > > >> > > >> > > >> I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches > > >> against 3.17-rc5 on Mustang, and the following failure is triggered: > > >> > > >> [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit > > >> Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) > > >> [1.200249] tg3.c:v3.137 (May 11, 2014) > > >> [1.204087] [ cut here ] > > >> [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 > > >> pci_ioremap_bar+0x70/0x78() > > >> [1.216646] Modules linked in: > > >> [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 > > >> [1.226018] Call trace: > > >> [1.228453] [] dump_backtrace+0x0/0x16c > > >> [1.233826] [] show_stack+0x10/0x1c > > >> [1.238851] [] dump_stack+0x74/0x94 > > >> [1.243878] [] warn_slowpath_common+0x88/0xb0 > > >> [1.249767] [] warn_slowpath_null+0x14/0x20 > > >> [1.255485] [] pci_ioremap_bar+0x6c/0x78 > > >> [1.260942] [] tg3_init_one+0x148/0x16f4 > > >> [1.266401] [] pci_device_probe+0x78/0xd4 > > >> [1.271946] [] driver_probe_device+0x94/0x390 > > >> [1.277834] [] __driver_attach+0x98/0xa0 > > >> [1.283293] [] bus_for_each_dev+0x54/0x98 > > >> [1.288835] [] driver_attach+0x1c/0x28 > > >> [1.294121] [] bus_add_driver+0x164/0x240 > > >> [1.299663] [] driver_register+0x64/0x130 > > >> [1.305207] [] __pci_register_driver+0x3c/0x48 > > >> [1.311181] [] tg3_driver_init+0x1c/0x28 > > >> [1.316640] [] do_one_initcall+0xc4/0x1b4 > > >> [1.322186] [] kernel_init_freeable+0x1b8/0x25c > > >> [1.328246] [] kernel_init+0xc/0xd4 > > >> [1.333278] ---[ end trace f4dca5ab5b436080 ]--- > > >> [1.337871] tg3 :01:00.0: Cannot map device registers, aborting > > >> [1.344122] tg3: probe of :01:00.0 failed with error -12 > > >> > > >> > > > > > > Thanks for trying out the patches. Which firmware version are you > > > using? We may have release new firmware version for PCI to work if not > > > released yet. > > > > U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) > > > > I will check if there is newer fw available. > > > > > Also can you please send out the entire boot log? > > > > Please see below link: > > > > http://pastebin.com/fLqaDn6t > > From Ming's log, using the v9 patches: > > PCI host bridge /soc/pcie@1f2b ranges: > No bus range found for /soc/pcie@1f2b, using [??? > 0xffc3eb4292c0-0xffc0005e3b8c flags 0x40] > > What's going on here? It looks like it's from > of_pci_get_host_bridge_resources(), but I don't see how this output could > happen. Sorry, v9 to v11 had a bug in the print message where the range was passed as a reference. I have since fixed it in v12. I've noticed this log when preparing for v12 but somehow missed it in the change log? Best regards, Liviu > > IO 0xe01000..0xe01000 -> 0x > MEM 0xe18000..0xe1 -> 0x8000 > xgene-pcie 1f2b.pcie: (rc) x1 gen-1 link up > xgene-pcie 1f2b.pcie: PCI host bridge to bus :00 > pci_bus :00: root bus resource [bus 00-ff] > pci_bus :00: root bus resource [io 0x-0x] > pci_bus :00: root bus resource [mem 0xe18000-0xe1] (bus > address [0x8000-0x]) > pci_bus :00: scanning bus > pci :00:00.0: [19aa:e008] type 01 class 0x060400 > pci :00:00.0: reg 0x10: [mem 0x80-0x807fff 64bit pref] > > I guess this is the "inbound BAR" that you hid in the v10 patches. Hiding > it will prevent some of BAR assignment problems below. This is probably > what caused the tg3 mapping problem Ming initially reported above. We > tried to
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
On Mon, Sep 22, 2014 at 09:23:51AM +0800, Ming Lei wrote: > Hi Tanmay, > > On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar wrote: > > Hi Ming Lei, > > > > On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei wrote: > >> Hi Tanmay, > >> > >> On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote: > >>> This patch adds support for AppliedMicro X-Gene PCIe host controller. The > >>> driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint > >>> cards. > >>> > >>> X-Gene PCIe controller driver has depedency on the pcie arm64 arch > >>> support. > >>> Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and > >>> support for creating generic pcie bridge from device tree. Liviu's patches > >>> are available here > >>> https://lkml.org/lkml/2014/9/8/333 > >>> > >>> If someone wishes to test PCIe on X-Gene with this patch set, above > >>> mentioned > >>> patches from Liviu must be applied before the patches in this patch set. > >>> Also > >>> please use latest xgene u-boot firmware. > >>> > >>> changes since V8: > >>> 1. Add 'dma-coherent' attribute in device node. > >> > >> > >> I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches > >> against 3.17-rc5 on Mustang, and the following failure is triggered: > >> > >> [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit > >> Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) > >> [1.200249] tg3.c:v3.137 (May 11, 2014) > >> [1.204087] [ cut here ] > >> [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 > >> pci_ioremap_bar+0x70/0x78() > >> [1.216646] Modules linked in: > >> [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 > >> [1.226018] Call trace: > >> [1.228453] [] dump_backtrace+0x0/0x16c > >> [1.233826] [] show_stack+0x10/0x1c > >> [1.238851] [] dump_stack+0x74/0x94 > >> [1.243878] [] warn_slowpath_common+0x88/0xb0 > >> [1.249767] [] warn_slowpath_null+0x14/0x20 > >> [1.255485] [] pci_ioremap_bar+0x6c/0x78 > >> [1.260942] [] tg3_init_one+0x148/0x16f4 > >> [1.266401] [] pci_device_probe+0x78/0xd4 > >> [1.271946] [] driver_probe_device+0x94/0x390 > >> [1.277834] [] __driver_attach+0x98/0xa0 > >> [1.283293] [] bus_for_each_dev+0x54/0x98 > >> [1.288835] [] driver_attach+0x1c/0x28 > >> [1.294121] [] bus_add_driver+0x164/0x240 > >> [1.299663] [] driver_register+0x64/0x130 > >> [1.305207] [] __pci_register_driver+0x3c/0x48 > >> [1.311181] [] tg3_driver_init+0x1c/0x28 > >> [1.316640] [] do_one_initcall+0xc4/0x1b4 > >> [1.322186] [] kernel_init_freeable+0x1b8/0x25c > >> [1.328246] [] kernel_init+0xc/0xd4 > >> [1.333278] ---[ end trace f4dca5ab5b436080 ]--- > >> [1.337871] tg3 :01:00.0: Cannot map device registers, aborting > >> [1.344122] tg3: probe of :01:00.0 failed with error -12 > >> > >> > > > > Thanks for trying out the patches. Which firmware version are you > > using? We may have release new firmware version for PCI to work if not > > released yet. > > U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) > > I will check if there is newer fw available. > > > Also can you please send out the entire boot log? > > Please see below link: > > http://pastebin.com/fLqaDn6t >From Ming's log, using the v9 patches: PCI host bridge /soc/pcie@1f2b ranges: No bus range found for /soc/pcie@1f2b, using [??? 0xffc3eb4292c0-0xffc0005e3b8c flags 0x40] What's going on here? It looks like it's from of_pci_get_host_bridge_resources(), but I don't see how this output could happen. IO 0xe01000..0xe01000 -> 0x MEM 0xe18000..0xe1 -> 0x8000 xgene-pcie 1f2b.pcie: (rc) x1 gen-1 link up xgene-pcie 1f2b.pcie: PCI host bridge to bus :00 pci_bus :00: root bus resource [bus 00-ff] pci_bus :00: root bus resource [io 0x-0x] pci_bus :00: root bus resource [mem 0xe18000-0xe1] (bus address [0x8000-0x]) pci_bus :00: scanning bus pci :00:00.0: [19aa:e008] type 01 class 0x060400 pci :00:00.0: reg 0x10: [mem 0x80-0x807fff 64bit pref] I guess this is the "inbound BAR" that you hid in the v10 patches. Hiding it will prevent some of BAR assignment problems below. This is probably what caused the tg3 mapping problem Ming initially reported above. We tried to reassign the inbound BAR, and it took up the entire space that we thought was available for CPU accesses to the PCI bus, leaving none for the tg3 device. Was Ming just unlucky by having an unusual configuration, e.g., with a lot of memory or something? He certainly doesn't have a complicated PCIe hierarchy. I assume you've tested this and had it work *somewhere*. pci :00:00.0: supports D1 D2 pci_bus :00: fixups for bus pci :00:00.0: scanning [bus 01-01] behind bridge, pass 0 pci_bus :01: scanning bus pci :01:00.0:
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
On Mon, Sep 22, 2014 at 09:23:51AM +0800, Ming Lei wrote: Hi Tanmay, On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar tinam...@apm.com wrote: Hi Ming Lei, On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei tom.leim...@gmail.com wrote: Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar tinam...@apm.com wrote: This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [ffc884f0] dump_backtrace+0x0/0x16c [1.233826] [ffc8866c] show_stack+0x10/0x1c [1.238851] [ffc0006e3210] dump_stack+0x74/0x94 [1.243878] [ffca934c] warn_slowpath_common+0x88/0xb0 [1.249767] [ffca9438] warn_slowpath_null+0x14/0x20 [1.255485] [ffc0003994c4] pci_ioremap_bar+0x6c/0x78 [1.260942] [ffc0005598cc] tg3_init_one+0x148/0x16f4 [1.266401] [ffc00039ccf0] pci_device_probe+0x78/0xd4 [1.271946] [ffc00042785c] driver_probe_device+0x94/0x390 [1.277834] [ffc000427c44] __driver_attach+0x98/0xa0 [1.283293] [ffc000425a54] bus_for_each_dev+0x54/0x98 [1.288835] [ffc00042730c] driver_attach+0x1c/0x28 [1.294121] [ffc000426f04] bus_add_driver+0x164/0x240 [1.299663] [ffc000428430] driver_register+0x64/0x130 [1.305207] [ffc00039c97c] __pci_register_driver+0x3c/0x48 [1.311181] [ffc000aa8a5c] tg3_driver_init+0x1c/0x28 [1.316640] [ffc814e0] do_one_initcall+0xc4/0x1b4 [1.322186] [ffc000a74b64] kernel_init_freeable+0x1b8/0x25c [1.328246] [ffc0006de318] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks for trying out the patches. Which firmware version are you using? We may have release new firmware version for PCI to work if not released yet. U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) I will check if there is newer fw available. Also can you please send out the entire boot log? Please see below link: http://pastebin.com/fLqaDn6t From Ming's log, using the v9 patches: PCI host bridge /soc/pcie@1f2b ranges: No bus range found for /soc/pcie@1f2b, using [??? 0xffc3eb4292c0-0xffc0005e3b8c flags 0x40] What's going on here? It looks like it's from of_pci_get_host_bridge_resources(), but I don't see how this output could happen. IO 0xe01000..0xe01000 - 0x MEM 0xe18000..0xe1 - 0x8000 xgene-pcie 1f2b.pcie: (rc) x1 gen-1 link up xgene-pcie 1f2b.pcie: PCI host bridge to bus :00 pci_bus :00: root bus resource [bus 00-ff] pci_bus :00: root bus resource [io 0x-0x] pci_bus :00: root bus resource [mem 0xe18000-0xe1] (bus address [0x8000-0x]) pci_bus :00: scanning bus pci :00:00.0: [19aa:e008] type 01 class 0x060400 pci :00:00.0: reg 0x10: [mem 0x80-0x807fff 64bit pref] I guess this is the inbound BAR that you hid in the v10 patches. Hiding it will prevent some of BAR assignment problems below. This is probably what caused the tg3 mapping problem Ming initially reported above. We tried to reassign the inbound BAR, and it took up the entire space that we thought was available for CPU accesses to the PCI bus, leaving none for the tg3 device. Was Ming just unlucky by having an unusual configuration, e.g., with a lot of memory or something? He certainly doesn't have a complicated PCIe hierarchy. I assume you've tested this and had it work *somewhere*. pci :00:00.0: supports D1 D2 pci_bus :00:
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
On Tue, Sep 30, 2014 at 05:53:53PM +0100, Bjorn Helgaas wrote: On Mon, Sep 22, 2014 at 09:23:51AM +0800, Ming Lei wrote: Hi Tanmay, On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar tinam...@apm.com wrote: Hi Ming Lei, On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei tom.leim...@gmail.com wrote: Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar tinam...@apm.com wrote: This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [ffc884f0] dump_backtrace+0x0/0x16c [1.233826] [ffc8866c] show_stack+0x10/0x1c [1.238851] [ffc0006e3210] dump_stack+0x74/0x94 [1.243878] [ffca934c] warn_slowpath_common+0x88/0xb0 [1.249767] [ffca9438] warn_slowpath_null+0x14/0x20 [1.255485] [ffc0003994c4] pci_ioremap_bar+0x6c/0x78 [1.260942] [ffc0005598cc] tg3_init_one+0x148/0x16f4 [1.266401] [ffc00039ccf0] pci_device_probe+0x78/0xd4 [1.271946] [ffc00042785c] driver_probe_device+0x94/0x390 [1.277834] [ffc000427c44] __driver_attach+0x98/0xa0 [1.283293] [ffc000425a54] bus_for_each_dev+0x54/0x98 [1.288835] [ffc00042730c] driver_attach+0x1c/0x28 [1.294121] [ffc000426f04] bus_add_driver+0x164/0x240 [1.299663] [ffc000428430] driver_register+0x64/0x130 [1.305207] [ffc00039c97c] __pci_register_driver+0x3c/0x48 [1.311181] [ffc000aa8a5c] tg3_driver_init+0x1c/0x28 [1.316640] [ffc814e0] do_one_initcall+0xc4/0x1b4 [1.322186] [ffc000a74b64] kernel_init_freeable+0x1b8/0x25c [1.328246] [ffc0006de318] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks for trying out the patches. Which firmware version are you using? We may have release new firmware version for PCI to work if not released yet. U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) I will check if there is newer fw available. Also can you please send out the entire boot log? Please see below link: http://pastebin.com/fLqaDn6t From Ming's log, using the v9 patches: PCI host bridge /soc/pcie@1f2b ranges: No bus range found for /soc/pcie@1f2b, using [??? 0xffc3eb4292c0-0xffc0005e3b8c flags 0x40] What's going on here? It looks like it's from of_pci_get_host_bridge_resources(), but I don't see how this output could happen. Sorry, v9 to v11 had a bug in the print message where the range was passed as a reference. I have since fixed it in v12. I've noticed this log when preparing for v12 but somehow missed it in the change log? Best regards, Liviu IO 0xe01000..0xe01000 - 0x MEM 0xe18000..0xe1 - 0x8000 xgene-pcie 1f2b.pcie: (rc) x1 gen-1 link up xgene-pcie 1f2b.pcie: PCI host bridge to bus :00 pci_bus :00: root bus resource [bus 00-ff] pci_bus :00: root bus resource [io 0x-0x] pci_bus :00: root bus resource [mem 0xe18000-0xe1] (bus address [0x8000-0x]) pci_bus :00: scanning bus pci :00:00.0: [19aa:e008] type 01 class 0x060400 pci :00:00.0: reg 0x10: [mem 0x80-0x807fff 64bit pref] I guess this is the inbound BAR that you hid in the v10 patches. Hiding it will prevent some of BAR assignment problems below. This is probably what caused the tg3 mapping problem Ming initially reported above. We tried to reassign
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Tanmay, On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar wrote: > Hi Ming Lei, > > On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei wrote: >> Hi Tanmay, >> >> On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote: >>> This patch adds support for AppliedMicro X-Gene PCIe host controller. The >>> driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint >>> cards. >>> >>> X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. >>> Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and >>> support for creating generic pcie bridge from device tree. Liviu's patches >>> are available here >>> https://lkml.org/lkml/2014/9/8/333 >>> >>> If someone wishes to test PCIe on X-Gene with this patch set, above >>> mentioned >>> patches from Liviu must be applied before the patches in this patch set. >>> Also >>> please use latest xgene u-boot firmware. >>> >>> changes since V8: >>> 1. Add 'dma-coherent' attribute in device node. >> >> >> I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches >> against 3.17-rc5 on Mustang, and the following failure is triggered: >> >> [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit >> Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) >> [1.200249] tg3.c:v3.137 (May 11, 2014) >> [1.204087] [ cut here ] >> [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 >> pci_ioremap_bar+0x70/0x78() >> [1.216646] Modules linked in: >> [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 >> [1.226018] Call trace: >> [1.228453] [] dump_backtrace+0x0/0x16c >> [1.233826] [] show_stack+0x10/0x1c >> [1.238851] [] dump_stack+0x74/0x94 >> [1.243878] [] warn_slowpath_common+0x88/0xb0 >> [1.249767] [] warn_slowpath_null+0x14/0x20 >> [1.255485] [] pci_ioremap_bar+0x6c/0x78 >> [1.260942] [] tg3_init_one+0x148/0x16f4 >> [1.266401] [] pci_device_probe+0x78/0xd4 >> [1.271946] [] driver_probe_device+0x94/0x390 >> [1.277834] [] __driver_attach+0x98/0xa0 >> [1.283293] [] bus_for_each_dev+0x54/0x98 >> [1.288835] [] driver_attach+0x1c/0x28 >> [1.294121] [] bus_add_driver+0x164/0x240 >> [1.299663] [] driver_register+0x64/0x130 >> [1.305207] [] __pci_register_driver+0x3c/0x48 >> [1.311181] [] tg3_driver_init+0x1c/0x28 >> [1.316640] [] do_one_initcall+0xc4/0x1b4 >> [1.322186] [] kernel_init_freeable+0x1b8/0x25c >> [1.328246] [] kernel_init+0xc/0xd4 >> [1.333278] ---[ end trace f4dca5ab5b436080 ]--- >> [1.337871] tg3 :01:00.0: Cannot map device registers, aborting >> [1.344122] tg3: probe of :01:00.0 failed with error -12 >> >> > > Thanks for trying out the patches. Which firmware version are you > using? We may have release new firmware version for PCI to work if not > released yet. U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) I will check if there is newer fw available. > Also can you please send out the entire boot log? Please see below link: http://pastebin.com/fLqaDn6t Thanks, -- Ming Lei > > Thanks, > Tanmay > >> >> Thanks, >> >>> >>> changes since V7: >>> 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. >>> >>> changes since V6: >>> 1. Port driver to changed interface as per Liviu's v10 series. >>> >>> changes since V5: >>> 1. Port driver to changed interface of 'of_create_pci_host_bridge' >>> 2. Fix the prefetch bit setting >>> 3. Removed bunch of register programming which is already done by firmware >>> >>> changes since V4: >>> 1. fix section mismatch warnings >>> 2. fix the patch description >>> 3. fix indentation >>> 4. update read/write cfg functions by passing both addr and offset. >>> 5. use 'time_before' for timeout. >>> 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' >>> 7. remove BUG_ON for pci_ioremap_io. >>> >>> changes since V3: >>> 1. remove 'struct hw_pci' and supporting ops in hw_pci >>> 2. add code to create the host bridge from dts >>> 3. add code to scan the the host bridge >>> 4. modify outbound windows setup function to get resource information from >>>'bridge->windows' >>> 5. add compatible string in pcie dts node with current X-Gene SOC name. >>> >>> changes since V2: >>> 1. redefined each PCI port in different PCI domain correctly. >>> 2. removed setup_lane and setup_link functions from driver. >>> 3. removed scan_bus wrapper and set_primary_bus hack. >>> 4. added pci_ioremap_io for io resources. >>> >>> changes since V1: >>> 1. added PCI domain support >>> 2. reading cpu and pci addresses from device tree to configure regions. >>> 3. got rid of unnecessary wrappers for readl and writel. >>> 4. got rid of endpoint configuration code. >>> 5. added 'dma-ranges' property support to read inbound region configuration. >>> 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' >>> 7. dropped 'clock-names' property from bindings >>> 8. added comments whereever
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Tanmay, On Sat, Sep 20, 2014 at 1:15 AM, Tanmay Inamdar tinam...@apm.com wrote: Hi Ming Lei, On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei tom.leim...@gmail.com wrote: Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar tinam...@apm.com wrote: This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [ffc884f0] dump_backtrace+0x0/0x16c [1.233826] [ffc8866c] show_stack+0x10/0x1c [1.238851] [ffc0006e3210] dump_stack+0x74/0x94 [1.243878] [ffca934c] warn_slowpath_common+0x88/0xb0 [1.249767] [ffca9438] warn_slowpath_null+0x14/0x20 [1.255485] [ffc0003994c4] pci_ioremap_bar+0x6c/0x78 [1.260942] [ffc0005598cc] tg3_init_one+0x148/0x16f4 [1.266401] [ffc00039ccf0] pci_device_probe+0x78/0xd4 [1.271946] [ffc00042785c] driver_probe_device+0x94/0x390 [1.277834] [ffc000427c44] __driver_attach+0x98/0xa0 [1.283293] [ffc000425a54] bus_for_each_dev+0x54/0x98 [1.288835] [ffc00042730c] driver_attach+0x1c/0x28 [1.294121] [ffc000426f04] bus_add_driver+0x164/0x240 [1.299663] [ffc000428430] driver_register+0x64/0x130 [1.305207] [ffc00039c97c] __pci_register_driver+0x3c/0x48 [1.311181] [ffc000aa8a5c] tg3_driver_init+0x1c/0x28 [1.316640] [ffc814e0] do_one_initcall+0xc4/0x1b4 [1.322186] [ffc000a74b64] kernel_init_freeable+0x1b8/0x25c [1.328246] [ffc0006de318] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks for trying out the patches. Which firmware version are you using? We may have release new firmware version for PCI to work if not released yet. U-Boot 2013.04-mustang_sw_1.13.28-beta (Aug 25 2014 - 14:16:10) I will check if there is newer fw available. Also can you please send out the entire boot log? Please see below link: http://pastebin.com/fLqaDn6t Thanks, -- Ming Lei Thanks, Tanmay Thanks, changes since V7: 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. changes since V6: 1. Port driver to changed interface as per Liviu's v10 series. changes since V5: 1. Port driver to changed interface of 'of_create_pci_host_bridge' 2. Fix the prefetch bit setting 3. Removed bunch of register programming which is already done by firmware changes since V4: 1. fix section mismatch warnings 2. fix the patch description 3. fix indentation 4. update read/write cfg functions by passing both addr and offset. 5. use 'time_before' for timeout. 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' 7. remove BUG_ON for pci_ioremap_io. changes since V3: 1. remove 'struct hw_pci' and supporting ops in hw_pci 2. add code to create the host bridge from dts 3. add code to scan the the host bridge 4. modify outbound windows setup function to get resource information from 'bridge-windows' 5. add compatible string in pcie dts node with current X-Gene SOC name. changes since V2: 1. redefined each PCI port in different PCI domain correctly. 2. removed setup_lane and setup_link functions from driver. 3. removed scan_bus wrapper and set_primary_bus hack. 4. added pci_ioremap_io for io resources. changes since V1: 1. added PCI domain support 2. reading cpu and pci addresses from device tree to configure regions. 3. got rid of unnecessary wrappers for readl and writel. 4. got rid of endpoint configuration code. 5. added 'dma-ranges' property support to read inbound region configuration. 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' 7. dropped
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Ming Lei, On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei wrote: > Hi Tanmay, > > On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote: >> This patch adds support for AppliedMicro X-Gene PCIe host controller. The >> driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint >> cards. >> >> X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. >> Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and >> support for creating generic pcie bridge from device tree. Liviu's patches >> are available here >> https://lkml.org/lkml/2014/9/8/333 >> >> If someone wishes to test PCIe on X-Gene with this patch set, above mentioned >> patches from Liviu must be applied before the patches in this patch set. Also >> please use latest xgene u-boot firmware. >> >> changes since V8: >> 1. Add 'dma-coherent' attribute in device node. > > > I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches > against 3.17-rc5 on Mustang, and the following failure is triggered: > > [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit > Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) > [1.200249] tg3.c:v3.137 (May 11, 2014) > [1.204087] [ cut here ] > [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 > pci_ioremap_bar+0x70/0x78() > [1.216646] Modules linked in: > [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 > [1.226018] Call trace: > [1.228453] [] dump_backtrace+0x0/0x16c > [1.233826] [] show_stack+0x10/0x1c > [1.238851] [] dump_stack+0x74/0x94 > [1.243878] [] warn_slowpath_common+0x88/0xb0 > [1.249767] [] warn_slowpath_null+0x14/0x20 > [1.255485] [] pci_ioremap_bar+0x6c/0x78 > [1.260942] [] tg3_init_one+0x148/0x16f4 > [1.266401] [] pci_device_probe+0x78/0xd4 > [1.271946] [] driver_probe_device+0x94/0x390 > [1.277834] [] __driver_attach+0x98/0xa0 > [1.283293] [] bus_for_each_dev+0x54/0x98 > [1.288835] [] driver_attach+0x1c/0x28 > [1.294121] [] bus_add_driver+0x164/0x240 > [1.299663] [] driver_register+0x64/0x130 > [1.305207] [] __pci_register_driver+0x3c/0x48 > [1.311181] [] tg3_driver_init+0x1c/0x28 > [1.316640] [] do_one_initcall+0xc4/0x1b4 > [1.322186] [] kernel_init_freeable+0x1b8/0x25c > [1.328246] [] kernel_init+0xc/0xd4 > [1.333278] ---[ end trace f4dca5ab5b436080 ]--- > [1.337871] tg3 :01:00.0: Cannot map device registers, aborting > [1.344122] tg3: probe of :01:00.0 failed with error -12 > > Thanks for trying out the patches. Which firmware version are you using? We may have release new firmware version for PCI to work if not released yet. Also can you please send out the entire boot log? Thanks, Tanmay > > Thanks, > >> >> changes since V7: >> 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. >> >> changes since V6: >> 1. Port driver to changed interface as per Liviu's v10 series. >> >> changes since V5: >> 1. Port driver to changed interface of 'of_create_pci_host_bridge' >> 2. Fix the prefetch bit setting >> 3. Removed bunch of register programming which is already done by firmware >> >> changes since V4: >> 1. fix section mismatch warnings >> 2. fix the patch description >> 3. fix indentation >> 4. update read/write cfg functions by passing both addr and offset. >> 5. use 'time_before' for timeout. >> 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' >> 7. remove BUG_ON for pci_ioremap_io. >> >> changes since V3: >> 1. remove 'struct hw_pci' and supporting ops in hw_pci >> 2. add code to create the host bridge from dts >> 3. add code to scan the the host bridge >> 4. modify outbound windows setup function to get resource information from >>'bridge->windows' >> 5. add compatible string in pcie dts node with current X-Gene SOC name. >> >> changes since V2: >> 1. redefined each PCI port in different PCI domain correctly. >> 2. removed setup_lane and setup_link functions from driver. >> 3. removed scan_bus wrapper and set_primary_bus hack. >> 4. added pci_ioremap_io for io resources. >> >> changes since V1: >> 1. added PCI domain support >> 2. reading cpu and pci addresses from device tree to configure regions. >> 3. got rid of unnecessary wrappers for readl and writel. >> 4. got rid of endpoint configuration code. >> 5. added 'dma-ranges' property support to read inbound region configuration. >> 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' >> 7. dropped 'clock-names' property from bindings >> 8. added comments whereever requested. >> >> >> Tanmay Inamdar (4): >> pci:host: APM X-Gene PCIe host controller driver >> arm64: dts: APM X-Gene PCIe device tree nodes >> dt-bindings: pci: xgene pcie device tree bindings >> MAINTAINERS: entry for APM X-Gene PCIe host driver >> >> .../devicetree/bindings/pci/xgene-pci.txt | 57 ++ >> MAINTAINERS| 8 + >>
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Ming Lei, On Thu, Sep 18, 2014 at 8:08 PM, Ming Lei tom.leim...@gmail.com wrote: Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar tinam...@apm.com wrote: This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [ffc884f0] dump_backtrace+0x0/0x16c [1.233826] [ffc8866c] show_stack+0x10/0x1c [1.238851] [ffc0006e3210] dump_stack+0x74/0x94 [1.243878] [ffca934c] warn_slowpath_common+0x88/0xb0 [1.249767] [ffca9438] warn_slowpath_null+0x14/0x20 [1.255485] [ffc0003994c4] pci_ioremap_bar+0x6c/0x78 [1.260942] [ffc0005598cc] tg3_init_one+0x148/0x16f4 [1.266401] [ffc00039ccf0] pci_device_probe+0x78/0xd4 [1.271946] [ffc00042785c] driver_probe_device+0x94/0x390 [1.277834] [ffc000427c44] __driver_attach+0x98/0xa0 [1.283293] [ffc000425a54] bus_for_each_dev+0x54/0x98 [1.288835] [ffc00042730c] driver_attach+0x1c/0x28 [1.294121] [ffc000426f04] bus_add_driver+0x164/0x240 [1.299663] [ffc000428430] driver_register+0x64/0x130 [1.305207] [ffc00039c97c] __pci_register_driver+0x3c/0x48 [1.311181] [ffc000aa8a5c] tg3_driver_init+0x1c/0x28 [1.316640] [ffc814e0] do_one_initcall+0xc4/0x1b4 [1.322186] [ffc000a74b64] kernel_init_freeable+0x1b8/0x25c [1.328246] [ffc0006de318] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks for trying out the patches. Which firmware version are you using? We may have release new firmware version for PCI to work if not released yet. Also can you please send out the entire boot log? Thanks, Tanmay Thanks, changes since V7: 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. changes since V6: 1. Port driver to changed interface as per Liviu's v10 series. changes since V5: 1. Port driver to changed interface of 'of_create_pci_host_bridge' 2. Fix the prefetch bit setting 3. Removed bunch of register programming which is already done by firmware changes since V4: 1. fix section mismatch warnings 2. fix the patch description 3. fix indentation 4. update read/write cfg functions by passing both addr and offset. 5. use 'time_before' for timeout. 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' 7. remove BUG_ON for pci_ioremap_io. changes since V3: 1. remove 'struct hw_pci' and supporting ops in hw_pci 2. add code to create the host bridge from dts 3. add code to scan the the host bridge 4. modify outbound windows setup function to get resource information from 'bridge-windows' 5. add compatible string in pcie dts node with current X-Gene SOC name. changes since V2: 1. redefined each PCI port in different PCI domain correctly. 2. removed setup_lane and setup_link functions from driver. 3. removed scan_bus wrapper and set_primary_bus hack. 4. added pci_ioremap_io for io resources. changes since V1: 1. added PCI domain support 2. reading cpu and pci addresses from device tree to configure regions. 3. got rid of unnecessary wrappers for readl and writel. 4. got rid of endpoint configuration code. 5. added 'dma-ranges' property support to read inbound region configuration. 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' 7. dropped 'clock-names' property from bindings 8. added comments whereever requested. Tanmay Inamdar (4): pci:host: APM X-Gene PCIe host controller driver arm64: dts: APM X-Gene PCIe device tree nodes dt-bindings: pci: xgene pcie device tree bindings MAINTAINERS: entry for APM X-Gene
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar wrote: > This patch adds support for AppliedMicro X-Gene PCIe host controller. The > driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint > cards. > > X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. > Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and > support for creating generic pcie bridge from device tree. Liviu's patches > are available here > https://lkml.org/lkml/2014/9/8/333 > > If someone wishes to test PCIe on X-Gene with this patch set, above mentioned > patches from Liviu must be applied before the patches in this patch set. Also > please use latest xgene u-boot firmware. > > changes since V8: > 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [] dump_backtrace+0x0/0x16c [1.233826] [] show_stack+0x10/0x1c [1.238851] [] dump_stack+0x74/0x94 [1.243878] [] warn_slowpath_common+0x88/0xb0 [1.249767] [] warn_slowpath_null+0x14/0x20 [1.255485] [] pci_ioremap_bar+0x6c/0x78 [1.260942] [] tg3_init_one+0x148/0x16f4 [1.266401] [] pci_device_probe+0x78/0xd4 [1.271946] [] driver_probe_device+0x94/0x390 [1.277834] [] __driver_attach+0x98/0xa0 [1.283293] [] bus_for_each_dev+0x54/0x98 [1.288835] [] driver_attach+0x1c/0x28 [1.294121] [] bus_add_driver+0x164/0x240 [1.299663] [] driver_register+0x64/0x130 [1.305207] [] __pci_register_driver+0x3c/0x48 [1.311181] [] tg3_driver_init+0x1c/0x28 [1.316640] [] do_one_initcall+0xc4/0x1b4 [1.322186] [] kernel_init_freeable+0x1b8/0x25c [1.328246] [] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks, > > changes since V7: > 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. > > changes since V6: > 1. Port driver to changed interface as per Liviu's v10 series. > > changes since V5: > 1. Port driver to changed interface of 'of_create_pci_host_bridge' > 2. Fix the prefetch bit setting > 3. Removed bunch of register programming which is already done by firmware > > changes since V4: > 1. fix section mismatch warnings > 2. fix the patch description > 3. fix indentation > 4. update read/write cfg functions by passing both addr and offset. > 5. use 'time_before' for timeout. > 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' > 7. remove BUG_ON for pci_ioremap_io. > > changes since V3: > 1. remove 'struct hw_pci' and supporting ops in hw_pci > 2. add code to create the host bridge from dts > 3. add code to scan the the host bridge > 4. modify outbound windows setup function to get resource information from >'bridge->windows' > 5. add compatible string in pcie dts node with current X-Gene SOC name. > > changes since V2: > 1. redefined each PCI port in different PCI domain correctly. > 2. removed setup_lane and setup_link functions from driver. > 3. removed scan_bus wrapper and set_primary_bus hack. > 4. added pci_ioremap_io for io resources. > > changes since V1: > 1. added PCI domain support > 2. reading cpu and pci addresses from device tree to configure regions. > 3. got rid of unnecessary wrappers for readl and writel. > 4. got rid of endpoint configuration code. > 5. added 'dma-ranges' property support to read inbound region configuration. > 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' > 7. dropped 'clock-names' property from bindings > 8. added comments whereever requested. > > > Tanmay Inamdar (4): > pci:host: APM X-Gene PCIe host controller driver > arm64: dts: APM X-Gene PCIe device tree nodes > dt-bindings: pci: xgene pcie device tree bindings > MAINTAINERS: entry for APM X-Gene PCIe host driver > > .../devicetree/bindings/pci/xgene-pci.txt | 57 ++ > MAINTAINERS| 8 + > arch/arm64/boot/dts/apm-mustang.dts| 8 + > arch/arm64/boot/dts/apm-storm.dtsi | 165 ++ > drivers/pci/host/Kconfig | 10 + > drivers/pci/host/Makefile | 1 + > drivers/pci/host/pci-xgene.c | 646 > + > 7 files changed, 895 insertions(+) > create mode 100644
Re: [PATCH v9 0/4] APM X-Gene PCIe host controller
Hi Tanmay, On Wed, Sep 17, 2014 at 6:33 AM, Tanmay Inamdar tinam...@apm.com wrote: This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. I just tested your V9 patches plus Liviu's V10 PCI/ARM64 patches against 3.17-rc5 on Mustang, and the following failure is triggered: [1.190131] bnx2x: Broadcom NetXtreme II 5771x/578xx 10/20-Gigabit Ethernet Driver bnx2x 1.78.19-0 (2014/02/10) [1.200249] tg3.c:v3.137 (May 11, 2014) [1.204087] [ cut here ] [1.208682] WARNING: CPU: 1 PID: 1 at drivers/pci/pci.c:131 pci_ioremap_bar+0x70/0x78() [1.216646] Modules linked in: [1.219696] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc5+ #1 [1.226018] Call trace: [1.228453] [ffc884f0] dump_backtrace+0x0/0x16c [1.233826] [ffc8866c] show_stack+0x10/0x1c [1.238851] [ffc0006e3210] dump_stack+0x74/0x94 [1.243878] [ffca934c] warn_slowpath_common+0x88/0xb0 [1.249767] [ffca9438] warn_slowpath_null+0x14/0x20 [1.255485] [ffc0003994c4] pci_ioremap_bar+0x6c/0x78 [1.260942] [ffc0005598cc] tg3_init_one+0x148/0x16f4 [1.266401] [ffc00039ccf0] pci_device_probe+0x78/0xd4 [1.271946] [ffc00042785c] driver_probe_device+0x94/0x390 [1.277834] [ffc000427c44] __driver_attach+0x98/0xa0 [1.283293] [ffc000425a54] bus_for_each_dev+0x54/0x98 [1.288835] [ffc00042730c] driver_attach+0x1c/0x28 [1.294121] [ffc000426f04] bus_add_driver+0x164/0x240 [1.299663] [ffc000428430] driver_register+0x64/0x130 [1.305207] [ffc00039c97c] __pci_register_driver+0x3c/0x48 [1.311181] [ffc000aa8a5c] tg3_driver_init+0x1c/0x28 [1.316640] [ffc814e0] do_one_initcall+0xc4/0x1b4 [1.322186] [ffc000a74b64] kernel_init_freeable+0x1b8/0x25c [1.328246] [ffc0006de318] kernel_init+0xc/0xd4 [1.333278] ---[ end trace f4dca5ab5b436080 ]--- [1.337871] tg3 :01:00.0: Cannot map device registers, aborting [1.344122] tg3: probe of :01:00.0 failed with error -12 Thanks, changes since V7: 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. changes since V6: 1. Port driver to changed interface as per Liviu's v10 series. changes since V5: 1. Port driver to changed interface of 'of_create_pci_host_bridge' 2. Fix the prefetch bit setting 3. Removed bunch of register programming which is already done by firmware changes since V4: 1. fix section mismatch warnings 2. fix the patch description 3. fix indentation 4. update read/write cfg functions by passing both addr and offset. 5. use 'time_before' for timeout. 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' 7. remove BUG_ON for pci_ioremap_io. changes since V3: 1. remove 'struct hw_pci' and supporting ops in hw_pci 2. add code to create the host bridge from dts 3. add code to scan the the host bridge 4. modify outbound windows setup function to get resource information from 'bridge-windows' 5. add compatible string in pcie dts node with current X-Gene SOC name. changes since V2: 1. redefined each PCI port in different PCI domain correctly. 2. removed setup_lane and setup_link functions from driver. 3. removed scan_bus wrapper and set_primary_bus hack. 4. added pci_ioremap_io for io resources. changes since V1: 1. added PCI domain support 2. reading cpu and pci addresses from device tree to configure regions. 3. got rid of unnecessary wrappers for readl and writel. 4. got rid of endpoint configuration code. 5. added 'dma-ranges' property support to read inbound region configuration. 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' 7. dropped 'clock-names' property from bindings 8. added comments whereever requested. Tanmay Inamdar (4): pci:host: APM X-Gene PCIe host controller driver arm64: dts: APM X-Gene PCIe device tree nodes dt-bindings: pci: xgene pcie device tree bindings MAINTAINERS: entry for APM X-Gene PCIe host driver .../devicetree/bindings/pci/xgene-pci.txt | 57 ++ MAINTAINERS| 8 + arch/arm64/boot/dts/apm-mustang.dts| 8 + arch/arm64/boot/dts/apm-storm.dtsi | 165 ++ drivers/pci/host/Kconfig | 10 +
[PATCH v9 0/4] APM X-Gene PCIe host controller
This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. changes since V7: 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. changes since V6: 1. Port driver to changed interface as per Liviu's v10 series. changes since V5: 1. Port driver to changed interface of 'of_create_pci_host_bridge' 2. Fix the prefetch bit setting 3. Removed bunch of register programming which is already done by firmware changes since V4: 1. fix section mismatch warnings 2. fix the patch description 3. fix indentation 4. update read/write cfg functions by passing both addr and offset. 5. use 'time_before' for timeout. 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' 7. remove BUG_ON for pci_ioremap_io. changes since V3: 1. remove 'struct hw_pci' and supporting ops in hw_pci 2. add code to create the host bridge from dts 3. add code to scan the the host bridge 4. modify outbound windows setup function to get resource information from 'bridge->windows' 5. add compatible string in pcie dts node with current X-Gene SOC name. changes since V2: 1. redefined each PCI port in different PCI domain correctly. 2. removed setup_lane and setup_link functions from driver. 3. removed scan_bus wrapper and set_primary_bus hack. 4. added pci_ioremap_io for io resources. changes since V1: 1. added PCI domain support 2. reading cpu and pci addresses from device tree to configure regions. 3. got rid of unnecessary wrappers for readl and writel. 4. got rid of endpoint configuration code. 5. added 'dma-ranges' property support to read inbound region configuration. 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' 7. dropped 'clock-names' property from bindings 8. added comments whereever requested. Tanmay Inamdar (4): pci:host: APM X-Gene PCIe host controller driver arm64: dts: APM X-Gene PCIe device tree nodes dt-bindings: pci: xgene pcie device tree bindings MAINTAINERS: entry for APM X-Gene PCIe host driver .../devicetree/bindings/pci/xgene-pci.txt | 57 ++ MAINTAINERS| 8 + arch/arm64/boot/dts/apm-mustang.dts| 8 + arch/arm64/boot/dts/apm-storm.dtsi | 165 ++ drivers/pci/host/Kconfig | 10 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pci-xgene.c | 646 + 7 files changed, 895 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/xgene-pci.txt create mode 100644 drivers/pci/host/pci-xgene.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v9 0/4] APM X-Gene PCIe host controller
This patch adds support for AppliedMicro X-Gene PCIe host controller. The driver is tested on X-Gene platform with different gen1/2/3 PCIe endpoint cards. X-Gene PCIe controller driver has depedency on the pcie arm64 arch support. Liviu Dudau from ARM has sent a patch set for pcie arm64 arch support and support for creating generic pcie bridge from device tree. Liviu's patches are available here https://lkml.org/lkml/2014/9/8/333 If someone wishes to test PCIe on X-Gene with this patch set, above mentioned patches from Liviu must be applied before the patches in this patch set. Also please use latest xgene u-boot firmware. changes since V8: 1. Add 'dma-coherent' attribute in device node. changes since V7: 1. Fix outbound region mapping for IO region. Thanks Liviu for the catch. changes since V6: 1. Port driver to changed interface as per Liviu's v10 series. changes since V5: 1. Port driver to changed interface of 'of_create_pci_host_bridge' 2. Fix the prefetch bit setting 3. Removed bunch of register programming which is already done by firmware changes since V4: 1. fix section mismatch warnings 2. fix the patch description 3. fix indentation 4. update read/write cfg functions by passing both addr and offset. 5. use 'time_before' for timeout. 6. remove unnecessary 'IS_ERR_OR_NULL'. Keep 'IS_ERR' for 'clk_get' 7. remove BUG_ON for pci_ioremap_io. changes since V3: 1. remove 'struct hw_pci' and supporting ops in hw_pci 2. add code to create the host bridge from dts 3. add code to scan the the host bridge 4. modify outbound windows setup function to get resource information from 'bridge-windows' 5. add compatible string in pcie dts node with current X-Gene SOC name. changes since V2: 1. redefined each PCI port in different PCI domain correctly. 2. removed setup_lane and setup_link functions from driver. 3. removed scan_bus wrapper and set_primary_bus hack. 4. added pci_ioremap_io for io resources. changes since V1: 1. added PCI domain support 2. reading cpu and pci addresses from device tree to configure regions. 3. got rid of unnecessary wrappers for readl and writel. 4. got rid of endpoint configuration code. 5. added 'dma-ranges' property support to read inbound region configuration. 6. renamed host driver file to 'pci-xgene.c' from 'pcie-xgene.c' 7. dropped 'clock-names' property from bindings 8. added comments whereever requested. Tanmay Inamdar (4): pci:host: APM X-Gene PCIe host controller driver arm64: dts: APM X-Gene PCIe device tree nodes dt-bindings: pci: xgene pcie device tree bindings MAINTAINERS: entry for APM X-Gene PCIe host driver .../devicetree/bindings/pci/xgene-pci.txt | 57 ++ MAINTAINERS| 8 + arch/arm64/boot/dts/apm-mustang.dts| 8 + arch/arm64/boot/dts/apm-storm.dtsi | 165 ++ drivers/pci/host/Kconfig | 10 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pci-xgene.c | 646 + 7 files changed, 895 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/xgene-pci.txt create mode 100644 drivers/pci/host/pci-xgene.c -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
