Re: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Hi Vishal,
On Thu, Jul 11, 2019 at 09:09:37AM +, Vishal Sagar wrote:
...
> > > +static int xcsi2rxss_subscribe_event(struct v4l2_subdev *sd,
> > > + struct v4l2_fh *fh,
> > > + struct v4l2_event_subscription *sub)
> > > +{
> > > + struct xcsi2rxss_state *xcsi2rxss = to_xcsi2rxssstate(sd);
> > > + int ret;
> > > +
> > > + mutex_lock(>lock);
> > > +
> > > + switch (sub->type) {
> > > + case V4L2_EVENT_XILINX_CSI2RX_SLBF:
> > > + ret = v4l2_event_subscribe(fh, sub, XCSI_MAX_EVENT, NULL);
> >
> > Please either use dev_dbg() or propose an API for conveying this
> > information downstream in the pipeline.
> >
>
> I will use a dev_alert() in the irq handler for this for now and remove this
> event.
dev_dbg(), please, as this is certainly not fatal. We should probably have
an API to tell this to the downstream sub-device driver in the pipeline if
the hardware has no way to detect this independently.
--
Regards,
Sakari Ailus
RE: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Hi Sakari, Thanks for reviewing. > -Original Message- > From: Sakari Ailus [mailto:sakari.ai...@iki.fi] > Sent: Tuesday, June 18, 2019 8:50 PM > To: Vishal Sagar > Cc: Hyun Kwon ; laurent.pinch...@ideasonboard.com; > mche...@kernel.org; robh...@kernel.org; mark.rutl...@arm.com; Michal > Simek ; linux-me...@vger.kernel.org; > devicet...@vger.kernel.org; hans.verk...@cisco.com; linux-arm- > ker...@lists.infradead.org; linux-kernel@vger.kernel.org; Dinesh Kumar > ; Sandip Kothari ; Luca Ceresoli > ; Jacopo Mondi > Subject: Re: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx > Subsystem driver > > EXTERNAL EMAIL > > Hi Vishal, > > On Tue, Jun 11, 2019 at 03:40:09PM +0530, Vishal Sagar wrote: > > The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images > > from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready > > for image processing. Please refer to PG232 for details. > > > > The driver is used to set the number of active lanes, if enabled > > in hardware. The CSI2 Rx controller filters out all packets except for > > the packets with data type fixed in hardware. RAW8 packets are always > > allowed to pass through. > > > > It is also used to setup and handle interrupts and enable the core. It > > logs all the events in respective counters between streaming on and off. > > > > The driver supports only the video format bridge enabled configuration. > > Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when > the > > CSI v2.0 feature is enabled in design. When the VCX feature is enabled, > > the maximum number of virtual channels becomes 16 from 4. > > > > Signed-off-by: Vishal Sagar > > Reviewed-by: Hyun Kwon > > --- > > v9 > > - Moved all controls and events to xilinx-csi2rxss.h > > - Updated name and description of controls and events > > - Get control base address from v4l2-controls.h (0x10c0) > > - Fix KConfig for dependency on VIDEO_XILINX > > - Added enum_mbus_code() support > > - Added default format to be returned on open() > > - Mark variables are const > > - Remove references to short packet in comments > > - Add check for streaming before setting active lanes control > > - strlcpy -> strscpy > > - Fix xcsi2rxss_set_format() > > > > v8 > > - Use clk_bulk* APIs > > - Add gpio reset for asserting video_aresetn when stream line buffer occurs > > - Removed short packet related events and irq handling > > - V4L2_EVENT_XLNXCSIRX_SPKT and V4L2_EVENT_XLNXCSIRX_SPKT_OVF > removed > > - Removed frame counter control > V4L2_CID_XILINX_MIPICSISS_FRAME_COUNTER > > and xcsi2rxss_g_volatile_ctrl() > > - Minor formatting fixes > > > > v7 > > - No change > > > > v6 > > - No change > > > > v5 > > - Removed bayer and updated related parts like set default format based > > on Luca Cersoli's comments. > > - Added correct YUV422 10bpc media bus format > > > > v4 > > - Removed irq member from core structure > > - Consolidated IP config prints in xcsi2rxss_log_ipconfig() > > - Return -EINVAL in case of invalid ioctl > > - Code formatting > > - Added reviewed by Hyun Kwon > > > > v3 > > - Fixed comments given by Hyun. > > - Removed DPHY 200 MHz clock. This will be controlled by DPHY driver > > - Minor code formatting > > - en_csi_v20 and vfb members removed from struct and made local to dt > parsing > > - lock description updated > > - changed to ratelimited type for all dev prints in irq handler > > - Removed YUV 422 10bpc media format > > > > v2 > > - Fixed comments given by Hyun and Sakari. > > - Made all bitmask using BIT() and GENMASK() > > - Removed unused definitions > > - Removed DPHY access. This will be done by separate DPHY PHY driver. > > - Added support for CSI v2.0 for YUV 422 10bpc, RAW16, RAW20 and extra > > virtual channels > > - Fixed the ports as sink and source > > - Now use the v4l2fwnode API to get number of data-lanes > > - Added clock framework support > > - Removed the close() function > > - updated the set format function > > - support only VFB enabled configuration > > > > drivers/media/platform/xilinx/Kconfig | 11 + > > drivers/media/platform/xilinx/Makefile |1 + > > drivers/media/platform/xilinx/xilinx-csi2rxss.c | 1488 > +++ > > include/uapi/linux/v4l2-controls.h |4 + > > include/uapi/linux/xilinx-csi2rxss.h| 52 + > > 5 files changed, 1556
RE: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Hi Luca,
Thanks for the review.
> -Original Message-
> From: Luca Ceresoli [mailto:l...@lucaceresoli.net]
> Sent: Monday, July 01, 2019 3:15 AM
> To: Vishal Sagar ; Hyun Kwon ;
> laurent.pinch...@ideasonboard.com; mche...@kernel.org;
> robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; linux-me...@vger.kernel.org;
> devicet...@vger.kernel.org; hans.verk...@cisco.com; linux-arm-
> ker...@lists.infradead.org; linux-kernel@vger.kernel.org; Dinesh Kumar
> ; Sandip Kothari ; Jacopo Mondi
>
> Subject: Re: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx
> Subsystem driver
>
> EXTERNAL EMAIL
>
> Hi Vishal,
>
> a few questions below about the SLBF error management.
>
> On 11/06/19 12:10, Vishal Sagar wrote:
> > The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images
> > from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready
> > for image processing. Please refer to PG232 for details.
> >
> > The driver is used to set the number of active lanes, if enabled
> > in hardware. The CSI2 Rx controller filters out all packets except for
> > the packets with data type fixed in hardware. RAW8 packets are always
> > allowed to pass through.
> >
> > It is also used to setup and handle interrupts and enable the core. It
> > logs all the events in respective counters between streaming on and off.
> >
> > The driver supports only the video format bridge enabled configuration.
> > Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when
> the
> > CSI v2.0 feature is enabled in design. When the VCX feature is enabled,
> > the maximum number of virtual channels becomes 16 from 4.
> >
> > Signed-off-by: Vishal Sagar
> > Reviewed-by: Hyun Kwon
>
> ...
>
> > --- /dev/null
> > +++ b/drivers/media/platform/xilinx/xilinx-csi2rxss.c
>
> ...
> > +/**
> > + * xcsi2rxss_irq_handler - Interrupt handler for CSI-2
> > + * @irq: IRQ number
> > + * @dev_id: Pointer to device state
> > + *
> > + * In the interrupt handler, a list of event counters are updated for
> > + * corresponding interrupts. This is useful to get status / debug.
> > + *
> > + * In case of stream line buffer full condition, the IP is reset, stopped
> > and
> > + * an event is raised.
> > + *
> > + * Return: IRQ_HANDLED after handling interrupts
> > + * IRQ_NONE is no interrupts
> > + */
> > +static irqreturn_t xcsi2rxss_irq_handler(int irq, void *dev_id)
> > +{
> > + struct xcsi2rxss_state *state = (struct xcsi2rxss_state *)dev_id;
> > + struct xcsi2rxss_core *core = >core;
> > + u32 status;
> > +
> > + status = xcsi2rxss_read(core, XCSI_ISR_OFFSET) &
> XCSI_ISR_ALLINTR_MASK;
> > + dev_dbg_ratelimited(core->dev, "interrupt status = 0x%08x\n", status);
> > +
> > + if (!status)
> > + return IRQ_NONE;
> > +
> > + /* Received a short packet */
> > + if (status & XCSI_ISR_SPFIFONE) {
> > + dev_dbg_ratelimited(core->dev, "Short packet = 0x%08x\n",
> > + xcsi2rxss_read(core, XCSI_SPKTR_OFFSET));
> > + }
> > +
> > + /* Short packet FIFO overflow */
> > + if (status & XCSI_ISR_SPFIFOF)
> > + dev_alert_ratelimited(core->dev, "Short packet FIFO
> > overflowed\n");
> > +
> > + /*
> > + * Stream line buffer full
> > + * This means there is a backpressure from downstream IP
> > + */
> > + if (status & XCSI_ISR_SLBF) {
> > + dev_alert_ratelimited(core->dev, "Stream Line Buffer
> > Full!\n");
> > + if (core->rst_gpio) {
> > + gpiod_set_value(core->rst_gpio, 1);
> > + /* minimum 40 dphy_clk_200M cycles */
> > + ndelay(250);
> > + gpiod_set_value(core->rst_gpio, 0);
> > + }
> > + xcsi2rxss_stop_stream(state);
>
> I've been hit by the dreadful "Stream Line Buffer Full" error, getting
> the CSI-2 RX completely stuck in SLBF and not transmitting any frames
> sporadically after glitches in the incoming MIPI stream. And I found
> that adding xcsi2rxss_start_stream() here just after
> xcsi2rxss_stop_stream() allows to continue the stream with almost no
> interruption and without userspace intervention.
>
> Do you think this is a reliable solution, or does it have side-effects I
> didn't encounter? Note I'm not using pm n
Re: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Hi Vishal,
a few questions below about the SLBF error management.
On 11/06/19 12:10, Vishal Sagar wrote:
> The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images
> from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready
> for image processing. Please refer to PG232 for details.
>
> The driver is used to set the number of active lanes, if enabled
> in hardware. The CSI2 Rx controller filters out all packets except for
> the packets with data type fixed in hardware. RAW8 packets are always
> allowed to pass through.
>
> It is also used to setup and handle interrupts and enable the core. It
> logs all the events in respective counters between streaming on and off.
>
> The driver supports only the video format bridge enabled configuration.
> Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when the
> CSI v2.0 feature is enabled in design. When the VCX feature is enabled,
> the maximum number of virtual channels becomes 16 from 4.
>
> Signed-off-by: Vishal Sagar
> Reviewed-by: Hyun Kwon
...
> --- /dev/null
> +++ b/drivers/media/platform/xilinx/xilinx-csi2rxss.c
...
> +/**
> + * xcsi2rxss_irq_handler - Interrupt handler for CSI-2
> + * @irq: IRQ number
> + * @dev_id: Pointer to device state
> + *
> + * In the interrupt handler, a list of event counters are updated for
> + * corresponding interrupts. This is useful to get status / debug.
> + *
> + * In case of stream line buffer full condition, the IP is reset, stopped and
> + * an event is raised.
> + *
> + * Return: IRQ_HANDLED after handling interrupts
> + * IRQ_NONE is no interrupts
> + */
> +static irqreturn_t xcsi2rxss_irq_handler(int irq, void *dev_id)
> +{
> + struct xcsi2rxss_state *state = (struct xcsi2rxss_state *)dev_id;
> + struct xcsi2rxss_core *core = >core;
> + u32 status;
> +
> + status = xcsi2rxss_read(core, XCSI_ISR_OFFSET) & XCSI_ISR_ALLINTR_MASK;
> + dev_dbg_ratelimited(core->dev, "interrupt status = 0x%08x\n", status);
> +
> + if (!status)
> + return IRQ_NONE;
> +
> + /* Received a short packet */
> + if (status & XCSI_ISR_SPFIFONE) {
> + dev_dbg_ratelimited(core->dev, "Short packet = 0x%08x\n",
> + xcsi2rxss_read(core, XCSI_SPKTR_OFFSET));
> + }
> +
> + /* Short packet FIFO overflow */
> + if (status & XCSI_ISR_SPFIFOF)
> + dev_alert_ratelimited(core->dev, "Short packet FIFO
> overflowed\n");
> +
> + /*
> + * Stream line buffer full
> + * This means there is a backpressure from downstream IP
> + */
> + if (status & XCSI_ISR_SLBF) {
> + dev_alert_ratelimited(core->dev, "Stream Line Buffer Full!\n");
> + if (core->rst_gpio) {
> + gpiod_set_value(core->rst_gpio, 1);
> + /* minimum 40 dphy_clk_200M cycles */
> + ndelay(250);
> + gpiod_set_value(core->rst_gpio, 0);
> + }
> + xcsi2rxss_stop_stream(state);
I've been hit by the dreadful "Stream Line Buffer Full" error, getting
the CSI-2 RX completely stuck in SLBF and not transmitting any frames
sporadically after glitches in the incoming MIPI stream. And I found
that adding xcsi2rxss_start_stream() here just after
xcsi2rxss_stop_stream() allows to continue the stream with almost no
interruption and without userspace intervention.
Do you think this is a reliable solution, or does it have side-effects I
didn't encounter? Note I'm not using pm nor the ctrls, so register
writes are limited to the enable/disable code paths.
Does video_aresetn also reset registers?
BTW in my code I also moved xcsi2rxss_stop_stream() before the if
(core->rst_gpio) {}. There is no strong reason for this, I didn't
observe any functional difference, it just looks
more logical to me to stop the IP before resetting it.
...
> +static int xcsi2rxss_probe(struct platform_device *pdev)
> +{
> + struct v4l2_subdev *subdev;
> + struct xcsi2rxss_state *xcsi2rxss;
> + struct xcsi2rxss_core *core;
> + struct resource *res;
> + int ret, num_ctrls, i;
> +
> + xcsi2rxss = devm_kzalloc(>dev, sizeof(*xcsi2rxss), GFP_KERNEL);
> + if (!xcsi2rxss)
> + return -ENOMEM;
> +
> + core = >core;
> + core->dev = >dev;
> +
> + core->clks = devm_kmemdup(core->dev, xcsi2rxss_clks,
> + sizeof(xcsi2rxss_clks), GFP_KERNEL);
> + if (!core->clks)
> + return -ENOMEM;
> +
> + /* Reset GPIO */
> + core->rst_gpio = devm_gpiod_get_optional(core->dev, "reset",
> + GPIOD_OUT_HIGH);
Is GPIOD_OUT_HIGH correct? video_aresetn is active low.
> + if (IS_ERR(core->rst_gpio)) {
> + if (PTR_ERR(core->rst_gpio) != -EPROBE_DEFER)
> + dev_err(core->dev, "Video Reset GPIO not setup in DT");
> + return PTR_ERR(core->rst_gpio);
> + }
> +
> +
Re: [PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
Hi Vishal, On Tue, Jun 11, 2019 at 03:40:09PM +0530, Vishal Sagar wrote: > The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images > from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready > for image processing. Please refer to PG232 for details. > > The driver is used to set the number of active lanes, if enabled > in hardware. The CSI2 Rx controller filters out all packets except for > the packets with data type fixed in hardware. RAW8 packets are always > allowed to pass through. > > It is also used to setup and handle interrupts and enable the core. It > logs all the events in respective counters between streaming on and off. > > The driver supports only the video format bridge enabled configuration. > Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when the > CSI v2.0 feature is enabled in design. When the VCX feature is enabled, > the maximum number of virtual channels becomes 16 from 4. > > Signed-off-by: Vishal Sagar > Reviewed-by: Hyun Kwon > --- > v9 > - Moved all controls and events to xilinx-csi2rxss.h > - Updated name and description of controls and events > - Get control base address from v4l2-controls.h (0x10c0) > - Fix KConfig for dependency on VIDEO_XILINX > > - Added enum_mbus_code() support > - Added default format to be returned on open() > - Mark variables are const > - Remove references to short packet in comments > - Add check for streaming before setting active lanes control > - strlcpy -> strscpy > - Fix xcsi2rxss_set_format() > > v8 > - Use clk_bulk* APIs > - Add gpio reset for asserting video_aresetn when stream line buffer occurs > - Removed short packet related events and irq handling > - V4L2_EVENT_XLNXCSIRX_SPKT and V4L2_EVENT_XLNXCSIRX_SPKT_OVF removed > - Removed frame counter control V4L2_CID_XILINX_MIPICSISS_FRAME_COUNTER > and xcsi2rxss_g_volatile_ctrl() > - Minor formatting fixes > > v7 > - No change > > v6 > - No change > > v5 > - Removed bayer and updated related parts like set default format based > on Luca Cersoli's comments. > - Added correct YUV422 10bpc media bus format > > v4 > - Removed irq member from core structure > - Consolidated IP config prints in xcsi2rxss_log_ipconfig() > - Return -EINVAL in case of invalid ioctl > - Code formatting > - Added reviewed by Hyun Kwon > > v3 > - Fixed comments given by Hyun. > - Removed DPHY 200 MHz clock. This will be controlled by DPHY driver > - Minor code formatting > - en_csi_v20 and vfb members removed from struct and made local to dt parsing > - lock description updated > - changed to ratelimited type for all dev prints in irq handler > - Removed YUV 422 10bpc media format > > v2 > - Fixed comments given by Hyun and Sakari. > - Made all bitmask using BIT() and GENMASK() > - Removed unused definitions > - Removed DPHY access. This will be done by separate DPHY PHY driver. > - Added support for CSI v2.0 for YUV 422 10bpc, RAW16, RAW20 and extra > virtual channels > - Fixed the ports as sink and source > - Now use the v4l2fwnode API to get number of data-lanes > - Added clock framework support > - Removed the close() function > - updated the set format function > - support only VFB enabled configuration > > drivers/media/platform/xilinx/Kconfig | 11 + > drivers/media/platform/xilinx/Makefile |1 + > drivers/media/platform/xilinx/xilinx-csi2rxss.c | 1488 > +++ > include/uapi/linux/v4l2-controls.h |4 + > include/uapi/linux/xilinx-csi2rxss.h| 52 + > 5 files changed, 1556 insertions(+) > create mode 100644 drivers/media/platform/xilinx/xilinx-csi2rxss.c > create mode 100644 include/uapi/linux/xilinx-csi2rxss.h > > diff --git a/drivers/media/platform/xilinx/Kconfig > b/drivers/media/platform/xilinx/Kconfig > index a2773ad..349da87 100644 > --- a/drivers/media/platform/xilinx/Kconfig > +++ b/drivers/media/platform/xilinx/Kconfig > @@ -10,6 +10,17 @@ config VIDEO_XILINX > > if VIDEO_XILINX > > +config VIDEO_XILINX_CSI2RXSS > + tristate "Xilinx CSI2 Rx Subsystem" > + depends on VIDEO_XILINX > + help > + Driver for Xilinx MIPI CSI2 Rx Subsystem. This is a V4L sub-device > + based driver that takes input from CSI2 Tx source and converts > + it into an AXI4-Stream. The subsystem comprises of a CSI2 Rx > + controller, DPHY, an optional I2C controller and a Video Format > + Bridge. The driver is used to set the number of active lanes and > + get short packet data. > + > config VIDEO_XILINX_TPG > tristate "Xilinx Video Test Pattern Generator" > depends on VIDEO_XILINX > diff --git a/drivers/media/platform/xilinx/Makefile > b/drivers/media/platform/xilinx/Makefile > index 4cdc0b1..6119a34 100644 > --- a/drivers/media/platform/xilinx/Makefile > +++ b/drivers/media/platform/xilinx/Makefile > @@ -3,5 +3,6 @@ > xilinx-video-objs +=
[PATCH v9 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready for image processing. Please refer to PG232 for details. The driver is used to set the number of active lanes, if enabled in hardware. The CSI2 Rx controller filters out all packets except for the packets with data type fixed in hardware. RAW8 packets are always allowed to pass through. It is also used to setup and handle interrupts and enable the core. It logs all the events in respective counters between streaming on and off. The driver supports only the video format bridge enabled configuration. Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when the CSI v2.0 feature is enabled in design. When the VCX feature is enabled, the maximum number of virtual channels becomes 16 from 4. Signed-off-by: Vishal Sagar Reviewed-by: Hyun Kwon --- v9 - Moved all controls and events to xilinx-csi2rxss.h - Updated name and description of controls and events - Get control base address from v4l2-controls.h (0x10c0) - Fix KConfig for dependency on VIDEO_XILINX - Added enum_mbus_code() support - Added default format to be returned on open() - Mark variables are const - Remove references to short packet in comments - Add check for streaming before setting active lanes control - strlcpy -> strscpy - Fix xcsi2rxss_set_format() v8 - Use clk_bulk* APIs - Add gpio reset for asserting video_aresetn when stream line buffer occurs - Removed short packet related events and irq handling - V4L2_EVENT_XLNXCSIRX_SPKT and V4L2_EVENT_XLNXCSIRX_SPKT_OVF removed - Removed frame counter control V4L2_CID_XILINX_MIPICSISS_FRAME_COUNTER and xcsi2rxss_g_volatile_ctrl() - Minor formatting fixes v7 - No change v6 - No change v5 - Removed bayer and updated related parts like set default format based on Luca Cersoli's comments. - Added correct YUV422 10bpc media bus format v4 - Removed irq member from core structure - Consolidated IP config prints in xcsi2rxss_log_ipconfig() - Return -EINVAL in case of invalid ioctl - Code formatting - Added reviewed by Hyun Kwon v3 - Fixed comments given by Hyun. - Removed DPHY 200 MHz clock. This will be controlled by DPHY driver - Minor code formatting - en_csi_v20 and vfb members removed from struct and made local to dt parsing - lock description updated - changed to ratelimited type for all dev prints in irq handler - Removed YUV 422 10bpc media format v2 - Fixed comments given by Hyun and Sakari. - Made all bitmask using BIT() and GENMASK() - Removed unused definitions - Removed DPHY access. This will be done by separate DPHY PHY driver. - Added support for CSI v2.0 for YUV 422 10bpc, RAW16, RAW20 and extra virtual channels - Fixed the ports as sink and source - Now use the v4l2fwnode API to get number of data-lanes - Added clock framework support - Removed the close() function - updated the set format function - support only VFB enabled configuration drivers/media/platform/xilinx/Kconfig | 11 + drivers/media/platform/xilinx/Makefile |1 + drivers/media/platform/xilinx/xilinx-csi2rxss.c | 1488 +++ include/uapi/linux/v4l2-controls.h |4 + include/uapi/linux/xilinx-csi2rxss.h| 52 + 5 files changed, 1556 insertions(+) create mode 100644 drivers/media/platform/xilinx/xilinx-csi2rxss.c create mode 100644 include/uapi/linux/xilinx-csi2rxss.h diff --git a/drivers/media/platform/xilinx/Kconfig b/drivers/media/platform/xilinx/Kconfig index a2773ad..349da87 100644 --- a/drivers/media/platform/xilinx/Kconfig +++ b/drivers/media/platform/xilinx/Kconfig @@ -10,6 +10,17 @@ config VIDEO_XILINX if VIDEO_XILINX +config VIDEO_XILINX_CSI2RXSS + tristate "Xilinx CSI2 Rx Subsystem" + depends on VIDEO_XILINX + help + Driver for Xilinx MIPI CSI2 Rx Subsystem. This is a V4L sub-device + based driver that takes input from CSI2 Tx source and converts + it into an AXI4-Stream. The subsystem comprises of a CSI2 Rx + controller, DPHY, an optional I2C controller and a Video Format + Bridge. The driver is used to set the number of active lanes and + get short packet data. + config VIDEO_XILINX_TPG tristate "Xilinx Video Test Pattern Generator" depends on VIDEO_XILINX diff --git a/drivers/media/platform/xilinx/Makefile b/drivers/media/platform/xilinx/Makefile index 4cdc0b1..6119a34 100644 --- a/drivers/media/platform/xilinx/Makefile +++ b/drivers/media/platform/xilinx/Makefile @@ -3,5 +3,6 @@ xilinx-video-objs += xilinx-dma.o xilinx-vip.o xilinx-vipp.o obj-$(CONFIG_VIDEO_XILINX) += xilinx-video.o +obj-$(CONFIG_VIDEO_XILINX_CSI2RXSS) += xilinx-csi2rxss.o obj-$(CONFIG_VIDEO_XILINX_TPG) += xilinx-tpg.o obj-$(CONFIG_VIDEO_XILINX_VTC) += xilinx-vtc.o diff --git a/drivers/media/platform/xilinx/xilinx-csi2rxss.c
