Re: [PATCH v9 5/6] arm64: zynqmp: Add DDRC node

[Borislav Petkov]

On Mon, Oct 15, 2018 at 10:59:47AM +0530, Manish Narani wrote:
> Add ddrc memory controller node in dts. The size mentioned in dts is
> 0x3, because we need to access DDR_QOS INTR registers located at
> 0xFD090208 from this driver.
> 
> Signed-off-by: Manish Narani 
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 29ce234..a81d3b16 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -355,6 +355,13 @@
>   xlnx,bus-width = <64>;
>   };
>  
> + mc: memory-controller@fd07 {
> + compatible = "xlnx,zynqmp-ddrc-2.40a";
> + reg = <0x0 0xfd07 0x0 0x3>;
> + interrupt-parent = <>;
> + interrupts = <0 112 4>;
> + };
> +
>   gem0: ethernet@ff0b {
>   compatible = "cdns,zynqmp-gem", "cdns,gem";
>   status = "disabled";
> -- 

Still needs DT folks ACK.

-- 
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH v9 5/6] arm64: zynqmp: Add DDRC node

[Borislav Petkov]

On Mon, Oct 15, 2018 at 10:59:47AM +0530, Manish Narani wrote:
> Add ddrc memory controller node in dts. The size mentioned in dts is
> 0x3, because we need to access DDR_QOS INTR registers located at
> 0xFD090208 from this driver.
> 
> Signed-off-by: Manish Narani 
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 29ce234..a81d3b16 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -355,6 +355,13 @@
>   xlnx,bus-width = <64>;
>   };
>  
> + mc: memory-controller@fd07 {
> + compatible = "xlnx,zynqmp-ddrc-2.40a";
> + reg = <0x0 0xfd07 0x0 0x3>;
> + interrupt-parent = <>;
> + interrupts = <0 112 4>;
> + };
> +
>   gem0: ethernet@ff0b {
>   compatible = "cdns,zynqmp-gem", "cdns,gem";
>   status = "disabled";
> -- 

Still needs DT folks ACK.

-- 
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

[PATCH v9 5/6] arm64: zynqmp: Add DDRC node

[Manish Narani]

Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.

Signed-off-by: Manish Narani 
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 29ce234..a81d3b16 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -355,6 +355,13 @@
xlnx,bus-width = <64>;
};
 
+   mc: memory-controller@fd07 {
+   compatible = "xlnx,zynqmp-ddrc-2.40a";
+   reg = <0x0 0xfd07 0x0 0x3>;
+   interrupt-parent = <>;
+   interrupts = <0 112 4>;
+   };
+
gem0: ethernet@ff0b {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
-- 
2.1.1

[PATCH v9 5/6] arm64: zynqmp: Add DDRC node

[Manish Narani]

Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.

Signed-off-by: Manish Narani 
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 29ce234..a81d3b16 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -355,6 +355,13 @@
xlnx,bus-width = <64>;
};
 
+   mc: memory-controller@fd07 {
+   compatible = "xlnx,zynqmp-ddrc-2.40a";
+   reg = <0x0 0xfd07 0x0 0x3>;
+   interrupt-parent = <>;
+   interrupts = <0 112 4>;
+   };
+
gem0: ethernet@ff0b {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
-- 
2.1.1