Re: [PATCHv3 05/27] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
Reviewed-by: Subrahmanya Lingappa On Tue, Jan 29, 2019 at 1:39 PM Z.q. Hou wrote: > > From: Hou Zhiqiang > > It should get PCI base address from the DT node property 'ranges' > to setup MEM/IO outbound windows instead of always zero. > > Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge > IP driver") > Signed-off-by: Hou Zhiqiang > Reviewed-by: Minghuan Lian > --- > V3: > - No change > > drivers/pci/controller/pcie-mobiveil.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mobiveil.c > b/drivers/pci/controller/pcie-mobiveil.c > index a0dd337c6214..8ff873023b5f 100644 > --- a/drivers/pci/controller/pcie-mobiveil.c > +++ b/drivers/pci/controller/pcie-mobiveil.c > @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) > > /* configure outbound translation window */ > program_ob_windows(pcie, pcie->ob_wins_configured, > - win->res->start, 0, type, > - resource_size(win->res)); > + win->res->start, > + win->res->start - win->offset, > + type, resource_size(win->res)); > } > > /* setup MSI hardware registers */ > -- > 2.17.1 >
[PATCHv3 05/27] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
From: Hou Zhiqiang It should get PCI base address from the DT node property 'ranges' to setup MEM/IO outbound windows instead of always zero. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang Reviewed-by: Minghuan Lian --- V3: - No change drivers/pci/controller/pcie-mobiveil.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index a0dd337c6214..8ff873023b5f 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* configure outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, - win->res->start, 0, type, - resource_size(win->res)); + win->res->start, + win->res->start - win->offset, + type, resource_size(win->res)); } /* setup MSI hardware registers */ -- 2.17.1