Re: [RESEND PATCH 4/5] clk: at91: clk-master: add register definition for sama7g5's master clock

2021-03-30 Thread Nicolas Ferre

On 24/03/2021 at 10:43, Claudiu Beznea wrote:

Add register definitions for SAMA7G5's master clock. These would be
also used by architecture specific power saving code. With this, update
also clk-master.c.

Signed-off-by: Claudiu Beznea 
---
  drivers/clk/at91/clk-master.c | 51 +--
  include/linux/clk/at91_pmc.h  | 26 ++
  2 files changed, 50 insertions(+), 27 deletions(-)

diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 6f1fb2eb2a8d..a6a393bb1def 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -17,15 +17,7 @@
  #define MASTER_DIV_SHIFT  8
  #define MASTER_DIV_MASK   0x7
  
-#define PMC_MCR			0x30

-#define PMC_MCR_ID_MSK GENMASK(3, 0)
-#define PMC_MCR_CMDBIT(7)
-#define PMC_MCR_DIVGENMASK(10, 8)
-#define PMC_MCR_CSSGENMASK(20, 16)
  #define PMC_MCR_CSS_SHIFT (16)
-#define PMC_MCR_EN BIT(28)
-
-#define PMC_MCR_ID(x)  ((x) & PMC_MCR_ID_MSK)
  
  #define MASTER_MAX_ID		4
  
@@ -685,17 +677,20 @@ static void clk_sama7g5_master_set(struct clk_master *master,
  
  	spin_lock_irqsave(master->lock, flags);
  
-	regmap_write(master->regmap, PMC_MCR, PMC_MCR_ID(master->id));

-   regmap_read(master->regmap, PMC_MCR, &val);
-   regmap_update_bits(master->regmap, PMC_MCR,
-  (status ? PMC_MCR_EN : 0) | PMC_MCR_CSS | 
PMC_MCR_DIV |
-  PMC_MCR_CMD | PMC_MCR_ID_MSK,
-  (status ? PMC_MCR_EN : 0) |
+   regmap_write(master->regmap, AT91_PMC_MCR_V2,
+AT91_PMC_MCR_V2_ID(master->id));
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
+   regmap_update_bits(master->regmap, AT91_PMC_MCR_V2,
+  (status ? AT91_PMC_MCR_V2_EN : 0) |
+  AT91_PMC_MCR_V2_CSS | AT91_PMC_MCR_V2_DIV |
+  AT91_PMC_MCR_V2_CMD | AT91_PMC_MCR_V2_ID_MSK,
+  (status ? AT91_PMC_MCR_V2_EN : 0) |


Ok, here also. Can't we make it simpler to read?


   (master->parent << PMC_MCR_CSS_SHIFT) |
   (master->div << MASTER_DIV_SHIFT) |
-  PMC_MCR_CMD | PMC_MCR_ID(master->id));
+  AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID(master->id));
  
-	cparent = (val & PMC_MCR_CSS) >> PMC_MCR_CSS_SHIFT;

+   cparent = (val & AT91_PMC_MCR_V2_CSS) >> PMC_MCR_CSS_SHIFT;
  
  	/* Wait here only if parent is being changed. */

while ((cparent != master->parent) && !clk_master_ready(master))
@@ -720,10 +715,12 @@ static void clk_sama7g5_master_disable(struct clk_hw *hw)
  
  	spin_lock_irqsave(master->lock, flags);
  
-	regmap_write(master->regmap, PMC_MCR, master->id);

-   regmap_update_bits(master->regmap, PMC_MCR,
-  PMC_MCR_EN | PMC_MCR_CMD | PMC_MCR_ID_MSK,
-  PMC_MCR_CMD | PMC_MCR_ID(master->id));
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_update_bits(master->regmap, AT91_PMC_MCR_V2,
+  AT91_PMC_MCR_V2_EN | AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID_MSK,
+  AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID(master->id));
  
  	spin_unlock_irqrestore(master->lock, flags);

  }
@@ -736,12 +733,12 @@ static int clk_sama7g5_master_is_enabled(struct clk_hw 
*hw)
  
  	spin_lock_irqsave(master->lock, flags);
  
-	regmap_write(master->regmap, PMC_MCR, master->id);

-   regmap_read(master->regmap, PMC_MCR, &val);
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
  
  	spin_unlock_irqrestore(master->lock, flags);
  
-	return !!(val & PMC_MCR_EN);

+   return !!(val & AT91_PMC_MCR_V2_EN);
  }
  
  static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate,

@@ -837,10 +834,10 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
master->mux_table = mux_table;
  
  	spin_lock_irqsave(master->lock, flags);

-   regmap_write(master->regmap, PMC_MCR, master->id);
-   regmap_read(master->regmap, PMC_MCR, &val);
-   master->parent = (val & PMC_MCR_CSS) >> PMC_MCR_CSS_SHIFT;
-   master->div = (val & PMC_MCR_DIV) >> MASTER_DIV_SHIFT;
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
+   master->parent = (val & AT91_PMC_MCR_V2_CSS) >> PMC_MCR_CSS_SHIFT;
+   master->div = (val & AT91_PMC_MCR_V2_DIV) >> MASTER_DIV_SHIFT;
spin_unlock_irqrestore(master->lock, flags);
  
  	hw = &master->hw;

diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index a4f82e836a7c..ccb3f034bfa9 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc

[RESEND PATCH 4/5] clk: at91: clk-master: add register definition for sama7g5's master clock

2021-03-24 Thread Claudiu Beznea
Add register definitions for SAMA7G5's master clock. These would be
also used by architecture specific power saving code. With this, update
also clk-master.c.

Signed-off-by: Claudiu Beznea 
---
 drivers/clk/at91/clk-master.c | 51 +--
 include/linux/clk/at91_pmc.h  | 26 ++
 2 files changed, 50 insertions(+), 27 deletions(-)

diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 6f1fb2eb2a8d..a6a393bb1def 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -17,15 +17,7 @@
 #define MASTER_DIV_SHIFT   8
 #define MASTER_DIV_MASK0x7
 
-#define PMC_MCR0x30
-#define PMC_MCR_ID_MSK GENMASK(3, 0)
-#define PMC_MCR_CMDBIT(7)
-#define PMC_MCR_DIVGENMASK(10, 8)
-#define PMC_MCR_CSSGENMASK(20, 16)
 #define PMC_MCR_CSS_SHIFT  (16)
-#define PMC_MCR_EN BIT(28)
-
-#define PMC_MCR_ID(x)  ((x) & PMC_MCR_ID_MSK)
 
 #define MASTER_MAX_ID  4
 
@@ -685,17 +677,20 @@ static void clk_sama7g5_master_set(struct clk_master 
*master,
 
spin_lock_irqsave(master->lock, flags);
 
-   regmap_write(master->regmap, PMC_MCR, PMC_MCR_ID(master->id));
-   regmap_read(master->regmap, PMC_MCR, &val);
-   regmap_update_bits(master->regmap, PMC_MCR,
-  (status ? PMC_MCR_EN : 0) | PMC_MCR_CSS | 
PMC_MCR_DIV |
-  PMC_MCR_CMD | PMC_MCR_ID_MSK,
-  (status ? PMC_MCR_EN : 0) |
+   regmap_write(master->regmap, AT91_PMC_MCR_V2,
+AT91_PMC_MCR_V2_ID(master->id));
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
+   regmap_update_bits(master->regmap, AT91_PMC_MCR_V2,
+  (status ? AT91_PMC_MCR_V2_EN : 0) |
+  AT91_PMC_MCR_V2_CSS | AT91_PMC_MCR_V2_DIV |
+  AT91_PMC_MCR_V2_CMD | AT91_PMC_MCR_V2_ID_MSK,
+  (status ? AT91_PMC_MCR_V2_EN : 0) |
   (master->parent << PMC_MCR_CSS_SHIFT) |
   (master->div << MASTER_DIV_SHIFT) |
-  PMC_MCR_CMD | PMC_MCR_ID(master->id));
+  AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID(master->id));
 
-   cparent = (val & PMC_MCR_CSS) >> PMC_MCR_CSS_SHIFT;
+   cparent = (val & AT91_PMC_MCR_V2_CSS) >> PMC_MCR_CSS_SHIFT;
 
/* Wait here only if parent is being changed. */
while ((cparent != master->parent) && !clk_master_ready(master))
@@ -720,10 +715,12 @@ static void clk_sama7g5_master_disable(struct clk_hw *hw)
 
spin_lock_irqsave(master->lock, flags);
 
-   regmap_write(master->regmap, PMC_MCR, master->id);
-   regmap_update_bits(master->regmap, PMC_MCR,
-  PMC_MCR_EN | PMC_MCR_CMD | PMC_MCR_ID_MSK,
-  PMC_MCR_CMD | PMC_MCR_ID(master->id));
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_update_bits(master->regmap, AT91_PMC_MCR_V2,
+  AT91_PMC_MCR_V2_EN | AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID_MSK,
+  AT91_PMC_MCR_V2_CMD |
+  AT91_PMC_MCR_V2_ID(master->id));
 
spin_unlock_irqrestore(master->lock, flags);
 }
@@ -736,12 +733,12 @@ static int clk_sama7g5_master_is_enabled(struct clk_hw 
*hw)
 
spin_lock_irqsave(master->lock, flags);
 
-   regmap_write(master->regmap, PMC_MCR, master->id);
-   regmap_read(master->regmap, PMC_MCR, &val);
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
 
spin_unlock_irqrestore(master->lock, flags);
 
-   return !!(val & PMC_MCR_EN);
+   return !!(val & AT91_PMC_MCR_V2_EN);
 }
 
 static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -837,10 +834,10 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
master->mux_table = mux_table;
 
spin_lock_irqsave(master->lock, flags);
-   regmap_write(master->regmap, PMC_MCR, master->id);
-   regmap_read(master->regmap, PMC_MCR, &val);
-   master->parent = (val & PMC_MCR_CSS) >> PMC_MCR_CSS_SHIFT;
-   master->div = (val & PMC_MCR_DIV) >> MASTER_DIV_SHIFT;
+   regmap_write(master->regmap, AT91_PMC_MCR_V2, master->id);
+   regmap_read(master->regmap, AT91_PMC_MCR_V2, &val);
+   master->parent = (val & AT91_PMC_MCR_V2_CSS) >> PMC_MCR_CSS_SHIFT;
+   master->div = (val & AT91_PMC_MCR_V2_DIV) >> MASTER_DIV_SHIFT;
spin_unlock_irqrestore(master->lock, flags);
 
hw = &master->hw;
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index a4f82e836a7c..ccb3f034bfa9 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -137,6 +137,32 @@
 #define