From: Shawn Lin
This patch adds sdmmc/sdio controller nodes for rk3228 SoC.
Signed-off-by: Shawn Lin
---
arch/arm/boot/dts/rk322x.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index c4d43ce..66578fa 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -522,6 +522,32 @@
status = "disabled";
};
+ sdmmc: dwmmc@3000 {
+ compatible = "rockchip,rk3228-dw-mshc",
"rockchip,rk3288-dw-mshc";
+ reg = <0x3000 0x4000>;
+ interrupts = ;
+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ status = "disabled";
+ };
+
+ sdio: dwmmc@3001 {
+ compatible = "rockchip,rk3228-dw-mshc",
"rockchip,rk3288-dw-mshc";
+ reg = <0x3001 0x4000>;
+ interrupts = ;
+ clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+ status = "disabled";
+ };
+
emmc: dwmmc@3002 {
compatible = "rockchip,rk3228-dw-mshc",
"rockchip,rk3288-dw-mshc";
reg = <0x3002 0x4000>;
@@ -732,6 +758,40 @@
drive-strength = <12>;
};
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <1 16 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <1 15 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <1 18 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <1 19 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <1 20 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <1 21 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+ };
+
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins = <3 0 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_cmd: sdio-cmd {
+ rockchip,pins = <3 1 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_bus4: sdio-bus4 {
+ rockchip,pins = <3 2 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <3 3 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <3 4 RK_FUNC_1
&pcfg_pull_none_drv_12ma>,
+ <3 5 RK_FUNC_1
&pcfg_pull_none_drv_12ma>;
+ };
+ };
+
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
--
2.0.0
