Re: [RESEND PATCH v3 8/9] tty: cadence: Document DT binding

2014-04-23 Thread Michal Simek
On 04/05/2014 02:23 AM, Soren Brinkmann wrote:
> Add binding documentation for the Cadence UART.
> 
> Signed-off-by: Soren Brinkmann 
> Acked-by: Peter Crosthwaite 
> Acked-by: Rob Herring 
> Tested-by: Michal Simek 
> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  .../devicetree/bindings/serial/cdns,uart.txt | 20 
> 
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt
> 
> diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt 
> b/Documentation/devicetree/bindings/serial/cdns,uart.txt
> new file mode 100644
> index ..a3eb154c32ca
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
> @@ -0,0 +1,20 @@
> +Binding for Cadence UART Controller
> +
> +Required properties:
> +- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps"
> +- reg: Should contain UART controller registers location and length.
> +- interrupts: Should contain UART controller interrupts.
> +- clocks: Must contain phandles to the UART clocks
> +  See ../clocks/clock-bindings.txt for details.
> +- clock-names: Tuple to identify input clocks, must contain "uart_clk" and 
> "pclk"
> +  See ../clocks/clock-bindings.txt for details.
> +
> +
> +Example:
> + uart@e000 {
> + compatible = "cdns,uart-r1p8";
> + clocks = < 23>, < 40>;
> + clock-names = "uart_clk", "pclk";
> + reg = <0xE000 0x1000>;
> + interrupts = <0 27 4>;
> + };
> 

Applied to zynq/dt2 branch.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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Re: [RESEND PATCH v3 8/9] tty: cadence: Document DT binding

2014-04-23 Thread Michal Simek
On 04/05/2014 02:23 AM, Soren Brinkmann wrote:
 Add binding documentation for the Cadence UART.
 
 Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
 Acked-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
 Acked-by: Rob Herring r...@kernel.org
 Tested-by: Michal Simek michal.si...@xilinx.com
 ---
 
 Changes in v3: None
 Changes in v2: None
 
  .../devicetree/bindings/serial/cdns,uart.txt | 20 
 
  1 file changed, 20 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt
 
 diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt 
 b/Documentation/devicetree/bindings/serial/cdns,uart.txt
 new file mode 100644
 index ..a3eb154c32ca
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
 @@ -0,0 +1,20 @@
 +Binding for Cadence UART Controller
 +
 +Required properties:
 +- compatible : should be cdns,uart-r1p8, or xlnx,xuartps
 +- reg: Should contain UART controller registers location and length.
 +- interrupts: Should contain UART controller interrupts.
 +- clocks: Must contain phandles to the UART clocks
 +  See ../clocks/clock-bindings.txt for details.
 +- clock-names: Tuple to identify input clocks, must contain uart_clk and 
 pclk
 +  See ../clocks/clock-bindings.txt for details.
 +
 +
 +Example:
 + uart@e000 {
 + compatible = cdns,uart-r1p8;
 + clocks = clkc 23, clkc 40;
 + clock-names = uart_clk, pclk;
 + reg = 0xE000 0x1000;
 + interrupts = 0 27 4;
 + };
 

Applied to zynq/dt2 branch.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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Description: OpenPGP digital signature


[RESEND PATCH v3 8/9] tty: cadence: Document DT binding

2014-04-04 Thread Soren Brinkmann
Add binding documentation for the Cadence UART.

Signed-off-by: Soren Brinkmann 
Acked-by: Peter Crosthwaite 
Acked-by: Rob Herring 
Tested-by: Michal Simek 
---

Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/serial/cdns,uart.txt | 20 
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt

diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt 
b/Documentation/devicetree/bindings/serial/cdns,uart.txt
new file mode 100644
index ..a3eb154c32ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
@@ -0,0 +1,20 @@
+Binding for Cadence UART Controller
+
+Required properties:
+- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps"
+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.
+- clocks: Must contain phandles to the UART clocks
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Tuple to identify input clocks, must contain "uart_clk" and 
"pclk"
+  See ../clocks/clock-bindings.txt for details.
+
+
+Example:
+   uart@e000 {
+   compatible = "cdns,uart-r1p8";
+   clocks = < 23>, < 40>;
+   clock-names = "uart_clk", "pclk";
+   reg = <0xE000 0x1000>;
+   interrupts = <0 27 4>;
+   };
-- 
1.9.1.1.gbb9f595

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[RESEND PATCH v3 8/9] tty: cadence: Document DT binding

2014-04-04 Thread Soren Brinkmann
Add binding documentation for the Cadence UART.

Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Acked-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Acked-by: Rob Herring r...@kernel.org
Tested-by: Michal Simek michal.si...@xilinx.com
---

Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/serial/cdns,uart.txt | 20 
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/cdns,uart.txt

diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt 
b/Documentation/devicetree/bindings/serial/cdns,uart.txt
new file mode 100644
index ..a3eb154c32ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt
@@ -0,0 +1,20 @@
+Binding for Cadence UART Controller
+
+Required properties:
+- compatible : should be cdns,uart-r1p8, or xlnx,xuartps
+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.
+- clocks: Must contain phandles to the UART clocks
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Tuple to identify input clocks, must contain uart_clk and 
pclk
+  See ../clocks/clock-bindings.txt for details.
+
+
+Example:
+   uart@e000 {
+   compatible = cdns,uart-r1p8;
+   clocks = clkc 23, clkc 40;
+   clock-names = uart_clk, pclk;
+   reg = 0xE000 0x1000;
+   interrupts = 0 27 4;
+   };
-- 
1.9.1.1.gbb9f595

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