[RFC PATCH 1/2] irqchip: GIC: introduce ICPIDR2 register interface

2014-07-11 Thread Liu Hua
Peripheral ID2 Register provides a four-bit architecturally-defined
architecture revision field. So we can identify the GIC verison from
this register. It is useful sometimes.

Signed-off-by: Liu Hua 
---
 include/linux/irqchip/arm-gic.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 45e2d8c..872a562 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -38,6 +38,7 @@
 #define GIC_DIST_SOFTINT   0xf00
 #define GIC_DIST_SGI_PENDING_CLEAR 0xf10
 #define GIC_DIST_SGI_PENDING_SET   0xf20
+#define GIC_DIST_ICPIDR2   0xfe8
 
 #define GICH_HCR   0x0
 #define GICH_VTR   0x4
-- 
1.9.0

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[RFC PATCH 1/2] irqchip: GIC: introduce ICPIDR2 register interface

2014-07-11 Thread Liu Hua
Peripheral ID2 Register provides a four-bit architecturally-defined
architecture revision field. So we can identify the GIC verison from
this register. It is useful sometimes.

Signed-off-by: Liu Hua sdu@huawei.com
---
 include/linux/irqchip/arm-gic.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 45e2d8c..872a562 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -38,6 +38,7 @@
 #define GIC_DIST_SOFTINT   0xf00
 #define GIC_DIST_SGI_PENDING_CLEAR 0xf10
 #define GIC_DIST_SGI_PENDING_SET   0xf20
+#define GIC_DIST_ICPIDR2   0xfe8
 
 #define GICH_HCR   0x0
 #define GICH_VTR   0x4
-- 
1.9.0

--
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