Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Mark Brown]

On Wed, Jun 08, 2016 at 11:32:22AM +0800, Garlic Tseng wrote:
> On Tue, 2016-06-07 at 17:31 +0100, Mark Brown wrote:

> > > + SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> > > + 1),
> > > +};

> > On/off controls should end in Switch.

> Do you means that the name should end in Switch? Something like "Multi
> ch asrc out3 Switch" (or maybe a shorter one)

Yes, exactly.


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Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Mark Brown]

On Wed, Jun 08, 2016 at 11:32:22AM +0800, Garlic Tseng wrote:
> On Tue, 2016-06-07 at 17:31 +0100, Mark Brown wrote:

> > > + SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> > > + 1),
> > > +};

> > On/off controls should end in Switch.

> Do you means that the name should end in Switch? Something like "Multi
> ch asrc out3 Switch" (or maybe a shorter one)

Yes, exactly.


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Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Garlic Tseng]

On Tue, 2016-06-07 at 17:31 +0100, Mark Brown wrote:
> On Fri, Jun 03, 2016 at 12:56:21PM +0800, Garlic Tseng wrote:
> 
> > +   if (val < 0 || val > MT2701_I2S_NUM) {
> > +   dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
> > +   __func__, num, val);
> > +   return -1;
> 
> Real error codes please.

OK I'll fix it.

> 
> > +static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc3[] = {
> > +   SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> > +   1),
> > +};
> 
> On/off controls should end in Switch.

Do you means that the name should end in Switch? Something like "Multi
ch asrc out3 Switch" (or maybe a shorter one)

I'll fix it (if I don't misunderstand the comment)

Thanks!

> ___
> Alsa-devel mailing list
> alsa-de...@alsa-project.org
> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel

Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Garlic Tseng]

On Tue, 2016-06-07 at 17:31 +0100, Mark Brown wrote:
> On Fri, Jun 03, 2016 at 12:56:21PM +0800, Garlic Tseng wrote:
> 
> > +   if (val < 0 || val > MT2701_I2S_NUM) {
> > +   dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
> > +   __func__, num, val);
> > +   return -1;
> 
> Real error codes please.

OK I'll fix it.

> 
> > +static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc3[] = {
> > +   SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> > +   1),
> > +};
> 
> On/off controls should end in Switch.

Do you means that the name should end in Switch? Something like "Multi
ch asrc out3 Switch" (or maybe a shorter one)

I'll fix it (if I don't misunderstand the comment)

Thanks!

> ___
> Alsa-devel mailing list
> alsa-de...@alsa-project.org
> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel

Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Mark Brown]

On Fri, Jun 03, 2016 at 12:56:21PM +0800, Garlic Tseng wrote:

> + if (val < 0 || val > MT2701_I2S_NUM) {
> + dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
> + __func__, num, val);
> + return -1;

Real error codes please.

> +static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc3[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> + 1),
> +};

On/off controls should end in Switch.


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Re: [alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Mark Brown]

On Fri, Jun 03, 2016 at 12:56:21PM +0800, Garlic Tseng wrote:

> + if (val < 0 || val > MT2701_I2S_NUM) {
> + dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
> + __func__, num, val);
> + return -1;

Real error codes please.

> +static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc3[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("Multi ch asrc out3", PWR2_TOP_CON, 7, 1,
> + 1),
> +};

On/off controls should end in Switch.


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[alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Garlic Tseng]

Add mt2701 platform driver implementation for playback and capture.
The implement follow DAPM structure (memory interface as FE and I2S
as BE).
Because of the hardware design, i2s out required to be enabled when
we need to enable i2s in. This patch includes the implementation.

Signed-off-by: Garlic Tseng 
---
 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c | 1523 
 1 file changed, 1523 insertions(+)
 create mode 100644 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c

diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 
b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
new file mode 100644
index 000..4c22ca0
--- /dev/null
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
@@ -0,0 +1,1523 @@
+/*
+ * Mediatek ALSA SoC AFE platform driver for 2701
+ *
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: Garlic Tseng 
+ * Koro Chen 
+ * Hidalgo Huang 
+ * Ir Lian 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mt2701-afe-common.h"
+
+#include "mt2701-afe-clock-ctrl.h"
+#include "../common/mtk-afe-platform-driver.h"
+#include "../common/mtk-afe-fe-dai.h"
+
+#define AFE_IRQ_STATUS_BITS0xff
+
+static const struct snd_pcm_hardware mt2701_afe_hardware = {
+   .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED
+   | SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID,
+   .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE
+  | SNDRV_PCM_FMTBIT_S32_LE,
+   .period_bytes_min = 1024,
+   .period_bytes_max = 1024 * 256,
+   .periods_min = 4,
+   .periods_max = 1024,
+   .buffer_bytes_max = 1024 * 1024 * 16,
+   .fifo_size = 0,
+};
+
+struct mt2701_afe_rate {
+   unsigned int rate;
+   unsigned int regvalue;
+};
+
+static const struct mt2701_afe_rate mt2701_afe_i2s_rates[] = {
+   { .rate = 8000, .regvalue = 0 },
+   { .rate = 12000, .regvalue = 1 },
+   { .rate = 16000, .regvalue = 2 },
+   { .rate = 24000, .regvalue = 3 },
+   { .rate = 32000, .regvalue = 4 },
+   { .rate = 48000, .regvalue = 5 },
+   { .rate = 96000, .regvalue = 6 },
+   { .rate = 192000, .regvalue = 7 },
+   { .rate = 384000, .regvalue = 8 },
+   { .rate = 7350, .regvalue = 16 },
+   { .rate = 11025, .regvalue = 17 },
+   { .rate = 14700, .regvalue = 18 },
+   { .rate = 22050, .regvalue = 19 },
+   { .rate = 29400, .regvalue = 20 },
+   { .rate = 44100, .regvalue = 21 },
+   { .rate = 88200, .regvalue = 22 },
+   { .rate = 176400, .regvalue = 23 },
+   { .rate = 352800, .regvalue = 24 },
+};
+
+int mt2701_dai_num_to_i2s(struct mtk_base_afe *afe, int num)
+{
+   int val = num - MT2701_IO_I2S;
+
+   if (val < 0 || val > MT2701_I2S_NUM) {
+   dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
+   __func__, num, val);
+   return -1;
+   }
+   return val;
+}
+
+static int mt2701_afe_i2s_fs(unsigned int sample_rate)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(mt2701_afe_i2s_rates); i++)
+   if (mt2701_afe_i2s_rates[i].rate == sample_rate)
+   return mt2701_afe_i2s_rates[i].regvalue;
+
+   return -EINVAL;
+}
+
+static int mt2701_afe_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+   struct snd_soc_pcm_runtime *rtd = substream->private_data;
+   struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
+   struct mt2701_afe_private *afe_priv = afe->platform_priv;
+   int i2s_num = mt2701_dai_num_to_i2s(afe, dai->id);
+   int clk_num = MT2701_AUD_AUD_I2S1_MCLK + i2s_num;
+   int ret = 0;
+
+   /*enable mclk*/
+   ret = clk_prepare_enable(afe_priv->clocks[clk_num]);
+   if (ret)
+   dev_err(afe->dev, "Failed to enable mclk for I2S: %d\n",
+   i2s_num);
+
+   return ret;
+}
+
+static int mt2701_afe_i2s_path_shutdown(struct snd_pcm_substream *substream,
+   struct snd_soc_dai *dai,
+   int dir_invert)
+{
+   struct snd_soc_pcm_runtime *rtd = substream->private_data;
+   struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
+   struct mt2701_afe_private *afe_priv = 

[alsa-devel] [PATCH v2 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

[Garlic Tseng]

Add mt2701 platform driver implementation for playback and capture.
The implement follow DAPM structure (memory interface as FE and I2S
as BE).
Because of the hardware design, i2s out required to be enabled when
we need to enable i2s in. This patch includes the implementation.

Signed-off-by: Garlic Tseng 
---
 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c | 1523 
 1 file changed, 1523 insertions(+)
 create mode 100644 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c

diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 
b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
new file mode 100644
index 000..4c22ca0
--- /dev/null
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c
@@ -0,0 +1,1523 @@
+/*
+ * Mediatek ALSA SoC AFE platform driver for 2701
+ *
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: Garlic Tseng 
+ * Koro Chen 
+ * Hidalgo Huang 
+ * Ir Lian 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mt2701-afe-common.h"
+
+#include "mt2701-afe-clock-ctrl.h"
+#include "../common/mtk-afe-platform-driver.h"
+#include "../common/mtk-afe-fe-dai.h"
+
+#define AFE_IRQ_STATUS_BITS0xff
+
+static const struct snd_pcm_hardware mt2701_afe_hardware = {
+   .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED
+   | SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID,
+   .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE
+  | SNDRV_PCM_FMTBIT_S32_LE,
+   .period_bytes_min = 1024,
+   .period_bytes_max = 1024 * 256,
+   .periods_min = 4,
+   .periods_max = 1024,
+   .buffer_bytes_max = 1024 * 1024 * 16,
+   .fifo_size = 0,
+};
+
+struct mt2701_afe_rate {
+   unsigned int rate;
+   unsigned int regvalue;
+};
+
+static const struct mt2701_afe_rate mt2701_afe_i2s_rates[] = {
+   { .rate = 8000, .regvalue = 0 },
+   { .rate = 12000, .regvalue = 1 },
+   { .rate = 16000, .regvalue = 2 },
+   { .rate = 24000, .regvalue = 3 },
+   { .rate = 32000, .regvalue = 4 },
+   { .rate = 48000, .regvalue = 5 },
+   { .rate = 96000, .regvalue = 6 },
+   { .rate = 192000, .regvalue = 7 },
+   { .rate = 384000, .regvalue = 8 },
+   { .rate = 7350, .regvalue = 16 },
+   { .rate = 11025, .regvalue = 17 },
+   { .rate = 14700, .regvalue = 18 },
+   { .rate = 22050, .regvalue = 19 },
+   { .rate = 29400, .regvalue = 20 },
+   { .rate = 44100, .regvalue = 21 },
+   { .rate = 88200, .regvalue = 22 },
+   { .rate = 176400, .regvalue = 23 },
+   { .rate = 352800, .regvalue = 24 },
+};
+
+int mt2701_dai_num_to_i2s(struct mtk_base_afe *afe, int num)
+{
+   int val = num - MT2701_IO_I2S;
+
+   if (val < 0 || val > MT2701_I2S_NUM) {
+   dev_err(afe->dev, "%s, num not available, num %d, val %d\n",
+   __func__, num, val);
+   return -1;
+   }
+   return val;
+}
+
+static int mt2701_afe_i2s_fs(unsigned int sample_rate)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(mt2701_afe_i2s_rates); i++)
+   if (mt2701_afe_i2s_rates[i].rate == sample_rate)
+   return mt2701_afe_i2s_rates[i].regvalue;
+
+   return -EINVAL;
+}
+
+static int mt2701_afe_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+   struct snd_soc_pcm_runtime *rtd = substream->private_data;
+   struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
+   struct mt2701_afe_private *afe_priv = afe->platform_priv;
+   int i2s_num = mt2701_dai_num_to_i2s(afe, dai->id);
+   int clk_num = MT2701_AUD_AUD_I2S1_MCLK + i2s_num;
+   int ret = 0;
+
+   /*enable mclk*/
+   ret = clk_prepare_enable(afe_priv->clocks[clk_num]);
+   if (ret)
+   dev_err(afe->dev, "Failed to enable mclk for I2S: %d\n",
+   i2s_num);
+
+   return ret;
+}
+
+static int mt2701_afe_i2s_path_shutdown(struct snd_pcm_substream *substream,
+   struct snd_soc_dai *dai,
+   int dir_invert)
+{
+   struct snd_soc_pcm_runtime *rtd = substream->private_data;
+   struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
+   struct mt2701_afe_private *afe_priv = afe->platform_priv;
+   int i2s_num = mt2701_dai_num_to_i2s(afe, dai->id);
+   struct mt2701_i2s_path *i2s_path =