[patch 056/198] mips: update VR41xx CPU-PCI bridge support

2005-04-12 Thread akpm

From: Yoichi Yuasa <[EMAIL PROTECTED]>

This patch updates NEC VR4100 series CPU-PCI bridge support.

Signed-off-by: Yoichi Yuasa <[EMAIL PROTECTED]>
Cc: Ralf Baechle <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
---

 25-akpm/arch/mips/pci/ops-vr41xx.c   |6 +-
 25-akpm/arch/mips/pci/pci-vr41xx.c   |   88 +-
 25-akpm/arch/mips/pci/pci-vr41xx.h   |   69 ---
 25-akpm/include/asm-mips/vr41xx/pci.h|   90 +++
 25-akpm/include/asm-mips/vr41xx/vr41xx.h |   70 
 5 files changed, 181 insertions(+), 142 deletions(-)

diff -puN arch/mips/pci/ops-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
arch/mips/pci/ops-vr41xx.c
--- 25/arch/mips/pci/ops-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
2005-04-12 03:21:16.787584800 -0700
+++ 25-akpm/arch/mips/pci/ops-vr41xx.c  2005-04-12 03:21:16.795583584 -0700
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2001-2003 MontaVista Software Inc.
  *Author: Yoichi Yuasa <[EMAIL PROTECTED] or [EMAIL PROTECTED]>
- *  Copyright (C) 2004  Yoichi Yuasa <[EMAIL PROTECTED]>
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <[EMAIL PROTECTED]>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -29,8 +29,8 @@
 
 #include 
 
-#define PCICONFDREGKSEG1ADDR(0x0f000c14)
-#define PCICONFAREGKSEG1ADDR(0x0f000c18)
+#define PCICONFDREG(void __iomem *)KSEG1ADDR(0x0f000c14)
+#define PCICONFAREG(void __iomem *)KSEG1ADDR(0x0f000c18)
 
 static inline int set_pci_configuration_address(unsigned char number,
 unsigned int devfn, int where)
diff -puN arch/mips/pci/pci-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
arch/mips/pci/pci-vr41xx.c
--- 25/arch/mips/pci/pci-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
2005-04-12 03:21:16.789584496 -0700
+++ 25-akpm/arch/mips/pci/pci-vr41xx.c  2005-04-12 03:21:16.796583432 -0700
@@ -3,8 +3,8 @@
  *
  *  Copyright (C) 2001-2003 MontaVista Software Inc.
  *Author: Yoichi Yuasa <[EMAIL PROTECTED] or [EMAIL PROTECTED]>
- *  Copyright (C) 2004  Yoichi Yuasa <[EMAIL PROTECTED]>
- * Copyright (C) 2004 by Ralf Baechle ([EMAIL PROTECTED])
+ *  Copyright (C) 2004-2005  Yoichi Yuasa <[EMAIL PROTECTED]>
+ *  Copyright (C) 2004 by Ralf Baechle ([EMAIL PROTECTED])
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -31,12 +31,18 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include "pci-vr41xx.h"
 
 extern struct pci_ops vr41xx_pci_ops;
 
+static void __iomem *pciu_base;
+
+#define pciu_read(offset)  readl(pciu_base + (offset))
+#define pciu_write(offset, value)  writel((value), pciu_base + (offset))
+
 static struct pci_master_address_conversion pci_master_memory1 = {
.bus_base_address   = PCI_MASTER_MEM1_BUS_BASE_ADDRESS,
.address_mask   = PCI_MASTER_MEM1_ADDRESS_MASK,
@@ -113,6 +119,15 @@ static int __init vr41xx_pciu_init(void)
 
setup = _pci_controller_unit_setup;
 
+   if (request_mem_region(PCIU_BASE, PCIU_SIZE, "PCIU") == NULL)
+   return -EBUSY;
+
+   pciu_base = ioremap(PCIU_BASE, PCIU_SIZE);
+   if (pciu_base == NULL) {
+   release_mem_region(PCIU_BASE, PCIU_SIZE);
+   return -EBUSY;
+   }
+
/* Disable PCI interrupt */
vr41xx_disable_pciint();
 
@@ -129,14 +144,14 @@ static int __init vr41xx_pciu_init(void)
pci_clock_max = PCI_CLOCK_MAX;
vtclock = vr41xx_get_vtclock_frequency();
if (vtclock < pci_clock_max)
-   writel(EQUAL_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, EQUAL_VTCLOCK);
else if ((vtclock / 2) < pci_clock_max)
-   writel(HALF_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, HALF_VTCLOCK);
else if (current_cpu_data.processor_id >= PRID_VR4131_REV2_1 &&
 (vtclock / 3) < pci_clock_max)
-   writel(ONE_THIRD_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK);
else if ((vtclock / 4) < pci_clock_max)
-   writel(QUARTER_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
else {
printk(KERN_ERR "PCI Clock is over 33MHz.\n");
return -EINVAL;
@@ -151,11 +166,11 @@ static int __init vr41xx_pciu_init(void)
  MASTER_MSK(master->address_mask) |
  WINEN |
  PCIA(master->pci_base_address);
-   writel(val, PCIMMAW1REG);
+   pciu_write(PCIMMAW1REG, val);
} else {
-   val = readl(PCIMMAW1REG);
+   val = pciu_read(PCIMMAW1REG);
val &= ~WINEN;
-   writel(val, 

[patch 056/198] mips: update VR41xx CPU-PCI bridge support

2005-04-12 Thread akpm

From: Yoichi Yuasa [EMAIL PROTECTED]

This patch updates NEC VR4100 series CPU-PCI bridge support.

Signed-off-by: Yoichi Yuasa [EMAIL PROTECTED]
Cc: Ralf Baechle [EMAIL PROTECTED]
Signed-off-by: Andrew Morton [EMAIL PROTECTED]
---

 25-akpm/arch/mips/pci/ops-vr41xx.c   |6 +-
 25-akpm/arch/mips/pci/pci-vr41xx.c   |   88 +-
 25-akpm/arch/mips/pci/pci-vr41xx.h   |   69 ---
 25-akpm/include/asm-mips/vr41xx/pci.h|   90 +++
 25-akpm/include/asm-mips/vr41xx/vr41xx.h |   70 
 5 files changed, 181 insertions(+), 142 deletions(-)

diff -puN arch/mips/pci/ops-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
arch/mips/pci/ops-vr41xx.c
--- 25/arch/mips/pci/ops-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
2005-04-12 03:21:16.787584800 -0700
+++ 25-akpm/arch/mips/pci/ops-vr41xx.c  2005-04-12 03:21:16.795583584 -0700
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2001-2003 MontaVista Software Inc.
  *Author: Yoichi Yuasa [EMAIL PROTECTED] or [EMAIL PROTECTED]
- *  Copyright (C) 2004  Yoichi Yuasa [EMAIL PROTECTED]
+ *  Copyright (C) 2004-2005  Yoichi Yuasa [EMAIL PROTECTED]
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -29,8 +29,8 @@
 
 #include asm/io.h
 
-#define PCICONFDREGKSEG1ADDR(0x0f000c14)
-#define PCICONFAREGKSEG1ADDR(0x0f000c18)
+#define PCICONFDREG(void __iomem *)KSEG1ADDR(0x0f000c14)
+#define PCICONFAREG(void __iomem *)KSEG1ADDR(0x0f000c18)
 
 static inline int set_pci_configuration_address(unsigned char number,
 unsigned int devfn, int where)
diff -puN arch/mips/pci/pci-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
arch/mips/pci/pci-vr41xx.c
--- 25/arch/mips/pci/pci-vr41xx.c~mips-update-vr41xx-cpu-pci-bridge 
2005-04-12 03:21:16.789584496 -0700
+++ 25-akpm/arch/mips/pci/pci-vr41xx.c  2005-04-12 03:21:16.796583432 -0700
@@ -3,8 +3,8 @@
  *
  *  Copyright (C) 2001-2003 MontaVista Software Inc.
  *Author: Yoichi Yuasa [EMAIL PROTECTED] or [EMAIL PROTECTED]
- *  Copyright (C) 2004  Yoichi Yuasa [EMAIL PROTECTED]
- * Copyright (C) 2004 by Ralf Baechle ([EMAIL PROTECTED])
+ *  Copyright (C) 2004-2005  Yoichi Yuasa [EMAIL PROTECTED]
+ *  Copyright (C) 2004 by Ralf Baechle ([EMAIL PROTECTED])
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -31,12 +31,18 @@
 
 #include asm/cpu.h
 #include asm/io.h
+#include asm/vr41xx/pci.h
 #include asm/vr41xx/vr41xx.h
 
 #include pci-vr41xx.h
 
 extern struct pci_ops vr41xx_pci_ops;
 
+static void __iomem *pciu_base;
+
+#define pciu_read(offset)  readl(pciu_base + (offset))
+#define pciu_write(offset, value)  writel((value), pciu_base + (offset))
+
 static struct pci_master_address_conversion pci_master_memory1 = {
.bus_base_address   = PCI_MASTER_MEM1_BUS_BASE_ADDRESS,
.address_mask   = PCI_MASTER_MEM1_ADDRESS_MASK,
@@ -113,6 +119,15 @@ static int __init vr41xx_pciu_init(void)
 
setup = vr41xx_pci_controller_unit_setup;
 
+   if (request_mem_region(PCIU_BASE, PCIU_SIZE, PCIU) == NULL)
+   return -EBUSY;
+
+   pciu_base = ioremap(PCIU_BASE, PCIU_SIZE);
+   if (pciu_base == NULL) {
+   release_mem_region(PCIU_BASE, PCIU_SIZE);
+   return -EBUSY;
+   }
+
/* Disable PCI interrupt */
vr41xx_disable_pciint();
 
@@ -129,14 +144,14 @@ static int __init vr41xx_pciu_init(void)
pci_clock_max = PCI_CLOCK_MAX;
vtclock = vr41xx_get_vtclock_frequency();
if (vtclock  pci_clock_max)
-   writel(EQUAL_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, EQUAL_VTCLOCK);
else if ((vtclock / 2)  pci_clock_max)
-   writel(HALF_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, HALF_VTCLOCK);
else if (current_cpu_data.processor_id = PRID_VR4131_REV2_1 
 (vtclock / 3)  pci_clock_max)
-   writel(ONE_THIRD_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK);
else if ((vtclock / 4)  pci_clock_max)
-   writel(QUARTER_VTCLOCK, PCICLKSELREG);
+   pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
else {
printk(KERN_ERR PCI Clock is over 33MHz.\n);
return -EINVAL;
@@ -151,11 +166,11 @@ static int __init vr41xx_pciu_init(void)
  MASTER_MSK(master-address_mask) |
  WINEN |
  PCIA(master-pci_base_address);
-   writel(val, PCIMMAW1REG);
+   pciu_write(PCIMMAW1REG, val);
} else {
-   val = readl(PCIMMAW1REG);
+   val = pciu_read(PCIMMAW1REG);
val = ~WINEN;
-