[tip:x86/cleanups] x86/cpufeature: Cleanup get_cpu_cap()

2015-12-19 Thread tip-bot for Borislav Petkov
Commit-ID:  39c06df4dc10a41de5fe706f4378ee5f09beba73
Gitweb: http://git.kernel.org/tip/39c06df4dc10a41de5fe706f4378ee5f09beba73
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:54 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level 0x8001 */
-   xlvl = cpuid_eax(0x8000);
-   

[tip:x86/cleanups] x86/cpufeature: Cleanup get_cpu_cap()

2015-12-19 Thread tip-bot for Borislav Petkov
Commit-ID:  39c06df4dc10a41de5fe706f4378ee5f09beba73
Gitweb: http://git.kernel.org/tip/39c06df4dc10a41de5fe706f4378ee5f09beba73
Author: Borislav Petkov 
AuthorDate: Mon, 7 Dec 2015 10:39:40 +0100
Committer:  Thomas Gleixner 
CommitDate: Sat, 19 Dec 2015 11:49:54 +0100

x86/cpufeature: Cleanup get_cpu_cap()

Add an enum for the ->x86_capability array indices and cleanup
get_cpu_cap() by killing some redundant local vars.

Signed-off-by: Borislav Petkov 
Link: http://lkml.kernel.org/r/1449481182-27541-3-git-send-email...@alien8.de
Signed-off-by: Thomas Gleixner 
---
 arch/x86/include/asm/cpufeature.h | 20 +
 arch/x86/kernel/cpu/centaur.c |  2 +-
 arch/x86/kernel/cpu/common.c  | 47 ++-
 arch/x86/kernel/cpu/transmeta.c   |  4 ++--
 4 files changed, 45 insertions(+), 28 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index 13d78e0..35401fe 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -288,6 +288,26 @@
 #include 
 #include 
 
+enum cpuid_leafs
+{
+   CPUID_1_EDX = 0,
+   CPUID_8000_0001_EDX,
+   CPUID_8086_0001_EDX,
+   CPUID_LNX_1,
+   CPUID_1_ECX,
+   CPUID_C000_0001_EDX,
+   CPUID_8000_0001_ECX,
+   CPUID_LNX_2,
+   CPUID_LNX_3,
+   CPUID_7_0_EBX,
+   CPUID_D_1_EAX,
+   CPUID_F_0_EDX,
+   CPUID_F_1_EDX,
+   CPUID_8000_0008_EBX,
+   CPUID_6_EAX,
+   CPUID_8000_000A_EDX,
+};
+
 #ifdef CONFIG_X86_FEATURE_NAMES
 extern const char * const x86_cap_flags[NCAPINTS*32];
 extern const char * const x86_power_flags[32];
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index d8fba5c..ae20be6 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -43,7 +43,7 @@ static void init_c3(struct cpuinfo_x86 *c)
/* store Centaur Extended Feature Flags as
 * word 5 of the CPU capability bit array
 */
-   c->x86_capability[5] = cpuid_edx(0xC001);
+   c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC001);
}
 #ifdef CONFIG_X86_32
/* Cyrix III family needs CX8 & PGE explicitly enabled. */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c755173..e14d5bd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -599,52 +599,47 @@ void cpu_detect(struct cpuinfo_x86 *c)
 
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
-   u32 tfms, xlvl;
-   u32 ebx;
+   u32 eax, ebx, ecx, edx;
 
/* Intel-defined flags: level 0x0001 */
if (c->cpuid_level >= 0x0001) {
-   u32 capability, excap;
+   cpuid(0x0001, , , , );
 
-   cpuid(0x0001, , , , );
-   c->x86_capability[0] = capability;
-   c->x86_capability[4] = excap;
+   c->x86_capability[CPUID_1_ECX] = ecx;
+   c->x86_capability[CPUID_1_EDX] = edx;
}
 
/* Additional Intel-defined flags: level 0x0007 */
if (c->cpuid_level >= 0x0007) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x0007, 0, , , , );
 
-   c->x86_capability[9] = ebx;
+   c->x86_capability[CPUID_7_0_EBX] = ebx;
 
-   c->x86_capability[14] = cpuid_eax(0x0006);
+   c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x0006);
}
 
/* Extended state features: level 0x000d */
if (c->cpuid_level >= 0x000d) {
-   u32 eax, ebx, ecx, edx;
-
cpuid_count(0x000d, 1, , , , );
 
-   c->x86_capability[10] = eax;
+   c->x86_capability[CPUID_D_1_EAX] = eax;
}
 
/* Additional Intel-defined flags: level 0x000F */
if (c->cpuid_level >= 0x000F) {
-   u32 eax, ebx, ecx, edx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=0 */
cpuid_count(0x000F, 0, , , , );
-   c->x86_capability[11] = edx;
+   c->x86_capability[CPUID_F_0_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
/* will be overridden if occupancy monitoring exists */
c->x86_cache_max_rmid = ebx;
 
/* QoS sub-leaf, EAX=0Fh, ECX=1 */
cpuid_count(0x000F, 1, , , , );
-   c->x86_capability[12] = edx;
+   c->x86_capability[CPUID_F_1_EDX] = edx;
+
if (cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) {
c->x86_cache_max_rmid = ecx;
c->x86_cache_occ_scale = ebx;
@@ -656,22 +651,24 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
}
 
/* AMD-defined flags: level