[tip:x86/cpu] x86/gart: Check for GART support before accessing GART registers

2015-05-06 Thread tip-bot for Aravind Gopalakrishnan
Commit-ID:  1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Gitweb: http://git.kernel.org/tip/1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Author: Aravind Gopalakrishnan 
AuthorDate: Tue, 7 Apr 2015 16:46:37 -0500
Committer:  Ingo Molnar 
CommitDate: Wed, 6 May 2015 11:15:53 +0200

x86/gart: Check for GART support before accessing GART registers

GART registers are not present in newer AMD processors (Fam15h, Model
10h and later). So, avoid accessing those in PCI config space by
returning early in early_gart_iommu_check() and gart_iommu_hole_init()
if GART is not available.

Current code doesn't break on existing processors but there are some
side effects:

We get bogus AGP aperture messages which are simply noise on
GART-less processors:

  AGP: Node 0: aperture [bus addr 0x-0x01ff] (32MB)
  AGP: Your BIOS doesn't leave aperture memory hole
  AGP: Please enable the IOMMU option in the BIOS setup
  AGP: This costs you 64MB of RAM
  AGP: Mapping aperture over RAM [mem 0xd400-0xd7ff]

We can avoid calling allocate_aperture() and would not have to
wastefully reserve 64MB of RAM with memblock_reserve(). Also, we can
avoid having to loop through all PCI buses and devices twice, searching
for a non-existent AGP bridge if we bail out early.

Refactor the family check used in amd_nb.c into an inline function so we
can use it here as well as in amd_nb.c

Fix some typos while at it.

Tested the patch on Fam10h and Fam15h Model 00h-fh and this code runs
fine. On Fam15h Model 60h-6fh and on Fam16h, we bail early as they don't
have GART.

Signed-off-by: Aravind Gopalakrishnan 
Signed-off-by: Borislav Petkov 
Reviewed-by: Suravee Suthikulpanit 
Cc: Bjorn Helgaas 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Joerg Rodel 
Cc: Thomas Gleixner 
Link: 
http://lkml.kernel.org/r/1428443197-3834-1-git-send-email-aravind.gopalakrish...@amd.com
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/amd_nb.h | 11 +++
 arch/x86/kernel/amd_nb.c  |  4 +---
 arch/x86/kernel/aperture_64.c |  8 +++-
 3 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index aaac3b2..1a5da2e 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -98,11 +98,22 @@ static inline u16 amd_get_node_id(struct pci_dev *pdev)
return 0;
 }
 
+static inline bool amd_gart_present(void)
+{
+   /* GART present only on Fam15h, upto model 0fh */
+   if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
+   (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))
+   return true;
+
+   return false;
+}
+
 #else
 
 #define amd_nb_num(x)  0
 #define amd_nb_has_feature(x)  false
 #define node_to_amd_nb(x)  NULL
+#define amd_gart_present(x)false
 
 #endif
 
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 5caed1d..29fa475 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -89,9 +89,7 @@ int amd_cache_northbridges(void)
next_northbridge(link, amd_nb_link_ids);
}
 
-   /* GART present only on Fam15h upto model 0fh */
-   if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
-   (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))
+   if (amd_gart_present())
amd_northbridges.flags |= AMD_NB_GART;
 
/*
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 76164e1..6e85f71 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -262,6 +262,9 @@ void __init early_gart_iommu_check(void)
u64 aper_base = 0, last_aper_base = 0;
int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0;
 
+   if (!amd_gart_present())
+   return;
+
if (!early_pci_allowed())
return;
 
@@ -355,6 +358,9 @@ int __init gart_iommu_hole_init(void)
int fix, slot, valid_agp = 0;
int i, node;
 
+   if (!amd_gart_present())
+   return -ENODEV;
+
if (gart_iommu_aperture_disabled || !fix_aperture ||
!early_pci_allowed())
return -ENODEV;
@@ -452,7 +458,7 @@ out:
   force_iommu ||
   valid_agp ||
   fallback_aper_force) {
-   pr_info("Your BIOS doesn't leave a aperture memory hole\n");
+   pr_info("Your BIOS doesn't leave an aperture memory hole\n");
pr_info("Please enable the IOMMU option in the BIOS setup\n");
pr_info("This costs you %dMB of RAM\n",
32 << fallback_aper_order);
--
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[tip:x86/cpu] x86/gart: Check for GART support before accessing GART registers

2015-05-06 Thread tip-bot for Aravind Gopalakrishnan
Commit-ID:  1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Gitweb: http://git.kernel.org/tip/1b4574292e9d2d37b3bb437c9e778fd2bba8e170
Author: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com
AuthorDate: Tue, 7 Apr 2015 16:46:37 -0500
Committer:  Ingo Molnar mi...@kernel.org
CommitDate: Wed, 6 May 2015 11:15:53 +0200

x86/gart: Check for GART support before accessing GART registers

GART registers are not present in newer AMD processors (Fam15h, Model
10h and later). So, avoid accessing those in PCI config space by
returning early in early_gart_iommu_check() and gart_iommu_hole_init()
if GART is not available.

Current code doesn't break on existing processors but there are some
side effects:

We get bogus AGP aperture messages which are simply noise on
GART-less processors:

  AGP: Node 0: aperture [bus addr 0x-0x01ff] (32MB)
  AGP: Your BIOS doesn't leave aperture memory hole
  AGP: Please enable the IOMMU option in the BIOS setup
  AGP: This costs you 64MB of RAM
  AGP: Mapping aperture over RAM [mem 0xd400-0xd7ff]

We can avoid calling allocate_aperture() and would not have to
wastefully reserve 64MB of RAM with memblock_reserve(). Also, we can
avoid having to loop through all PCI buses and devices twice, searching
for a non-existent AGP bridge if we bail out early.

Refactor the family check used in amd_nb.c into an inline function so we
can use it here as well as in amd_nb.c

Fix some typos while at it.

Tested the patch on Fam10h and Fam15h Model 00h-fh and this code runs
fine. On Fam15h Model 60h-6fh and on Fam16h, we bail early as they don't
have GART.

Signed-off-by: Aravind Gopalakrishnan aravind.gopalakrish...@amd.com
Signed-off-by: Borislav Petkov b...@suse.de
Reviewed-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Cc: Bjorn Helgaas bhelg...@google.com
Cc: Borislav Petkov b...@alien8.de
Cc: H. Peter Anvin h...@zytor.com
Cc: Joerg Rodel j...@8bytes.org
Cc: Thomas Gleixner t...@linutronix.de
Link: 
http://lkml.kernel.org/r/1428443197-3834-1-git-send-email-aravind.gopalakrish...@amd.com
Signed-off-by: Ingo Molnar mi...@kernel.org
---
 arch/x86/include/asm/amd_nb.h | 11 +++
 arch/x86/kernel/amd_nb.c  |  4 +---
 arch/x86/kernel/aperture_64.c |  8 +++-
 3 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index aaac3b2..1a5da2e 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -98,11 +98,22 @@ static inline u16 amd_get_node_id(struct pci_dev *pdev)
return 0;
 }
 
+static inline bool amd_gart_present(void)
+{
+   /* GART present only on Fam15h, upto model 0fh */
+   if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
+   (boot_cpu_data.x86 == 0x15  boot_cpu_data.x86_model  0x10))
+   return true;
+
+   return false;
+}
+
 #else
 
 #define amd_nb_num(x)  0
 #define amd_nb_has_feature(x)  false
 #define node_to_amd_nb(x)  NULL
+#define amd_gart_present(x)false
 
 #endif
 
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 5caed1d..29fa475 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -89,9 +89,7 @@ int amd_cache_northbridges(void)
next_northbridge(link, amd_nb_link_ids);
}
 
-   /* GART present only on Fam15h upto model 0fh */
-   if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||
-   (boot_cpu_data.x86 == 0x15  boot_cpu_data.x86_model  0x10))
+   if (amd_gart_present())
amd_northbridges.flags |= AMD_NB_GART;
 
/*
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 76164e1..6e85f71 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -262,6 +262,9 @@ void __init early_gart_iommu_check(void)
u64 aper_base = 0, last_aper_base = 0;
int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0;
 
+   if (!amd_gart_present())
+   return;
+
if (!early_pci_allowed())
return;
 
@@ -355,6 +358,9 @@ int __init gart_iommu_hole_init(void)
int fix, slot, valid_agp = 0;
int i, node;
 
+   if (!amd_gart_present())
+   return -ENODEV;
+
if (gart_iommu_aperture_disabled || !fix_aperture ||
!early_pci_allowed())
return -ENODEV;
@@ -452,7 +458,7 @@ out:
   force_iommu ||
   valid_agp ||
   fallback_aper_force) {
-   pr_info(Your BIOS doesn't leave a aperture memory hole\n);
+   pr_info(Your BIOS doesn't leave an aperture memory hole\n);
pr_info(Please enable the IOMMU option in the BIOS setup\n);
pr_info(This costs you %dMB of RAM\n,
32  fallback_aper_order);
--
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