Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD subsystem (fwd)
Hi Miquel
Sure I will do it this week.
Thanks
Piotr
The 09/25/2019 10:17, Miquel Raynal wrote:
EXTERNAL MAIL
Hi Piotr,
Can you fix the below issue reported by Julia? Either convert the
structure parameter to a signed parameter or use an intermediate
variable.
Thanks,
Miquèl
Julia Lawall wrote on Wed, 18 Sep 2019 21:04:37
+0200 (CEST):
-- Forwarded message --
Date: Wed, 18 Sep 2019 23:17:29 +0800
From: kbuild test robot
To: kbu...@01.org
Cc: Julia Lawall
Subject: Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD subsystem
CC: kbuild-...@01.org
In-Reply-To: <20190918123115.30510-1-pio...@cadence.com>
References: <20190918123115.30510-1-pio...@cadence.com>
TO: Piotr Sroka
CC: Kazuhiro Kasai , Piotr Sroka , Miquel Raynal , Richard Weinberger , David Woodhouse
, Brian Norris , Marek Vasut , Vignesh Raghavendra , Mauro Carvalho Chehab ,
"David S. Miller" , Greg Kroah-Hartman , Linus Walleij , Nicolas Ferre , "Paul E.
McKenney" , Boris Brezillon , Thomas Gleixner , Paul Cercueil , Arnd Bergmann ,
Marcel Ziswiler , Liang Yang , Anders Roxell , linux-kernel@vger.kernel.org, linux-...@lists.infradead.org
Hi Piotr,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3 next-20190917]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_0day-2Dci_linux_commits_Piotr-2DSroka_mtd-2Drawnand-2DAdd-2Dnew-2DCadence-2DNAND-2Ddriver-2Dto-2DMTD-2Dsubsystem_20190918-2D204505=DwIFaQ=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-_haXqY=TGZtNfZu5Cjhu2K8A0Qhsot4HlKpSJ0Xmyc_L8hPwSI=mgwNQ1SA26JWmty5PuDLavsJlIOFJvmPqnwJa6yPWMA=NawctdULcP90SHk2dQOe0pKiQerhjWFPA6n5lT8EFxY=
:: branch date: 3 hours ago
:: commit date: 3 hours ago
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
Reported-by: Julia Lawall
>> drivers/mtd/nand/raw/cadence-nand-controller.c:2644:5-28: WARNING: Unsigned
expression compared with zero: cdns_chip -> corr_str_idx < 0
#
https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_0day-2Dci_linux_commit_3235ae79d58b8d95b44d5d3773f59065f04d4f00=DwIFaQ=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-_haXqY=TGZtNfZu5Cjhu2K8A0Qhsot4HlKpSJ0Xmyc_L8hPwSI=mgwNQ1SA26JWmty5PuDLavsJlIOFJvmPqnwJa6yPWMA=Mx7SXvJoMz9s4OjGbntC5eTU-djHxf6cpfehouD_uFI=
git remote add linux-review
https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_0day-2Dci_linux=DwIFaQ=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-_haXqY=TGZtNfZu5Cjhu2K8A0Qhsot4HlKpSJ0Xmyc_L8hPwSI=mgwNQ1SA26JWmty5PuDLavsJlIOFJvmPqnwJa6yPWMA=aKS20tAkXcvBbq1SBp9yJSghFIfIuFqSNAL_Fq5uCI4=
git remote update linux-review
git checkout 3235ae79d58b8d95b44d5d3773f59065f04d4f00
vim +2644 drivers/mtd/nand/raw/cadence-nand-controller.c
3235ae79d58b8d Piotr Sroka 2019-09-18 2584
3235ae79d58b8d Piotr Sroka 2019-09-18 2585 int
cadence_nand_attach_chip(struct nand_chip *chip)
3235ae79d58b8d Piotr Sroka 2019-09-18 2586 {
3235ae79d58b8d Piotr Sroka 2019-09-18 2587 struct cdns_nand_ctrl *cdns_ctrl =
to_cdns_nand_ctrl(chip->controller);
3235ae79d58b8d Piotr Sroka 2019-09-18 2588 struct cdns_nand_chip
*cdns_chip = to_cdns_nand_chip(chip);
3235ae79d58b8d Piotr Sroka 2019-09-18 2589 u32 ecc_size =
cdns_chip->sector_count * chip->ecc.bytes;
3235ae79d58b8d Piotr Sroka 2019-09-18 2590 struct mtd_info *mtd =
nand_to_mtd(chip);
3235ae79d58b8d Piotr Sroka 2019-09-18 2591 u32 max_oob_data_size;
3235ae79d58b8d Piotr Sroka 2019-09-18 2592 int ret;
3235ae79d58b8d Piotr Sroka 2019-09-18 2593
3235ae79d58b8d Piotr Sroka 2019-09-18 2594 if (chip->options &
NAND_BUSWIDTH_16) {
3235ae79d58b8d Piotr Sroka 2019-09-18 2595 ret =
cadence_nand_set_access_width16(cdns_ctrl, true);
3235ae79d58b8d Piotr Sroka 2019-09-18 2596 if (ret)
3235ae79d58b8d Piotr Sroka 2019-09-18 2597 goto free_buf;
3235ae79d58b8d Piotr Sroka 2019-09-18 2598 }
3235ae79d58b8d Piotr Sroka 2019-09-18 2599
3235ae79d58b8d Piotr Sroka 2019-09-18 2600 chip->bbt_options |=
NAND_BBT_USE_FLASH;
3235ae79d58b8d Piotr Sroka 2019-09-18 2601 chip->bbt_options |=
NAND_BBT_NO_OOB;
3235ae79d58b8d Piotr Sroka 2019-09-18 2602 chip->ecc.mode = NAND_ECC_HW;
3235ae79d58b8d Piotr Sroka 2019-09-18 2603
3235ae79d58b8d Piotr Sroka 2019-09-18 2604 chip->options |=
NAND_NO_SUBPAGE_WRITE;
3235ae79d58b8d Piotr Sroka 2019-09-18 2605
3235ae79d58b8d Piotr Sroka 2019-09-18 2606 cdns_chip->bbm_offs =
chip->badblockpos;
3235ae79d58b8d Piotr Sroka 2019-09-18 2607 if (chip->options &
NAND_BUSWIDTH_16) {
3235ae79d58b8d Piotr Sroka 2019-09-18 2608 cdns_chip->bbm_offs &=
~0x01;
3235ae79d58b8d Piotr Sroka 2019-09-18 2609 cdns_chip->bbm_len = 2;
3235ae79d58b8d Piotr Sroka 2019-09-18 2610 } else {
3235ae79d58b8d Piotr Sroka 2019-09-18 2611 cdns_chip->bbm_len =
Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD subsystem (fwd)
Hi Piotr,
Can you fix the below issue reported by Julia? Either convert the
structure parameter to a signed parameter or use an intermediate
variable.
Thanks,
Miquèl
Julia Lawall wrote on Wed, 18 Sep 2019 21:04:37
+0200 (CEST):
> -- Forwarded message --
> Date: Wed, 18 Sep 2019 23:17:29 +0800
> From: kbuild test robot
> To: kbu...@01.org
> Cc: Julia Lawall
> Subject: Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD
> subsystem
>
> CC: kbuild-...@01.org
> In-Reply-To: <20190918123115.30510-1-pio...@cadence.com>
> References: <20190918123115.30510-1-pio...@cadence.com>
> TO: Piotr Sroka
> CC: Kazuhiro Kasai , Piotr Sroka
> , Miquel Raynal , Richard
> Weinberger , David Woodhouse , Brian
> Norris , Marek Vasut ,
> Vignesh Raghavendra , Mauro Carvalho Chehab
> , "David S. Miller" , Greg
> Kroah-Hartman , Linus Walleij
> , Nicolas Ferre ,
> "Paul E. McKenney" , Boris Brezillon
> , Thomas Gleixner , Paul
> Cercueil , Arnd Bergmann , Marcel
> Ziswiler , Liang Yang ,
> Anders Roxell , linux-kernel@vger.kernel.org,
> linux-...@lists.infradead.org
>
> Hi Piotr,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on linus/master]
> [cannot apply to v5.3 next-20190917]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Piotr-Sroka/mtd-rawnand-Add-new-Cadence-NAND-driver-to-MTD-subsystem/20190918-204505
> :: branch date: 3 hours ago
> :: commit date: 3 hours ago
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot
> Reported-by: Julia Lawall
>
> >> drivers/mtd/nand/raw/cadence-nand-controller.c:2644:5-28: WARNING:
> >> Unsigned expression compared with zero: cdns_chip -> corr_str_idx < 0
>
> #
> https://github.com/0day-ci/linux/commit/3235ae79d58b8d95b44d5d3773f59065f04d4f00
> git remote add linux-review https://github.com/0day-ci/linux
> git remote update linux-review
> git checkout 3235ae79d58b8d95b44d5d3773f59065f04d4f00
> vim +2644 drivers/mtd/nand/raw/cadence-nand-controller.c
>
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2584
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2585 int
> cadence_nand_attach_chip(struct nand_chip *chip)
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2586 {
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2587 struct cdns_nand_ctrl
> *cdns_ctrl = to_cdns_nand_ctrl(chip->controller);
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2588 struct cdns_nand_chip
> *cdns_chip = to_cdns_nand_chip(chip);
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2589 u32 ecc_size =
> cdns_chip->sector_count * chip->ecc.bytes;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2590 struct mtd_info *mtd =
> nand_to_mtd(chip);
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2591 u32 max_oob_data_size;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2592 int ret;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2593
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2594 if (chip->options &
> NAND_BUSWIDTH_16) {
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2595 ret =
> cadence_nand_set_access_width16(cdns_ctrl, true);
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2596 if (ret)
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2597 goto free_buf;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2598 }
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2599
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2600 chip->bbt_options |=
> NAND_BBT_USE_FLASH;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2601 chip->bbt_options |=
> NAND_BBT_NO_OOB;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2602 chip->ecc.mode = NAND_ECC_HW;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2603
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2604 chip->options |=
> NAND_NO_SUBPAGE_WRITE;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2605
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2606 cdns_chip->bbm_offs =
> chip->badblockpos;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2607 if (chip->options &
> NAND_BUSWIDTH_16) {
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2608 cdns_chip->bbm_offs &=
> ~0x01;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2609 cdns_chip->bbm_len = 2;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2610 } else {
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2611 cdns_chip->bbm_len = 1;
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2612 }
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2613
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2614 ret = nand_ecc_choose_conf(chip,
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2615
> _ctrl->ecc_caps,
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2616
> mtd->oobsize - cdns_chip->bbm_len);
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2617 if (ret) {
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2618 dev_err(cdns_ctrl->dev,
> "ECC configuration failed\n");
> 3235ae79d58b8d Piotr Sroka 2019-09-18 2619 goto free_buf;
> 3235ae79d58b8d Piotr Sroka
Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD subsystem (fwd)
-- Forwarded message --
Date: Wed, 18 Sep 2019 23:17:29 +0800
From: kbuild test robot
To: kbu...@01.org
Cc: Julia Lawall
Subject: Re: [v7 1/2] mtd: rawnand: Add new Cadence NAND driver to MTD subsystem
CC: kbuild-...@01.org
In-Reply-To: <20190918123115.30510-1-pio...@cadence.com>
References: <20190918123115.30510-1-pio...@cadence.com>
TO: Piotr Sroka
CC: Kazuhiro Kasai , Piotr Sroka
, Miquel Raynal , Richard
Weinberger , David Woodhouse , Brian
Norris , Marek Vasut ,
Vignesh Raghavendra , Mauro Carvalho Chehab
, "David S. Miller" , Greg
Kroah-Hartman , Linus Walleij
, Nicolas Ferre , "Paul
E. McKenney" , Boris Brezillon
, Thomas Gleixner , Paul
Cercueil , Arnd Bergmann , Marcel Ziswiler
, Liang Yang , Anders
Roxell , linux-kernel@vger.kernel.org,
linux-...@lists.infradead.org
Hi Piotr,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3 next-20190917]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Piotr-Sroka/mtd-rawnand-Add-new-Cadence-NAND-driver-to-MTD-subsystem/20190918-204505
:: branch date: 3 hours ago
:: commit date: 3 hours ago
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
Reported-by: Julia Lawall
>> drivers/mtd/nand/raw/cadence-nand-controller.c:2644:5-28: WARNING: Unsigned
>> expression compared with zero: cdns_chip -> corr_str_idx < 0
#
https://github.com/0day-ci/linux/commit/3235ae79d58b8d95b44d5d3773f59065f04d4f00
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 3235ae79d58b8d95b44d5d3773f59065f04d4f00
vim +2644 drivers/mtd/nand/raw/cadence-nand-controller.c
3235ae79d58b8d Piotr Sroka 2019-09-18 2584
3235ae79d58b8d Piotr Sroka 2019-09-18 2585 int
cadence_nand_attach_chip(struct nand_chip *chip)
3235ae79d58b8d Piotr Sroka 2019-09-18 2586 {
3235ae79d58b8d Piotr Sroka 2019-09-18 2587 struct cdns_nand_ctrl
*cdns_ctrl = to_cdns_nand_ctrl(chip->controller);
3235ae79d58b8d Piotr Sroka 2019-09-18 2588 struct cdns_nand_chip
*cdns_chip = to_cdns_nand_chip(chip);
3235ae79d58b8d Piotr Sroka 2019-09-18 2589 u32 ecc_size =
cdns_chip->sector_count * chip->ecc.bytes;
3235ae79d58b8d Piotr Sroka 2019-09-18 2590 struct mtd_info *mtd =
nand_to_mtd(chip);
3235ae79d58b8d Piotr Sroka 2019-09-18 2591 u32 max_oob_data_size;
3235ae79d58b8d Piotr Sroka 2019-09-18 2592 int ret;
3235ae79d58b8d Piotr Sroka 2019-09-18 2593
3235ae79d58b8d Piotr Sroka 2019-09-18 2594 if (chip->options &
NAND_BUSWIDTH_16) {
3235ae79d58b8d Piotr Sroka 2019-09-18 2595 ret =
cadence_nand_set_access_width16(cdns_ctrl, true);
3235ae79d58b8d Piotr Sroka 2019-09-18 2596 if (ret)
3235ae79d58b8d Piotr Sroka 2019-09-18 2597 goto free_buf;
3235ae79d58b8d Piotr Sroka 2019-09-18 2598 }
3235ae79d58b8d Piotr Sroka 2019-09-18 2599
3235ae79d58b8d Piotr Sroka 2019-09-18 2600 chip->bbt_options |=
NAND_BBT_USE_FLASH;
3235ae79d58b8d Piotr Sroka 2019-09-18 2601 chip->bbt_options |=
NAND_BBT_NO_OOB;
3235ae79d58b8d Piotr Sroka 2019-09-18 2602 chip->ecc.mode = NAND_ECC_HW;
3235ae79d58b8d Piotr Sroka 2019-09-18 2603
3235ae79d58b8d Piotr Sroka 2019-09-18 2604 chip->options |=
NAND_NO_SUBPAGE_WRITE;
3235ae79d58b8d Piotr Sroka 2019-09-18 2605
3235ae79d58b8d Piotr Sroka 2019-09-18 2606 cdns_chip->bbm_offs =
chip->badblockpos;
3235ae79d58b8d Piotr Sroka 2019-09-18 2607 if (chip->options &
NAND_BUSWIDTH_16) {
3235ae79d58b8d Piotr Sroka 2019-09-18 2608 cdns_chip->bbm_offs &=
~0x01;
3235ae79d58b8d Piotr Sroka 2019-09-18 2609 cdns_chip->bbm_len = 2;
3235ae79d58b8d Piotr Sroka 2019-09-18 2610 } else {
3235ae79d58b8d Piotr Sroka 2019-09-18 2611 cdns_chip->bbm_len = 1;
3235ae79d58b8d Piotr Sroka 2019-09-18 2612 }
3235ae79d58b8d Piotr Sroka 2019-09-18 2613
3235ae79d58b8d Piotr Sroka 2019-09-18 2614 ret = nand_ecc_choose_conf(chip,
3235ae79d58b8d Piotr Sroka 2019-09-18 2615
_ctrl->ecc_caps,
3235ae79d58b8d Piotr Sroka 2019-09-18 2616
mtd->oobsize - cdns_chip->bbm_len);
3235ae79d58b8d Piotr Sroka 2019-09-18 2617 if (ret) {
3235ae79d58b8d Piotr Sroka 2019-09-18 2618 dev_err(cdns_ctrl->dev,
"ECC configuration failed\n");
3235ae79d58b8d Piotr Sroka 2019-09-18 2619 goto free_buf;
3235ae79d58b8d Piotr Sroka 2019-09-18 2620 }
3235ae79d58b8d Piotr Sroka 2019-09-18 2621
3235ae79d58b8d Piotr Sroka 2019-09-18 2622 dev_dbg(cdns_ctrl->dev,
3235ae79d58b8d Piotr Sroka 2019-09-18 2623 "chosen ECC settings:
step=%d, strength=%d, bytes=%d\n",
3235ae79d58b8d Piotr Sroka 2019-09-18 2624 chip->ecc.size,
chip->ecc.strength, chip->ecc.bytes);
3235ae79d58b8d Piotr Sroka
