Re: Difference between IOVA and bus address when SMMU is enabled
On Sat, May 12, 2018 at 06:25:13PM +0530, valmiki wrote: Hi All, What is the difference between IOVA address and bus address when SMMU is enabled ? Is IOVA address term used only when hypervisor is present ? IOVA = IO virtual address. IOVA is the term normally used to describe the address used on the _device_ side of an IOMMU. For any general setup: RAM - MMU - DEVICE ^ ^ physical virtual addressaddress where "device" can be an IO device or a CPU, the terms still apply. If you have something like this: RAM - PCI bridge - MMU - DEVICE ^^ ^ physical bus virtual address address address You could also have (eg, in the case of a system MMU): RAM - MMU - PCI bridge - DEVICE ^ ^^ physical virtualbus address address address (this can also be considered a bus address!) In both of the above two cases, the PCI bridge may perform some address translation, meaning that the bus address is different from the address seen on the other side of the bridge. So, the terms used depend exactly on the overall bus topology. In the case of a system MMU, where the system MMU sits between peripheral devices and RAM, then the bus addresses are the same as the _IOVA of the system MMU_. Thanks Russell. --- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus
Re: Difference between IOVA and bus address when SMMU is enabled
On Sat, May 12, 2018 at 06:25:13PM +0530, valmiki wrote: Hi All, What is the difference between IOVA address and bus address when SMMU is enabled ? Is IOVA address term used only when hypervisor is present ? IOVA = IO virtual address. IOVA is the term normally used to describe the address used on the _device_ side of an IOMMU. For any general setup: RAM - MMU - DEVICE ^ ^ physical virtual addressaddress where "device" can be an IO device or a CPU, the terms still apply. If you have something like this: RAM - PCI bridge - MMU - DEVICE ^^ ^ physical bus virtual address address address You could also have (eg, in the case of a system MMU): RAM - MMU - PCI bridge - DEVICE ^ ^^ physical virtualbus address address address (this can also be considered a bus address!) In both of the above two cases, the PCI bridge may perform some address translation, meaning that the bus address is different from the address seen on the other side of the bridge. So, the terms used depend exactly on the overall bus topology. In the case of a system MMU, where the system MMU sits between peripheral devices and RAM, then the bus addresses are the same as the _IOVA of the system MMU_. Thanks Russell. --- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus
Re: Difference between IOVA and bus address when SMMU is enabled
On Sat, May 12, 2018 at 06:25:13PM +0530, valmiki wrote: > Hi All, > > What is the difference between IOVA address and bus address > when SMMU is enabled ? > > Is IOVA address term used only when hypervisor is present ? IOVA = IO virtual address. IOVA is the term normally used to describe the address used on the _device_ side of an IOMMU. For any general setup: RAM - MMU - DEVICE ^ ^ physical virtual addressaddress where "device" can be an IO device or a CPU, the terms still apply. If you have something like this: RAM - PCI bridge - MMU - DEVICE ^^ ^ physical bus virtual address address address You could also have (eg, in the case of a system MMU): RAM - MMU - PCI bridge - DEVICE ^ ^^ physical virtualbus address address address (this can also be considered a bus address!) In both of the above two cases, the PCI bridge may perform some address translation, meaning that the bus address is different from the address seen on the other side of the bridge. So, the terms used depend exactly on the overall bus topology. In the case of a system MMU, where the system MMU sits between peripheral devices and RAM, then the bus addresses are the same as the _IOVA of the system MMU_. -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up According to speedtest.net: 8.21Mbps down 510kbps up
Re: Difference between IOVA and bus address when SMMU is enabled
On Sat, May 12, 2018 at 06:25:13PM +0530, valmiki wrote: > Hi All, > > What is the difference between IOVA address and bus address > when SMMU is enabled ? > > Is IOVA address term used only when hypervisor is present ? IOVA = IO virtual address. IOVA is the term normally used to describe the address used on the _device_ side of an IOMMU. For any general setup: RAM - MMU - DEVICE ^ ^ physical virtual addressaddress where "device" can be an IO device or a CPU, the terms still apply. If you have something like this: RAM - PCI bridge - MMU - DEVICE ^^ ^ physical bus virtual address address address You could also have (eg, in the case of a system MMU): RAM - MMU - PCI bridge - DEVICE ^ ^^ physical virtualbus address address address (this can also be considered a bus address!) In both of the above two cases, the PCI bridge may perform some address translation, meaning that the bus address is different from the address seen on the other side of the bridge. So, the terms used depend exactly on the overall bus topology. In the case of a system MMU, where the system MMU sits between peripheral devices and RAM, then the bus addresses are the same as the _IOVA of the system MMU_. -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up According to speedtest.net: 8.21Mbps down 510kbps up
Re: Difference between IOVA and bus address when SMMU is enabled
Hi Valmiki, On 12/05/18 13:55, valmiki wrote: > Hi All, > > What is the difference between IOVA address and bus address > when SMMU is enabled ? They are the same. You'll use one term or the other depending on what system component you're talking about. "IOVA" only means something when talking about IOMMUs, where it represents the input address. If you're discussing bus transactions without caring whether an SMMU is enabled or not, then "bus address" makes more sense. We distinguish "IOVA" from "VA", which represents the input address of the CPU's MMU (e.g. any userspace pointer). The distinction is useful because the SMMU page tables are usually separate from the CPU page tables. In this case if you want to share a buffer between application and device, you'll have to allocate and map both a VA on the CPU side, and an IOVA on the device side. When sharing MMU page tables with the SMMU (see the SVA work), then we tend to talk about VA instead of IOVA, because they are identical. > Is IOVA address term used only when hypervisor is present ? No, the term is used in bare-metal setups as well. Thanks, Jean
Re: Difference between IOVA and bus address when SMMU is enabled
Hi Valmiki, On 12/05/18 13:55, valmiki wrote: > Hi All, > > What is the difference between IOVA address and bus address > when SMMU is enabled ? They are the same. You'll use one term or the other depending on what system component you're talking about. "IOVA" only means something when talking about IOMMUs, where it represents the input address. If you're discussing bus transactions without caring whether an SMMU is enabled or not, then "bus address" makes more sense. We distinguish "IOVA" from "VA", which represents the input address of the CPU's MMU (e.g. any userspace pointer). The distinction is useful because the SMMU page tables are usually separate from the CPU page tables. In this case if you want to share a buffer between application and device, you'll have to allocate and map both a VA on the CPU side, and an IOVA on the device side. When sharing MMU page tables with the SMMU (see the SVA work), then we tend to talk about VA instead of IOVA, because they are identical. > Is IOVA address term used only when hypervisor is present ? No, the term is used in bare-metal setups as well. Thanks, Jean
Difference between IOVA and bus address when SMMU is enabled
Hi All, What is the difference between IOVA address and bus address when SMMU is enabled ? Is IOVA address term used only when hypervisor is present ? Regards, Valmiki --- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus
Difference between IOVA and bus address when SMMU is enabled
Hi All, What is the difference between IOVA address and bus address when SMMU is enabled ? Is IOVA address term used only when hypervisor is present ? Regards, Valmiki --- This email has been checked for viruses by Avast antivirus software. https://www.avast.com/antivirus
