RE: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.

2014-09-21 Thread li.xi...@freescale.com
Hi,

> Subject: Re: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.
> 
> On Fri, Sep 19, 2014 at 11:37:27AM +0100, Xiubo Li wrote:
> > A given application may not use all the peripherals on the device.
> > In this case, it may be desirable to disable unused peripherals.
> > DCFG provides a mechanism for gating clocks to IP blocks that are
> > not used when running an application.
> >
> > Signed-off-by: Xiubo Li 
> > ---
> >  arch/arm/mach-imx/Makefile|   2 +
> >  arch/arm/mach-imx/clk-ls1021a.c   | 124
> ++
> >  arch/arm/mach-imx/clk.h   |  21 +
> >  include/dt-bindings/clock/ls1021a-clock.h |  54 +
> >  4 files changed, 201 insertions(+)
> >  create mode 100644 arch/arm/mach-imx/clk-ls1021a.c
> >  create mode 100644 include/dt-bindings/clock/ls1021a-clock.h
> 
> This looks to be missing an addition to Documentation/devicetree. Please
> put together a document.
>

Okay, I will do it.

Thanks,

BRs
Xiubo


 
> Mark.
> 
> >
> > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> > index 6e4fcd8..f6a1544 100644
> > --- a/arch/arm/mach-imx/Makefile
> > +++ b/arch/arm/mach-imx/Makefile
> > @@ -110,4 +110,6 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
> >
> >  obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o
> >
> > +obj-$(CONFIG_SOC_LS1021A) += clk-ls1021a.o
> > +
> >  obj-y += devices/
> > diff --git a/arch/arm/mach-imx/clk-ls1021a.c b/arch/arm/mach-imx/clk-
> ls1021a.c
> > new file mode 100644
> > index 000..680b616
> > --- /dev/null
> > +++ b/arch/arm/mach-imx/clk-ls1021a.c
> > @@ -0,0 +1,124 @@
> > +/*
> > + * Copyright 2014 Freescale Semiconductor, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include "clk.h"
> > +
> > +static struct clk *clk[LS1021A_CLK_END];
> > +static struct clk_onecell_data clk_data;
> > +
> > +static void __init ls1021a_clocks_init(struct device_node *np)
> > +{
> > +   void __iomem *dcfg_base;
> > +
> > +#define DCFG_CCSR_DEVDISR1 (dcfg_base + 0x70)
> > +#define DCFG_CCSR_DEVDISR2 (dcfg_base + 0x74)
> > +#define DCFG_CCSR_DEVDISR3 (dcfg_base + 0x78)
> > +#define DCFG_CCSR_DEVDISR4 (dcfg_base + 0x7c)
> > +#define DCFG_CCSR_DEVDISR5 (dcfg_base + 0x80)
> > +
> > +   dcfg_base = of_iomap(np, 0);
> > +
> > +   BUG_ON(!dcfg_base);
> > +
> > +   clk[LS1021A_CLK_PBL_EN] = ls1021a_clk_gate("pbl_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 0, 
> > true);
> > +   clk[LS1021A_CLK_ESDHC_EN] = ls1021a_clk_gate("esdhc_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 2, 
> > true);
> > +   clk[LS1021A_CLK_DMA1_EN] = ls1021a_clk_gate("dma1_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 8, 
> > true);
> > +   clk[LS1021A_CLK_DMA2_EN] = ls1021a_clk_gate("dma2_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 9, 
> > true);
> > +   clk[LS1021A_CLK_USB3_PHY_EN] = ls1021a_clk_gate("usb3_phy_en",
> "dummy",
> > +   DCFG_CCSR_DEVDISR1, 12,
> true);
> > +   clk[LS1021A_CLK_USB2_EN] = ls1021a_clk_gate("usb2_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 13,
> true);
> > +   clk[LS1021A_CLK_SATA_EN] = ls1021a_clk_gate("sata_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 16,
> true);
> > +   clk[LS1021A_CLK_USB3_EN] = ls1021a_clk_gate("usb3_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 17,
> true);
> > +   clk[LS1021A_CLK_SEC_EN] = ls1021a_clk_gate("sec_en", "dummy",
> > +   DCFG_CCSR_DEVDISR1, 22,
> true);
> > +   clk[LS1021A_CLK_2D_ACE_EN] = ls1021a_clk_gate("2d_ace_en&q

RE: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.

2014-09-21 Thread li.xi...@freescale.com
Hi,

 Subject: Re: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.
 
 On Fri, Sep 19, 2014 at 11:37:27AM +0100, Xiubo Li wrote:
  A given application may not use all the peripherals on the device.
  In this case, it may be desirable to disable unused peripherals.
  DCFG provides a mechanism for gating clocks to IP blocks that are
  not used when running an application.
 
  Signed-off-by: Xiubo Li li.xi...@freescale.com
  ---
   arch/arm/mach-imx/Makefile|   2 +
   arch/arm/mach-imx/clk-ls1021a.c   | 124
 ++
   arch/arm/mach-imx/clk.h   |  21 +
   include/dt-bindings/clock/ls1021a-clock.h |  54 +
   4 files changed, 201 insertions(+)
   create mode 100644 arch/arm/mach-imx/clk-ls1021a.c
   create mode 100644 include/dt-bindings/clock/ls1021a-clock.h
 
 This looks to be missing an addition to Documentation/devicetree. Please
 put together a document.


Okay, I will do it.

Thanks,

BRs
Xiubo


 
 Mark.
 
 
  diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
  index 6e4fcd8..f6a1544 100644
  --- a/arch/arm/mach-imx/Makefile
  +++ b/arch/arm/mach-imx/Makefile
  @@ -110,4 +110,6 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
 
   obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o
 
  +obj-$(CONFIG_SOC_LS1021A) += clk-ls1021a.o
  +
   obj-y += devices/
  diff --git a/arch/arm/mach-imx/clk-ls1021a.c b/arch/arm/mach-imx/clk-
 ls1021a.c
  new file mode 100644
  index 000..680b616
  --- /dev/null
  +++ b/arch/arm/mach-imx/clk-ls1021a.c
  @@ -0,0 +1,124 @@
  +/*
  + * Copyright 2014 Freescale Semiconductor, Inc.
  + *
  + * This program is free software; you can redistribute it and/or modify
  + * it under the terms of the GNU General Public License as published by
  + * the Free Software Foundation; either version 2 of the License, or
  + * (at your option) any later version.
  + *
  + */
  +
  +#include linux/clk.h
  +#include linux/mfd/syscon.h
  +#include linux/of_address.h
  +#include dt-bindings/clock/ls1021a-clock.h
  +
  +#include clk.h
  +
  +static struct clk *clk[LS1021A_CLK_END];
  +static struct clk_onecell_data clk_data;
  +
  +static void __init ls1021a_clocks_init(struct device_node *np)
  +{
  +   void __iomem *dcfg_base;
  +
  +#define DCFG_CCSR_DEVDISR1 (dcfg_base + 0x70)
  +#define DCFG_CCSR_DEVDISR2 (dcfg_base + 0x74)
  +#define DCFG_CCSR_DEVDISR3 (dcfg_base + 0x78)
  +#define DCFG_CCSR_DEVDISR4 (dcfg_base + 0x7c)
  +#define DCFG_CCSR_DEVDISR5 (dcfg_base + 0x80)
  +
  +   dcfg_base = of_iomap(np, 0);
  +
  +   BUG_ON(!dcfg_base);
  +
  +   clk[LS1021A_CLK_PBL_EN] = ls1021a_clk_gate(pbl_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 0, 
  true);
  +   clk[LS1021A_CLK_ESDHC_EN] = ls1021a_clk_gate(esdhc_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 2, 
  true);
  +   clk[LS1021A_CLK_DMA1_EN] = ls1021a_clk_gate(dma1_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 8, 
  true);
  +   clk[LS1021A_CLK_DMA2_EN] = ls1021a_clk_gate(dma2_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 9, 
  true);
  +   clk[LS1021A_CLK_USB3_PHY_EN] = ls1021a_clk_gate(usb3_phy_en,
 dummy,
  +   DCFG_CCSR_DEVDISR1, 12,
 true);
  +   clk[LS1021A_CLK_USB2_EN] = ls1021a_clk_gate(usb2_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 13,
 true);
  +   clk[LS1021A_CLK_SATA_EN] = ls1021a_clk_gate(sata_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 16,
 true);
  +   clk[LS1021A_CLK_USB3_EN] = ls1021a_clk_gate(usb3_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 17,
 true);
  +   clk[LS1021A_CLK_SEC_EN] = ls1021a_clk_gate(sec_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 22,
 true);
  +   clk[LS1021A_CLK_2D_ACE_EN] = ls1021a_clk_gate(2d_ace_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 30,
 true);
  +   clk[LS1021A_CLK_QE_EN] = ls1021a_clk_gate(qe_en, dummy,
  +   DCFG_CCSR_DEVDISR1, 31,
 true);
  +
  +   clk[LS1021A_CLK_ETSEC1_EN] = ls1021a_clk_gate(etsec1_en, dummy,
  +   DCFG_CCSR_DEVDISR2, 0, 
  true);
  +   clk[LS1021A_CLK_ETSEC2_EN] = ls1021a_clk_gate(etsec2_en, dummy,
  +   DCFG_CCSR_DEVDISR2, 1, 
  true);
  +   clk[LS1021A_CLK_ETSEC3_EN] = ls1021a_clk_gate(etsec3_en, dummy,
  +   DCFG_CCSR_DEVDISR2, 2, 
  true);
  +
  +   clk[LS1021A_CLK_PEX1_EN] = ls1021a_clk_gate(pex1_en, dummy,
  +   DCFG_CCSR_DEVDISR3, 0, 
  true);
  +   clk[LS1021A_CLK_PEX2_EN] = ls1021a_clk_gate

Re: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.

2014-09-19 Thread Mark Rutland
On Fri, Sep 19, 2014 at 11:37:27AM +0100, Xiubo Li wrote:
> A given application may not use all the peripherals on the device.
> In this case, it may be desirable to disable unused peripherals.
> DCFG provides a mechanism for gating clocks to IP blocks that are
> not used when running an application.
> 
> Signed-off-by: Xiubo Li 
> ---
>  arch/arm/mach-imx/Makefile|   2 +
>  arch/arm/mach-imx/clk-ls1021a.c   | 124 
> ++
>  arch/arm/mach-imx/clk.h   |  21 +
>  include/dt-bindings/clock/ls1021a-clock.h |  54 +
>  4 files changed, 201 insertions(+)
>  create mode 100644 arch/arm/mach-imx/clk-ls1021a.c
>  create mode 100644 include/dt-bindings/clock/ls1021a-clock.h

This looks to be missing an addition to Documentation/devicetree. Please
put together a document.

Mark.

> 
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index 6e4fcd8..f6a1544 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -110,4 +110,6 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
> 
>  obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o
> 
> +obj-$(CONFIG_SOC_LS1021A) += clk-ls1021a.o
> +
>  obj-y += devices/
> diff --git a/arch/arm/mach-imx/clk-ls1021a.c b/arch/arm/mach-imx/clk-ls1021a.c
> new file mode 100644
> index 000..680b616
> --- /dev/null
> +++ b/arch/arm/mach-imx/clk-ls1021a.c
> @@ -0,0 +1,124 @@
> +/*
> + * Copyright 2014 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "clk.h"
> +
> +static struct clk *clk[LS1021A_CLK_END];
> +static struct clk_onecell_data clk_data;
> +
> +static void __init ls1021a_clocks_init(struct device_node *np)
> +{
> +   void __iomem *dcfg_base;
> +
> +#define DCFG_CCSR_DEVDISR1 (dcfg_base + 0x70)
> +#define DCFG_CCSR_DEVDISR2 (dcfg_base + 0x74)
> +#define DCFG_CCSR_DEVDISR3 (dcfg_base + 0x78)
> +#define DCFG_CCSR_DEVDISR4 (dcfg_base + 0x7c)
> +#define DCFG_CCSR_DEVDISR5 (dcfg_base + 0x80)
> +
> +   dcfg_base = of_iomap(np, 0);
> +
> +   BUG_ON(!dcfg_base);
> +
> +   clk[LS1021A_CLK_PBL_EN] = ls1021a_clk_gate("pbl_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 0, true);
> +   clk[LS1021A_CLK_ESDHC_EN] = ls1021a_clk_gate("esdhc_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 2, true);
> +   clk[LS1021A_CLK_DMA1_EN] = ls1021a_clk_gate("dma1_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 8, true);
> +   clk[LS1021A_CLK_DMA2_EN] = ls1021a_clk_gate("dma2_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 9, true);
> +   clk[LS1021A_CLK_USB3_PHY_EN] = ls1021a_clk_gate("usb3_phy_en", 
> "dummy",
> +   DCFG_CCSR_DEVDISR1, 12, true);
> +   clk[LS1021A_CLK_USB2_EN] = ls1021a_clk_gate("usb2_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 13, true);
> +   clk[LS1021A_CLK_SATA_EN] = ls1021a_clk_gate("sata_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 16, true);
> +   clk[LS1021A_CLK_USB3_EN] = ls1021a_clk_gate("usb3_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 17, true);
> +   clk[LS1021A_CLK_SEC_EN] = ls1021a_clk_gate("sec_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 22, true);
> +   clk[LS1021A_CLK_2D_ACE_EN] = ls1021a_clk_gate("2d_ace_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 30, true);
> +   clk[LS1021A_CLK_QE_EN] = ls1021a_clk_gate("qe_en", "dummy",
> +   DCFG_CCSR_DEVDISR1, 31, true);
> +
> +   clk[LS1021A_CLK_ETSEC1_EN] = ls1021a_clk_gate("etsec1_en", "dummy",
> +   DCFG_CCSR_DEVDISR2, 0, true);
> +   clk[LS1021A_CLK_ETSEC2_EN] = ls1021a_clk_gate("etsec2_en", "dummy",
> +   DCFG_CCSR_DEVDISR2, 1, true);
> +   clk[LS1021A_CLK_ETSEC3_EN] = ls1021a_clk_gate("etsec3_en", "dummy",
> +   DCFG_CCSR_DEVDISR2, 2, true);
> +
> +   clk[LS1021A_CLK_PEX1_EN] = ls1021a_clk_gate("pex1_en", "dummy",
> +   DCFG_CCSR_DEVDISR3, 0, true);
> +   clk[LS1021A_CLK_PEX2_EN] = ls1021a_clk_gate("pex2_en", "dummy",
> +   DCFG_CCSR_DEVDISR3, 1, true);
> +
> +   clk[LS1021A_CLK_DUART1_EN] = ls1021a_clk_gate("duart1_en", "dummy",
> +  

Re: [PATCH] ARM: ls1021a: add gating clocks to IP blocks.

2014-09-19 Thread Mark Rutland
On Fri, Sep 19, 2014 at 11:37:27AM +0100, Xiubo Li wrote:
 A given application may not use all the peripherals on the device.
 In this case, it may be desirable to disable unused peripherals.
 DCFG provides a mechanism for gating clocks to IP blocks that are
 not used when running an application.
 
 Signed-off-by: Xiubo Li li.xi...@freescale.com
 ---
  arch/arm/mach-imx/Makefile|   2 +
  arch/arm/mach-imx/clk-ls1021a.c   | 124 
 ++
  arch/arm/mach-imx/clk.h   |  21 +
  include/dt-bindings/clock/ls1021a-clock.h |  54 +
  4 files changed, 201 insertions(+)
  create mode 100644 arch/arm/mach-imx/clk-ls1021a.c
  create mode 100644 include/dt-bindings/clock/ls1021a-clock.h

This looks to be missing an addition to Documentation/devicetree. Please
put together a document.

Mark.

 
 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
 index 6e4fcd8..f6a1544 100644
 --- a/arch/arm/mach-imx/Makefile
 +++ b/arch/arm/mach-imx/Makefile
 @@ -110,4 +110,6 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
 
  obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o
 
 +obj-$(CONFIG_SOC_LS1021A) += clk-ls1021a.o
 +
  obj-y += devices/
 diff --git a/arch/arm/mach-imx/clk-ls1021a.c b/arch/arm/mach-imx/clk-ls1021a.c
 new file mode 100644
 index 000..680b616
 --- /dev/null
 +++ b/arch/arm/mach-imx/clk-ls1021a.c
 @@ -0,0 +1,124 @@
 +/*
 + * Copyright 2014 Freescale Semiconductor, Inc.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License as published by
 + * the Free Software Foundation; either version 2 of the License, or
 + * (at your option) any later version.
 + *
 + */
 +
 +#include linux/clk.h
 +#include linux/mfd/syscon.h
 +#include linux/of_address.h
 +#include dt-bindings/clock/ls1021a-clock.h
 +
 +#include clk.h
 +
 +static struct clk *clk[LS1021A_CLK_END];
 +static struct clk_onecell_data clk_data;
 +
 +static void __init ls1021a_clocks_init(struct device_node *np)
 +{
 +   void __iomem *dcfg_base;
 +
 +#define DCFG_CCSR_DEVDISR1 (dcfg_base + 0x70)
 +#define DCFG_CCSR_DEVDISR2 (dcfg_base + 0x74)
 +#define DCFG_CCSR_DEVDISR3 (dcfg_base + 0x78)
 +#define DCFG_CCSR_DEVDISR4 (dcfg_base + 0x7c)
 +#define DCFG_CCSR_DEVDISR5 (dcfg_base + 0x80)
 +
 +   dcfg_base = of_iomap(np, 0);
 +
 +   BUG_ON(!dcfg_base);
 +
 +   clk[LS1021A_CLK_PBL_EN] = ls1021a_clk_gate(pbl_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 0, true);
 +   clk[LS1021A_CLK_ESDHC_EN] = ls1021a_clk_gate(esdhc_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 2, true);
 +   clk[LS1021A_CLK_DMA1_EN] = ls1021a_clk_gate(dma1_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 8, true);
 +   clk[LS1021A_CLK_DMA2_EN] = ls1021a_clk_gate(dma2_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 9, true);
 +   clk[LS1021A_CLK_USB3_PHY_EN] = ls1021a_clk_gate(usb3_phy_en, 
 dummy,
 +   DCFG_CCSR_DEVDISR1, 12, true);
 +   clk[LS1021A_CLK_USB2_EN] = ls1021a_clk_gate(usb2_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 13, true);
 +   clk[LS1021A_CLK_SATA_EN] = ls1021a_clk_gate(sata_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 16, true);
 +   clk[LS1021A_CLK_USB3_EN] = ls1021a_clk_gate(usb3_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 17, true);
 +   clk[LS1021A_CLK_SEC_EN] = ls1021a_clk_gate(sec_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 22, true);
 +   clk[LS1021A_CLK_2D_ACE_EN] = ls1021a_clk_gate(2d_ace_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 30, true);
 +   clk[LS1021A_CLK_QE_EN] = ls1021a_clk_gate(qe_en, dummy,
 +   DCFG_CCSR_DEVDISR1, 31, true);
 +
 +   clk[LS1021A_CLK_ETSEC1_EN] = ls1021a_clk_gate(etsec1_en, dummy,
 +   DCFG_CCSR_DEVDISR2, 0, true);
 +   clk[LS1021A_CLK_ETSEC2_EN] = ls1021a_clk_gate(etsec2_en, dummy,
 +   DCFG_CCSR_DEVDISR2, 1, true);
 +   clk[LS1021A_CLK_ETSEC3_EN] = ls1021a_clk_gate(etsec3_en, dummy,
 +   DCFG_CCSR_DEVDISR2, 2, true);
 +
 +   clk[LS1021A_CLK_PEX1_EN] = ls1021a_clk_gate(pex1_en, dummy,
 +   DCFG_CCSR_DEVDISR3, 0, true);
 +   clk[LS1021A_CLK_PEX2_EN] = ls1021a_clk_gate(pex2_en, dummy,
 +   DCFG_CCSR_DEVDISR3, 1, true);
 +
 +   clk[LS1021A_CLK_DUART1_EN] = ls1021a_clk_gate(duart1_en, dummy,
 +   DCFG_CCSR_DEVDISR4, 2, true);