On Tue, 2020-06-09 at 14:20 +, Jose Abreu wrote:
> From: Biao Huang
> Date: Jun/09/2020, 10:41:33 (UTC+00:00)
>
> > - rx_q->rx_count_frames += priv->rx_coal_frames;
> > - if (rx_q->rx_count_frames > priv->rx_coal_frames)
> > + if (rx_q->rx_count_frames >= priv->rx_coal_frames)
>
> This is no right. If you want to RX IC bit to not always be set you need
> to change coalesce parameters using ethtool.
let's take look at these lines:
1. rx_q->rx_count_frames += priv->rx_coal_frames;
2. if (rx_q->rx_count_frames > priv->rx_coal_frames)
3. rx_q->rx_count_frames = 0;
before the if condition(line 2 above), there is "rx_q->rx_count_frames
+= priv->rx_coal_frames"(line 1 above) sentence; so the if condition
always true, and the assignment rx_q->rx_count_frames = 0 happens.
Here is the result on our platform, all desc3[30] = 1; you can also
check it on your platform. no matter what rx-frames you set with
"ethtool -C eth0 rx-frames", desc3[30] always true.
# ethtool -c eth0
Coalesce parameters for eth0:
Adaptive RX: off TX: off
stats-block-usecs: 0
sample-interval: 0
pkt-rate-low: 0
pkt-rate-high: 0
rx-usecs: 301
rx-frames: 25
rx-usecs-irq: 0
rx-frames-irq: 0
#cd /sys/kernel/debug/stmmaceth/eth0
# cat descriptors_status
RX Queue 0:
Descriptor ring:
0 [0x5038b000]: 0xa8541a82 0x0 0x0 0xc100
1 [0x5038b010]: 0xa8541202 0x0 0x0 0xc100
2 [0x5038b020]: 0xa8540982 0x0 0x0 0xc100
3 [0x5038b030]: 0xa8540102 0x0 0x0 0xc100
4 [0x5038b040]: 0xa658f802 0x0 0x0 0xc100
5 [0x5038b050]: 0xa658ef82 0x0 0x0 0xc100
6 [0x5038b060]: 0xa658e702 0x0 0x0 0xc100
7 [0x5038b070]: 0xa658de82 0x0 0x0 0xc100
8 [0x5038b080]: 0xa658d602 0x0 0x0 0xc100
9 [0x5038b090]: 0xa658cd82 0x0 0x0 0xc100
10 [0x5038b0a0]: 0xa658c502 0x0 0x0 0xc100
11 [0x5038b0b0]: 0xa658bc82 0x0 0x0 0xc100
12 [0x5038b0c0]: 0xa658b402 0x0 0x0 0xc100
13 [0x5038b0d0]: 0xa658ab82 0x0 0x0 0xc100
14 [0x5038b0e0]: 0xa658a302 0x0 0x0 0xc100
15 [0x5038b0f0]: 0xa6589a82 0x0 0x0 0xc100
16 [0x5038b100]: 0xa6589202 0x0 0x0 0xc100
17 [0x5038b110]: 0xa6588982 0x0 0x0 0xc100
18 [0x5038b120]: 0xa6588102 0x0 0x0 0xc100
19 [0x5038b130]: 0xa46df802 0x0 0x0 0xc100
20 [0x5038b140]: 0xa46def82 0x0 0x0 0xc100
21 [0x5038b150]: 0xa46de702 0x0 0x0 0xc100
22 [0x5038b160]: 0xa46dde82 0x0 0x0 0xc100
23 [0x5038b170]: 0xa46dd602 0x0 0x0 0xc100
24 [0x5038b180]: 0xa46dcd82 0x0 0x0 0xc100
25 [0x5038b190]: 0xa46dc502 0x0 0x0 0xc100
26 [0x5038b1a0]: 0xa46dbc82 0x0 0x0 0xc100
27 [0x5038b1b0]: 0xa46db402 0x0 0x0 0xc100
28 [0x5038b1c0]: 0xa46dab82 0x0 0x0 0xc100
29 [0x5038b1d0]: 0xa46da302 0x0 0x0 0xc100
30 [0x5038b1e0]: 0xa46d9a82 0x0 0x0 0xc100
...
> ---
> Thanks,
> Jose Miguel Abreu
