RE: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Sun, 19 Oct 2014 13:20:38 +1100 Huang Shijie wrote: > On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: > > > > > > > > No, it doesn't seem to be correct. > > > But it's an MLC flash, so you'll most probably need to apply this > > > patch to nandbiterrs testsuite: > > > > > > http://code.bulix.org/f69wuu-87021 > > > > > > This patch is flashing the block between each bitflip insertion to > > > avoid multiple write without erasure (which, AFAIK, is not > > > supported by MLC flashes). > > > > Hi Huang, > > > > > > just out of interest, have you tried this on the MLC NAND without > > the patch? > > > > I'm aware that MLC says you shouldn't write multiple times, but > > that is with a view towards specified data endurance. I would only > > expect a few additional bit errors during the test. > > > > Did you try the overwrite test? > > > The following is the test result for overwrite with this MLC patch: > > root@imx6qdlsolo:~# insmod mtd_nandbiterrs.ko dev=1 mode=1 > [ 762.534714] > [ 762.536259] == > [ 762.542115] mtd_nandbiterrs: MTD device: 1 > [ 762.546326] mtd_nandbiterrs: MTD device size 16777216, > eraseblock=2097152, page=8192, oob=744 > [ 762.554937] mtd_nandbiterrs: Device uses 1 subpages of 8192 > bytes > [ 762.561059] mtd_nandbiterrs: Using page=0, offset=0, > eraseblock=0 > [ 762.571333] mtd_nandbiterrs: overwrite biterrors test > [ 762.576715] mtd_nandbiterrs: write_page > [ 762.590448] mtd_nandbiterrs: error: read failed at 0x0 > [ 762.595650] mtd_nandbiterrs: Read reported error -74 > [ 762.600625] mtd_nandbiterrs: Bit error histogram (0 > operations total): > [ 762.608586] mtd_nandbiterrs: finished successfully. > [ 762.613501] > == > insmod: ERROR: could not insert module mtd_nandbiterrs.ko: > Input/output error > Thanks. If I read this correctly, this means that writing the same data twice, already generates more bit errors than the ECC can fix. Best regards, Iwo __ This communication contains information which may be confidential or privileged. The information is intended solely for the use of the individual or entity named above. If you are not the intended recipient, be aware that any disclosure, copying, distribution or use of the contents of this information is prohibited. If you have received this communication in error, please notify me by telephone immediately. __ -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Sun, 19 Oct 2014 13:20:38 +1100 Huang Shijie shij...@gmail.com wrote: On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Hi Huang, just out of interest, have you tried this on the MLC NAND without the patch? I'm aware that MLC says you shouldn't write multiple times, but that is with a view towards specified data endurance. I would only expect a few additional bit errors during the test. Did you try the overwrite test? The following is the test result for overwrite with this MLC patch: root@imx6qdlsolo:~# insmod mtd_nandbiterrs.ko dev=1 mode=1 [ 762.534714] [ 762.536259] == [ 762.542115] mtd_nandbiterrs: MTD device: 1 [ 762.546326] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 762.554937] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 762.561059] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 762.571333] mtd_nandbiterrs: overwrite biterrors test [ 762.576715] mtd_nandbiterrs: write_page [ 762.590448] mtd_nandbiterrs: error: read failed at 0x0 [ 762.595650] mtd_nandbiterrs: Read reported error -74 [ 762.600625] mtd_nandbiterrs: Bit error histogram (0 operations total): [ 762.608586] mtd_nandbiterrs: finished successfully. [ 762.613501] == insmod: ERROR: could not insert module mtd_nandbiterrs.ko: Input/output error Thanks. If I read this correctly, this means that writing the same data twice, already generates more bit errors than the ECC can fix. Best regards, Iwo __ This communication contains information which may be confidential or privileged. The information is intended solely for the use of the individual or entity named above. If you are not the intended recipient, be aware that any disclosure, copying, distribution or use of the contents of this information is prohibited. If you have received this communication in error, please notify me by telephone immediately. __ -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: > > > > > No, it doesn't seem to be correct. > > But it's an MLC flash, so you'll most probably need to apply this patch > > to nandbiterrs testsuite: > > > > http://code.bulix.org/f69wuu-87021 > > > > This patch is flashing the block between each bitflip insertion to > > avoid multiple write without erasure (which, AFAIK, is not supported > > by MLC flashes). > > Hi Huang, > > > just out of interest, have you tried this on the MLC NAND without the patch? > > I'm aware that MLC says you shouldn't write multiple times, but that is > with a view towards specified data endurance. I would only expect a few > additional bit errors during the test. > > Did you try the overwrite test? > The following is the test result for overwrite with this MLC patch: root@imx6qdlsolo:~# insmod mtd_nandbiterrs.ko dev=1 mode=1 [ 762.534714] [ 762.536259] == [ 762.542115] mtd_nandbiterrs: MTD device: 1 [ 762.546326] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 762.554937] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 762.561059] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 762.571333] mtd_nandbiterrs: overwrite biterrors test [ 762.576715] mtd_nandbiterrs: write_page [ 762.590448] mtd_nandbiterrs: error: read failed at 0x0 [ 762.595650] mtd_nandbiterrs: Read reported error -74 [ 762.600625] mtd_nandbiterrs: Bit error histogram (0 operations total): [ 762.608586] mtd_nandbiterrs: finished successfully. [ 762.613501] == insmod: ERROR: could not insert module mtd_nandbiterrs.ko: Input/output error thanks Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Hi Huang, just out of interest, have you tried this on the MLC NAND without the patch? I'm aware that MLC says you shouldn't write multiple times, but that is with a view towards specified data endurance. I would only expect a few additional bit errors during the test. Did you try the overwrite test? The following is the test result for overwrite with this MLC patch: root@imx6qdlsolo:~# insmod mtd_nandbiterrs.ko dev=1 mode=1 [ 762.534714] [ 762.536259] == [ 762.542115] mtd_nandbiterrs: MTD device: 1 [ 762.546326] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 762.554937] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 762.561059] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 762.571333] mtd_nandbiterrs: overwrite biterrors test [ 762.576715] mtd_nandbiterrs: write_page [ 762.590448] mtd_nandbiterrs: error: read failed at 0x0 [ 762.595650] mtd_nandbiterrs: Read reported error -74 [ 762.600625] mtd_nandbiterrs: Bit error histogram (0 operations total): [ 762.608586] mtd_nandbiterrs: finished successfully. [ 762.613501] == insmod: ERROR: could not insert module mtd_nandbiterrs.ko: Input/output error thanks Huang Shijie -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: > > > > > No, it doesn't seem to be correct. > > But it's an MLC flash, so you'll most probably need to apply this patch > > to nandbiterrs testsuite: > > > > http://code.bulix.org/f69wuu-87021 > > > > This patch is flashing the block between each bitflip insertion to > > avoid multiple write without erasure (which, AFAIK, is not supported > > by MLC flashes). > > Hi Huang, > > > just out of interest, have you tried this on the MLC NAND without the patch? yes. I tried. As i posted, it will failed. > > I'm aware that MLC says you shouldn't write multiple times, but that is > with a view towards specified data endurance. I would only expect a few > additional bit errors during the test. > > Did you try the overwrite test? not yet. I can test it tomorrow. > > I'm curious how MLC NAND does when subjected to multiple writes. We should not do the multiple writes to the MLC nand. We can do so with the SLC nand. thank Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Oct 14, 2014 at 04:50:27PM +1100, Iwo Mergler wrote: No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Hi Huang, just out of interest, have you tried this on the MLC NAND without the patch? yes. I tried. As i posted, it will failed. I'm aware that MLC says you shouldn't write multiple times, but that is with a view towards specified data endurance. I would only expect a few additional bit errors during the test. Did you try the overwrite test? not yet. I can test it tomorrow. I'm curious how MLC NAND does when subjected to multiple writes. We should not do the multiple writes to the MLC nand. We can do so with the SLC nand. thank Huang Shijie -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
> > No, it doesn't seem to be correct. > But it's an MLC flash, so you'll most probably need to apply this patch > to nandbiterrs testsuite: > > http://code.bulix.org/f69wuu-87021 > > This patch is flashing the block between each bitflip insertion to > avoid multiple write without erasure (which, AFAIK, is not supported > by MLC flashes). Hi Huang, just out of interest, have you tried this on the MLC NAND without the patch? I'm aware that MLC says you shouldn't write multiple times, but that is with a view towards specified data endurance. I would only expect a few additional bit errors during the test. Did you try the overwrite test? I'm curious how MLC NAND does when subjected to multiple writes. Best regards, Iwo __ This communication contains information which may be confidential or privileged. The information is intended solely for the use of the individual or entity named above. If you are not the intended recipient, be aware that any disclosure, copying, distribution or use of the contents of this information is prohibited. If you have received this communication in error, please notify me by telephone immediately. __ -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Hi Huang, just out of interest, have you tried this on the MLC NAND without the patch? I'm aware that MLC says you shouldn't write multiple times, but that is with a view towards specified data endurance. I would only expect a few additional bit errors during the test. Did you try the overwrite test? I'm curious how MLC NAND does when subjected to multiple writes. Best regards, Iwo __ This communication contains information which may be confidential or privileged. The information is intended solely for the use of the individual or entity named above. If you are not the intended recipient, be aware that any disclosure, copying, distribution or use of the contents of this information is prohibited. If you have received this communication in error, please notify me by telephone immediately. __ -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Fri, 10 Oct 2014 22:42:51 +0800 Huang Shijie wrote: > On Wed, Oct 08, 2014 at 05:10:34PM +0200, Boris Brezillon wrote: > > On Wed, 8 Oct 2014 22:24:40 +0800 > > Huang Shijie wrote: > > > > > On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: > > > > Hello Huang, Brian, > > > > > > > > This is just a new proposal to support raw accesses in a more standard > > > > way > > > > in the GPMI driver. > > > > This series has been tested on an imx28 board. > > > > > > > > Any suggestions are welcome. > > > > > > > > Best Regards, > > > > > > > > Boris > > > > > > > > Changes since v2: > > > > - fixed a bug in gpmi_move_bits > > > > - add a raw_buffer field to be used when using raw access methods > > > >(experienced memory corruptions when directly using page_buffer_virt > > > >buffer) > > > > - add raw OOB access functions > > > > > > I tested this patch set today with the imx6dl-sabreauto board. > > > > > > NAND: Micron MT29F64G08CBABAWP > > > 8192MiB, MLC, page size: 8192, OOB size: 744 > > > > > > ECC: 40bit > > > > > > The result: > > > > > > [ 3672.779009] == > > > [ 3672.784974] mtd_nandbiterrs: MTD device: 0 > > > [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, > > > eraseblock=2097152, page=8192, oob=744 > > > [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > > > [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 > > > [ 3672.812497] mtd_nandbiterrs: incremental biterrors test > > > [ 3672.818688] mtd_nandbiterrs: write_page > > > [ 3672.825529] mtd_nandbiterrs: rewrite page > > > [ 3672.837290] mtd_nandbiterrs: read_page > > > [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 > > > [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read > > > reported error -74 > > > [ 3672.862932] mtd_nandbiterrs: finished successfully. > > > [ 3672.867837] == > > > > > > [ 3745.282368] == > > > [ 3745.288227] mtd_nandbiterrs: MTD device: 0 > > > [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, > > > eraseblock=2097152, page=8192, oob=744 > > > [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > > > [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 > > > [ 3745.316778] mtd_nandbiterrs: incremental biterrors test > > > [ 3745.323017] mtd_nandbiterrs: write_page > > > [ 3745.328616] mtd_nandbiterrs: rewrite page > > > [ 3745.334191] mtd_nandbiterrs: read_page > > > [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 > > > [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read > > > reported error -74 > > > [ 3745.361281] mtd_nandbiterrs: finished successfully. > > > [ 3745.366173] == > > > > > > > > > Is this okay? > > > > No, it doesn't seem to be correct. > > But it's an MLC flash, so you'll most probably need to apply this patch > > to nandbiterrs testsuite: > > > > http://code.bulix.org/f69wuu-87021 > > > > This patch is flashing the block between each bitflip insertion to > > avoid multiple write without erasure (which, AFAIK, is not supported > > by MLC flashes). > After I applied this patch. It seems ok now. > > The test result: > [ 244.789900] == > [ 244.795826] mtd_nandbiterrs: MTD device: 1 > [ 244.799974] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, > page=8192, oob=744 > [ 244.808563] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > [ 244.814697] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 > [ 244.822622] mtd_nandbiterrs: incremental biterrors test > [ 244.828146] mtd_nandbiterrs: write_page > [ 244.833341] mtd_nandbiterrs: fill page > [ 244.838831] mtd_nandbiterrs: rewrite page > [ 244.844353] mtd_nandbiterrs: read_page > [ 244.848585] mtd_nandbiterrs: verify_page > [ 244.852915] mtd_nandbiterrs: Successfully corrected 0 bit errors per > subpage > [ 244.859973] mtd_nandbiterrs: Inserted biterror @ 0/5 > [ 244.866316] mtd_nandbiterrs: rewrite page > [ 244.871629] mtd_nandbiterrs: read_page > [ 244.875864] mtd_nandbiterrs: verify_page > [ 244.880161] mtd_nandbiterrs: Successfully corrected 1 bit errors per > subpage > [ 244.887247] mtd_nandbiterrs: Inserted biterror @ 0/2 > [ 244.893499] mtd_nandbiterrs: rewrite page > [ 244.898766] mtd_nandbiterrs: read_page > [ 244.903071] mtd_nandbiterrs: verify_page > [ 244.907369] mtd_nandbiterrs: Successfully corrected 2 bit errors per > subpage > [ 244.914463] mtd_nandbiterrs: Inserted biterror @ 0/0 > [ 244.920701] mtd_nandbiterrs: rewrite page > [ 244.926109] mtd_nandbiterrs: read_page > [ 244.930343] mtd_nandbiterrs: verify_page > [ 244.934672] mtd_nandbiterrs: Successfully corrected 3 bit errors per > subpage > [ 244.941752] mtd_nandbiterrs: Inserted biterror @
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Wed, Oct 08, 2014 at 05:10:34PM +0200, Boris Brezillon wrote: > On Wed, 8 Oct 2014 22:24:40 +0800 > Huang Shijie wrote: > > > On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: > > > Hello Huang, Brian, > > > > > > This is just a new proposal to support raw accesses in a more standard way > > > in the GPMI driver. > > > This series has been tested on an imx28 board. > > > > > > Any suggestions are welcome. > > > > > > Best Regards, > > > > > > Boris > > > > > > Changes since v2: > > > - fixed a bug in gpmi_move_bits > > > - add a raw_buffer field to be used when using raw access methods > > >(experienced memory corruptions when directly using page_buffer_virt > > >buffer) > > > - add raw OOB access functions > > > > I tested this patch set today with the imx6dl-sabreauto board. > > > > NAND: Micron MT29F64G08CBABAWP > > 8192MiB, MLC, page size: 8192, OOB size: 744 > > > > ECC: 40bit > > > > The result: > > > > [ 3672.779009] == > > [ 3672.784974] mtd_nandbiterrs: MTD device: 0 > > [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, > > eraseblock=2097152, page=8192, oob=744 > > [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > > [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 > > [ 3672.812497] mtd_nandbiterrs: incremental biterrors test > > [ 3672.818688] mtd_nandbiterrs: write_page > > [ 3672.825529] mtd_nandbiterrs: rewrite page > > [ 3672.837290] mtd_nandbiterrs: read_page > > [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 > > [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read > > reported error -74 > > [ 3672.862932] mtd_nandbiterrs: finished successfully. > > [ 3672.867837] == > > > > [ 3745.282368] == > > [ 3745.288227] mtd_nandbiterrs: MTD device: 0 > > [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, > > eraseblock=2097152, page=8192, oob=744 > > [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > > [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 > > [ 3745.316778] mtd_nandbiterrs: incremental biterrors test > > [ 3745.323017] mtd_nandbiterrs: write_page > > [ 3745.328616] mtd_nandbiterrs: rewrite page > > [ 3745.334191] mtd_nandbiterrs: read_page > > [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 > > [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read > > reported error -74 > > [ 3745.361281] mtd_nandbiterrs: finished successfully. > > [ 3745.366173] == > > > > > > Is this okay? > > No, it doesn't seem to be correct. > But it's an MLC flash, so you'll most probably need to apply this patch > to nandbiterrs testsuite: > > http://code.bulix.org/f69wuu-87021 > > This patch is flashing the block between each bitflip insertion to > avoid multiple write without erasure (which, AFAIK, is not supported > by MLC flashes). After I applied this patch. It seems ok now. The test result: [ 244.789900] == [ 244.795826] mtd_nandbiterrs: MTD device: 1 [ 244.799974] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 244.808563] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 244.814697] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 244.822622] mtd_nandbiterrs: incremental biterrors test [ 244.828146] mtd_nandbiterrs: write_page [ 244.833341] mtd_nandbiterrs: fill page [ 244.838831] mtd_nandbiterrs: rewrite page [ 244.844353] mtd_nandbiterrs: read_page [ 244.848585] mtd_nandbiterrs: verify_page [ 244.852915] mtd_nandbiterrs: Successfully corrected 0 bit errors per subpage [ 244.859973] mtd_nandbiterrs: Inserted biterror @ 0/5 [ 244.866316] mtd_nandbiterrs: rewrite page [ 244.871629] mtd_nandbiterrs: read_page [ 244.875864] mtd_nandbiterrs: verify_page [ 244.880161] mtd_nandbiterrs: Successfully corrected 1 bit errors per subpage [ 244.887247] mtd_nandbiterrs: Inserted biterror @ 0/2 [ 244.893499] mtd_nandbiterrs: rewrite page [ 244.898766] mtd_nandbiterrs: read_page [ 244.903071] mtd_nandbiterrs: verify_page [ 244.907369] mtd_nandbiterrs: Successfully corrected 2 bit errors per subpage [ 244.914463] mtd_nandbiterrs: Inserted biterror @ 0/0 [ 244.920701] mtd_nandbiterrs: rewrite page [ 244.926109] mtd_nandbiterrs: read_page [ 244.930343] mtd_nandbiterrs: verify_page [ 244.934672] mtd_nandbiterrs: Successfully corrected 3 bit errors per subpage [ 244.941752] mtd_nandbiterrs: Inserted biterror @ 1/7 [ 244.947988] mtd_nandbiterrs: rewrite page [ 244.953408] mtd_nandbiterrs: read_page [ 244.957641] mtd_nandbiterrs: verify_page [ 244.961970] mtd_nandbiterrs: Successfully corrected 4 bit errors per subpage [ 244.969029] mtd_nandbiterrs: Inserted biterror @ 1/5 [ 244.975357]
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Wed, Oct 08, 2014 at 05:10:34PM +0200, Boris Brezillon wrote: On Wed, 8 Oct 2014 22:24:40 +0800 Huang Shijie shij...@gmail.com wrote: On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Best Regards, Boris Changes since v2: - fixed a bug in gpmi_move_bits - add a raw_buffer field to be used when using raw access methods (experienced memory corruptions when directly using page_buffer_virt buffer) - add raw OOB access functions I tested this patch set today with the imx6dl-sabreauto board. NAND: Micron MT29F64G08CBABAWP 8192MiB, MLC, page size: 8192, OOB size: 744 ECC: 40bit The result: [ 3672.779009] == [ 3672.784974] mtd_nandbiterrs: MTD device: 0 [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 3672.812497] mtd_nandbiterrs: incremental biterrors test [ 3672.818688] mtd_nandbiterrs: write_page [ 3672.825529] mtd_nandbiterrs: rewrite page [ 3672.837290] mtd_nandbiterrs: read_page [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3672.862932] mtd_nandbiterrs: finished successfully. [ 3672.867837] == [ 3745.282368] == [ 3745.288227] mtd_nandbiterrs: MTD device: 0 [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 [ 3745.316778] mtd_nandbiterrs: incremental biterrors test [ 3745.323017] mtd_nandbiterrs: write_page [ 3745.328616] mtd_nandbiterrs: rewrite page [ 3745.334191] mtd_nandbiterrs: read_page [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3745.361281] mtd_nandbiterrs: finished successfully. [ 3745.366173] == Is this okay? No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). After I applied this patch. It seems ok now. The test result: [ 244.789900] == [ 244.795826] mtd_nandbiterrs: MTD device: 1 [ 244.799974] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 244.808563] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 244.814697] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 244.822622] mtd_nandbiterrs: incremental biterrors test [ 244.828146] mtd_nandbiterrs: write_page [ 244.833341] mtd_nandbiterrs: fill page [ 244.838831] mtd_nandbiterrs: rewrite page [ 244.844353] mtd_nandbiterrs: read_page [ 244.848585] mtd_nandbiterrs: verify_page [ 244.852915] mtd_nandbiterrs: Successfully corrected 0 bit errors per subpage [ 244.859973] mtd_nandbiterrs: Inserted biterror @ 0/5 [ 244.866316] mtd_nandbiterrs: rewrite page [ 244.871629] mtd_nandbiterrs: read_page [ 244.875864] mtd_nandbiterrs: verify_page [ 244.880161] mtd_nandbiterrs: Successfully corrected 1 bit errors per subpage [ 244.887247] mtd_nandbiterrs: Inserted biterror @ 0/2 [ 244.893499] mtd_nandbiterrs: rewrite page [ 244.898766] mtd_nandbiterrs: read_page [ 244.903071] mtd_nandbiterrs: verify_page [ 244.907369] mtd_nandbiterrs: Successfully corrected 2 bit errors per subpage [ 244.914463] mtd_nandbiterrs: Inserted biterror @ 0/0 [ 244.920701] mtd_nandbiterrs: rewrite page [ 244.926109] mtd_nandbiterrs: read_page [ 244.930343] mtd_nandbiterrs: verify_page [ 244.934672] mtd_nandbiterrs: Successfully corrected 3 bit errors per subpage [ 244.941752] mtd_nandbiterrs: Inserted biterror @ 1/7 [ 244.947988] mtd_nandbiterrs: rewrite page [ 244.953408] mtd_nandbiterrs: read_page [ 244.957641] mtd_nandbiterrs: verify_page [ 244.961970] mtd_nandbiterrs: Successfully corrected 4 bit errors per subpage [ 244.969029] mtd_nandbiterrs: Inserted biterror @ 1/5 [ 244.975357] mtd_nandbiterrs: rewrite page [ 244.980627] mtd_nandbiterrs: read_page [ 244.984931] mtd_nandbiterrs: verify_page [ 244.989229] mtd_nandbiterrs:
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Fri, 10 Oct 2014 22:42:51 +0800 Huang Shijie shij...@gmail.com wrote: On Wed, Oct 08, 2014 at 05:10:34PM +0200, Boris Brezillon wrote: On Wed, 8 Oct 2014 22:24:40 +0800 Huang Shijie shij...@gmail.com wrote: On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Best Regards, Boris Changes since v2: - fixed a bug in gpmi_move_bits - add a raw_buffer field to be used when using raw access methods (experienced memory corruptions when directly using page_buffer_virt buffer) - add raw OOB access functions I tested this patch set today with the imx6dl-sabreauto board. NAND: Micron MT29F64G08CBABAWP 8192MiB, MLC, page size: 8192, OOB size: 744 ECC: 40bit The result: [ 3672.779009] == [ 3672.784974] mtd_nandbiterrs: MTD device: 0 [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 3672.812497] mtd_nandbiterrs: incremental biterrors test [ 3672.818688] mtd_nandbiterrs: write_page [ 3672.825529] mtd_nandbiterrs: rewrite page [ 3672.837290] mtd_nandbiterrs: read_page [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3672.862932] mtd_nandbiterrs: finished successfully. [ 3672.867837] == [ 3745.282368] == [ 3745.288227] mtd_nandbiterrs: MTD device: 0 [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 [ 3745.316778] mtd_nandbiterrs: incremental biterrors test [ 3745.323017] mtd_nandbiterrs: write_page [ 3745.328616] mtd_nandbiterrs: rewrite page [ 3745.334191] mtd_nandbiterrs: read_page [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3745.361281] mtd_nandbiterrs: finished successfully. [ 3745.366173] == Is this okay? No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). After I applied this patch. It seems ok now. The test result: [ 244.789900] == [ 244.795826] mtd_nandbiterrs: MTD device: 1 [ 244.799974] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 244.808563] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 244.814697] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 244.822622] mtd_nandbiterrs: incremental biterrors test [ 244.828146] mtd_nandbiterrs: write_page [ 244.833341] mtd_nandbiterrs: fill page [ 244.838831] mtd_nandbiterrs: rewrite page [ 244.844353] mtd_nandbiterrs: read_page [ 244.848585] mtd_nandbiterrs: verify_page [ 244.852915] mtd_nandbiterrs: Successfully corrected 0 bit errors per subpage [ 244.859973] mtd_nandbiterrs: Inserted biterror @ 0/5 [ 244.866316] mtd_nandbiterrs: rewrite page [ 244.871629] mtd_nandbiterrs: read_page [ 244.875864] mtd_nandbiterrs: verify_page [ 244.880161] mtd_nandbiterrs: Successfully corrected 1 bit errors per subpage [ 244.887247] mtd_nandbiterrs: Inserted biterror @ 0/2 [ 244.893499] mtd_nandbiterrs: rewrite page [ 244.898766] mtd_nandbiterrs: read_page [ 244.903071] mtd_nandbiterrs: verify_page [ 244.907369] mtd_nandbiterrs: Successfully corrected 2 bit errors per subpage [ 244.914463] mtd_nandbiterrs: Inserted biterror @ 0/0 [ 244.920701] mtd_nandbiterrs: rewrite page [ 244.926109] mtd_nandbiterrs: read_page [ 244.930343] mtd_nandbiterrs: verify_page [ 244.934672] mtd_nandbiterrs: Successfully corrected 3 bit errors per subpage [ 244.941752] mtd_nandbiterrs: Inserted biterror @ 1/7 [ 244.947988] mtd_nandbiterrs: rewrite page [ 244.953408] mtd_nandbiterrs: read_page [ 244.957641] mtd_nandbiterrs: verify_page [ 244.961970] mtd_nandbiterrs: Successfully corrected 4 bit errors per subpage [ 244.969029]
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Wed, 8 Oct 2014 22:24:40 +0800 Huang Shijie wrote: > On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: > > Hello Huang, Brian, > > > > This is just a new proposal to support raw accesses in a more standard way > > in the GPMI driver. > > This series has been tested on an imx28 board. > > > > Any suggestions are welcome. > > > > Best Regards, > > > > Boris > > > > Changes since v2: > > - fixed a bug in gpmi_move_bits > > - add a raw_buffer field to be used when using raw access methods > >(experienced memory corruptions when directly using page_buffer_virt > >buffer) > > - add raw OOB access functions > > I tested this patch set today with the imx6dl-sabreauto board. > > NAND: Micron MT29F64G08CBABAWP > 8192MiB, MLC, page size: 8192, OOB size: 744 > > ECC: 40bit > > The result: > > [ 3672.779009] == > [ 3672.784974] mtd_nandbiterrs: MTD device: 0 > [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, > page=8192, oob=744 > [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 > [ 3672.812497] mtd_nandbiterrs: incremental biterrors test > [ 3672.818688] mtd_nandbiterrs: write_page > [ 3672.825529] mtd_nandbiterrs: rewrite page > [ 3672.837290] mtd_nandbiterrs: read_page > [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 > [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported > error -74 > [ 3672.862932] mtd_nandbiterrs: finished successfully. > [ 3672.867837] == > > [ 3745.282368] == > [ 3745.288227] mtd_nandbiterrs: MTD device: 0 > [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, > page=8192, oob=744 > [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes > [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 > [ 3745.316778] mtd_nandbiterrs: incremental biterrors test > [ 3745.323017] mtd_nandbiterrs: write_page > [ 3745.328616] mtd_nandbiterrs: rewrite page > [ 3745.334191] mtd_nandbiterrs: read_page > [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 > [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported > error -74 > [ 3745.361281] mtd_nandbiterrs: finished successfully. > [ 3745.366173] == > > > Is this okay? No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Can you also try to write zeros to a NAND page and then dump it in raw mode (and provide me with the resulted /tmp/dump file or an hexdump output of this file) ? flash_erase /dev/mtdX 0 1 dd if=/dev/zero of=/tmp/zero bs=8k count=1 nandwrite /dev/mtdX /tmp/zero nanddump -n -o -l 8192 -f /tmp/dump /dev/mtdX Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: > Hello Huang, Brian, > > This is just a new proposal to support raw accesses in a more standard way > in the GPMI driver. > This series has been tested on an imx28 board. > > Any suggestions are welcome. > > Best Regards, > > Boris > > Changes since v2: > - fixed a bug in gpmi_move_bits > - add a raw_buffer field to be used when using raw access methods >(experienced memory corruptions when directly using page_buffer_virt >buffer) > - add raw OOB access functions I tested this patch set today with the imx6dl-sabreauto board. NAND: Micron MT29F64G08CBABAWP 8192MiB, MLC, page size: 8192, OOB size: 744 ECC: 40bit The result: [ 3672.779009] == [ 3672.784974] mtd_nandbiterrs: MTD device: 0 [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 3672.812497] mtd_nandbiterrs: incremental biterrors test [ 3672.818688] mtd_nandbiterrs: write_page [ 3672.825529] mtd_nandbiterrs: rewrite page [ 3672.837290] mtd_nandbiterrs: read_page [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3672.862932] mtd_nandbiterrs: finished successfully. [ 3672.867837] == [ 3745.282368] == [ 3745.288227] mtd_nandbiterrs: MTD device: 0 [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 [ 3745.316778] mtd_nandbiterrs: incremental biterrors test [ 3745.323017] mtd_nandbiterrs: write_page [ 3745.328616] mtd_nandbiterrs: rewrite page [ 3745.334191] mtd_nandbiterrs: read_page [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3745.361281] mtd_nandbiterrs: finished successfully. [ 3745.366173] == Is this okay? thanks Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Best Regards, Boris Changes since v2: - fixed a bug in gpmi_move_bits - add a raw_buffer field to be used when using raw access methods (experienced memory corruptions when directly using page_buffer_virt buffer) - add raw OOB access functions I tested this patch set today with the imx6dl-sabreauto board. NAND: Micron MT29F64G08CBABAWP 8192MiB, MLC, page size: 8192, OOB size: 744 ECC: 40bit The result: [ 3672.779009] == [ 3672.784974] mtd_nandbiterrs: MTD device: 0 [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 3672.812497] mtd_nandbiterrs: incremental biterrors test [ 3672.818688] mtd_nandbiterrs: write_page [ 3672.825529] mtd_nandbiterrs: rewrite page [ 3672.837290] mtd_nandbiterrs: read_page [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3672.862932] mtd_nandbiterrs: finished successfully. [ 3672.867837] == [ 3745.282368] == [ 3745.288227] mtd_nandbiterrs: MTD device: 0 [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 [ 3745.316778] mtd_nandbiterrs: incremental biterrors test [ 3745.323017] mtd_nandbiterrs: write_page [ 3745.328616] mtd_nandbiterrs: rewrite page [ 3745.334191] mtd_nandbiterrs: read_page [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3745.361281] mtd_nandbiterrs: finished successfully. [ 3745.366173] == Is this okay? thanks Huang Shijie -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Wed, 8 Oct 2014 22:24:40 +0800 Huang Shijie shij...@gmail.com wrote: On Tue, Sep 23, 2014 at 04:07:33PM +0200, Boris BREZILLON wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Best Regards, Boris Changes since v2: - fixed a bug in gpmi_move_bits - add a raw_buffer field to be used when using raw access methods (experienced memory corruptions when directly using page_buffer_virt buffer) - add raw OOB access functions I tested this patch set today with the imx6dl-sabreauto board. NAND: Micron MT29F64G08CBABAWP 8192MiB, MLC, page size: 8192, OOB size: 744 ECC: 40bit The result: [ 3672.779009] == [ 3672.784974] mtd_nandbiterrs: MTD device: 0 [ 3672.789480] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3672.798169] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3672.804554] mtd_nandbiterrs: Using page=0, offset=0, eraseblock=0 [ 3672.812497] mtd_nandbiterrs: incremental biterrors test [ 3672.818688] mtd_nandbiterrs: write_page [ 3672.825529] mtd_nandbiterrs: rewrite page [ 3672.837290] mtd_nandbiterrs: read_page [ 3672.848407] mtd_nandbiterrs: error: read failed at 0x0 [ 3672.853644] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3672.862932] mtd_nandbiterrs: finished successfully. [ 3672.867837] == [ 3745.282368] == [ 3745.288227] mtd_nandbiterrs: MTD device: 0 [ 3745.292913] mtd_nandbiterrs: MTD device size 16777216, eraseblock=2097152, page=8192, oob=744 [ 3745.301897] mtd_nandbiterrs: Device uses 1 subpages of 8192 bytes [ 3745.308023] mtd_nandbiterrs: Using page=1, offset=8192, eraseblock=0 [ 3745.316778] mtd_nandbiterrs: incremental biterrors test [ 3745.323017] mtd_nandbiterrs: write_page [ 3745.328616] mtd_nandbiterrs: rewrite page [ 3745.334191] mtd_nandbiterrs: read_page [ 3745.346878] mtd_nandbiterrs: error: read failed at 0x2000 [ 3745.352352] mtd_nandbiterrs: After 0 biterrors per subpage, read reported error -74 [ 3745.361281] mtd_nandbiterrs: finished successfully. [ 3745.366173] == Is this okay? No, it doesn't seem to be correct. But it's an MLC flash, so you'll most probably need to apply this patch to nandbiterrs testsuite: http://code.bulix.org/f69wuu-87021 This patch is flashing the block between each bitflip insertion to avoid multiple write without erasure (which, AFAIK, is not supported by MLC flashes). Can you also try to write zeros to a NAND page and then dump it in raw mode (and provide me with the resulted /tmp/dump file or an hexdump output of this file) ? flash_erase /dev/mtdX 0 1 dd if=/dev/zero of=/tmp/zero bs=8k count=1 nandwrite /dev/mtdX /tmp/zero nanddump -n -o -l 8192 -f /tmp/dump /dev/mtdX Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Sep 30, 2014 at 10:07:20AM +0200, Boris Brezillon wrote: > Hi, > > On Tue, 23 Sep 2014 16:07:33 +0200 > Boris BREZILLON wrote: > > > Hello Huang, Brian, > > > > This is just a new proposal to support raw accesses in a more standard way > > in the GPMI driver. > > This series has been tested on an imx28 board. > > > > Any suggestions are welcome. > > Brian, any chance you could take a look at this series and give your > opinion and/or suggest a new approach ? > > Huang, did you have time to think about a better way to implement these > raw access functions ? > sorry for the later reply. I was busy recently. You can send out the new version. Please do not forget add a patch to add more comments for these hooks. I will test your patch(or your new patch set) on Oct 7 and Oct 8. thanks Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
On Tue, Sep 30, 2014 at 10:07:20AM +0200, Boris Brezillon wrote: Hi, On Tue, 23 Sep 2014 16:07:33 +0200 Boris BREZILLON boris.brezil...@free-electrons.com wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Brian, any chance you could take a look at this series and give your opinion and/or suggest a new approach ? Huang, did you have time to think about a better way to implement these raw access functions ? sorry for the later reply. I was busy recently. You can send out the new version. Please do not forget add a patch to add more comments for these hooks. I will test your patch(or your new patch set) on Oct 7 and Oct 8. thanks Huang Shijie -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
Hi, On Tue, 23 Sep 2014 16:07:33 +0200 Boris BREZILLON wrote: > Hello Huang, Brian, > > This is just a new proposal to support raw accesses in a more standard way > in the GPMI driver. > This series has been tested on an imx28 board. > > Any suggestions are welcome. Brian, any chance you could take a look at this series and give your opinion and/or suggest a new approach ? Huang, did you have time to think about a better way to implement these raw access functions ? Best Regards, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 0/3] mtd: nand: gpmi: add proper raw access support
Hi, On Tue, 23 Sep 2014 16:07:33 +0200 Boris BREZILLON boris.brezil...@free-electrons.com wrote: Hello Huang, Brian, This is just a new proposal to support raw accesses in a more standard way in the GPMI driver. This series has been tested on an imx28 board. Any suggestions are welcome. Brian, any chance you could take a look at this series and give your opinion and/or suggest a new approach ? Huang, did you have time to think about a better way to implement these raw access functions ? Best Regards, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
