Re: [9/9] ARM: dts: Add device tree node for exynos5440 TMU controller
Amit,
Copying Grant for DT.
On 26-03-2013 07:34, Amit Daniel Kachhap wrote:
This patch adds device node for TMU controller. There are 3
instances of the controllers so 3 nodes are created.
Signed-off-by: Amit Daniel Kachhap
---
arch/arm/boot/dts/exynos5440.dtsi | 43 +
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562a..b74ce9f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
interrupt-parent = <>;
+ aliases {
+ tmuctrl0 = _0;
+ tmuctrl1 = _1;
+ tmuctrl2 = _2;
+ };
+
gic:interrupt-controller@2E {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
@@ -156,4 +162,41 @@
reg = <0x13 0x1000>;
interrupts = <0 17 0>, <0 16 0>;
};
+
+ tmu_ctrl_info: tmu-ctrl-info {
+ gain = <5>;
+ reference-voltage = <16>;
+ noise-cancel-mode = <4>;
+ cal-type = <2>;
+ cal-mode = <0>;
+ efuse-value = <0x5b2c>;
+ threshold-falling = <5>;
+ };
+
+ tmuctrl_0: tmuctrl@160118 {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x160118 0x300>;
+ interrupts = <0 58 0>;
+ clocks = < 8>;
+ clock-names = "tmu_apbif";
+ tmu-ctrl-data = <_ctrl_info>;
+ };
+
+ tmuctrl_1: tmuctrl@16011C {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x16011C 0x300>;
+ interrupts = <0 58 0>;
+ clocks = < 8>;
+ clock-names = "tmu_apbif";
+ tmu-ctrl-data = <_ctrl_info>;
+ };
+
+ tmuctrl_2: tmuctrl@160120 {
+ compatible = "samsung,exynos5440-tmu";
+ reg = <0x160120 0x300>;
+ interrupts = <0 58 0>;
+ clocks = < 8>;
+ clock-names = "tmu_apbif";
+ tmu-ctrl-data = <_ctrl_info>;
+ };
Grant, how the above thermal data must be handled in DT? Is it fine to
create private phandles like that?
};
Please consider the comments on patch 8.
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Re: [9/9] ARM: dts: Add device tree node for exynos5440 TMU controller
Amit,
Copying Grant for DT.
On 26-03-2013 07:34, Amit Daniel Kachhap wrote:
This patch adds device node for TMU controller. There are 3
instances of the controllers so 3 nodes are created.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
arch/arm/boot/dts/exynos5440.dtsi | 43 +
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562a..b74ce9f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -16,6 +16,12 @@
interrupt-parent = gic;
+ aliases {
+ tmuctrl0 = tmuctrl_0;
+ tmuctrl1 = tmuctrl_1;
+ tmuctrl2 = tmuctrl_2;
+ };
+
gic:interrupt-controller@2E {
compatible = arm,cortex-a15-gic;
#interrupt-cells = 3;
@@ -156,4 +162,41 @@
reg = 0x13 0x1000;
interrupts = 0 17 0, 0 16 0;
};
+
+ tmu_ctrl_info: tmu-ctrl-info {
+ gain = 5;
+ reference-voltage = 16;
+ noise-cancel-mode = 4;
+ cal-type = 2;
+ cal-mode = 0;
+ efuse-value = 0x5b2c;
+ threshold-falling = 5;
+ };
+
+ tmuctrl_0: tmuctrl@160118 {
+ compatible = samsung,exynos5440-tmu;
+ reg = 0x160118 0x300;
+ interrupts = 0 58 0;
+ clocks = clock 8;
+ clock-names = tmu_apbif;
+ tmu-ctrl-data = tmu_ctrl_info;
+ };
+
+ tmuctrl_1: tmuctrl@16011C {
+ compatible = samsung,exynos5440-tmu;
+ reg = 0x16011C 0x300;
+ interrupts = 0 58 0;
+ clocks = clock 8;
+ clock-names = tmu_apbif;
+ tmu-ctrl-data = tmu_ctrl_info;
+ };
+
+ tmuctrl_2: tmuctrl@160120 {
+ compatible = samsung,exynos5440-tmu;
+ reg = 0x160120 0x300;
+ interrupts = 0 58 0;
+ clocks = clock 8;
+ clock-names = tmu_apbif;
+ tmu-ctrl-data = tmu_ctrl_info;
+ };
Grant, how the above thermal data must be handled in DT? Is it fine to
create private phandles like that?
};
Please consider the comments on patch 8.
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
