Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2016-01-04 Thread xuejiancheng
Hi Rob,
   Happy new year to you! Thank you for your patience.

On 2016/1/1 6:26, Rob Herring wrote:
> On Wed, Dec 30, 2015 at 10:26:11AM +0800, Jiancheng Xue wrote:
>> add hisilicon spi-nor flash controller driver
>>
>> Signed-off-by: Binquan Peng 
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  .../devicetree/bindings/spi/spi-hisi-sfc.txt   |  24 +
>>  drivers/mtd/spi-nor/Kconfig|   7 +
>>  drivers/mtd/spi-nor/Makefile   |   1 +
>>  drivers/mtd/spi-nor/hisi-sfc.c | 505 
>> +
>>  4 files changed, 537 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>>  create mode 100644 drivers/mtd/spi-nor/hisi-sfc.c
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt 
>> b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> new file mode 100644
>> index 000..170885a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> @@ -0,0 +1,24 @@
>> +HiSilicon SPI-NOR Flash Controller
>> +
>> +Required properties:
>> +- compatible : Should be "hisilicon,hisi-sfc".
>> +- address-cells: number of cells required to define a chip select
>> +address on the SPI bus. Should be set to 1. See spi-bus.txt.
>> +- size-cells:Should be 0.
> 
> How about some consistency in the spacing around the ':'.

OK. I'll correct it in next version. Thank you.

> 
>> +- reg : Offset and length of the register set for the controller device.
>> +- reg-names: Must include the following two entries:"control","memory".
>^ ^
> Spaces needed.

OK

> 
>> +- clocks: handle to spi-nor flash controller clock.
>> +
>> +Example:
>> +spi-nor-controller@1400 {
>> +compatible = "hisilicon,hisi-sfc";
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +reg = <0x1000 0x1000>, <0x1400 0x100>;
>> +reg-names = "control", "memory";
>> +clocks = < HI3519_FMC_CLK>;
>> +spi-nor@0 {
>> +compatible = "jedec,spi-nor";
>> +reg = <0>;
>> +};
>> +};
>> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
>> index 2fe2a7e..7fe1564 100644
>> --- a/drivers/mtd/spi-nor/Kconfig
>> +++ b/drivers/mtd/spi-nor/Kconfig
>> @@ -30,6 +30,12 @@ config SPI_FSL_QUADSPI
>>This controller does not support generic SPI. It only supports
>>SPI NOR.
>>  
>> +config SPI_HISI_SFC
>> +tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
>> +depends on ARCH_HISI
>> +help
>> +  This enables support for hisilicon SPI-NOR flash controller.
>> +
>>  config SPI_NXP_SPIFI
>>  tristate "NXP SPI Flash Interface (SPIFI)"
>>  depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
>> @@ -41,4 +47,5 @@ config SPI_NXP_SPIFI
>>Flash. Enable this option if you have a device with a SPIFI
>>controller and want to access the Flash as a mtd device.
>>  
>> +
> 
> Drop this spurious change.

OK. Thank you. I'll pay more attention to this later.

> 
>>  endif # MTD_SPI_NOR
>> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
>> index e5e..8cea3c5 100644
>> --- a/drivers/mtd/spi-nor/Makefile
>> +++ b/drivers/mtd/spi-nor/Makefile
>> @@ -1,3 +1,4 @@
>>  obj-$(CONFIG_MTD_SPI_NOR)   += spi-nor.o
>>  obj-$(CONFIG_SPI_FSL_QUADSPI)   += fsl-quadspi.o
>> +obj-$(CONFIG_SPI_HISI_SFC)  += hisi-sfc.o
>>  obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
>> diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
>> new file mode 100644
>> index 000..fd9649a
>> --- /dev/null
>> +++ b/drivers/mtd/spi-nor/hisi-sfc.c
>> @@ -0,0 +1,505 @@
>> +/* HiSilicon SPI Nor Flash Controller Driver
>> + *
>> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see .
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
> 
> Some say to alphabetize includes. I don't care so much, but at least 
> group subdirectories.

Sorry about that. I'll reorder them.

> 
> Rob
> 
> .
> 

Jiancheng

.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please 

Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2016-01-04 Thread xuejiancheng
Hi Rob,
   Happy new year to you! Thank you for your patience.

On 2016/1/1 6:26, Rob Herring wrote:
> On Wed, Dec 30, 2015 at 10:26:11AM +0800, Jiancheng Xue wrote:
>> add hisilicon spi-nor flash controller driver
>>
>> Signed-off-by: Binquan Peng 
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  .../devicetree/bindings/spi/spi-hisi-sfc.txt   |  24 +
>>  drivers/mtd/spi-nor/Kconfig|   7 +
>>  drivers/mtd/spi-nor/Makefile   |   1 +
>>  drivers/mtd/spi-nor/hisi-sfc.c | 505 
>> +
>>  4 files changed, 537 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>>  create mode 100644 drivers/mtd/spi-nor/hisi-sfc.c
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt 
>> b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> new file mode 100644
>> index 000..170885a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> @@ -0,0 +1,24 @@
>> +HiSilicon SPI-NOR Flash Controller
>> +
>> +Required properties:
>> +- compatible : Should be "hisilicon,hisi-sfc".
>> +- address-cells: number of cells required to define a chip select
>> +address on the SPI bus. Should be set to 1. See spi-bus.txt.
>> +- size-cells:Should be 0.
> 
> How about some consistency in the spacing around the ':'.

OK. I'll correct it in next version. Thank you.

> 
>> +- reg : Offset and length of the register set for the controller device.
>> +- reg-names: Must include the following two entries:"control","memory".
>^ ^
> Spaces needed.

OK

> 
>> +- clocks: handle to spi-nor flash controller clock.
>> +
>> +Example:
>> +spi-nor-controller@1400 {
>> +compatible = "hisilicon,hisi-sfc";
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +reg = <0x1000 0x1000>, <0x1400 0x100>;
>> +reg-names = "control", "memory";
>> +clocks = < HI3519_FMC_CLK>;
>> +spi-nor@0 {
>> +compatible = "jedec,spi-nor";
>> +reg = <0>;
>> +};
>> +};
>> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
>> index 2fe2a7e..7fe1564 100644
>> --- a/drivers/mtd/spi-nor/Kconfig
>> +++ b/drivers/mtd/spi-nor/Kconfig
>> @@ -30,6 +30,12 @@ config SPI_FSL_QUADSPI
>>This controller does not support generic SPI. It only supports
>>SPI NOR.
>>  
>> +config SPI_HISI_SFC
>> +tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
>> +depends on ARCH_HISI
>> +help
>> +  This enables support for hisilicon SPI-NOR flash controller.
>> +
>>  config SPI_NXP_SPIFI
>>  tristate "NXP SPI Flash Interface (SPIFI)"
>>  depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
>> @@ -41,4 +47,5 @@ config SPI_NXP_SPIFI
>>Flash. Enable this option if you have a device with a SPIFI
>>controller and want to access the Flash as a mtd device.
>>  
>> +
> 
> Drop this spurious change.

OK. Thank you. I'll pay more attention to this later.

> 
>>  endif # MTD_SPI_NOR
>> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
>> index e5e..8cea3c5 100644
>> --- a/drivers/mtd/spi-nor/Makefile
>> +++ b/drivers/mtd/spi-nor/Makefile
>> @@ -1,3 +1,4 @@
>>  obj-$(CONFIG_MTD_SPI_NOR)   += spi-nor.o
>>  obj-$(CONFIG_SPI_FSL_QUADSPI)   += fsl-quadspi.o
>> +obj-$(CONFIG_SPI_HISI_SFC)  += hisi-sfc.o
>>  obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
>> diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
>> new file mode 100644
>> index 000..fd9649a
>> --- /dev/null
>> +++ b/drivers/mtd/spi-nor/hisi-sfc.c
>> @@ -0,0 +1,505 @@
>> +/* HiSilicon SPI Nor Flash Controller Driver
>> + *
>> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see .
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
> 
> Some say to alphabetize includes. I don't care so much, but at least 
> group subdirectories.

Sorry about that. I'll reorder them.

> 
> Rob
> 
> .
> 

Jiancheng

.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  

Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2015-12-31 Thread Rob Herring
On Wed, Dec 30, 2015 at 10:26:11AM +0800, Jiancheng Xue wrote:
> add hisilicon spi-nor flash controller driver
> 
> Signed-off-by: Binquan Peng 
> Signed-off-by: Jiancheng Xue 
> ---
>  .../devicetree/bindings/spi/spi-hisi-sfc.txt   |  24 +
>  drivers/mtd/spi-nor/Kconfig|   7 +
>  drivers/mtd/spi-nor/Makefile   |   1 +
>  drivers/mtd/spi-nor/hisi-sfc.c | 505 
> +
>  4 files changed, 537 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>  create mode 100644 drivers/mtd/spi-nor/hisi-sfc.c
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt 
> b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> new file mode 100644
> index 000..170885a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> @@ -0,0 +1,24 @@
> +HiSilicon SPI-NOR Flash Controller
> +
> +Required properties:
> +- compatible : Should be "hisilicon,hisi-sfc".
> +- address-cells: number of cells required to define a chip select
> +address on the SPI bus. Should be set to 1. See spi-bus.txt.
> +- size-cells:Should be 0.

How about some consistency in the spacing around the ':'.

> +- reg : Offset and length of the register set for the controller device.
> +- reg-names: Must include the following two entries:"control","memory".
   ^ ^
Spaces needed.

> +- clocks: handle to spi-nor flash controller clock.
> +
> +Example:
> +spi-nor-controller@1400 {
> + compatible = "hisilicon,hisi-sfc";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1000 0x1000>, <0x1400 0x100>;
> + reg-names = "control", "memory";
> + clocks = < HI3519_FMC_CLK>;
> + spi-nor@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + };
> +};
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 2fe2a7e..7fe1564 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -30,6 +30,12 @@ config SPI_FSL_QUADSPI
> This controller does not support generic SPI. It only supports
> SPI NOR.
>  
> +config SPI_HISI_SFC
> + tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
> + depends on ARCH_HISI
> + help
> +   This enables support for hisilicon SPI-NOR flash controller.
> +
>  config SPI_NXP_SPIFI
>   tristate "NXP SPI Flash Interface (SPIFI)"
>   depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
> @@ -41,4 +47,5 @@ config SPI_NXP_SPIFI
> Flash. Enable this option if you have a device with a SPIFI
> controller and want to access the Flash as a mtd device.
>  
> +

Drop this spurious change.

>  endif # MTD_SPI_NOR
> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index e5e..8cea3c5 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
>  obj-$(CONFIG_SPI_FSL_QUADSPI)+= fsl-quadspi.o
> +obj-$(CONFIG_SPI_HISI_SFC)   += hisi-sfc.o
>  obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
> diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
> new file mode 100644
> index 000..fd9649a
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/hisi-sfc.c
> @@ -0,0 +1,505 @@
> +/* HiSilicon SPI Nor Flash Controller Driver
> + *
> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see .
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Some say to alphabetize includes. I don't care so much, but at least 
group subdirectories.

Rob
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2015-12-31 Thread Rob Herring
On Wed, Dec 30, 2015 at 10:26:11AM +0800, Jiancheng Xue wrote:
> add hisilicon spi-nor flash controller driver
> 
> Signed-off-by: Binquan Peng 
> Signed-off-by: Jiancheng Xue 
> ---
>  .../devicetree/bindings/spi/spi-hisi-sfc.txt   |  24 +
>  drivers/mtd/spi-nor/Kconfig|   7 +
>  drivers/mtd/spi-nor/Makefile   |   1 +
>  drivers/mtd/spi-nor/hisi-sfc.c | 505 
> +
>  4 files changed, 537 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>  create mode 100644 drivers/mtd/spi-nor/hisi-sfc.c
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt 
> b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> new file mode 100644
> index 000..170885a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> @@ -0,0 +1,24 @@
> +HiSilicon SPI-NOR Flash Controller
> +
> +Required properties:
> +- compatible : Should be "hisilicon,hisi-sfc".
> +- address-cells: number of cells required to define a chip select
> +address on the SPI bus. Should be set to 1. See spi-bus.txt.
> +- size-cells:Should be 0.

How about some consistency in the spacing around the ':'.

> +- reg : Offset and length of the register set for the controller device.
> +- reg-names: Must include the following two entries:"control","memory".
   ^ ^
Spaces needed.

> +- clocks: handle to spi-nor flash controller clock.
> +
> +Example:
> +spi-nor-controller@1400 {
> + compatible = "hisilicon,hisi-sfc";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1000 0x1000>, <0x1400 0x100>;
> + reg-names = "control", "memory";
> + clocks = < HI3519_FMC_CLK>;
> + spi-nor@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + };
> +};
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 2fe2a7e..7fe1564 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -30,6 +30,12 @@ config SPI_FSL_QUADSPI
> This controller does not support generic SPI. It only supports
> SPI NOR.
>  
> +config SPI_HISI_SFC
> + tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
> + depends on ARCH_HISI
> + help
> +   This enables support for hisilicon SPI-NOR flash controller.
> +
>  config SPI_NXP_SPIFI
>   tristate "NXP SPI Flash Interface (SPIFI)"
>   depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
> @@ -41,4 +47,5 @@ config SPI_NXP_SPIFI
> Flash. Enable this option if you have a device with a SPIFI
> controller and want to access the Flash as a mtd device.
>  
> +

Drop this spurious change.

>  endif # MTD_SPI_NOR
> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index e5e..8cea3c5 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o
>  obj-$(CONFIG_SPI_FSL_QUADSPI)+= fsl-quadspi.o
> +obj-$(CONFIG_SPI_HISI_SFC)   += hisi-sfc.o
>  obj-$(CONFIG_SPI_NXP_SPIFI)  += nxp-spifi.o
> diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
> new file mode 100644
> index 000..fd9649a
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/hisi-sfc.c
> @@ -0,0 +1,505 @@
> +/* HiSilicon SPI Nor Flash Controller Driver
> + *
> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see .
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Some say to alphabetize includes. I don't care so much, but at least 
group subdirectories.

Rob
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2015-12-29 Thread kbuild test robot
Hi Jiancheng,

[auto build test WARNING on v4.4-rc7]
[cannot apply to next-20151223]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Jiancheng-Xue/mtd-spi-nor-add-hisilicon-spi-nor-flash-controller-driver/20151230-104117
config: arm64-allmodconfig (attached as .config)
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

All warnings (new ones prefixed by >>):

   drivers/mtd/spi-nor/hisi-sfc.c: In function 'hisi_spi_nor_send_cmd':
>> drivers/mtd/spi-nor/hisi-sfc.c:239:9: warning: cast from pointer to integer 
>> of different size [-Wpointer-to-int-cast]
  reg = (u32)buf;
^
   drivers/mtd/spi-nor/hisi-sfc.c: In function 'hisi_spi_nor_erase':
>> drivers/mtd/spi-nor/hisi-sfc.c:376:6: warning: cast to pointer from integer 
>> of different size [-Wint-to-pointer-cast]
 (u8 *)(u32)offs, 0);
 ^

vim +239 drivers/mtd/spi-nor/hisi-sfc.c

   233  hisi_spi_nor_cmd_prepare(host, cmd, buf, _cfg);
   234  
   235  reg = FMC_CMD_CMD1(cmd);
   236  writel(reg, host->regbase + FMC_CMD);
   237  
   238  if (op_cfg & FMC_OP_ADDR_EN) {
 > 239  reg = (u32)buf;
   240  writel(reg, host->regbase + FMC_ADDRL);
   241  }
   242  
   243  reg = OP_CFG_FM_CS(priv->chipselect);
   244  if (op_cfg & FMC_OP_ADDR_EN)
   245  reg |= OP_CFG_ADDR_NUM(nor->addr_width);
   246  writel(reg, host->regbase + FMC_OP_CFG);
   247  
   248  reg = FMC_DATA_NUM_CNT(len);
   249  writel(reg, host->regbase + FMC_DATA_NUM);
   250  
   251  writel(0xff, host->regbase + FMC_INT_CLR);
   252  reg = op_cfg | FMC_OP_REG_OP_START;
   253  writel(reg, host->regbase + FMC_OP);
   254  wait_op_finish(host);
   255  
   256  return 0;
   257  }
   258  
   259  static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 
*buf,
   260  int len)
   261  {
   262  struct hifmc_priv *priv = nor->priv;
   263  struct hifmc_host *host = priv->host;
   264  int ret;
   265  
   266  ret = hisi_spi_nor_send_cmd(nor, opcode, buf, len);
   267  if (ret)
   268  return ret;
   269  
   270  memcpy(buf, host->iobase, len);
   271  
   272  return ret;
   273  }
   274  
   275  static int hisi_spi_nor_write_reg(struct spi_nor *nor, u8 opcode,
   276  u8 *buf, int len)
   277  {
   278  struct hifmc_priv *priv = nor->priv;
   279  struct hifmc_host *host = priv->host;
   280  
   281  if (len)
   282  memcpy(host->iobase, buf, len);
   283  
   284  return hisi_spi_nor_send_cmd(nor, opcode, buf, len);
   285  }
   286  
   287  static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 
start_off,
   288  u32 dma_buf, u32 len, u8 op_type)
   289  {
   290  struct hifmc_priv *priv = nor->priv;
   291  struct hifmc_host *host = priv->host;
   292  u8 if_type = 0, dummy = 0;
   293  u8 w_cmd = 0, r_cmd = 0;
   294  u32 reg;
   295  
   296  writel(start_off, host->regbase + FMC_ADDRL);
   297  
   298  if (op_type == FMC_OP_READ) {
   299  if_type = get_if_type(nor->flash_read);
   300  dummy = nor->read_dummy >> 3;
   301  r_cmd = nor->read_opcode;
   302  } else
   303  w_cmd = nor->program_opcode;
   304  
   305  reg = OP_CFG_FM_CS(priv->chipselect)
   306  | OP_CFG_MEM_IF_TYPE(if_type)
   307  | OP_CFG_ADDR_NUM(nor->addr_width)
   308  | OP_CFG_DUMMY_NUM(dummy);
   309  writel(reg, host->regbase + FMC_OP_CFG);
   310  
   311  reg = FMC_DMA_LEN_SET(len);
   312  writel(reg, host->regbase + FMC_DMA_LEN);
   313  writel(dma_buf, host->regbase + FMC_DMA_SADDR_D0);
   314  
   315  reg = OP_CTRL_RD_OPCODE(r_cmd)
   316  | OP_CTRL_WR_OPCODE(w_cmd)
   317  | OP_CTRL_RW_OP(op_type)
   318  | OP_CTRL_DMA_OP_READY;
   319  writel(0xff, host->regbase + FMC_INT_CLR);
   320  writel(reg, host->regbase + FMC_OP_DMA);
   321  wait_op_finish(host);
   322  }
   323  
   324  static int hisi_spi_nor_read(struct spi_nor *nor, loff_t from, size_t 
len,
   325  size_t *retlen, u_char *read_buf)
   326  {
   327  struct hifmc_priv *priv = nor->priv;
   328  struct hifmc_host *host = priv->host;
   329  unsigned char *ptr = read_buf;
   330  int num;
   331  
   

Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

2015-12-29 Thread kbuild test robot
Hi Jiancheng,

[auto build test WARNING on v4.4-rc7]
[cannot apply to next-20151223]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Jiancheng-Xue/mtd-spi-nor-add-hisilicon-spi-nor-flash-controller-driver/20151230-104117
config: arm64-allmodconfig (attached as .config)
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64 

All warnings (new ones prefixed by >>):

   drivers/mtd/spi-nor/hisi-sfc.c: In function 'hisi_spi_nor_send_cmd':
>> drivers/mtd/spi-nor/hisi-sfc.c:239:9: warning: cast from pointer to integer 
>> of different size [-Wpointer-to-int-cast]
  reg = (u32)buf;
^
   drivers/mtd/spi-nor/hisi-sfc.c: In function 'hisi_spi_nor_erase':
>> drivers/mtd/spi-nor/hisi-sfc.c:376:6: warning: cast to pointer from integer 
>> of different size [-Wint-to-pointer-cast]
 (u8 *)(u32)offs, 0);
 ^

vim +239 drivers/mtd/spi-nor/hisi-sfc.c

   233  hisi_spi_nor_cmd_prepare(host, cmd, buf, _cfg);
   234  
   235  reg = FMC_CMD_CMD1(cmd);
   236  writel(reg, host->regbase + FMC_CMD);
   237  
   238  if (op_cfg & FMC_OP_ADDR_EN) {
 > 239  reg = (u32)buf;
   240  writel(reg, host->regbase + FMC_ADDRL);
   241  }
   242  
   243  reg = OP_CFG_FM_CS(priv->chipselect);
   244  if (op_cfg & FMC_OP_ADDR_EN)
   245  reg |= OP_CFG_ADDR_NUM(nor->addr_width);
   246  writel(reg, host->regbase + FMC_OP_CFG);
   247  
   248  reg = FMC_DATA_NUM_CNT(len);
   249  writel(reg, host->regbase + FMC_DATA_NUM);
   250  
   251  writel(0xff, host->regbase + FMC_INT_CLR);
   252  reg = op_cfg | FMC_OP_REG_OP_START;
   253  writel(reg, host->regbase + FMC_OP);
   254  wait_op_finish(host);
   255  
   256  return 0;
   257  }
   258  
   259  static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 
*buf,
   260  int len)
   261  {
   262  struct hifmc_priv *priv = nor->priv;
   263  struct hifmc_host *host = priv->host;
   264  int ret;
   265  
   266  ret = hisi_spi_nor_send_cmd(nor, opcode, buf, len);
   267  if (ret)
   268  return ret;
   269  
   270  memcpy(buf, host->iobase, len);
   271  
   272  return ret;
   273  }
   274  
   275  static int hisi_spi_nor_write_reg(struct spi_nor *nor, u8 opcode,
   276  u8 *buf, int len)
   277  {
   278  struct hifmc_priv *priv = nor->priv;
   279  struct hifmc_host *host = priv->host;
   280  
   281  if (len)
   282  memcpy(host->iobase, buf, len);
   283  
   284  return hisi_spi_nor_send_cmd(nor, opcode, buf, len);
   285  }
   286  
   287  static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 
start_off,
   288  u32 dma_buf, u32 len, u8 op_type)
   289  {
   290  struct hifmc_priv *priv = nor->priv;
   291  struct hifmc_host *host = priv->host;
   292  u8 if_type = 0, dummy = 0;
   293  u8 w_cmd = 0, r_cmd = 0;
   294  u32 reg;
   295  
   296  writel(start_off, host->regbase + FMC_ADDRL);
   297  
   298  if (op_type == FMC_OP_READ) {
   299  if_type = get_if_type(nor->flash_read);
   300  dummy = nor->read_dummy >> 3;
   301  r_cmd = nor->read_opcode;
   302  } else
   303  w_cmd = nor->program_opcode;
   304  
   305  reg = OP_CFG_FM_CS(priv->chipselect)
   306  | OP_CFG_MEM_IF_TYPE(if_type)
   307  | OP_CFG_ADDR_NUM(nor->addr_width)
   308  | OP_CFG_DUMMY_NUM(dummy);
   309  writel(reg, host->regbase + FMC_OP_CFG);
   310  
   311  reg = FMC_DMA_LEN_SET(len);
   312  writel(reg, host->regbase + FMC_DMA_LEN);
   313  writel(dma_buf, host->regbase + FMC_DMA_SADDR_D0);
   314  
   315  reg = OP_CTRL_RD_OPCODE(r_cmd)
   316  | OP_CTRL_WR_OPCODE(w_cmd)
   317  | OP_CTRL_RW_OP(op_type)
   318  | OP_CTRL_DMA_OP_READY;
   319  writel(0xff, host->regbase + FMC_INT_CLR);
   320  writel(reg, host->regbase + FMC_OP_DMA);
   321  wait_op_finish(host);
   322  }
   323  
   324  static int hisi_spi_nor_read(struct spi_nor *nor, loff_t from, size_t 
len,
   325  size_t *retlen, u_char *read_buf)
   326  {
   327  struct hifmc_priv *priv = nor->priv;
   328  struct hifmc_host *host = priv->host;
   329  unsigned char *ptr = read_buf;
   330  int num;
   331