Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Greg Kroah-Hartman 
On Mon, Sep 18, 2017 at 04:03:25PM +0100, Srinivas Kandagatla wrote:
> 
> 
> On 18/09/17 15:12, Greg Kroah-Hartman wrote:
> > On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org 
> > wrote:
> > > From: Oleksij Rempel 
> > > 
> > > This is a driver for Low Power General Purpose Register (LPGPR)
> > > available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> > > of this chip.
> > > 
> > > It is a 32-bit read/write register located in the low power domain.
> > > Since LPGPR is located in the battery-backed power domain, LPGPR can
> > > be used by any application for retaining data during an SoC power-down
> > > mode.
> > > 
> > > Signed-off-by: Oleksij Rempel 
> > > Signed-off-by: Srinivas Kandagatla 
> > > ---
> > >   drivers/nvmem/Kconfig  |  10 +++
> > >   drivers/nvmem/Makefile |   2 +
> > >   drivers/nvmem/snvs_lpgpr.c | 156 
> > > +
> > >   3 files changed, 168 insertions(+)
> > >   create mode 100644 drivers/nvmem/snvs_lpgpr.c
> > 
> > Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?
> > 
> Would appreciate if its possible to take it as a late one in next possible
> 4.14 rc.
> These patches were in the list of long time, I forgot to include this in the
> first set of nvmem patches!

I prefer not to add new stuff if at all possible after -rc1 is out.

thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Greg Kroah-Hartman 
On Mon, Sep 18, 2017 at 04:03:25PM +0100, Srinivas Kandagatla wrote:
> 
> 
> On 18/09/17 15:12, Greg Kroah-Hartman wrote:
> > On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org 
> > wrote:
> > > From: Oleksij Rempel 
> > > 
> > > This is a driver for Low Power General Purpose Register (LPGPR)
> > > available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> > > of this chip.
> > > 
> > > It is a 32-bit read/write register located in the low power domain.
> > > Since LPGPR is located in the battery-backed power domain, LPGPR can
> > > be used by any application for retaining data during an SoC power-down
> > > mode.
> > > 
> > > Signed-off-by: Oleksij Rempel 
> > > Signed-off-by: Srinivas Kandagatla 
> > > ---
> > >   drivers/nvmem/Kconfig  |  10 +++
> > >   drivers/nvmem/Makefile |   2 +
> > >   drivers/nvmem/snvs_lpgpr.c | 156 
> > > +
> > >   3 files changed, 168 insertions(+)
> > >   create mode 100644 drivers/nvmem/snvs_lpgpr.c
> > 
> > Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?
> > 
> Would appreciate if its possible to take it as a late one in next possible
> 4.14 rc.
> These patches were in the list of long time, I forgot to include this in the
> first set of nvmem patches!

I prefer not to add new stuff if at all possible after -rc1 is out.

thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Srinivas Kandagatla 



On 18/09/17 15:12, Greg Kroah-Hartman wrote:

On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:

From: Oleksij Rempel 

This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Signed-off-by: Srinivas Kandagatla 
---
  drivers/nvmem/Kconfig  |  10 +++
  drivers/nvmem/Makefile |   2 +
  drivers/nvmem/snvs_lpgpr.c | 156 +
  3 files changed, 168 insertions(+)
  create mode 100644 drivers/nvmem/snvs_lpgpr.c


Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

Would appreciate if its possible to take it as a late one in next 
possible 4.14 rc.
These patches were in the list of long time, I forgot to include this 
in the first set of nvmem patches!


thanks
Srini




thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Srinivas Kandagatla 



On 18/09/17 15:12, Greg Kroah-Hartman wrote:

On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:

From: Oleksij Rempel 

This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Signed-off-by: Srinivas Kandagatla 
---
  drivers/nvmem/Kconfig  |  10 +++
  drivers/nvmem/Makefile |   2 +
  drivers/nvmem/snvs_lpgpr.c | 156 +
  3 files changed, 168 insertions(+)
  create mode 100644 drivers/nvmem/snvs_lpgpr.c


Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

Would appreciate if its possible to take it as a late one in next 
possible 4.14 rc.
These patches were in the list of long time, I forgot to include this 
in the first set of nvmem patches!


thanks
Srini




thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Srinivas Kandagatla 



On 18/09/17 15:12, Greg Kroah-Hartman wrote:

On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:

From: Oleksij Rempel 

This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Signed-off-by: Srinivas Kandagatla 
---
  drivers/nvmem/Kconfig  |  10 +++
  drivers/nvmem/Makefile |   2 +
  drivers/nvmem/snvs_lpgpr.c | 156 +
  3 files changed, 168 insertions(+)
  create mode 100644 drivers/nvmem/snvs_lpgpr.c


Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

Would appreciate if its possible to take it as a late one in next 
possible 4.14 rc.
These patches were in the list of long time, I forgot to include this 
in the first set of nvmem patches!


thanks
Srini




thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Srinivas Kandagatla 



On 18/09/17 15:12, Greg Kroah-Hartman wrote:

On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:

From: Oleksij Rempel 

This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.

It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.

Signed-off-by: Oleksij Rempel 
Signed-off-by: Srinivas Kandagatla 
---
  drivers/nvmem/Kconfig  |  10 +++
  drivers/nvmem/Makefile |   2 +
  drivers/nvmem/snvs_lpgpr.c | 156 +
  3 files changed, 168 insertions(+)
  create mode 100644 drivers/nvmem/snvs_lpgpr.c


Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

Would appreciate if its possible to take it as a late one in next 
possible 4.14 rc.
These patches were in the list of long time, I forgot to include this 
in the first set of nvmem patches!


thanks
Srini




thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Greg Kroah-Hartman 
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
> From: Oleksij Rempel 
> 
> This is a driver for Low Power General Purpose Register (LPGPR)
> available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> of this chip.
> 
> It is a 32-bit read/write register located in the low power domain.
> Since LPGPR is located in the battery-backed power domain, LPGPR can
> be used by any application for retaining data during an SoC power-down
> mode.
> 
> Signed-off-by: Oleksij Rempel 
> Signed-off-by: Srinivas Kandagatla 
> ---
>  drivers/nvmem/Kconfig  |  10 +++
>  drivers/nvmem/Makefile |   2 +
>  drivers/nvmem/snvs_lpgpr.c | 156 
> +
>  3 files changed, 168 insertions(+)
>  create mode 100644 drivers/nvmem/snvs_lpgpr.c

Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

thanks,

greg k-h

Re: [PATCH 2/2] nvmem: add snvs_lpgpr driver

2017-09-18 Thread Greg Kroah-Hartman 
On Sun, Sep 17, 2017 at 12:33:43PM +0200, srinivas.kandaga...@linaro.org wrote:
> From: Oleksij Rempel 
> 
> This is a driver for Low Power General Purpose Register (LPGPR)
> available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
> of this chip.
> 
> It is a 32-bit read/write register located in the low power domain.
> Since LPGPR is located in the battery-backed power domain, LPGPR can
> be used by any application for retaining data during an SoC power-down
> mode.
> 
> Signed-off-by: Oleksij Rempel 
> Signed-off-by: Srinivas Kandagatla 
> ---
>  drivers/nvmem/Kconfig  |  10 +++
>  drivers/nvmem/Makefile |   2 +
>  drivers/nvmem/snvs_lpgpr.c | 156 
> +
>  3 files changed, 168 insertions(+)
>  create mode 100644 drivers/nvmem/snvs_lpgpr.c

Too late for 4.14, as -rc1 is already out.  How about for 4.15-rc1?

thanks,

greg k-h