Re: [PATCH 2/9] perf tools: Support the auxiliary event
On 2/5/2021 10:26 AM, Arnaldo Carvalho de Melo wrote:
Em Fri, Feb 05, 2021 at 09:13:34AM -0500, Liang, Kan escreveu:
On 2/5/2021 5:52 AM, Namhyung Kim wrote:
On Wed, Feb 3, 2021 at 5:14 AM wrote:
From: Kan Liang
On the Intel Sapphire Rapids server, an auxiliary event has to be
enabled simultaneously with the load latency event to retrieve complete
Memory Info.
Add X86 specific perf_mem_events__name() to handle the auxiliary event.
- Users are only interested in the samples of the mem-loads event.
Sample read the auxiliary event.
- The auxiliary event must be in front of the load latency event in a
group. Assume the second event to sample if the auxiliary event is the
leader.
- Add a weak is_mem_loads_aux_event() to check the auxiliary event for
X86. For other ARCHs, it always return false.
Parse the unique event name, mem-loads-aux, for the auxiliary event.
Signed-off-by: Kan Liang
---
tools/perf/arch/x86/util/Build| 1 +
tools/perf/arch/x86/util/mem-events.c | 44
+++
tools/perf/util/evsel.c | 3 +++
tools/perf/util/mem-events.c | 5
tools/perf/util/mem-events.h | 2 ++
tools/perf/util/parse-events.l| 1 +
tools/perf/util/record.c | 5 +++-
7 files changed, 60 insertions(+), 1 deletion(-)
create mode 100644 tools/perf/arch/x86/util/mem-events.c
diff --git a/tools/perf/arch/x86/util/Build b/tools/perf/arch/x86/util/Build
index 347c39b..d73f548 100644
--- a/tools/perf/arch/x86/util/Build
+++ b/tools/perf/arch/x86/util/Build
@@ -6,6 +6,7 @@ perf-y += perf_regs.o
perf-y += topdown.o
perf-y += machine.o
perf-y += event.o
+perf-y += mem-events.o
perf-$(CONFIG_DWARF) += dwarf-regs.o
perf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o
diff --git a/tools/perf/arch/x86/util/mem-events.c
b/tools/perf/arch/x86/util/mem-events.c
new file mode 100644
index 000..11b8469
--- /dev/null
+++ b/tools/perf/arch/x86/util/mem-events.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "util/pmu.h"
+#include "map_symbol.h"
+#include "mem-events.h"
+
+static char mem_loads_name[100];
+static bool mem_loads_name__init;
+
+#define MEM_LOADS_AUX 0x8203
+#define MEM_LOADS_AUX_NAME
"{cpu/mem-loads-aux/,cpu/mem-loads,ldlat=%u/pp}:S"
+
+bool is_mem_loads_aux_event(struct evsel *leader)
+{
+ if (!pmu_have_event("cpu", "mem-loads-aux"))
+ return false;
+
+ return leader->core.attr.config == MEM_LOADS_AUX;
+}
+
+char *perf_mem_events__name(int i)
+{
+ struct perf_mem_event *e = perf_mem_events__ptr(i);
+
+ if (!e)
+ return NULL;
+
+ if (i == PERF_MEM_EVENTS__LOAD) {
+ if (mem_loads_name__init)
+ return mem_loads_name;
+
+ mem_loads_name__init = true;
+
+ if (pmu_have_event("cpu", "mem-loads-aux")) {
+ scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
+ MEM_LOADS_AUX_NAME,
perf_mem_events__loads_ldlat);
It changes "%u" to an actual latency value, right?
What if the value takes 3 or more digits?
I'm not sure scnprintf() will handle it properly.
Yes, you are right. We should use the sizeof(mem_loads_name) as below.
I will submit a patch to fix it.
diff --git a/tools/perf/arch/x86/util/mem-events.c
b/tools/perf/arch/x86/util/mem-events.c
index 11b8469..588110f 100644
--- a/tools/perf/arch/x86/util/mem-events.c
+++ b/tools/perf/arch/x86/util/mem-events.c
@@ -31,7 +31,7 @@ char *perf_mem_events__name(int i)
mem_loads_name__init = true;
if (pmu_have_event("cpu", "mem-loads-aux")) {
- scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
+ scnprintf(mem_loads_name, sizeof(mem_loads_name),
MEM_LOADS_AUX_NAME,
perf_mem_events__loads_ldlat);
} else {
scnprintf(mem_loads_name, sizeof(mem_loads_name),
I'll fold this in the relevant cset.
Thanks!
Kan
Re: [PATCH 2/9] perf tools: Support the auxiliary event
Em Fri, Feb 05, 2021 at 09:13:34AM -0500, Liang, Kan escreveu:
>
>
> On 2/5/2021 5:52 AM, Namhyung Kim wrote:
> > On Wed, Feb 3, 2021 at 5:14 AM wrote:
> > >
> > > From: Kan Liang
> > >
> > > On the Intel Sapphire Rapids server, an auxiliary event has to be
> > > enabled simultaneously with the load latency event to retrieve complete
> > > Memory Info.
> > >
> > > Add X86 specific perf_mem_events__name() to handle the auxiliary event.
> > > - Users are only interested in the samples of the mem-loads event.
> > >Sample read the auxiliary event.
> > > - The auxiliary event must be in front of the load latency event in a
> > >group. Assume the second event to sample if the auxiliary event is the
> > >leader.
> > > - Add a weak is_mem_loads_aux_event() to check the auxiliary event for
> > >X86. For other ARCHs, it always return false.
> > >
> > > Parse the unique event name, mem-loads-aux, for the auxiliary event.
> > >
> > > Signed-off-by: Kan Liang
> > > ---
> > > tools/perf/arch/x86/util/Build| 1 +
> > > tools/perf/arch/x86/util/mem-events.c | 44
> > > +++
> > > tools/perf/util/evsel.c | 3 +++
> > > tools/perf/util/mem-events.c | 5
> > > tools/perf/util/mem-events.h | 2 ++
> > > tools/perf/util/parse-events.l| 1 +
> > > tools/perf/util/record.c | 5 +++-
> > > 7 files changed, 60 insertions(+), 1 deletion(-)
> > > create mode 100644 tools/perf/arch/x86/util/mem-events.c
> > >
> > > diff --git a/tools/perf/arch/x86/util/Build
> > > b/tools/perf/arch/x86/util/Build
> > > index 347c39b..d73f548 100644
> > > --- a/tools/perf/arch/x86/util/Build
> > > +++ b/tools/perf/arch/x86/util/Build
> > > @@ -6,6 +6,7 @@ perf-y += perf_regs.o
> > > perf-y += topdown.o
> > > perf-y += machine.o
> > > perf-y += event.o
> > > +perf-y += mem-events.o
> > >
> > > perf-$(CONFIG_DWARF) += dwarf-regs.o
> > > perf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o
> > > diff --git a/tools/perf/arch/x86/util/mem-events.c
> > > b/tools/perf/arch/x86/util/mem-events.c
> > > new file mode 100644
> > > index 000..11b8469
> > > --- /dev/null
> > > +++ b/tools/perf/arch/x86/util/mem-events.c
> > > @@ -0,0 +1,44 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +#include "util/pmu.h"
> > > +#include "map_symbol.h"
> > > +#include "mem-events.h"
> > > +
> > > +static char mem_loads_name[100];
> > > +static bool mem_loads_name__init;
> > > +
> > > +#define MEM_LOADS_AUX 0x8203
> > > +#define MEM_LOADS_AUX_NAME
> > > "{cpu/mem-loads-aux/,cpu/mem-loads,ldlat=%u/pp}:S"
> > > +
> > > +bool is_mem_loads_aux_event(struct evsel *leader)
> > > +{
> > > + if (!pmu_have_event("cpu", "mem-loads-aux"))
> > > + return false;
> > > +
> > > + return leader->core.attr.config == MEM_LOADS_AUX;
> > > +}
> > > +
> > > +char *perf_mem_events__name(int i)
> > > +{
> > > + struct perf_mem_event *e = perf_mem_events__ptr(i);
> > > +
> > > + if (!e)
> > > + return NULL;
> > > +
> > > + if (i == PERF_MEM_EVENTS__LOAD) {
> > > + if (mem_loads_name__init)
> > > + return mem_loads_name;
> > > +
> > > + mem_loads_name__init = true;
> > > +
> > > + if (pmu_have_event("cpu", "mem-loads-aux")) {
> > > + scnprintf(mem_loads_name,
> > > sizeof(MEM_LOADS_AUX_NAME),
> > > + MEM_LOADS_AUX_NAME,
> > > perf_mem_events__loads_ldlat);
> >
> > It changes "%u" to an actual latency value, right?
> > What if the value takes 3 or more digits?
> > I'm not sure scnprintf() will handle it properly.
> >
>
> Yes, you are right. We should use the sizeof(mem_loads_name) as below.
> I will submit a patch to fix it.
>
> diff --git a/tools/perf/arch/x86/util/mem-events.c
> b/tools/perf/arch/x86/util/mem-events.c
> index 11b8469..588110f 100644
> --- a/tools/perf/arch/x86/util/mem-events.c
> +++ b/tools/perf/arch/x86/util/mem-events.c
> @@ -31,7 +31,7 @@ char *perf_mem_events__name(int i)
> mem_loads_name__init = true;
>
> if (pmu_have_event("cpu", "mem-loads-aux")) {
> - scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
> + scnprintf(mem_loads_name, sizeof(mem_loads_name),
> MEM_LOADS_AUX_NAME,
> perf_mem_events__loads_ldlat);
> } else {
> scnprintf(mem_loads_name, sizeof(mem_loads_name),
I'll fold this in the relevant cset.
- Arnaldo
Re: [PATCH 2/9] perf tools: Support the auxiliary event
On 2/5/2021 5:52 AM, Namhyung Kim wrote:
On Wed, Feb 3, 2021 at 5:14 AM wrote:
From: Kan Liang
On the Intel Sapphire Rapids server, an auxiliary event has to be
enabled simultaneously with the load latency event to retrieve complete
Memory Info.
Add X86 specific perf_mem_events__name() to handle the auxiliary event.
- Users are only interested in the samples of the mem-loads event.
Sample read the auxiliary event.
- The auxiliary event must be in front of the load latency event in a
group. Assume the second event to sample if the auxiliary event is the
leader.
- Add a weak is_mem_loads_aux_event() to check the auxiliary event for
X86. For other ARCHs, it always return false.
Parse the unique event name, mem-loads-aux, for the auxiliary event.
Signed-off-by: Kan Liang
---
tools/perf/arch/x86/util/Build| 1 +
tools/perf/arch/x86/util/mem-events.c | 44 +++
tools/perf/util/evsel.c | 3 +++
tools/perf/util/mem-events.c | 5
tools/perf/util/mem-events.h | 2 ++
tools/perf/util/parse-events.l| 1 +
tools/perf/util/record.c | 5 +++-
7 files changed, 60 insertions(+), 1 deletion(-)
create mode 100644 tools/perf/arch/x86/util/mem-events.c
diff --git a/tools/perf/arch/x86/util/Build b/tools/perf/arch/x86/util/Build
index 347c39b..d73f548 100644
--- a/tools/perf/arch/x86/util/Build
+++ b/tools/perf/arch/x86/util/Build
@@ -6,6 +6,7 @@ perf-y += perf_regs.o
perf-y += topdown.o
perf-y += machine.o
perf-y += event.o
+perf-y += mem-events.o
perf-$(CONFIG_DWARF) += dwarf-regs.o
perf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o
diff --git a/tools/perf/arch/x86/util/mem-events.c
b/tools/perf/arch/x86/util/mem-events.c
new file mode 100644
index 000..11b8469
--- /dev/null
+++ b/tools/perf/arch/x86/util/mem-events.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "util/pmu.h"
+#include "map_symbol.h"
+#include "mem-events.h"
+
+static char mem_loads_name[100];
+static bool mem_loads_name__init;
+
+#define MEM_LOADS_AUX 0x8203
+#define MEM_LOADS_AUX_NAME
"{cpu/mem-loads-aux/,cpu/mem-loads,ldlat=%u/pp}:S"
+
+bool is_mem_loads_aux_event(struct evsel *leader)
+{
+ if (!pmu_have_event("cpu", "mem-loads-aux"))
+ return false;
+
+ return leader->core.attr.config == MEM_LOADS_AUX;
+}
+
+char *perf_mem_events__name(int i)
+{
+ struct perf_mem_event *e = perf_mem_events__ptr(i);
+
+ if (!e)
+ return NULL;
+
+ if (i == PERF_MEM_EVENTS__LOAD) {
+ if (mem_loads_name__init)
+ return mem_loads_name;
+
+ mem_loads_name__init = true;
+
+ if (pmu_have_event("cpu", "mem-loads-aux")) {
+ scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
+ MEM_LOADS_AUX_NAME,
perf_mem_events__loads_ldlat);
It changes "%u" to an actual latency value, right?
What if the value takes 3 or more digits?
I'm not sure scnprintf() will handle it properly.
Yes, you are right. We should use the sizeof(mem_loads_name) as below.
I will submit a patch to fix it.
diff --git a/tools/perf/arch/x86/util/mem-events.c
b/tools/perf/arch/x86/util/mem-events.c
index 11b8469..588110f 100644
--- a/tools/perf/arch/x86/util/mem-events.c
+++ b/tools/perf/arch/x86/util/mem-events.c
@@ -31,7 +31,7 @@ char *perf_mem_events__name(int i)
mem_loads_name__init = true;
if (pmu_have_event("cpu", "mem-loads-aux")) {
- scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
+ scnprintf(mem_loads_name, sizeof(mem_loads_name),
MEM_LOADS_AUX_NAME,
perf_mem_events__loads_ldlat);
} else {
scnprintf(mem_loads_name, sizeof(mem_loads_name),
Thanks,
Kan
Re: [PATCH 2/9] perf tools: Support the auxiliary event
On Wed, Feb 3, 2021 at 5:14 AM wrote:
>
> From: Kan Liang
>
> On the Intel Sapphire Rapids server, an auxiliary event has to be
> enabled simultaneously with the load latency event to retrieve complete
> Memory Info.
>
> Add X86 specific perf_mem_events__name() to handle the auxiliary event.
> - Users are only interested in the samples of the mem-loads event.
> Sample read the auxiliary event.
> - The auxiliary event must be in front of the load latency event in a
> group. Assume the second event to sample if the auxiliary event is the
> leader.
> - Add a weak is_mem_loads_aux_event() to check the auxiliary event for
> X86. For other ARCHs, it always return false.
>
> Parse the unique event name, mem-loads-aux, for the auxiliary event.
>
> Signed-off-by: Kan Liang
> ---
> tools/perf/arch/x86/util/Build| 1 +
> tools/perf/arch/x86/util/mem-events.c | 44
> +++
> tools/perf/util/evsel.c | 3 +++
> tools/perf/util/mem-events.c | 5
> tools/perf/util/mem-events.h | 2 ++
> tools/perf/util/parse-events.l| 1 +
> tools/perf/util/record.c | 5 +++-
> 7 files changed, 60 insertions(+), 1 deletion(-)
> create mode 100644 tools/perf/arch/x86/util/mem-events.c
>
> diff --git a/tools/perf/arch/x86/util/Build b/tools/perf/arch/x86/util/Build
> index 347c39b..d73f548 100644
> --- a/tools/perf/arch/x86/util/Build
> +++ b/tools/perf/arch/x86/util/Build
> @@ -6,6 +6,7 @@ perf-y += perf_regs.o
> perf-y += topdown.o
> perf-y += machine.o
> perf-y += event.o
> +perf-y += mem-events.o
>
> perf-$(CONFIG_DWARF) += dwarf-regs.o
> perf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o
> diff --git a/tools/perf/arch/x86/util/mem-events.c
> b/tools/perf/arch/x86/util/mem-events.c
> new file mode 100644
> index 000..11b8469
> --- /dev/null
> +++ b/tools/perf/arch/x86/util/mem-events.c
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: GPL-2.0
> +#include "util/pmu.h"
> +#include "map_symbol.h"
> +#include "mem-events.h"
> +
> +static char mem_loads_name[100];
> +static bool mem_loads_name__init;
> +
> +#define MEM_LOADS_AUX 0x8203
> +#define MEM_LOADS_AUX_NAME
> "{cpu/mem-loads-aux/,cpu/mem-loads,ldlat=%u/pp}:S"
> +
> +bool is_mem_loads_aux_event(struct evsel *leader)
> +{
> + if (!pmu_have_event("cpu", "mem-loads-aux"))
> + return false;
> +
> + return leader->core.attr.config == MEM_LOADS_AUX;
> +}
> +
> +char *perf_mem_events__name(int i)
> +{
> + struct perf_mem_event *e = perf_mem_events__ptr(i);
> +
> + if (!e)
> + return NULL;
> +
> + if (i == PERF_MEM_EVENTS__LOAD) {
> + if (mem_loads_name__init)
> + return mem_loads_name;
> +
> + mem_loads_name__init = true;
> +
> + if (pmu_have_event("cpu", "mem-loads-aux")) {
> + scnprintf(mem_loads_name, sizeof(MEM_LOADS_AUX_NAME),
> + MEM_LOADS_AUX_NAME,
> perf_mem_events__loads_ldlat);
It changes "%u" to an actual latency value, right?
What if the value takes 3 or more digits?
I'm not sure scnprintf() will handle it properly.
Thanks,
Namhyung
> + } else {
> + scnprintf(mem_loads_name, sizeof(mem_loads_name),
> + e->name, perf_mem_events__loads_ldlat);
> + }
> + return mem_loads_name;
> + }
> +
> + return (char *)e->name;
> +}
Re: [PATCH 2/9] perf tools: Support the auxiliary event
Em Wed, Feb 03, 2021 at 04:20:38PM -0500, Liang, Kan escreveu:
>
>
> On 2/3/2021 3:02 PM, Arnaldo Carvalho de Melo wrote:
> > Em Tue, Feb 02, 2021 at 12:09:06PM -0800,kan.li...@linux.intel.com
> > escreveu:
> > > From: Kan Liang
> > > diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
> > > index c26ea822..c48f6de 100644
> > > --- a/tools/perf/util/evsel.c
> > > +++ b/tools/perf/util/evsel.c
> > > @@ -2689,6 +2689,9 @@ int evsel__open_strerror(struct evsel *evsel,
> > > struct target *target,
> > > if (perf_missing_features.aux_output)
> > > return scnprintf(msg, size, "The 'aux_output'
> > > feature is not supported, update the kernel.");
> > > break;
> > > + case ENODATA:
> > > + return scnprintf(msg, size, "Cannot collect data source with
> > > the load latency event alone. "
> > > + "Please add an auxiliary event in front of the
> > > load latency event.");
> > Are you sure this is the only case where ENODATA comes out from
> > perf_event_open()? Well, according to your comment in:
> >
> >61b985e3e775a3a7 ("perf/x86/intel: Add perf core PMU support for
> > Sapphire Rapids")
> >
> > It should be at that point in time, so its safe to merge as-is, but then
> > I think this is fragile, what if someone else, in the future, not
> > knowing that ENODATA is supposed to be used only with that ancient CPU,
> > Sapphire Rapids, uses it?:-)
> >
> > Please consider adding a check before assuming ENODATA is for this
> > specific case.
>
> Sure, I will add a check in V2.
Do it as a separate patch, on top of what is now in tmp.perf/core.
https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/log/?h=tmp.perf/core
- Arnaldo
Re: [PATCH 2/9] perf tools: Support the auxiliary event
On 2/3/2021 3:02 PM, Arnaldo Carvalho de Melo wrote:
Em Tue, Feb 02, 2021 at 12:09:06PM -0800,kan.li...@linux.intel.com escreveu:
From: Kan Liang
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
index c26ea822..c48f6de 100644
--- a/tools/perf/util/evsel.c
+++ b/tools/perf/util/evsel.c
@@ -2689,6 +2689,9 @@ int evsel__open_strerror(struct evsel *evsel, struct
target *target,
if (perf_missing_features.aux_output)
return scnprintf(msg, size, "The 'aux_output' feature is not
supported, update the kernel.");
break;
+ case ENODATA:
+ return scnprintf(msg, size, "Cannot collect data source with the
load latency event alone. "
+"Please add an auxiliary event in front of the load
latency event.");
Are you sure this is the only case where ENODATA comes out from
perf_event_open()? Well, according to your comment in:
61b985e3e775a3a7 ("perf/x86/intel: Add perf core PMU support for Sapphire
Rapids")
It should be at that point in time, so its safe to merge as-is, but then
I think this is fragile, what if someone else, in the future, not
knowing that ENODATA is supposed to be used only with that ancient CPU,
Sapphire Rapids, uses it?:-)
Please consider adding a check before assuming ENODATA is for this
specific case.
Sure, I will add a check in V2.
Thanks,
Kan
Re: [PATCH 2/9] perf tools: Support the auxiliary event
Em Tue, Feb 02, 2021 at 12:09:06PM -0800, kan.li...@linux.intel.com escreveu:
> From: Kan Liang
> diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
> index c26ea822..c48f6de 100644
> --- a/tools/perf/util/evsel.c
> +++ b/tools/perf/util/evsel.c
> @@ -2689,6 +2689,9 @@ int evsel__open_strerror(struct evsel *evsel, struct
> target *target,
> if (perf_missing_features.aux_output)
> return scnprintf(msg, size, "The 'aux_output' feature
> is not supported, update the kernel.");
> break;
> + case ENODATA:
> + return scnprintf(msg, size, "Cannot collect data source with
> the load latency event alone. "
> + "Please add an auxiliary event in front of the
> load latency event.");
Are you sure this is the only case where ENODATA comes out from
perf_event_open()? Well, according to your comment in:
61b985e3e775a3a7 ("perf/x86/intel: Add perf core PMU support for Sapphire
Rapids")
It should be at that point in time, so its safe to merge as-is, but then
I think this is fragile, what if someone else, in the future, not
knowing that ENODATA is supposed to be used only with that ancient CPU,
Sapphire Rapids, uses it? :-)
Please consider adding a check before assuming ENODATA is for this
specific case.
Back to processing the other patches.
- Arnaldo
> default:
> break;
> }
> diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c
> index 19007e4..3edfb88 100644
> --- a/tools/perf/util/mem-events.c
> +++ b/tools/perf/util/mem-events.c
> @@ -56,6 +56,11 @@ char * __weak perf_mem_events__name(int i)
> return (char *)e->name;
> }
>
> +__weak bool is_mem_loads_aux_event(struct evsel *leader __maybe_unused)
> +{
> + return false;
> +}
> +
> int perf_mem_events__parse(const char *str)
> {
> char *tok, *saveptr = NULL;
> diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h
> index 5ef1782..045a507 100644
> --- a/tools/perf/util/mem-events.h
> +++ b/tools/perf/util/mem-events.h
> @@ -9,6 +9,7 @@
> #include
> #include
> #include "stat.h"
> +#include "evsel.h"
>
> struct perf_mem_event {
> boolrecord;
> @@ -39,6 +40,7 @@ int perf_mem_events__init(void);
>
> char *perf_mem_events__name(int i);
> struct perf_mem_event *perf_mem_events__ptr(int i);
> +bool is_mem_loads_aux_event(struct evsel *leader);
>
> void perf_mem_events__list(void);
>
> diff --git a/tools/perf/util/parse-events.l b/tools/perf/util/parse-events.l
> index 9db5097..0b36285 100644
> --- a/tools/perf/util/parse-events.l
> +++ b/tools/perf/util/parse-events.l
> @@ -356,6 +356,7 @@ bpf-output{
> return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_BPF_OUT
> cycles-ct|
> cycles-t |
> mem-loads|
> +mem-loads-aux|
> mem-stores |
> topdown-[a-z-]+ |
> tx-capacity-[a-z-]+ |
> diff --git a/tools/perf/util/record.c b/tools/perf/util/record.c
> index e70c9dd..d0735fb 100644
> --- a/tools/perf/util/record.c
> +++ b/tools/perf/util/record.c
> @@ -15,6 +15,8 @@
> #include "record.h"
> #include "../perf-sys.h"
> #include "topdown.h"
> +#include "map_symbol.h"
> +#include "mem-events.h"
>
> /*
> * evsel__config_leader_sampling() uses special rules for leader sampling.
> @@ -25,7 +27,8 @@ static struct evsel *evsel__read_sampler(struct evsel
> *evsel, struct evlist *evl
> {
> struct evsel *leader = evsel->leader;
>
> - if (evsel__is_aux_event(leader) || arch_topdown_sample_read(leader)) {
> + if (evsel__is_aux_event(leader) || arch_topdown_sample_read(leader) ||
> + is_mem_loads_aux_event(leader)) {
> evlist__for_each_entry(evlist, evsel) {
> if (evsel->leader == leader && evsel != evsel->leader)
> return evsel;
> --
> 2.7.4
>
--
- Arnaldo
