Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
> On Sep 30, 2020, at 9:29 PM, Vinod Koul wrote: > > Hi Dave, > >> On 30-09-20, 15:19, Dave Jiang wrote: >> >> >>> On 9/24/2020 2:51 PM, Borislav Petkov wrote: >>> On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote: Hi Vinod, Looks like we are cleared on the x86 patches for this series with sign offs from maintainer Boris. Please consider the series for 5.10 inclusion. Thank you! >>> >>> As I said here, I'd strongly suggest we do this: >>> >>> https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/5FKNWNCCRV3AXUAEXUGQFF4EDQNANF3F/ >>> >>> and Vinod should merge the x86/pasid branch. Otherwise is his branch >>> and incomplete you could not have tested it properly. >>> >> >> Hi Vinod, >> Just checking to see if you have any objections or concerns with respect to >> this series. We are hoping it can be queued for the 5.10 merge if there are >> no objections. Thanks! > > I was out for last few days, so haven't checked on this yet, but given > that we are very close to merge widow I fear it is bit late to merge > this late. I will go thru the series today though.. Thanks Vinod. Very much appreciate it either way. > Thanks > -- > ~Vinod
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
On Thu, Oct 01, 2020 at 09:59:08AM +0530, Vinod Koul wrote: > I was out for last few days, so haven't checked on this yet, but given > that we are very close to merge widow I fear it is bit late to merge > this late. There is time because we will have -rc8 so you have an additional week. > I will go thru the series today though.. If you do and you wanna take them, I'd suggest this: https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/message/P4TZ4AU6MBIPT2OROPDOKEN7U2QCS7FX/ (it's on the same thread). Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
Hi Dave, On 30-09-20, 15:19, Dave Jiang wrote: > > > On 9/24/2020 2:51 PM, Borislav Petkov wrote: > > On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote: > > > Hi Vinod, > > > Looks like we are cleared on the x86 patches for this series with sign > > > offs > > > from maintainer Boris. Please consider the series for 5.10 inclusion. > > > Thank > > > you! > > > > As I said here, I'd strongly suggest we do this: > > > > https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/5FKNWNCCRV3AXUAEXUGQFF4EDQNANF3F/ > > > > and Vinod should merge the x86/pasid branch. Otherwise is his branch > > and incomplete you could not have tested it properly. > > > > Hi Vinod, > Just checking to see if you have any objections or concerns with respect to > this series. We are hoping it can be queued for the 5.10 merge if there are > no objections. Thanks! I was out for last few days, so haven't checked on this yet, but given that we are very close to merge widow I fear it is bit late to merge this late. I will go thru the series today though.. Thanks -- ~Vinod
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
On 9/24/2020 2:51 PM, Borislav Petkov wrote: On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote: Hi Vinod, Looks like we are cleared on the x86 patches for this series with sign offs from maintainer Boris. Please consider the series for 5.10 inclusion. Thank you! As I said here, I'd strongly suggest we do this: https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/5FKNWNCCRV3AXUAEXUGQFF4EDQNANF3F/ and Vinod should merge the x86/pasid branch. Otherwise is his branch and incomplete you could not have tested it properly. Hi Vinod, Just checking to see if you have any objections or concerns with respect to this series. We are hoping it can be queued for the 5.10 merge if there are no objections. Thanks!
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
On 9/24/2020 2:51 PM, Borislav Petkov wrote: On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote: Hi Vinod, Looks like we are cleared on the x86 patches for this series with sign offs from maintainer Boris. Please consider the series for 5.10 inclusion. Thank you! As I said here, I'd strongly suggest we do this: https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/5FKNWNCCRV3AXUAEXUGQFF4EDQNANF3F/ and Vinod should merge the x86/pasid branch. Otherwise is his branch and incomplete you could not have tested it properly. Thanks Boris. Locally I have based on the latest dmaengine/next branch, merged in the x86/pasid branch, and then applied the series on top for testing. But yes, if Vinod accepts the series into his dmaengine/next tree, we will need all the parts for testing.
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
On Thu, Sep 24, 2020 at 02:32:35PM -0700, Dave Jiang wrote: > Hi Vinod, > Looks like we are cleared on the x86 patches for this series with sign offs > from maintainer Boris. Please consider the series for 5.10 inclusion. Thank > you! As I said here, I'd strongly suggest we do this: https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/5FKNWNCCRV3AXUAEXUGQFF4EDQNANF3F/ and Vinod should merge the x86/pasid branch. Otherwise is his branch and incomplete you could not have tested it properly. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
Re: [PATCH v6 0/5] Add shared workqueue support for idxd driver
On 9/24/2020 11:00 AM, Dave Jiang wrote: v6: Boris: - Fixup MOBDIR64B inline asm input/output constraints Hi Vinod, Looks like we are cleared on the x86 patches for this series with sign offs from maintainer Boris. Please consider the series for 5.10 inclusion. Thank you! v5: Boris: - Fixup commit headers - Fixup var names for movdir64b() - Move enqcmds() to special_insns.h - Fix up comments for enqcmds() - Change enqcmds() to reflect instruction return. 0 as success, -EAGAIN for fail. DavidL: - Fixup enqcmds() gas constraints v4: - Rebased against latest dmaengine/next tree - Split out enqcmd and pasid dependency. V3: - Rebased against latest dmaengine/next tree. - Updated API doc with new kernel version and dates. - Changed to allow driver to load without ENQCMD support. - Break out some patches that can be sent ahead of this series for inclusion. v2: - Dropped device feature enabling (GregKH) - Dropped PCI device feature enabling (Bjorn) - https://members.pcisig.com/wg/PCI-SIG/document/14237 - After some internal discussion, we have decided to hold off on the enabling of DMWR due to the following reasons. 1. Most first gen hw will not have the feature bits. 2. First gen hw that support the feature are all Root Complex integrated endpoints. 3. PCI devices that are not RCiEP’s with this capability won’t surface for a few years so we can wait until we can test the full code. - Dropped special ioremap (hch) - Added proper support for WQ flush (tony, dan) - Changed descriptor submission to use sbitmap_queue for blocking. (dan) Driver stage 1 postings for context: [1] The patch series has compilation and functional dependency on Fenghua's "Tag application address space for devices" patch series for the ENQCMD CPU command enumeration and the PASID MSR support. [2] == Background == A typical DMA device requires the driver to translate application buffers to hardware addresses, and a kernel-user transition to notify the hardware of new work. Shared Virtual Addressing (SVA) allows the processor and device to use the same virtual addresses without requiring software to translate between the address spaces. ENQCMD is a new instruction on Intel Platforms that allows user applications to directly notify hardware of new work, much like how doorbells are used in some hardware, but it carries a payload along with it. ENQCMDS is the supervisor version (ring0) of ENQCMD. == ENQCMDS == Introduce enqcmds(), a helper funciton that copies an input payload to a 64B aligned destination and confirms whether the payload was accepted by the device or not. enqcmds() wraps the new ENQCMDS CPU instruction. The ENQCMDS is a ring 0 CPU instruction that performs similar to the ENQCMD instruction. Descriptor submission must use ENQCMD(S) for shared workqueues (swq) on an Intel DSA device. == Shared WQ support == Introduce shared workqueue (swq) support for the idxd driver. The current idxd driver contains dedicated workqueue (dwq) support only. A dwq accepts descriptors from a MOVDIR64B instruction. MOVDIR64B is a posted instruction on the PCIe bus, it does not wait for any response from the device. If the wq is full, submitted descriptors are dropped. A swq utilizes the ENQCMDS in ring 0, which is a non-posted instruction. The zero flag would be set to 1 if the device rejects the descriptor or if the wq is full. A swq can be shared between multiple users (kernel or userspace) due to not having to keep track of the wq full condition for submission. A swq requires PASID and can only run with SVA support. == IDXD SVA support == Add utilization of PASID to support Shared Virtual Addressing (SVA). With PASID support, the descriptors can be programmed with host virtual address (HVA) rather than IOVA. The hardware will work with the IOMMU in fulfilling page requests. With SVA support, a user app using the char device interface can now submit descriptors without having to pin the virtual memory range it wants to DMA in its own address space. The series does not add SVA support for the dmaengine subsystem. That support is coming at a later time. [1]: https://lore.kernel.org/lkml/157965011794.73301.15960052071729101309.st...@djiang5-desk3.ch.intel.com/ [2]: https://lore.kernel.org/lkml/20200916080510.ga32...@8bytes.org/ [3]: https://software.intel.com/en-us/articles/intel-sdm [4]: https://software.intel.com/en-us/download/intel-scalable-io-virtualization-technical-specification [5]: https://software.intel.com/en-us/download/intel-data-streaming-accelerator-preliminary-architecture-specification [6]: https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator [7]: https://intel.github.io/idxd/ [8]: https://github.com/intel/idxd-driver idxd-stage2 --- Dave Jiang (5): x86/asm: Carve out a generic movdir64b() helper for general usage x86/asm: Add enqcmds() to support ENQCMDS instruction dmaengine: idxd: Add shared workqueue support dmaengine: idxd:
