Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-30 Thread Guenter Roeck
On Fri, Jan 27, 2017 at 10:40:09AM +0800, Baoyou Xie wrote:
> On 27 January 2017 at 00:17, Mathieu Poirier 
> wrote:
> 
> > On Thu, Jan 26, 2017 at 09:32:56AM +0800, Baoyou Xie wrote:
> > > On 26 January 2017 at 00:23, Mathieu Poirier  > >
> > > wrote:
> > >
> > > > On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> > > > > This patch adds watchdog controller driver for ZTE's zx2967 family.
> > > > >
> > > > > Signed-off-by: Baoyou Xie 
> > > > > ---
[ ... ]
> > > > > + reset_control_assert(rstc);
> > > > > + usleep_range(500, 2);
> > > >
> > > > Alright, I'm officially confused.
> > > >
> > > > First and foremost you still haven't provided an explanation as to why
> > > > this is
> > > > required.  Second, in your previous submission you had:
> > > >
> > > > mdelay(10);
> > > >
> > > > That is a busy loop of 10ms.  In this post using usleep_range() is a
> > step
> > > > in the
> > > > right direction but the min and max values to wait for don't make
> > sense.
> > > > Here
> > > > you have 500 and 2, which is 0.5ms and 20ms.
> > > >
> > > > In fact, sleeping for 0.5ms is enough.
> > > we extended the sleeping time to 20ms, the purpose is merging the timer
> > > interrupts. of course, it's happy to replace it with usleep_range(500,
> > > 1000).
> >
> > "merging the timer interrupts" - you mean trying to get the WD tick to be
> > closer
> > to other timers?  If so I really don't see why.  Timers are asynchronous by
> > nature and there can be dozens of them enabled at any given time.
> >
> > Really?
> Even if the system runs asynchronously, early process may trigger delayed
> process, for example delayed work queue or timers, we can merge our
> watchdog timer and those delayed work's timers.
> 
In the probe function ?

> Furthermore, what happen if we build this driver as module?
> 
If every driver writer would use that line of argument, booting would
take much longer than necessary, with every process sitting on unnecessary
wait or sleep calls for perceived "optimization" purposes. Probe functions
run exactly once, and should be time optimized. You should have an idea
what the minimum reset hold time is, and follow it.

> But, as i said early, it's a trial optimization but can be instead with
> usleep_range(500, 1000).
> 
> In some case, such optimization is helpful. I'd like to talk a story here,
> about before ten years, I pressed a return key in console, you know, in
> this case, a process be created and exited, so the cpu core that process
> run at sent an IPI to other CPU, IPI interrupt resulted in the performance
> decreased by 20%, so sad:)
> 
It appears to be somewhat unlikely that each keypress resulted in a driver
being instantiated. If it did, a sleep in its probe function was the least
of your problems.

> Unless there is a H/W constraint requiring a delay between the
> > assert/deassert
> > of the WD, I don't think adding a wait operation (of any kind) make sense.

Correct.

Guenter


Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-30 Thread Guenter Roeck
On Fri, Jan 27, 2017 at 10:40:09AM +0800, Baoyou Xie wrote:
> On 27 January 2017 at 00:17, Mathieu Poirier 
> wrote:
> 
> > On Thu, Jan 26, 2017 at 09:32:56AM +0800, Baoyou Xie wrote:
> > > On 26 January 2017 at 00:23, Mathieu Poirier  > >
> > > wrote:
> > >
> > > > On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> > > > > This patch adds watchdog controller driver for ZTE's zx2967 family.
> > > > >
> > > > > Signed-off-by: Baoyou Xie 
> > > > > ---
[ ... ]
> > > > > + reset_control_assert(rstc);
> > > > > + usleep_range(500, 2);
> > > >
> > > > Alright, I'm officially confused.
> > > >
> > > > First and foremost you still haven't provided an explanation as to why
> > > > this is
> > > > required.  Second, in your previous submission you had:
> > > >
> > > > mdelay(10);
> > > >
> > > > That is a busy loop of 10ms.  In this post using usleep_range() is a
> > step
> > > > in the
> > > > right direction but the min and max values to wait for don't make
> > sense.
> > > > Here
> > > > you have 500 and 2, which is 0.5ms and 20ms.
> > > >
> > > > In fact, sleeping for 0.5ms is enough.
> > > we extended the sleeping time to 20ms, the purpose is merging the timer
> > > interrupts. of course, it's happy to replace it with usleep_range(500,
> > > 1000).
> >
> > "merging the timer interrupts" - you mean trying to get the WD tick to be
> > closer
> > to other timers?  If so I really don't see why.  Timers are asynchronous by
> > nature and there can be dozens of them enabled at any given time.
> >
> > Really?
> Even if the system runs asynchronously, early process may trigger delayed
> process, for example delayed work queue or timers, we can merge our
> watchdog timer and those delayed work's timers.
> 
In the probe function ?

> Furthermore, what happen if we build this driver as module?
> 
If every driver writer would use that line of argument, booting would
take much longer than necessary, with every process sitting on unnecessary
wait or sleep calls for perceived "optimization" purposes. Probe functions
run exactly once, and should be time optimized. You should have an idea
what the minimum reset hold time is, and follow it.

> But, as i said early, it's a trial optimization but can be instead with
> usleep_range(500, 1000).
> 
> In some case, such optimization is helpful. I'd like to talk a story here,
> about before ten years, I pressed a return key in console, you know, in
> this case, a process be created and exited, so the cpu core that process
> run at sent an IPI to other CPU, IPI interrupt resulted in the performance
> decreased by 20%, so sad:)
> 
It appears to be somewhat unlikely that each keypress resulted in a driver
being instantiated. If it did, a sleep in its probe function was the least
of your problems.

> Unless there is a H/W constraint requiring a delay between the
> > assert/deassert
> > of the WD, I don't think adding a wait operation (of any kind) make sense.

Correct.

Guenter


Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-26 Thread Mathieu Poirier
On Thu, Jan 26, 2017 at 09:32:56AM +0800, Baoyou Xie wrote:
> On 26 January 2017 at 00:23, Mathieu Poirier 
> wrote:
> 
> > On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> > > This patch adds watchdog controller driver for ZTE's zx2967 family.
> > >
> > > Signed-off-by: Baoyou Xie 
> > > ---
> > >  drivers/watchdog/Kconfig  |  10 ++
> > >  drivers/watchdog/Makefile |   1 +
> > >  drivers/watchdog/zx2967_wdt.c | 276 ++
> > 
> > >  3 files changed, 287 insertions(+)
> > >  create mode 100644 drivers/watchdog/zx2967_wdt.c
> > >
> > > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > > index acb00b5..05093a2 100644
> > > --- a/drivers/watchdog/Kconfig
> > > +++ b/drivers/watchdog/Kconfig
> > > @@ -714,6 +714,16 @@ config ASPEED_WATCHDOG
> > > To compile this driver as a module, choose M here: the
> > > module will be called aspeed_wdt.
> > >
> > > +config ZX2967_WATCHDOG
> > > + tristate "ZTE zx2967 SoCs watchdog support"
> > > + depends on ARCH_ZX
> > > + select WATCHDOG_CORE
> > > + help
> > > +   Say Y here to include support for the watchdog timer
> > > +   in ZTE zx2967 SoCs.
> > > +   To compile this driver as a module, choose M here: the
> > > +   module will be called zx2967_wdt.
> > > +
> > >  # AVR32 Architecture
> > >
> > >  config AT32AP700X_WDT
> > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> > > index 0c3d35e..bf2d296 100644
> > > --- a/drivers/watchdog/Makefile
> > > +++ b/drivers/watchdog/Makefile
> > > @@ -82,6 +82,7 @@ obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
> > >  obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
> > >  obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
> > >  obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
> > > +obj-$(CONFIG_ZX2967_WATCHDOG) += zx2967_wdt.o
> > >
> > >  # AVR32 Architecture
> > >  obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
> > > diff --git a/drivers/watchdog/zx2967_wdt.c
> > b/drivers/watchdog/zx2967_wdt.c
> > > new file mode 100644
> > > index 000..8278471
> > > --- /dev/null
> > > +++ b/drivers/watchdog/zx2967_wdt.c
> > > @@ -0,0 +1,276 @@
> > > +/*
> > > + * watchdog driver for ZTE's zx2967 family
> > > + *
> > > + * Copyright (C) 2017 ZTE Ltd.
> > > + *
> > > + * Author: Baoyou Xie 
> > > + *
> > > + * License terms: GNU General Public License (GPL) version 2
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +
> > > +#define ZX2967_WDT_CFG_REG   0x4
> > > +#define ZX2967_WDT_LOAD_REG  0x8
> > > +#define ZX2967_WDT_REFRESH_REG   0x18
> > > +#define ZX2967_WDT_START_REG 0x1c
> > > +
> > > +#define ZX2967_WDT_REFRESH_MASK  0x3f
> > > +
> > > +#define ZX2967_WDT_CFG_DIV(n)n) & 0xff) -
> > 1) << 8)
> > > +#define ZX2967_WDT_START_EN  0x1
> > > +
> > > +#define ZX2967_WDT_WRITEKEY  0x1234
> > > +
> > > +#define ZX2967_WDT_DIV_DEFAULT   16
> > > +#define ZX2967_WDT_DEFAULT_TIMEOUT   32
> > > +#define ZX2967_WDT_MIN_TIMEOUT   1
> > > +#define ZX2967_WDT_MAX_TIMEOUT   524
> > > +#define ZX2967_WDT_MAX_COUNT 0x
> > > +
> > > +#define ZX2967_WDT_CLK_FREQ  0x8000
> > > +
> > > +#define ZX2967_WDT_FLAG_REBOOT_MON   BIT(0)
> > > +
> > > +struct zx2967_wdt {
> > > + struct watchdog_device  wdt_device;
> > > + void __iomem*reg_base;
> > > + struct clk  *clock;
> > > +};
> > > +
> > > +static inline u32 zx2967_wdt_readl(struct zx2967_wdt *wdt, u16 reg)
> > > +{
> > > + return readl_relaxed(wdt->reg_base + reg);
> > > +}
> > > +
> > > +static inline void zx2967_wdt_writel(struct zx2967_wdt *wdt, u16 reg,
> > u32 val)
> > > +{
> > > + writel_relaxed(val | ZX2967_WDT_WRITEKEY, wdt->reg_base + reg);
> > > +}
> > > +
> > > +static void zx2967_wdt_refresh(struct zx2967_wdt *wdt)
> > > +{
> > > + u32 val;
> > > +
> > > + val = zx2967_wdt_readl(wdt, ZX2967_WDT_REFRESH_REG);
> > > + val ^= ZX2967_WDT_REFRESH_MASK;
> > > + zx2967_wdt_writel(wdt, ZX2967_WDT_REFRESH_REG, val);
> > > +}
> > > +
> > > +static int
> > > +zx2967_wdt_set_timeout(struct watchdog_device *wdd, unsigned int
> > timeout)
> > > +{
> > > + struct zx2967_wdt *wdt = watchdog_get_drvdata(wdd);
> > > + unsigned int divisor = ZX2967_WDT_DIV_DEFAULT;
> > > + unsigned int count;
> > > +
> > > + count = timeout * ZX2967_WDT_CLK_FREQ;
> > > + if (count > divisor * ZX2967_WDT_MAX_COUNT)
> > > + divisor = DIV_ROUND_UP(count, ZX2967_WDT_MAX_COUNT);
> > > + count = DIV_ROUND_UP(count, divisor);
> > > + 

Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-26 Thread Mathieu Poirier
On Thu, Jan 26, 2017 at 09:32:56AM +0800, Baoyou Xie wrote:
> On 26 January 2017 at 00:23, Mathieu Poirier 
> wrote:
> 
> > On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> > > This patch adds watchdog controller driver for ZTE's zx2967 family.
> > >
> > > Signed-off-by: Baoyou Xie 
> > > ---
> > >  drivers/watchdog/Kconfig  |  10 ++
> > >  drivers/watchdog/Makefile |   1 +
> > >  drivers/watchdog/zx2967_wdt.c | 276 ++
> > 
> > >  3 files changed, 287 insertions(+)
> > >  create mode 100644 drivers/watchdog/zx2967_wdt.c
> > >
> > > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > > index acb00b5..05093a2 100644
> > > --- a/drivers/watchdog/Kconfig
> > > +++ b/drivers/watchdog/Kconfig
> > > @@ -714,6 +714,16 @@ config ASPEED_WATCHDOG
> > > To compile this driver as a module, choose M here: the
> > > module will be called aspeed_wdt.
> > >
> > > +config ZX2967_WATCHDOG
> > > + tristate "ZTE zx2967 SoCs watchdog support"
> > > + depends on ARCH_ZX
> > > + select WATCHDOG_CORE
> > > + help
> > > +   Say Y here to include support for the watchdog timer
> > > +   in ZTE zx2967 SoCs.
> > > +   To compile this driver as a module, choose M here: the
> > > +   module will be called zx2967_wdt.
> > > +
> > >  # AVR32 Architecture
> > >
> > >  config AT32AP700X_WDT
> > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> > > index 0c3d35e..bf2d296 100644
> > > --- a/drivers/watchdog/Makefile
> > > +++ b/drivers/watchdog/Makefile
> > > @@ -82,6 +82,7 @@ obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
> > >  obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
> > >  obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
> > >  obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
> > > +obj-$(CONFIG_ZX2967_WATCHDOG) += zx2967_wdt.o
> > >
> > >  # AVR32 Architecture
> > >  obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
> > > diff --git a/drivers/watchdog/zx2967_wdt.c
> > b/drivers/watchdog/zx2967_wdt.c
> > > new file mode 100644
> > > index 000..8278471
> > > --- /dev/null
> > > +++ b/drivers/watchdog/zx2967_wdt.c
> > > @@ -0,0 +1,276 @@
> > > +/*
> > > + * watchdog driver for ZTE's zx2967 family
> > > + *
> > > + * Copyright (C) 2017 ZTE Ltd.
> > > + *
> > > + * Author: Baoyou Xie 
> > > + *
> > > + * License terms: GNU General Public License (GPL) version 2
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +
> > > +#define ZX2967_WDT_CFG_REG   0x4
> > > +#define ZX2967_WDT_LOAD_REG  0x8
> > > +#define ZX2967_WDT_REFRESH_REG   0x18
> > > +#define ZX2967_WDT_START_REG 0x1c
> > > +
> > > +#define ZX2967_WDT_REFRESH_MASK  0x3f
> > > +
> > > +#define ZX2967_WDT_CFG_DIV(n)n) & 0xff) -
> > 1) << 8)
> > > +#define ZX2967_WDT_START_EN  0x1
> > > +
> > > +#define ZX2967_WDT_WRITEKEY  0x1234
> > > +
> > > +#define ZX2967_WDT_DIV_DEFAULT   16
> > > +#define ZX2967_WDT_DEFAULT_TIMEOUT   32
> > > +#define ZX2967_WDT_MIN_TIMEOUT   1
> > > +#define ZX2967_WDT_MAX_TIMEOUT   524
> > > +#define ZX2967_WDT_MAX_COUNT 0x
> > > +
> > > +#define ZX2967_WDT_CLK_FREQ  0x8000
> > > +
> > > +#define ZX2967_WDT_FLAG_REBOOT_MON   BIT(0)
> > > +
> > > +struct zx2967_wdt {
> > > + struct watchdog_device  wdt_device;
> > > + void __iomem*reg_base;
> > > + struct clk  *clock;
> > > +};
> > > +
> > > +static inline u32 zx2967_wdt_readl(struct zx2967_wdt *wdt, u16 reg)
> > > +{
> > > + return readl_relaxed(wdt->reg_base + reg);
> > > +}
> > > +
> > > +static inline void zx2967_wdt_writel(struct zx2967_wdt *wdt, u16 reg,
> > u32 val)
> > > +{
> > > + writel_relaxed(val | ZX2967_WDT_WRITEKEY, wdt->reg_base + reg);
> > > +}
> > > +
> > > +static void zx2967_wdt_refresh(struct zx2967_wdt *wdt)
> > > +{
> > > + u32 val;
> > > +
> > > + val = zx2967_wdt_readl(wdt, ZX2967_WDT_REFRESH_REG);
> > > + val ^= ZX2967_WDT_REFRESH_MASK;
> > > + zx2967_wdt_writel(wdt, ZX2967_WDT_REFRESH_REG, val);
> > > +}
> > > +
> > > +static int
> > > +zx2967_wdt_set_timeout(struct watchdog_device *wdd, unsigned int
> > timeout)
> > > +{
> > > + struct zx2967_wdt *wdt = watchdog_get_drvdata(wdd);
> > > + unsigned int divisor = ZX2967_WDT_DIV_DEFAULT;
> > > + unsigned int count;
> > > +
> > > + count = timeout * ZX2967_WDT_CLK_FREQ;
> > > + if (count > divisor * ZX2967_WDT_MAX_COUNT)
> > > + divisor = DIV_ROUND_UP(count, ZX2967_WDT_MAX_COUNT);
> > > + count = DIV_ROUND_UP(count, divisor);
> > > + zx2967_wdt_writel(wdt, ZX2967_WDT_CFG_REG,
> > 

Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-25 Thread Mathieu Poirier
On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> This patch adds watchdog controller driver for ZTE's zx2967 family.
> 
> Signed-off-by: Baoyou Xie 
> ---
>  drivers/watchdog/Kconfig  |  10 ++
>  drivers/watchdog/Makefile |   1 +
>  drivers/watchdog/zx2967_wdt.c | 276 
> ++
>  3 files changed, 287 insertions(+)
>  create mode 100644 drivers/watchdog/zx2967_wdt.c
> 
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index acb00b5..05093a2 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -714,6 +714,16 @@ config ASPEED_WATCHDOG
> To compile this driver as a module, choose M here: the
> module will be called aspeed_wdt.
>  
> +config ZX2967_WATCHDOG
> + tristate "ZTE zx2967 SoCs watchdog support"
> + depends on ARCH_ZX
> + select WATCHDOG_CORE
> + help
> +   Say Y here to include support for the watchdog timer
> +   in ZTE zx2967 SoCs.
> +   To compile this driver as a module, choose M here: the
> +   module will be called zx2967_wdt.
> +
>  # AVR32 Architecture
>  
>  config AT32AP700X_WDT
> diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> index 0c3d35e..bf2d296 100644
> --- a/drivers/watchdog/Makefile
> +++ b/drivers/watchdog/Makefile
> @@ -82,6 +82,7 @@ obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
>  obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
>  obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
>  obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
> +obj-$(CONFIG_ZX2967_WATCHDOG) += zx2967_wdt.o
>  
>  # AVR32 Architecture
>  obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
> diff --git a/drivers/watchdog/zx2967_wdt.c b/drivers/watchdog/zx2967_wdt.c
> new file mode 100644
> index 000..8278471
> --- /dev/null
> +++ b/drivers/watchdog/zx2967_wdt.c
> @@ -0,0 +1,276 @@
> +/*
> + * watchdog driver for ZTE's zx2967 family
> + *
> + * Copyright (C) 2017 ZTE Ltd.
> + *
> + * Author: Baoyou Xie 
> + *
> + * License terms: GNU General Public License (GPL) version 2
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define ZX2967_WDT_CFG_REG   0x4
> +#define ZX2967_WDT_LOAD_REG  0x8
> +#define ZX2967_WDT_REFRESH_REG   0x18
> +#define ZX2967_WDT_START_REG 0x1c
> +
> +#define ZX2967_WDT_REFRESH_MASK  0x3f
> +
> +#define ZX2967_WDT_CFG_DIV(n)n) & 0xff) - 1) << 
> 8)
> +#define ZX2967_WDT_START_EN  0x1
> +
> +#define ZX2967_WDT_WRITEKEY  0x1234
> +
> +#define ZX2967_WDT_DIV_DEFAULT   16
> +#define ZX2967_WDT_DEFAULT_TIMEOUT   32
> +#define ZX2967_WDT_MIN_TIMEOUT   1
> +#define ZX2967_WDT_MAX_TIMEOUT   524
> +#define ZX2967_WDT_MAX_COUNT 0x
> +
> +#define ZX2967_WDT_CLK_FREQ  0x8000
> +
> +#define ZX2967_WDT_FLAG_REBOOT_MON   BIT(0)
> +
> +struct zx2967_wdt {
> + struct watchdog_device  wdt_device;
> + void __iomem*reg_base;
> + struct clk  *clock;
> +};
> +
> +static inline u32 zx2967_wdt_readl(struct zx2967_wdt *wdt, u16 reg)
> +{
> + return readl_relaxed(wdt->reg_base + reg);
> +}
> +
> +static inline void zx2967_wdt_writel(struct zx2967_wdt *wdt, u16 reg, u32 
> val)
> +{
> + writel_relaxed(val | ZX2967_WDT_WRITEKEY, wdt->reg_base + reg);
> +}
> +
> +static void zx2967_wdt_refresh(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_REFRESH_REG);
> + val ^= ZX2967_WDT_REFRESH_MASK;
> + zx2967_wdt_writel(wdt, ZX2967_WDT_REFRESH_REG, val);
> +}
> +
> +static int
> +zx2967_wdt_set_timeout(struct watchdog_device *wdd, unsigned int timeout)
> +{
> + struct zx2967_wdt *wdt = watchdog_get_drvdata(wdd);
> + unsigned int divisor = ZX2967_WDT_DIV_DEFAULT;
> + unsigned int count;
> +
> + count = timeout * ZX2967_WDT_CLK_FREQ;
> + if (count > divisor * ZX2967_WDT_MAX_COUNT)
> + divisor = DIV_ROUND_UP(count, ZX2967_WDT_MAX_COUNT);
> + count = DIV_ROUND_UP(count, divisor);
> + zx2967_wdt_writel(wdt, ZX2967_WDT_CFG_REG, ZX2967_WDT_CFG_DIV(divisor));
> + zx2967_wdt_writel(wdt, ZX2967_WDT_LOAD_REG, count);
> + zx2967_wdt_refresh(wdt);
> + wdd->timeout =  (count * divisor) / ZX2967_WDT_CLK_FREQ;
> +
> + return 0;
> +}
> +
> +static void __zx2967_wdt_start(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_START_REG);
> + val |= ZX2967_WDT_START_EN;
> + zx2967_wdt_writel(wdt, ZX2967_WDT_START_REG, val);
> +}
> +
> +static void __zx2967_wdt_stop(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_START_REG);
> + val &= 

Re: [PATCH v6 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family

2017-01-25 Thread Mathieu Poirier
On Wed, Jan 25, 2017 at 10:44:49AM +0800, Baoyou Xie wrote:
> This patch adds watchdog controller driver for ZTE's zx2967 family.
> 
> Signed-off-by: Baoyou Xie 
> ---
>  drivers/watchdog/Kconfig  |  10 ++
>  drivers/watchdog/Makefile |   1 +
>  drivers/watchdog/zx2967_wdt.c | 276 
> ++
>  3 files changed, 287 insertions(+)
>  create mode 100644 drivers/watchdog/zx2967_wdt.c
> 
> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> index acb00b5..05093a2 100644
> --- a/drivers/watchdog/Kconfig
> +++ b/drivers/watchdog/Kconfig
> @@ -714,6 +714,16 @@ config ASPEED_WATCHDOG
> To compile this driver as a module, choose M here: the
> module will be called aspeed_wdt.
>  
> +config ZX2967_WATCHDOG
> + tristate "ZTE zx2967 SoCs watchdog support"
> + depends on ARCH_ZX
> + select WATCHDOG_CORE
> + help
> +   Say Y here to include support for the watchdog timer
> +   in ZTE zx2967 SoCs.
> +   To compile this driver as a module, choose M here: the
> +   module will be called zx2967_wdt.
> +
>  # AVR32 Architecture
>  
>  config AT32AP700X_WDT
> diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> index 0c3d35e..bf2d296 100644
> --- a/drivers/watchdog/Makefile
> +++ b/drivers/watchdog/Makefile
> @@ -82,6 +82,7 @@ obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
>  obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
>  obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
>  obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
> +obj-$(CONFIG_ZX2967_WATCHDOG) += zx2967_wdt.o
>  
>  # AVR32 Architecture
>  obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
> diff --git a/drivers/watchdog/zx2967_wdt.c b/drivers/watchdog/zx2967_wdt.c
> new file mode 100644
> index 000..8278471
> --- /dev/null
> +++ b/drivers/watchdog/zx2967_wdt.c
> @@ -0,0 +1,276 @@
> +/*
> + * watchdog driver for ZTE's zx2967 family
> + *
> + * Copyright (C) 2017 ZTE Ltd.
> + *
> + * Author: Baoyou Xie 
> + *
> + * License terms: GNU General Public License (GPL) version 2
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define ZX2967_WDT_CFG_REG   0x4
> +#define ZX2967_WDT_LOAD_REG  0x8
> +#define ZX2967_WDT_REFRESH_REG   0x18
> +#define ZX2967_WDT_START_REG 0x1c
> +
> +#define ZX2967_WDT_REFRESH_MASK  0x3f
> +
> +#define ZX2967_WDT_CFG_DIV(n)n) & 0xff) - 1) << 
> 8)
> +#define ZX2967_WDT_START_EN  0x1
> +
> +#define ZX2967_WDT_WRITEKEY  0x1234
> +
> +#define ZX2967_WDT_DIV_DEFAULT   16
> +#define ZX2967_WDT_DEFAULT_TIMEOUT   32
> +#define ZX2967_WDT_MIN_TIMEOUT   1
> +#define ZX2967_WDT_MAX_TIMEOUT   524
> +#define ZX2967_WDT_MAX_COUNT 0x
> +
> +#define ZX2967_WDT_CLK_FREQ  0x8000
> +
> +#define ZX2967_WDT_FLAG_REBOOT_MON   BIT(0)
> +
> +struct zx2967_wdt {
> + struct watchdog_device  wdt_device;
> + void __iomem*reg_base;
> + struct clk  *clock;
> +};
> +
> +static inline u32 zx2967_wdt_readl(struct zx2967_wdt *wdt, u16 reg)
> +{
> + return readl_relaxed(wdt->reg_base + reg);
> +}
> +
> +static inline void zx2967_wdt_writel(struct zx2967_wdt *wdt, u16 reg, u32 
> val)
> +{
> + writel_relaxed(val | ZX2967_WDT_WRITEKEY, wdt->reg_base + reg);
> +}
> +
> +static void zx2967_wdt_refresh(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_REFRESH_REG);
> + val ^= ZX2967_WDT_REFRESH_MASK;
> + zx2967_wdt_writel(wdt, ZX2967_WDT_REFRESH_REG, val);
> +}
> +
> +static int
> +zx2967_wdt_set_timeout(struct watchdog_device *wdd, unsigned int timeout)
> +{
> + struct zx2967_wdt *wdt = watchdog_get_drvdata(wdd);
> + unsigned int divisor = ZX2967_WDT_DIV_DEFAULT;
> + unsigned int count;
> +
> + count = timeout * ZX2967_WDT_CLK_FREQ;
> + if (count > divisor * ZX2967_WDT_MAX_COUNT)
> + divisor = DIV_ROUND_UP(count, ZX2967_WDT_MAX_COUNT);
> + count = DIV_ROUND_UP(count, divisor);
> + zx2967_wdt_writel(wdt, ZX2967_WDT_CFG_REG, ZX2967_WDT_CFG_DIV(divisor));
> + zx2967_wdt_writel(wdt, ZX2967_WDT_LOAD_REG, count);
> + zx2967_wdt_refresh(wdt);
> + wdd->timeout =  (count * divisor) / ZX2967_WDT_CLK_FREQ;
> +
> + return 0;
> +}
> +
> +static void __zx2967_wdt_start(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_START_REG);
> + val |= ZX2967_WDT_START_EN;
> + zx2967_wdt_writel(wdt, ZX2967_WDT_START_REG, val);
> +}
> +
> +static void __zx2967_wdt_stop(struct zx2967_wdt *wdt)
> +{
> + u32 val;
> +
> + val = zx2967_wdt_readl(wdt, ZX2967_WDT_START_REG);
> + val &= ~ZX2967_WDT_START_EN;
> +