linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/pinctrl/sh-pfc/pfc-r8a7740.c between commit 5d27619498ab
("sh-pfc: r8a7740: Fix pin bias setup") from Linus' tree and commit
5b46ac3a7723 ("sh-pfc: Rename sh_pfc window field to windows") from the
pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwell
diff --cc drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index bc5eb453a45c,a189b962a1eb..
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@@ -3720,8 -3709,8 +3709,8 @@@ static void __iomem *r8a7740_pinmux_por
const struct r8a7740_portcr_group *group =
_portcr_offsets[i];
- if (i <= group->end_pin)
+ if (pin <= group->end_pin)
- return pfc->window->virt + group->offset + pin;
+ return pfc->windows->virt + group->offset + pin;
}
return NULL;
pgpcoUjBLWvr_.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus, Today's linux-next merge of the pinctrl tree got a conflict in drivers/pinctrl/sh-pfc/pfc-r8a7740.c between commit 5d27619498ab (sh-pfc: r8a7740: Fix pin bias setup) from Linus' tree and commit 5b46ac3a7723 (sh-pfc: Rename sh_pfc window field to windows) from the pinctrl tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwell s...@canb.auug.org.au diff --cc drivers/pinctrl/sh-pfc/pfc-r8a7740.c index bc5eb453a45c,a189b962a1eb.. --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@@ -3720,8 -3709,8 +3709,8 @@@ static void __iomem *r8a7740_pinmux_por const struct r8a7740_portcr_group *group = r8a7740_portcr_offsets[i]; - if (i = group-end_pin) + if (pin = group-end_pin) - return pfc-window-virt + group-offset + pin; + return pfc-windows-virt + group-offset + pin; } return NULL; pgpcoUjBLWvr_.pgp Description: PGP signature
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 7:20 PM, Linus Walleij wrote: >> Note the following return in between the locking and unlocking - >> need an unlock there? >> >>> + case PIN_CONFIG_DRIVE_STRENGTH: >>> + strength = pinconf_to_config_argument(configs[i]); >>> + if (strength > 40) >>> + return -EINVAL; > > Argh. Send a patch with your reported-by tag... Not SEND, I mean SENT, I just SENT a patch... subject "pinctrl: sunxi: drop lock on error path" sorry for the confusion. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 5:24 PM, Sherman Yin wrote: > Hmm, I fixed this the first time I ported over to LinusW's devel tree, > but when I rebased on Sunday, the spin lock commit seemed to be > reverted or gone. My pinctrl devel branch was branched off of v3.11-rc1, and the spinlock changes were in some later -rc and I didn't merge them in until now, because I thought they were orthogonal. How wrong I was. So merged in -rc7 now and pushed, please check the end result or linux-next. > Note the following return in between the locking and unlocking - > need an unlock there? > >> + case PIN_CONFIG_DRIVE_STRENGTH: >> + strength = pinconf_to_config_argument(configs[i]); >> + if (strength > 40) >> + return -EINVAL; Argh. Send a patch with your reported-by tag... Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: linux-next: manual merge of the pinctrl tree with Linus' tree
>I made a bit different fix, I just lock the spinlock around the entire >loop, as this is not doing any delays or anything like that and >just hammer a few registers with the settings, it makes sense to >have that inside a single lock: Hmm, I fixed this the first time I ported over to LinusW's devel tree, but when I rebased on Sunday, the spin lock commit seemed to be reverted or gone. Note the following return in between the locking and unlocking - need an unlock there? > + case PIN_CONFIG_DRIVE_STRENGTH: > + strength = pinconf_to_config_argument(configs[i]); > + if (strength > 40) > + return -EINVAL; > + /* > + * We convert from mA to what the register expects: > + * 0: 10mA > + * 1: 20mA > + * 2: 30mA > + * 3: 40mA > + */ Regards, Sherman -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 9:17 AM, Stephen Rothwell wrote:
> I fixed it up (see below) and can carry the fix as necessary (no action
> is required).
I made a bit different fix, I just lock the spinlock around the entire
loop, as this is not doing any delays or anything like that and
just hammer a few registers with the settings, it makes sense to
have that inside a single lock:
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@@ -282,48 -282,57 +283,51 @@@ static int sunxi_pconf_group_set(struc
u32 val, mask;
u16 strength;
u8 dlevel;
+ int i;
- switch (pinconf_to_config_param(config)) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- strength = pinconf_to_config_argument(config);
- if (strength > 40)
- return -EINVAL;
- /*
- * We convert from mA to what the register expects:
- * 0: 10mA
- * 1: 20mA
- * 2: 30mA
- * 3: 40mA
- */
- dlevel = strength / 10 - 1;
-
- spin_lock_irqsave(>lock, flags);
-
- val = readl(pctl->membase + sunxi_dlevel_reg(g->pin));
- mask = DLEVEL_PINS_MASK << sunxi_dlevel_offset(g->pin);
- writel((val & ~mask) | dlevel << sunxi_dlevel_offset(g->pin),
- pctl->membase + sunxi_dlevel_reg(g->pin));
-
- spin_unlock_irqrestore(>lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- spin_lock_irqsave(>lock, flags);
-
- val = readl(pctl->membase + sunxi_pull_reg(g->pin));
- mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
- writel((val & ~mask) | 1 << sunxi_pull_offset(g->pin),
- pctl->membase + sunxi_pull_reg(g->pin));
-
- spin_unlock_irqrestore(>lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- spin_lock_irqsave(>lock, flags);
-
- val = readl(pctl->membase + sunxi_pull_reg(g->pin));
- mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
- writel((val & ~mask) | 2 << sunxi_pull_offset(g->pin),
- pctl->membase + sunxi_pull_reg(g->pin));
++ spin_lock_irqsave(>lock, flags);
+
- spin_unlock_irqrestore(>lock, flags);
- break;
- default:
- break;
- }
+ for (i = 0; i < num_configs; i++) {
+ switch (pinconf_to_config_param(configs[i])) {
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ strength = pinconf_to_config_argument(configs[i]);
+ if (strength > 40)
+ return -EINVAL;
+ /*
+ * We convert from mA to what the register expects:
+ * 0: 10mA
+ * 1: 20mA
+ * 2: 30mA
+ * 3: 40mA
+ */
+ dlevel = strength / 10 - 1;
+ val = readl(pctl->membase + sunxi_dlevel_reg(g->pin));
+ mask = DLEVEL_PINS_MASK << sunxi_dlevel_offset(g->pin);
+ writel((val & ~mask)
+ | dlevel << sunxi_dlevel_offset(g->pin),
+ pctl->membase + sunxi_dlevel_reg(g->pin));
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ val = readl(pctl->membase + sunxi_pull_reg(g->pin));
+ mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
+ writel((val & ~mask) | 1 << sunxi_pull_offset(g->pin),
+ pctl->membase + sunxi_pull_reg(g->pin));
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ val = readl(pctl->membase + sunxi_pull_reg(g->pin));
+ mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
+ writel((val & ~mask) | 2 << sunxi_pull_offset(g->pin),
+ pctl->membase + sunxi_pull_reg(g->pin));
+ break;
+ default:
+ break;
+ }
-
+ /* cache the config value */
+ g->config = configs[i];
+ } /* for each config */
- /* cache the config value */
- g->config = config;
++ spin_unlock_irqrestore(>lock, flags);
+
return 0;
}
Yours,
Linus Walleij
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Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 9:17 AM, Stephen Rothwell wrote:
> Hi Linus,
>
> Today's linux-next merge of the pinctrl tree got a conflict in
> drivers/pinctrl/pinctrl-sunxi.c between commit 1bee963db9dd ("pinctrl:
> sunxi: Add spinlocks") from Linus' tree and commit 03b054e9696c
> ("pinctrl: Pass all configs to driver on pin_config_set()") from the
> pinctrl tree.
>
> I fixed it up (see below) and can carry the fix as necessary (no action
> is required).
Hm yeah I think I should just merge in the latest -rc to smoothen
this over, as both conflicting patches come from my tree...
Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/pinctrl/pinctrl-sunxi.c between commit 1bee963db9dd ("pinctrl:
sunxi: Add spinlocks") from Linus' tree and commit 03b054e9696c
("pinctrl: Pass all configs to driver on pin_config_set()") from the
pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/pinctrl/pinctrl-sunxi.c
index 94716c7,8dbd465..000
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@@ -282,56 -282,47 +283,60 @@@ static int sunxi_pconf_group_set(struc
u32 val, mask;
u16 strength;
u8 dlevel;
+ int i;
- switch (pinconf_to_config_param(config)) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- strength = pinconf_to_config_argument(config);
- if (strength > 40)
- return -EINVAL;
- /*
-* We convert from mA to what the register expects:
-* 0: 10mA
-* 1: 20mA
-* 2: 30mA
-* 3: 40mA
-*/
- dlevel = strength / 10 - 1;
-
- spin_lock_irqsave(>lock, flags);
-
- val = readl(pctl->membase + sunxi_dlevel_reg(g->pin));
- mask = DLEVEL_PINS_MASK << sunxi_dlevel_offset(g->pin);
- writel((val & ~mask) | dlevel << sunxi_dlevel_offset(g->pin),
- pctl->membase + sunxi_dlevel_reg(g->pin));
-
- spin_unlock_irqrestore(>lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- spin_lock_irqsave(>lock, flags);
+ for (i = 0; i < num_configs; i++) {
+ switch (pinconf_to_config_param(configs[i])) {
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ strength = pinconf_to_config_argument(configs[i]);
+ if (strength > 40)
+ return -EINVAL;
+ /*
+* We convert from mA to what the register expects:
+* 0: 10mA
+* 1: 20mA
+* 2: 30mA
+* 3: 40mA
+*/
+ dlevel = strength / 10 - 1;
++
++ spin_lock_irqsave(>lock, flags);
++
+ val = readl(pctl->membase + sunxi_dlevel_reg(g->pin));
+ mask = DLEVEL_PINS_MASK << sunxi_dlevel_offset(g->pin);
+ writel((val & ~mask)
+ | dlevel << sunxi_dlevel_offset(g->pin),
+ pctl->membase + sunxi_dlevel_reg(g->pin));
++
++ spin_unlock_irqrestore(>lock, flags);
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
++ spin_lock_irqsave(>lock, flags);
+
- val = readl(pctl->membase + sunxi_pull_reg(g->pin));
- mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
- writel((val & ~mask) | 1 << sunxi_pull_offset(g->pin),
- pctl->membase + sunxi_pull_reg(g->pin));
+ val = readl(pctl->membase + sunxi_pull_reg(g->pin));
+ mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
+ writel((val & ~mask) | 1 << sunxi_pull_offset(g->pin),
+ pctl->membase + sunxi_pull_reg(g->pin));
+
- spin_unlock_irqrestore(>lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- spin_lock_irqsave(>lock, flags);
++ spin_unlock_irqrestore(>lock, flags);
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
++ spin_lock_irqsave(>lock, flags);
+
- val = readl(pctl->membase + sunxi_pull_reg(g->pin));
- mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
- writel((val & ~mask) | 2 << sunxi_pull_offset(g->pin),
- pctl->membase + sunxi_pull_reg(g->pin));
+ val = readl(pctl->membase + sunxi_pull_reg(g->pin));
+ mask = PULL_PINS_MASK << sunxi_pull_offset(g->pin);
+ writel((val & ~mask) | 2 << sunxi_pull_offset(g->pin),
+ pctl->membase + sunxi_pull_reg(g->pin));
+
- spin_unlock_irqrestore(>lock, flags);
- break;
- default:
- break;
- }
++ spin_unlock_irqrestore(>lock, flags);
+ break;
+ default:
+ break;
+ }
- /* cache the config value */
- g->config = config;
+ /* cache the config value */
+ g->config =
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/pinctrl/pinctrl-sunxi.c between commit 1bee963db9dd (pinctrl:
sunxi: Add spinlocks) from Linus' tree and commit 03b054e9696c
(pinctrl: Pass all configs to driver on pin_config_set()) from the
pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/pinctrl/pinctrl-sunxi.c
index 94716c7,8dbd465..000
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@@ -282,56 -282,47 +283,60 @@@ static int sunxi_pconf_group_set(struc
u32 val, mask;
u16 strength;
u8 dlevel;
+ int i;
- switch (pinconf_to_config_param(config)) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- strength = pinconf_to_config_argument(config);
- if (strength 40)
- return -EINVAL;
- /*
-* We convert from mA to what the register expects:
-* 0: 10mA
-* 1: 20mA
-* 2: 30mA
-* 3: 40mA
-*/
- dlevel = strength / 10 - 1;
-
- spin_lock_irqsave(pctl-lock, flags);
-
- val = readl(pctl-membase + sunxi_dlevel_reg(g-pin));
- mask = DLEVEL_PINS_MASK sunxi_dlevel_offset(g-pin);
- writel((val ~mask) | dlevel sunxi_dlevel_offset(g-pin),
- pctl-membase + sunxi_dlevel_reg(g-pin));
-
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- spin_lock_irqsave(pctl-lock, flags);
+ for (i = 0; i num_configs; i++) {
+ switch (pinconf_to_config_param(configs[i])) {
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ strength = pinconf_to_config_argument(configs[i]);
+ if (strength 40)
+ return -EINVAL;
+ /*
+* We convert from mA to what the register expects:
+* 0: 10mA
+* 1: 20mA
+* 2: 30mA
+* 3: 40mA
+*/
+ dlevel = strength / 10 - 1;
++
++ spin_lock_irqsave(pctl-lock, flags);
++
+ val = readl(pctl-membase + sunxi_dlevel_reg(g-pin));
+ mask = DLEVEL_PINS_MASK sunxi_dlevel_offset(g-pin);
+ writel((val ~mask)
+ | dlevel sunxi_dlevel_offset(g-pin),
+ pctl-membase + sunxi_dlevel_reg(g-pin));
++
++ spin_unlock_irqrestore(pctl-lock, flags);
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
++ spin_lock_irqsave(pctl-lock, flags);
+
- val = readl(pctl-membase + sunxi_pull_reg(g-pin));
- mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
- writel((val ~mask) | 1 sunxi_pull_offset(g-pin),
- pctl-membase + sunxi_pull_reg(g-pin));
+ val = readl(pctl-membase + sunxi_pull_reg(g-pin));
+ mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
+ writel((val ~mask) | 1 sunxi_pull_offset(g-pin),
+ pctl-membase + sunxi_pull_reg(g-pin));
+
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- spin_lock_irqsave(pctl-lock, flags);
++ spin_unlock_irqrestore(pctl-lock, flags);
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
++ spin_lock_irqsave(pctl-lock, flags);
+
- val = readl(pctl-membase + sunxi_pull_reg(g-pin));
- mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
- writel((val ~mask) | 2 sunxi_pull_offset(g-pin),
- pctl-membase + sunxi_pull_reg(g-pin));
+ val = readl(pctl-membase + sunxi_pull_reg(g-pin));
+ mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
+ writel((val ~mask) | 2 sunxi_pull_offset(g-pin),
+ pctl-membase + sunxi_pull_reg(g-pin));
+
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- default:
- break;
- }
++ spin_unlock_irqrestore(pctl-lock, flags);
+ break;
+ default:
+ break;
+ }
- /* cache the config value */
- g-config = config;
+ /* cache the config value */
+ g-config = configs[i];
+ } /* for each
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 9:17 AM, Stephen Rothwell s...@canb.auug.org.au wrote: Hi Linus, Today's linux-next merge of the pinctrl tree got a conflict in drivers/pinctrl/pinctrl-sunxi.c between commit 1bee963db9dd (pinctrl: sunxi: Add spinlocks) from Linus' tree and commit 03b054e9696c (pinctrl: Pass all configs to driver on pin_config_set()) from the pinctrl tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). Hm yeah I think I should just merge in the latest -rc to smoothen this over, as both conflicting patches come from my tree... Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 9:17 AM, Stephen Rothwell s...@canb.auug.org.au wrote:
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
I made a bit different fix, I just lock the spinlock around the entire
loop, as this is not doing any delays or anything like that and
just hammer a few registers with the settings, it makes sense to
have that inside a single lock:
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@@ -282,48 -282,57 +283,51 @@@ static int sunxi_pconf_group_set(struc
u32 val, mask;
u16 strength;
u8 dlevel;
+ int i;
- switch (pinconf_to_config_param(config)) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- strength = pinconf_to_config_argument(config);
- if (strength 40)
- return -EINVAL;
- /*
- * We convert from mA to what the register expects:
- * 0: 10mA
- * 1: 20mA
- * 2: 30mA
- * 3: 40mA
- */
- dlevel = strength / 10 - 1;
-
- spin_lock_irqsave(pctl-lock, flags);
-
- val = readl(pctl-membase + sunxi_dlevel_reg(g-pin));
- mask = DLEVEL_PINS_MASK sunxi_dlevel_offset(g-pin);
- writel((val ~mask) | dlevel sunxi_dlevel_offset(g-pin),
- pctl-membase + sunxi_dlevel_reg(g-pin));
-
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- spin_lock_irqsave(pctl-lock, flags);
-
- val = readl(pctl-membase + sunxi_pull_reg(g-pin));
- mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
- writel((val ~mask) | 1 sunxi_pull_offset(g-pin),
- pctl-membase + sunxi_pull_reg(g-pin));
-
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- case PIN_CONFIG_BIAS_PULL_DOWN:
- spin_lock_irqsave(pctl-lock, flags);
-
- val = readl(pctl-membase + sunxi_pull_reg(g-pin));
- mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
- writel((val ~mask) | 2 sunxi_pull_offset(g-pin),
- pctl-membase + sunxi_pull_reg(g-pin));
++ spin_lock_irqsave(pctl-lock, flags);
+
- spin_unlock_irqrestore(pctl-lock, flags);
- break;
- default:
- break;
- }
+ for (i = 0; i num_configs; i++) {
+ switch (pinconf_to_config_param(configs[i])) {
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ strength = pinconf_to_config_argument(configs[i]);
+ if (strength 40)
+ return -EINVAL;
+ /*
+ * We convert from mA to what the register expects:
+ * 0: 10mA
+ * 1: 20mA
+ * 2: 30mA
+ * 3: 40mA
+ */
+ dlevel = strength / 10 - 1;
+ val = readl(pctl-membase + sunxi_dlevel_reg(g-pin));
+ mask = DLEVEL_PINS_MASK sunxi_dlevel_offset(g-pin);
+ writel((val ~mask)
+ | dlevel sunxi_dlevel_offset(g-pin),
+ pctl-membase + sunxi_dlevel_reg(g-pin));
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ val = readl(pctl-membase + sunxi_pull_reg(g-pin));
+ mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
+ writel((val ~mask) | 1 sunxi_pull_offset(g-pin),
+ pctl-membase + sunxi_pull_reg(g-pin));
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ val = readl(pctl-membase + sunxi_pull_reg(g-pin));
+ mask = PULL_PINS_MASK sunxi_pull_offset(g-pin);
+ writel((val ~mask) | 2 sunxi_pull_offset(g-pin),
+ pctl-membase + sunxi_pull_reg(g-pin));
+ break;
+ default:
+ break;
+ }
-
+ /* cache the config value */
+ g-config = configs[i];
+ } /* for each config */
- /* cache the config value */
- g-config = config;
++ spin_unlock_irqrestore(pctl-lock, flags);
+
return 0;
}
Yours,
Linus Walleij
--
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the body of a message to majord...@vger.kernel.org
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Please read the FAQ at http://www.tux.org/lkml/
RE: linux-next: manual merge of the pinctrl tree with Linus' tree
I made a bit different fix, I just lock the spinlock around the entire loop, as this is not doing any delays or anything like that and just hammer a few registers with the settings, it makes sense to have that inside a single lock: Hmm, I fixed this the first time I ported over to LinusW's devel tree, but when I rebased on Sunday, the spin lock commit seemed to be reverted or gone. Note the following return in between the locking and unlocking - need an unlock there? + case PIN_CONFIG_DRIVE_STRENGTH: + strength = pinconf_to_config_argument(configs[i]); + if (strength 40) + return -EINVAL; + /* + * We convert from mA to what the register expects: + * 0: 10mA + * 1: 20mA + * 2: 30mA + * 3: 40mA + */ Regards, Sherman -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 5:24 PM, Sherman Yin s...@broadcom.com wrote: Hmm, I fixed this the first time I ported over to LinusW's devel tree, but when I rebased on Sunday, the spin lock commit seemed to be reverted or gone. My pinctrl devel branch was branched off of v3.11-rc1, and the spinlock changes were in some later -rc and I didn't merge them in until now, because I thought they were orthogonal. How wrong I was. So merged in -rc7 now and pushed, please check the end result or linux-next. Note the following return in between the locking and unlocking - need an unlock there? + case PIN_CONFIG_DRIVE_STRENGTH: + strength = pinconf_to_config_argument(configs[i]); + if (strength 40) + return -EINVAL; Argh. Send a patch with your reported-by tag... Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On Thu, Aug 29, 2013 at 7:20 PM, Linus Walleij linus.wall...@linaro.org wrote: Note the following return in between the locking and unlocking - need an unlock there? + case PIN_CONFIG_DRIVE_STRENGTH: + strength = pinconf_to_config_argument(configs[i]); + if (strength 40) + return -EINVAL; Argh. Send a patch with your reported-by tag... Not SEND, I mean SENT, I just SENT a patch... subject pinctrl: sunxi: drop lock on error path sorry for the confusion. Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On 06/17/2013 08:11 AM, Stephen Rothwell wrote: > Hi Linus, Hi Stephen, > I fixed it up (see below) and can carry the fix as necessary (no > action is required). The fix looks good. Sebastian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/net/ethernet/ti/davinci_mdio.c between commit 2786aae7fc93
("net/ti davinci_mdio: don't hold a spin lock while calling pm_runtime")
from Linus' tree and commit 5c0e3580cb98 ("drivers: net: davinci_mdio:
use pinctrl PM helpers") from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/net/ethernet/ti/davinci_mdio.c
index c47f0db,5e361f4..000
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@@ -449,22 -453,32 +453,28 @@@ static int davinci_mdio_suspend(struct
__raw_writel(ctrl, >regs->control);
wait_for_idle(data);
- pm_runtime_put_sync(data->dev);
-
data->suspended = true;
spin_unlock(>lock);
+ pm_runtime_put_sync(data->dev);
+ /* Select sleep pin state */
+ pinctrl_pm_select_sleep_state(dev);
+
return 0;
}
static int davinci_mdio_resume(struct device *dev)
{
struct davinci_mdio_data *data = dev_get_drvdata(dev);
- u32 ctrl;
+ /* Select default pin state */
+ pinctrl_pm_select_default_state(dev);
+
- spin_lock(>lock);
pm_runtime_get_sync(data->dev);
+ spin_lock(>lock);
/* restart the scan state machine */
- ctrl = __raw_readl(>regs->control);
- ctrl |= CONTROL_ENABLE;
- __raw_writel(ctrl, >regs->control);
+ __davinci_mdio_reset(data);
data->suspended = false;
spin_unlock(>lock);
pgp6ZYvMIETmV.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/net/ethernet/ti/davinci_mdio.c between commit 2786aae7fc93
(net/ti davinci_mdio: don't hold a spin lock while calling pm_runtime)
from Linus' tree and commit 5c0e3580cb98 (drivers: net: davinci_mdio:
use pinctrl PM helpers) from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/net/ethernet/ti/davinci_mdio.c
index c47f0db,5e361f4..000
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@@ -449,22 -453,32 +453,28 @@@ static int davinci_mdio_suspend(struct
__raw_writel(ctrl, data-regs-control);
wait_for_idle(data);
- pm_runtime_put_sync(data-dev);
-
data-suspended = true;
spin_unlock(data-lock);
+ pm_runtime_put_sync(data-dev);
+ /* Select sleep pin state */
+ pinctrl_pm_select_sleep_state(dev);
+
return 0;
}
static int davinci_mdio_resume(struct device *dev)
{
struct davinci_mdio_data *data = dev_get_drvdata(dev);
- u32 ctrl;
+ /* Select default pin state */
+ pinctrl_pm_select_default_state(dev);
+
- spin_lock(data-lock);
pm_runtime_get_sync(data-dev);
+ spin_lock(data-lock);
/* restart the scan state machine */
- ctrl = __raw_readl(data-regs-control);
- ctrl |= CONTROL_ENABLE;
- __raw_writel(ctrl, data-regs-control);
+ __davinci_mdio_reset(data);
data-suspended = false;
spin_unlock(data-lock);
pgp6ZYvMIETmV.pgp
Description: PGP signature
Re: linux-next: manual merge of the pinctrl tree with Linus' tree
On 06/17/2013 08:11 AM, Stephen Rothwell wrote: Hi Linus, Hi Stephen, I fixed it up (see below) and can carry the fix as necessary (no action is required). The fix looks good. Sebastian -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/mtd/nand/atmel_nand.c between commit 28446acb1f82 ("mtd: atmel
nand: fix gpio missing request") from Linus' tree and commit 08695153170c
("MTD: atmel nand: fix gpio missing request") from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/mtd/nand/atmel_nand.c
index 9144557,f48587b..000
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@@ -1414,12 -585,19 +1416,20 @@@ static int __init atmel_nand_probe(stru
nand_chip->IO_ADDR_W = host->io_base;
nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
+ pinctrl = devm_pinctrl_get_select_default(>dev);
+ if (IS_ERR(pinctrl)) {
+ dev_err(host->dev, "Failed to request pinctrl\n");
+ res = PTR_ERR(pinctrl);
+ goto err_ecc_ioremap;
+ }
+
if (gpio_is_valid(host->board.rdy_pin)) {
- res = gpio_request(host->board.rdy_pin, "nand_rdy");
+ res = devm_gpio_request(>dev,
+ host->board.rdy_pin, "nand_rdy");
if (res < 0) {
dev_err(>dev,
- "can't request rdy gpio %d\n",
host->board.rdy_pin);
+ "can't request rdy gpio %d\n",
+ host->board.rdy_pin);
goto err_ecc_ioremap;
}
@@@ -1435,11 -612,11 +1444,12 @@@
}
if (gpio_is_valid(host->board.enable_pin)) {
- res = gpio_request(host->board.enable_pin, "nand_enable");
+ res = devm_gpio_request(>dev,
+ host->board.enable_pin, "nand_enable");
if (res < 0) {
dev_err(>dev,
- "can't request enable gpio %d\n",
host->board.enable_pin);
+ "can't request enable gpio %d\n",
+ host->board.enable_pin);
goto err_ecc_ioremap;
}
@@@ -1465,11 -664,11 +1475,12 @@@
atmel_nand_enable(host);
if (gpio_is_valid(host->board.det_pin)) {
- res = gpio_request(host->board.det_pin, "nand_det");
+ res = devm_gpio_request(>dev,
+ host->board.det_pin, "nand_det");
if (res < 0) {
dev_err(>dev,
- "can't request det gpio %d\n",
host->board.det_pin);
+ "can't request det gpio %d\n",
+ host->board.det_pin);
goto err_no_card;
}
pgpImxNCqOazi.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
arch/arm/mach-at91/at91sam9x5.c between commits af2a5f09fb6d ("Replace
clk_lookup.con_id with clk_lookup.dev_id entries for twi clk") and f7d19b906556
("ARM: at91: add clocks for I2C DT entries") from Linus' tree and commit
5c70cd3c7c69 ("arm: at91: dt: at91sam9 add pinctrl support") from the pinctrl
tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc arch/arm/mach-at91/at91sam9x5.c
index e503538,79b5c52..000
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@@ -231,13 -231,10 +231,13 @@@ static struct clk_lookup periph_clocks_
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", _clk),
CLKDEV_CON_DEV_ID("dma_clk", "ec00.dma-controller", _clk),
CLKDEV_CON_DEV_ID("dma_clk", "ee00.dma-controller", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f801.i2c", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", _clk),
- CLKDEV_CON_ID("pioA", _clk),
- CLKDEV_CON_ID("pioB", _clk),
- CLKDEV_CON_ID("pioC", _clk),
- CLKDEV_CON_ID("pioD", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f400.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f600.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f800.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "fa00.gpio", _clk),
/* additional fake clock for macb_hclk */
CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", _clk),
CLKDEV_CON_DEV_ID("hclk", "f803.ethernet", _clk),
pgpY5DUDpSqEJ.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
arch/arm/mach-at91/at91sam9263.c between commit f7d19b906556 ("ARM: at91:
add clocks for I2C DT entries") from Linus' tree and commit 5c70cd3c7c69
("arm: at91: dt: at91sam9 add pinctrl support") from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc arch/arm/mach-at91/at91sam9263.c
index 6a01d03,2edf813..000
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@@ -211,7 -210,11 +211,12 @@@ static struct clk_lookup periph_clocks_
CLKDEV_CON_DEV_ID("hclk", "a0.ohci", _clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", _clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f200.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f400.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f600.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "f800.gpio", _clk),
+ CLKDEV_CON_DEV_ID(NULL, "fa00.gpio", _clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
pgp4jSIBefZjP.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
arch/arm/boot/dts/at91sam9g25ek.dts between commit fbc1871511ed ("ARM:
dts: add twi nodes for atmel boards") from Linus' tree and commit
77ccddbdc0c9 ("arm: at91: dt: at91sam9 add serial pinctrl support") from
the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc arch/arm/boot/dts/at91sam9g25ek.dts
index 877c08f,c5ab16f..000
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@@ -13,49 -13,4 +13,20 @@@
/ {
model = "Atmel AT91SAM9G25-EK";
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek",
"atmel,at91sam9x5", "atmel,at91sam9";
+
- chosen {
- bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw
rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
- };
-
+ ahb {
+ apb {
- dbgu: serial@f200 {
- status = "okay";
- };
-
- usart0: serial@f801c000 {
- status = "okay";
- };
-
- macb0: ethernet@f802c000 {
- phy-mode = "rmii";
- status = "okay";
- };
-
+ i2c0: i2c@f801 {
+ status = "okay";
+ };
+
+ i2c1: i2c@f8014000 {
+ status = "okay";
+ };
+
+ i2c2: i2c@f8018000 {
+ status = "okay";
+ };
+ };
-
- usb0: ohci@0060 {
- status = "okay";
- num-ports = <2>;
- atmel,vbus-gpio = < 19 1
- 20 1
- >;
- };
-
- usb1: ehci@0070 {
- status = "okay";
- };
+ };
};
pgpMJVF6zX0tn.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
arch/arm/boot/dts/at91sam9g25ek.dts between commit fbc1871511ed (ARM:
dts: add twi nodes for atmel boards) from Linus' tree and commit
77ccddbdc0c9 (arm: at91: dt: at91sam9 add serial pinctrl support) from
the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc arch/arm/boot/dts/at91sam9g25ek.dts
index 877c08f,c5ab16f..000
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@@ -13,49 -13,4 +13,20 @@@
/ {
model = Atmel AT91SAM9G25-EK;
compatible = atmel,at91sam9g25ek, atmel,at91sam9x5ek,
atmel,at91sam9x5, atmel,at91sam9;
+
- chosen {
- bootargs = console=ttyS0,115200 root=/dev/mtdblock1 rw
rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs;
- };
-
+ ahb {
+ apb {
- dbgu: serial@f200 {
- status = okay;
- };
-
- usart0: serial@f801c000 {
- status = okay;
- };
-
- macb0: ethernet@f802c000 {
- phy-mode = rmii;
- status = okay;
- };
-
+ i2c0: i2c@f801 {
+ status = okay;
+ };
+
+ i2c1: i2c@f8014000 {
+ status = okay;
+ };
+
+ i2c2: i2c@f8018000 {
+ status = okay;
+ };
+ };
-
- usb0: ohci@0060 {
- status = okay;
- num-ports = 2;
- atmel,vbus-gpio = pioD 19 1
- pioD 20 1
- ;
- };
-
- usb1: ehci@0070 {
- status = okay;
- };
+ };
};
pgpMJVF6zX0tn.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
arch/arm/mach-at91/at91sam9263.c between commit f7d19b906556 (ARM: at91:
add clocks for I2C DT entries) from Linus' tree and commit 5c70cd3c7c69
(arm: at91: dt: at91sam9 add pinctrl support) from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc arch/arm/mach-at91/at91sam9263.c
index 6a01d03,2edf813..000
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@@ -211,7 -210,11 +211,12 @@@ static struct clk_lookup periph_clocks_
CLKDEV_CON_DEV_ID(hclk, a0.ohci, ohci_clk),
CLKDEV_CON_DEV_ID(spi_clk, fffa4000.spi, spi0_clk),
CLKDEV_CON_DEV_ID(spi_clk, fffa8000.spi, spi1_clk),
+ CLKDEV_CON_DEV_ID(NULL, fff88000.i2c, twi_clk),
+ CLKDEV_CON_DEV_ID(NULL, f200.gpio, pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, f400.gpio, pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, f600.gpio, pioCDE_clk),
+ CLKDEV_CON_DEV_ID(NULL, f800.gpio, pioCDE_clk),
+ CLKDEV_CON_DEV_ID(NULL, fa00.gpio, pioCDE_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
pgp4jSIBefZjP.pgp
Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus, Today's linux-next merge of the pinctrl tree got a conflict in arch/arm/mach-at91/at91sam9x5.c between commits af2a5f09fb6d (Replace clk_lookup.con_id with clk_lookup.dev_id entries for twi clk) and f7d19b906556 (ARM: at91: add clocks for I2C DT entries) from Linus' tree and commit 5c70cd3c7c69 (arm: at91: dt: at91sam9 add pinctrl support) from the pinctrl tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwells...@canb.auug.org.au diff --cc arch/arm/mach-at91/at91sam9x5.c index e503538,79b5c52..000 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@@ -231,13 -231,10 +231,13 @@@ static struct clk_lookup periph_clocks_ CLKDEV_CON_DEV_ID(t0_clk, f800c000.timer, tcb0_clk), CLKDEV_CON_DEV_ID(dma_clk, ec00.dma-controller, dma0_clk), CLKDEV_CON_DEV_ID(dma_clk, ee00.dma-controller, dma1_clk), + CLKDEV_CON_DEV_ID(NULL, f801.i2c, twi0_clk), + CLKDEV_CON_DEV_ID(NULL, f8014000.i2c, twi1_clk), + CLKDEV_CON_DEV_ID(NULL, f8018000.i2c, twi2_clk), - CLKDEV_CON_ID(pioA, pioAB_clk), - CLKDEV_CON_ID(pioB, pioAB_clk), - CLKDEV_CON_ID(pioC, pioCD_clk), - CLKDEV_CON_ID(pioD, pioCD_clk), + CLKDEV_CON_DEV_ID(NULL, f400.gpio, pioAB_clk), + CLKDEV_CON_DEV_ID(NULL, f600.gpio, pioAB_clk), + CLKDEV_CON_DEV_ID(NULL, f800.gpio, pioCD_clk), + CLKDEV_CON_DEV_ID(NULL, fa00.gpio, pioCD_clk), /* additional fake clock for macb_hclk */ CLKDEV_CON_DEV_ID(hclk, f802c000.ethernet, macb0_clk), CLKDEV_CON_DEV_ID(hclk, f803.ethernet, macb1_clk), pgpY5DUDpSqEJ.pgp Description: PGP signature
linux-next: manual merge of the pinctrl tree with Linus' tree
Hi Linus,
Today's linux-next merge of the pinctrl tree got a conflict in
drivers/mtd/nand/atmel_nand.c between commit 28446acb1f82 (mtd: atmel
nand: fix gpio missing request) from Linus' tree and commit 08695153170c
(MTD: atmel nand: fix gpio missing request) from the pinctrl tree.
I fixed it up (see below) and can carry the fix as necessary (no action
is required).
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
diff --cc drivers/mtd/nand/atmel_nand.c
index 9144557,f48587b..000
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@@ -1414,12 -585,19 +1416,20 @@@ static int __init atmel_nand_probe(stru
nand_chip-IO_ADDR_W = host-io_base;
nand_chip-cmd_ctrl = atmel_nand_cmd_ctrl;
+ pinctrl = devm_pinctrl_get_select_default(pdev-dev);
+ if (IS_ERR(pinctrl)) {
+ dev_err(host-dev, Failed to request pinctrl\n);
+ res = PTR_ERR(pinctrl);
+ goto err_ecc_ioremap;
+ }
+
if (gpio_is_valid(host-board.rdy_pin)) {
- res = gpio_request(host-board.rdy_pin, nand_rdy);
+ res = devm_gpio_request(pdev-dev,
+ host-board.rdy_pin, nand_rdy);
if (res 0) {
dev_err(pdev-dev,
- can't request rdy gpio %d\n,
host-board.rdy_pin);
+ can't request rdy gpio %d\n,
+ host-board.rdy_pin);
goto err_ecc_ioremap;
}
@@@ -1435,11 -612,11 +1444,12 @@@
}
if (gpio_is_valid(host-board.enable_pin)) {
- res = gpio_request(host-board.enable_pin, nand_enable);
+ res = devm_gpio_request(pdev-dev,
+ host-board.enable_pin, nand_enable);
if (res 0) {
dev_err(pdev-dev,
- can't request enable gpio %d\n,
host-board.enable_pin);
+ can't request enable gpio %d\n,
+ host-board.enable_pin);
goto err_ecc_ioremap;
}
@@@ -1465,11 -664,11 +1475,12 @@@
atmel_nand_enable(host);
if (gpio_is_valid(host-board.det_pin)) {
- res = gpio_request(host-board.det_pin, nand_det);
+ res = devm_gpio_request(pdev-dev,
+ host-board.det_pin, nand_det);
if (res 0) {
dev_err(pdev-dev,
- can't request det gpio %d\n,
host-board.det_pin);
+ can't request det gpio %d\n,
+ host-board.det_pin);
goto err_no_card;
}
pgpImxNCqOazi.pgp
Description: PGP signature
