Re: [PATCH 12/16] i2c: i2c-s3c2410: Drop class based scanning to improve bootup time

2014-07-11 Thread Sachin Kamat
Hi Wolfram,

On Thu, Jul 10, 2014 at 5:16 PM, Wolfram Sang  wrote:
> This driver has been flagged to drop class based instantiation. The removal
> improves boot-up time and is unneeded for embedded controllers. Users have 
> been
> warned to switch for some time now, so we can actually do the removal. Keep 
> the
> DEPRECATED flag, so the core can inform users that the behaviour finally
> changed now. After another transition period, this flag can go, too.
> While we are here, remove the indentation for the array setup because
> such things always break after some time.
>
> Signed-off-by: Wolfram Sang 
> ---
>  drivers/i2c/busses/i2c-s3c2410.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-s3c2410.c 
> b/drivers/i2c/busses/i2c-s3c2410.c
> index e828a1dba0e5..6252c051525a 100644
> --- a/drivers/i2c/busses/i2c-s3c2410.c
> +++ b/drivers/i2c/busses/i2c-s3c2410.c
> @@ -1128,11 +1128,11 @@ static int s3c24xx_i2c_probe(struct platform_device 
> *pdev)
> s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c);
>
> strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
> -   i2c->adap.owner   = THIS_MODULE;
> -   i2c->adap.algo= _i2c_algorithm;
> +   i2c->adap.owner = THIS_MODULE;
> +   i2c->adap.algo = _i2c_algorithm;
> i2c->adap.retries = 2;
> -   i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD | 
> I2C_CLASS_DEPRECATED;
> -   i2c->tx_setup = 50;
> +   i2c->adap.class = I2C_CLASS_DEPRECATED;
> +   i2c->tx_setup = 50;
>
> init_waitqueue_head(>wait);
>
> --

Tested on Exynos 5250 boards.
Tested-by: Sachin Kamat 

-- 
Regards,
Sachin.
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RE: scsi-mq V2

2014-07-11 Thread Elliott, Robert (Server Storage)


> -Original Message-
> From: linux-scsi-ow...@vger.kernel.org [mailto:linux-scsi-
> ow...@vger.kernel.org] On Behalf Of Elliott, Robert (Server Storage)
> 
> I added some prints in aio_setup_ring and  ioctx_alloc and
> rebooted.  This time it took much longer to hit the problem.  It
> survived dozens of ^Cs.  Running a few minutes, though, IOPS
> eventually dropped.  So, sometimes it happens immediately,
> sometimes it takes time to develop.
> 
> I will rerun bisect-1 -2 and -3 for longer times to increase
> confidence that they didn't just appear good.

Allowing longer run times before declaring success, the problem 
does appear in all of the bisect trees.  I just let fio
continue to run for many minutes - no ^Cs necessary.

no-rebase: good for > 45 minutes (I will leave that running for
  8 more hours)
bisect-1: bad
bisect-2: bad
bisect-3: bad
bisect-4: bad


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Re: [PATCH v7 0/4] ARM: Exynos: PMU cleanup and refactoring for using DT

2014-07-11 Thread Naveen Krishna Ch
Hello Pankaj,

On 9 July 2014 09:30, Pankaj Dubey  wrote:
> This patch series, modifies Exynos Power Management Unit (PMU) related code
> for converting it into a platform_driver. This is also preparation for moving
> PMU related code out of machine folder into a either "drivers/mfd", or
> "drivers/power" or some other suitable place so that ARM64 based SoC can
> utilize common piece of code.
>
> These patches are created on top of Kukjin Kim's for-next.
> I have tested this patches on Exynos5250 Snow board for system boot and S2R.
>
> This patch series depends on following two patch series:
> [1]: mfd: syscon: Decouple syscon interface from syscon devices.
>  https://lkml.org/lkml/2014/6/24/188
>
> [2]: Cleanup patches for mach-exynos.
>  http://www.spinics.net/lists/arm-kernel/msg341474.html

With the above mentioned patches + this series
I was able to add PMU registers using syscon in the DTS node for DP and ADC.
and access the PMU registers in the respective drivers using syscon API.

Tested-by: Naveen Krishna Chatradhi 

>
> Patch v6 and discussion can be found here:
> https://lkml.org/lkml/2014/7/7/22
>
> Change since v6:
>  - Removed NULL check for pmu_data in pmu.c.
>  - Moved pmu_raw_readl and pmu_raw_writel inline helper function
>into common.h.
>
> Change Since v5:
>  - Squashed patch "Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c"
>into patch "Refactored code for using PMU address via DT".
>  - Addressed review comments from Tomasz Figa.
>  - Using init_irq machine function to initialize PMU mapping instead
>of init_time.
>  - Rebased on latest Kukjin Kim's for-next branch.
>
> Changes Since v4:
>  - Splitted patch series in two parts. Part 1 has code cleanup under 
> mach-exynos
>and posted as separate patch [2]. Current patchset is part 2 which modified
>exynos pmu implementation for making it platform driver.
>  - Removed dependency over early_syscon API.
>  - Removed usage of regmap read/write APIs.
>  - Modified probe function to register exynos pmu as syscon provider using
>Tomasz Figa's syscon patch [1].
>  - Address various other review comments from Tomasz Figa.
>  - Removed signed-off-by of Young-Gun Jang ,
>as this id is no more valid. Taking ownership of all his patches.
>
> Changes Since v3:
>  - Optimized exynos_pmu_probe function by removing exynos_pmu_data_init
>as suggested by Vikas Sajjan.
>  - Modified syscon_early_regmap_lookup_by_phandle and
>syscon_regmap_lookup_by_phandle function call to pass property as NULL.
>
> Changes Since v2:
>  - Rebased on top of Daniel Lezcano's Exynos cpuidle refactor patches.
>  - Removed early mapping of PMU base address from exynos.c and removed
>"get_exynos_pmuaddr" function. Instead of this added code in platsmp.c
>to get PMU base address using of_iomap as suggested by Tomasz Figa.
>  - Converted PMU implementation into platform_driver by using static
>platform_device method.
>
> Changes Since v1:
>  - Rebased on latest for-next of Kukjin Kim's tree.
>  - Updated patch: Add support for mapping PMU base address via DT
> - Removed __initdata from declaration of "exynos_pmu_base", as it 
> caused
> kernel crash as pointed out by Vikas Sajjan.
> - Added support for Syscon initialization and getting PMU regmap 
> handle
> as suggested by Sylwester. Since current implementation of early
> intialization [1] has limitation that "early_syscon_init" requires
> DT to be unflattened and system should be able to allocate memory,
> we can't use regmap handles for platsmp.c file as "smp_secondary_init"
> will be called before DT unflattening. So I have kept both method for
> accessing PMU base address. platsmp.c will use ioremmaped address 
> where
> as rest other files can use regmap handle.
>  - Updated patch: Refactored code for PMU register mapping via DT
> - Modified to use regmap_read/write when using regmap handle.
>  - Added patch: Add device tree based initialization support for PMU.
> - Convert existing PMU implementation to be a device tree based
>  before moving it to "drivers/mfd" folder. As suggested by Bartlomiej.
> - Dropped making a platform_driver for PMU, as currently PMU binding
> has two compatibility strings as "samsung, exynosxxx-pmu", "syscon",
> once we enable MFD_SYSCON config option, current "syscon" driver probe
> gets called and PMU probe never gets called. So modified PMU
> initialization code to scan DT and match against supported 
> compatiblity
> string in driver code, and once we get matching node use that for
> accessing PMU regmap handle using 
> "syscon_early_regmap_lookup_by_phandle".
> If there is any better solution please suggest.
>
>
> Pankaj Dubey (4):
>   ARM: EXYNOS: Add support for mapping PMU base address via DT
>   ARM: EXYNOS: Refactored code for using PMU address via DT
>   

Re: i915: reduce noise from i915_gem_shrinker_oom when no memory freed.

2014-07-11 Thread Chris Wilson
On Thu, Jul 10, 2014 at 11:05:05PM -0400, Dave Jones wrote:
> When the shrinker doesn't free any memory, don't spew over and over
> into the logs.  My fuzz tester hits this quite easily, resulting
> in dozens of instances of this printk when memory runs low, filling
> dmesg, when there's not even any graphical stuff going on, so the
> situation would never change.

We still want to know when we failed to free anything though.

if (freed || unbound || bound)
pr_info("Purging GPU memory...

should be a reasonable compromise.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: scsi-mq V2

2014-07-11 Thread Christoph Hellwig
On Fri, Jul 11, 2014 at 06:02:03AM +, Elliott, Robert (Server Storage) 
wrote:
> Allowing longer run times before declaring success, the problem 
> does appear in all of the bisect trees.  I just let fio
> continue to run for many minutes - no ^Cs necessary.
> 
> no-rebase: good for > 45 minutes (I will leave that running for
>   8 more hours)

Ok, thanks.  If it's still running tomorrow morning let's look into the
aio reverts again.

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[Patch Part3 V4 01/21] iommu/vt-d: Match segment number when searching for dev_iotlb capable devices

2014-07-11 Thread Jiang Liu
For virtual machine and static identity domains, there may be devices
from different PCI segments associated with the same domain.
So function iommu_support_dev_iotlb() should also match PCI segment
number (iommu unit) when searching for dev_iotlb capable devices.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 3664d0d00338..147ab1c0b573 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1272,7 +1272,8 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, 
struct intel_iommu *iommu,
 
spin_lock_irqsave(_domain_lock, flags);
list_for_each_entry(info, >devices, link)
-   if (info->bus == bus && info->devfn == devfn) {
+   if (info->iommu == iommu && info->bus == bus &&
+   info->devfn == devfn) {
found = 1;
break;
}
-- 
1.7.10.4

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[Patch Part3 V4 10/21] iommu/vt-d: Simplify intel_unmap_sg() and kill duplicated code

2014-07-11 Thread Jiang Liu
Introduce intel_unmap() to reduce duplicated code in intel_unmap_sg()
and intel_unmap_page().

Also let dma_pte_free_pagetable() to call dma_pte_clear_range() directly,
so caller only needs to call dma_pte_free_pagetable().

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   70 ---
 1 file changed, 19 insertions(+), 51 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0ba078bc0f32..0852b7021e4a 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -984,6 +984,8 @@ static void dma_pte_free_pagetable(struct dmar_domain 
*domain,
BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
BUG_ON(start_pfn > last_pfn);
 
+   dma_pte_clear_range(domain, start_pfn, last_pfn);
+
/* We don't need lock here; nobody else touches the iova range */
dma_pte_free_level(domain, agaw_to_level(domain->agaw),
   domain->pgd, 0, start_pfn, last_pfn);
@@ -2011,12 +2013,14 @@ static int __domain_mapping(struct dmar_domain *domain, 
unsigned long iov_pfn,
/* It is large page*/
if (largepage_lvl > 1) {
pteval |= DMA_PTE_LARGE_PAGE;
-   /* Ensure that old small page tables are 
removed to make room
-  for superpage, if they exist. */
-   dma_pte_clear_range(domain, iov_pfn,
-   iov_pfn + 
lvl_to_nr_pages(largepage_lvl) - 1);
+   lvl_pages = lvl_to_nr_pages(largepage_lvl);
+   /*
+* Ensure that old small page tables are
+* removed to make room for superpage,
+* if they exist.
+*/
dma_pte_free_pagetable(domain, iov_pfn,
-  iov_pfn + 
lvl_to_nr_pages(largepage_lvl) - 1);
+  iov_pfn + lvl_pages - 1);
} else {
pteval &= ~(uint64_t)DMA_PTE_LARGE_PAGE;
}
@@ -3148,9 +3152,7 @@ static void add_unmap(struct dmar_domain *dom, struct 
iova *iova, struct page *f
spin_unlock_irqrestore(_umap_flush_lock, flags);
 }
 
-static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr,
-size_t size, enum dma_data_direction dir,
-struct dma_attrs *attrs)
+static void intel_unmap(struct device *dev, dma_addr_t dev_addr)
 {
struct dmar_domain *domain;
unsigned long start_pfn, last_pfn;
@@ -3194,6 +3196,13 @@ static void intel_unmap_page(struct device *dev, 
dma_addr_t dev_addr,
}
 }
 
+static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr,
+size_t size, enum dma_data_direction dir,
+struct dma_attrs *attrs)
+{
+   intel_unmap(dev, dev_addr);
+}
+
 static void *intel_alloc_coherent(struct device *dev, size_t size,
  dma_addr_t *dma_handle, gfp_t flags,
  struct dma_attrs *attrs)
@@ -3250,7 +3259,7 @@ static void intel_free_coherent(struct device *dev, 
size_t size, void *vaddr,
size = PAGE_ALIGN(size);
order = get_order(size);
 
-   intel_unmap_page(dev, dma_handle, size, DMA_BIDIRECTIONAL, NULL);
+   intel_unmap(dev, dma_handle);
if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
__free_pages(page, order);
 }
@@ -3259,43 +3268,7 @@ static void intel_unmap_sg(struct device *dev, struct 
scatterlist *sglist,
   int nelems, enum dma_data_direction dir,
   struct dma_attrs *attrs)
 {
-   struct dmar_domain *domain;
-   unsigned long start_pfn, last_pfn;
-   struct iova *iova;
-   struct intel_iommu *iommu;
-   struct page *freelist;
-
-   if (iommu_no_mapping(dev))
-   return;
-
-   domain = find_domain(dev);
-   BUG_ON(!domain);
-
-   iommu = domain_get_iommu(domain);
-
-   iova = find_iova(>iovad, IOVA_PFN(sglist[0].dma_address));
-   if (WARN_ONCE(!iova, "Driver unmaps unmatched sglist at PFN %llx\n",
- (unsigned long long)sglist[0].dma_address))
-   return;
-
-   start_pfn = mm_to_dma_pfn(iova->pfn_lo);
-   last_pfn = mm_to_dma_pfn(iova->pfn_hi + 1) - 1;
-
-   freelist = domain_unmap(domain, start_pfn, last_pfn);
-
-   if (intel_iommu_strict) {
-   iommu_flush_iotlb_psi(iommu, domain->id, start_pfn,
- last_pfn - start_pfn + 1, !freelist, 0);
-   /* free iova */
- 

[Patch Part3 V4 08/21] iommu/vt-d: Simplify include/linux/dmar.h

2014-07-11 Thread Jiang Liu
Simplify include/linux/dmar.h a bit based on the fact that
both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP select CONFIG_DMAR_TABLE.

Signed-off-by: Jiang Liu 
---
 include/linux/dmar.h |   50 ++
 1 file changed, 18 insertions(+), 32 deletions(-)

diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 23c8db129560..1deece46a0ca 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -114,22 +114,30 @@ extern int dmar_remove_dev_scope(struct 
dmar_pci_notify_info *info,
 /* Intel IOMMU detection */
 extern int detect_intel_iommu(void);
 extern int enable_drhd_fault_handling(void);
-#else
-struct dmar_pci_notify_info;
-static inline int detect_intel_iommu(void)
+
+#ifdef CONFIG_INTEL_IOMMU
+extern int iommu_detected, no_iommu;
+extern int intel_iommu_init(void);
+extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
+extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
+extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
+#else /* !CONFIG_INTEL_IOMMU: */
+static inline int intel_iommu_init(void) { return -ENODEV; }
+static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
 {
-   return -ENODEV;
+   return 0;
 }
-
-static inline int dmar_table_init(void)
+static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
 {
-   return -ENODEV;
+   return 0;
 }
-static inline int enable_drhd_fault_handling(void)
+static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info 
*info)
 {
-   return -1;
+   return 0;
 }
-#endif /* !CONFIG_DMAR_TABLE */
+#endif /* CONFIG_INTEL_IOMMU */
+
+#endif /* CONFIG_DMAR_TABLE */
 
 struct irte {
union {
@@ -177,26 +185,4 @@ extern int dmar_set_interrupt(struct intel_iommu *iommu);
 extern irqreturn_t dmar_fault(int irq, void *dev_id);
 extern int arch_setup_dmar_msi(unsigned int irq);
 
-#ifdef CONFIG_INTEL_IOMMU
-extern int iommu_detected, no_iommu;
-extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
-extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
-extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
-extern int intel_iommu_init(void);
-#else /* !CONFIG_INTEL_IOMMU: */
-static inline int intel_iommu_init(void) { return -ENODEV; }
-static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
-{
-   return 0;
-}
-static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
-{
-   return 0;
-}
-static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info 
*info)
-{
-   return 0;
-}
-#endif /* CONFIG_INTEL_IOMMU */
-
 #endif /* __DMAR_H__ */
-- 
1.7.10.4

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[Patch Part3 V4 11/21] iommu/vt-d: Introduce helper domain_pfn_within_range() to simplify code

2014-07-11 Thread Jiang Liu
Introduce helper function domain_pfn_within_range() to simplify code
and improve readability.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   30 --
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0852b7021e4a..c9e65edaa2ad 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -549,6 +549,14 @@ static inline int domain_type_is_vm_or_si(struct 
dmar_domain *domain)
DOMAIN_FLAG_STATIC_IDENTITY);
 }
 
+static inline int domain_pfn_supported(struct dmar_domain *domain,
+  unsigned long pfn)
+{
+   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
+
+   return !(addr_width < BITS_PER_LONG && pfn >> addr_width);
+}
+
 static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
 {
unsigned long sagaw;
@@ -822,14 +830,13 @@ out:
 static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
  unsigned long pfn, int *target_level)
 {
-   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
struct dma_pte *parent, *pte = NULL;
int level = agaw_to_level(domain->agaw);
int offset;
 
BUG_ON(!domain->pgd);
 
-   if (addr_width < BITS_PER_LONG && pfn >> addr_width)
+   if (!domain_pfn_supported(domain, pfn))
/* Address beyond IOMMU's addressing capabilities. */
return NULL;
 
@@ -912,12 +919,11 @@ static void dma_pte_clear_range(struct dmar_domain 
*domain,
unsigned long start_pfn,
unsigned long last_pfn)
 {
-   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
unsigned int large_page = 1;
struct dma_pte *first_pte, *pte;
 
-   BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
-   BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
+   BUG_ON(!domain_pfn_supported(domain, start_pfn));
+   BUG_ON(!domain_pfn_supported(domain, last_pfn));
BUG_ON(start_pfn > last_pfn);
 
/* we don't need lock here; nobody else touches the iova range */
@@ -978,10 +984,8 @@ static void dma_pte_free_pagetable(struct dmar_domain 
*domain,
   unsigned long start_pfn,
   unsigned long last_pfn)
 {
-   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
-
-   BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
-   BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
+   BUG_ON(!domain_pfn_supported(domain, start_pfn));
+   BUG_ON(!domain_pfn_supported(domain, last_pfn));
BUG_ON(start_pfn > last_pfn);
 
dma_pte_clear_range(domain, start_pfn, last_pfn);
@@ -1083,11 +1087,10 @@ struct page *domain_unmap(struct dmar_domain *domain,
  unsigned long start_pfn,
  unsigned long last_pfn)
 {
-   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
struct page *freelist = NULL;
 
-   BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
-   BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
+   BUG_ON(!domain_pfn_supported(domain, start_pfn));
+   BUG_ON(!domain_pfn_supported(domain, last_pfn));
BUG_ON(start_pfn > last_pfn);
 
/* we don't need lock here; nobody else touches the iova range */
@@ -1974,12 +1977,11 @@ static int __domain_mapping(struct dmar_domain *domain, 
unsigned long iov_pfn,
 {
struct dma_pte *first_pte = NULL, *pte = NULL;
phys_addr_t uninitialized_var(pteval);
-   int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
unsigned long sg_res;
unsigned int largepage_lvl = 0;
unsigned long lvl_pages = 0;
 
-   BUG_ON(addr_width < BITS_PER_LONG && (iov_pfn + nr_pages - 1) >> 
addr_width);
+   BUG_ON(!domain_pfn_supported(domain, iov_pfn + nr_pages - 1));
 
if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0)
return -EINVAL;
-- 
1.7.10.4

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[Patch Part3 V4 19/21] iommu/vt-d: Enhance error recovery in function intel_enable_irq_remapping()

2014-07-11 Thread Jiang Liu
Enhance error recovery in function intel_enable_irq_remapping()
by tearing down all created data structures.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel_irq_remapping.c |8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index ecf07aba8351..038963a457c8 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -696,9 +696,11 @@ static int __init intel_enable_irq_remapping(void)
return eim ? IRQ_REMAP_X2APIC_MODE : IRQ_REMAP_XAPIC_MODE;
 
 error:
-   /*
-* handle error condition gracefully here!
-*/
+   for_each_iommu(iommu, drhd)
+   if (ecap_ir_support(iommu->ecap)) {
+   iommu_disable_irq_remapping(iommu);
+   intel_teardown_irq_remapping(iommu);
+   }
 
if (x2apic_present)
pr_warn("Failed to enable irq remapping.  You are vulnerable to 
irq-injection attacks.\n");
-- 
1.7.10.4

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[Patch Part3 V4 21/21] pci, ACPI, iommu: Enhance pci_root to support DMAR device hotplug

2014-07-11 Thread Jiang Liu
Finally enhance pci_root driver to support DMAR device hotplug when
hot-plugging PCI host bridges.

Signed-off-by: Jiang Liu 
---
 drivers/acpi/pci_root.c |   16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index d388f13d48b4..99c2b9761c12 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -33,6 +33,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include  /* for acpi_hest_init() */
@@ -511,6 +512,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
struct acpi_pci_root *root;
acpi_handle handle = device->handle;
int no_aspm = 0, clear_aspm = 0;
+   bool hotadd = system_state != SYSTEM_BOOTING;
 
root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
if (!root)
@@ -557,6 +559,11 @@ static int acpi_pci_root_add(struct acpi_device *device,
strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
device->driver_data = root;
 
+   if (hotadd && dmar_device_add(handle)) {
+   result = -ENXIO;
+   goto end;
+   }
+
pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
   acpi_device_name(device), acpi_device_bid(device),
   root->segment, >secondary);
@@ -583,7 +590,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
root->segment, (unsigned int)root->secondary.start);
device->driver_data = NULL;
result = -ENODEV;
-   goto end;
+   goto remove_dmar;
}
 
if (clear_aspm) {
@@ -597,7 +604,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
if (device->wakeup.flags.run_wake)
device_set_run_wake(root->bus->bridge, true);
 
-   if (system_state != SYSTEM_BOOTING) {
+   if (hotadd) {
pcibios_resource_survey_bus(root->bus);
pci_assign_unassigned_root_bus_resources(root->bus);
}
@@ -607,6 +614,9 @@ static int acpi_pci_root_add(struct acpi_device *device,
pci_unlock_rescan_remove();
return 1;
 
+remove_dmar:
+   if (hotadd)
+   dmar_device_remove(handle);
 end:
kfree(root);
return result;
@@ -625,6 +635,8 @@ static void acpi_pci_root_remove(struct acpi_device *device)
 
pci_remove_root_bus(root->bus);
 
+   dmar_device_remove(device->handle);
+
pci_unlock_rescan_remove();
 
kfree(root);
-- 
1.7.10.4

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[Patch Part3 V4 18/21] iommu/vt-d: Enhance intel_irq_remapping driver to support DMAR unit hotplug

2014-07-11 Thread Jiang Liu
Implement required callback functions for intel_irq_remapping driver
to support DMAR unit hotplug.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel_irq_remapping.c |  222 ++-
 1 file changed, 169 insertions(+), 53 deletions(-)

diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index 0a58195ed902..ecf07aba8351 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -36,7 +36,6 @@ struct hpet_scope {
 
 static struct ioapic_scope ir_ioapic[MAX_IO_APICS];
 static struct hpet_scope ir_hpet[MAX_HPET_TBS];
-static int ir_ioapic_num, ir_hpet_num;
 
 /*
  * Lock ordering:
@@ -320,7 +319,7 @@ static int set_ioapic_sid(struct irte *irte, int apic)
 
down_read(_global_lock);
for (i = 0; i < MAX_IO_APICS; i++) {
-   if (ir_ioapic[i].id == apic) {
+   if (ir_ioapic[i].iommu && ir_ioapic[i].id == apic) {
sid = (ir_ioapic[i].bus << 8) | ir_ioapic[i].devfn;
break;
}
@@ -347,7 +346,7 @@ static int set_hpet_sid(struct irte *irte, u8 id)
 
down_read(_global_lock);
for (i = 0; i < MAX_HPET_TBS; i++) {
-   if (ir_hpet[i].id == id) {
+   if (ir_hpet[i].iommu && ir_hpet[i].id == id) {
sid = (ir_hpet[i].bus << 8) | ir_hpet[i].devfn;
break;
}
@@ -469,17 +468,17 @@ static void iommu_set_irq_remapping(struct intel_iommu 
*iommu, int mode)
raw_spin_unlock_irqrestore(>register_lock, flags);
 }
 
-
-static int intel_setup_irq_remapping(struct intel_iommu *iommu, int mode)
+static int intel_setup_irq_remapping(struct intel_iommu *iommu)
 {
struct ir_table *ir_table;
struct page *pages;
unsigned long *bitmap;
 
-   ir_table = iommu->ir_table = kzalloc(sizeof(struct ir_table),
-GFP_ATOMIC);
+   if (iommu->ir_table)
+   return 0;
 
-   if (!iommu->ir_table)
+   ir_table = kzalloc(sizeof(struct ir_table), GFP_ATOMIC);
+   if (!ir_table)
return -ENOMEM;
 
pages = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
@@ -488,7 +487,7 @@ static int intel_setup_irq_remapping(struct intel_iommu 
*iommu, int mode)
if (!pages) {
pr_err("IR%d: failed to allocate pages of order %d\n",
   iommu->seq_id, INTR_REMAP_PAGE_ORDER);
-   kfree(iommu->ir_table);
+   kfree(ir_table);
return -ENOMEM;
}
 
@@ -503,11 +502,22 @@ static int intel_setup_irq_remapping(struct intel_iommu 
*iommu, int mode)
 
ir_table->base = page_address(pages);
ir_table->bitmap = bitmap;
+   iommu->ir_table = ir_table;
 
-   iommu_set_irq_remapping(iommu, mode);
return 0;
 }
 
+static void intel_teardown_irq_remapping(struct intel_iommu *iommu)
+{
+   if (iommu && iommu->ir_table) {
+   free_pages((unsigned long)iommu->ir_table->base,
+  INTR_REMAP_PAGE_ORDER);
+   kfree(iommu->ir_table->bitmap);
+   kfree(iommu->ir_table);
+   iommu->ir_table = NULL;
+   }
+}
+
 /*
  * Disable Interrupt Remapping.
  */
@@ -662,9 +672,10 @@ static int __init intel_enable_irq_remapping(void)
if (!ecap_ir_support(iommu->ecap))
continue;
 
-   if (intel_setup_irq_remapping(iommu, eim))
+   if (intel_setup_irq_remapping(iommu))
goto error;
 
+   iommu_set_irq_remapping(iommu, eim);
setup = 1;
}
 
@@ -695,12 +706,13 @@ error:
return -1;
 }
 
-static void ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope,
- struct intel_iommu *iommu)
+static int ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope,
+  struct intel_iommu *iommu,
+  struct acpi_dmar_hardware_unit *drhd)
 {
struct acpi_dmar_pci_path *path;
u8 bus;
-   int count;
+   int count, free = -1;
 
bus = scope->bus;
path = (struct acpi_dmar_pci_path *)(scope + 1);
@@ -716,19 +728,36 @@ static void ir_parse_one_hpet_scope(struct 
acpi_dmar_device_scope *scope,
   PCI_SECONDARY_BUS);
path++;
}
-   ir_hpet[ir_hpet_num].bus   = bus;
-   ir_hpet[ir_hpet_num].devfn = PCI_DEVFN(path->device, path->function);
-   ir_hpet[ir_hpet_num].iommu = iommu;
-   ir_hpet[ir_hpet_num].id= scope->enumeration_id;
-   ir_hpet_num++;
+
+   for (count = 0; count < MAX_HPET_TBS; count++) {
+   if (ir_hpet[count].iommu == iommu &&
+   ir_hpet[count].id == scope->enumeration_id)
+   return 0;
+   

Re: [PATCH 1/3] clk: exynos-audss: Keep the parent of mout_audss always enabled

2014-07-11 Thread Tushar Behera
On 06/13/2014 02:39 AM, Mike Turquette wrote:
> Quoting Tushar Behera (2014-06-12 00:29:23)
>> On Wed, Jun 11, 2014 at 10:20 PM, Mike Turquette  
>> wrote:
>>> Quoting Tushar Behera (2014-06-10 22:32:17)
 When the output clock of AUDSS mux is disabled, we are getting kernel
 oops while doing a clk_get() on other clocks provided by AUDSS. Though
 user manual doesn't specify this dependency, we came across this issue
 while disabling the parent of AUDSS mux clocks.
>>>
>>> Hi Tushar,
>>>
>>> Can you help me understand better what the actual problem is? What is
>>> the root cause of the kernel oops?
>>
>> Currently AUDSS mux has two parents, XXTI crystal and MAU_EPLL clock.
>> As per observation, when the output of AUDSS mux is gated, we are not
>> able to do any operation on the clocks provided by MAU block (mostly
>> the clocks used by ADMA and audio blocks).
> 
> I tried to get a datasheet for Exynos 54xx but could not find it. I even
> looked at the public 5250 data sheet, but it is completely missing
> Chapter 34, "Audio Subsystem", which apparently contains Figure 34-3,
> "Clock names and clock tree diagram of MAUDIO_BLK".
> 
> So without any clue about your hardware (not for lack of trying) I would
> guess that somewhere in the parent hierarchy you have an interface clock
> which must be enabled in order for you to touch the registers pertaining
> to the downstream audio clocks.
> 

Yes, right. As per observation, we need to keep the output of AUDSS mux
enabled to access the registers present in MAU block.

> The right way to handle this requires two steps:
> 
> 1) model your interface clock in the Linux clock framework if you
> haven't already (I assume it is a gate clock, or the child of a gate
> clock)
> 

The interface clock is already part of the clock framework.

> 2) the clk_ops callbacks for the affected audio clocks should wrap their
> operations (i.e. critical secion) with a clk_enable/clk_disable pair,
> where the clock being enables/disable is the interface clock mentioned
> above in #1
> 
> The CCF is reentrant, so you can do this by simply using the top-level
> clk.h API from within your clk_ops callbacks.
> 

Right now, the clocks are registered with clk_register_mux,
clk_register_div and clk_register_gate calls which in turn set
appropriate clk_ops callbacks. If I need to wrap the register access
during these clk_ops callbacks with clk_enable/clk_disable of interface
lock, I would have to reimplement the clk_ops callbacks in
clk-exynos-audss driver.

Is that the approach that you are suggesting?

> I might be totally wrong about the cause of the hang, but that's my best
> guess based on everyone's bug reports.
> 

There are 5 gate clocks within MAU block. While disabling the unused
clocks, if CLK_MAU_EPLL is disabled first, then we are getting this
system hang.


> Regards,
> Mike
> 
>>
>>>
>>> You mention calling clk_get on child clocks of the AUDSS mux fails, but
>>> I cannot imagine why. How can the enable/disable state of a clock affect
>>> the ability to clk_get other clocks?
>>>
>>
>> I might have a little vogue while updating the commit message
>> (mentioning about clk_get which surely is only a s/w operation), but
>> there is definitely some issue with handling those clocks under given
>> scenario.
>>
>> I am on leave till end of this week, so I will update you more with
>> the logs on Monday.
>>
>> Thanks,
>> --
>> Tushar
> 
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 


-- 
Tushar Behera
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[Patch Part3 V4 16/21] iommu/vt-d: Implement DMAR unit hotplug framework

2014-07-11 Thread Jiang Liu
On Intel platforms, an IO Hub (PCI/PCIe host bridge) may contain DMAR
units, so we need to support DMAR hotplug when supporting PCI host
bridge hotplug on Intel platforms.

According to Section 8.8 "Remapping Hardware Unit Hot Plug" in "Intel
Virtualization Technology for Directed IO Architecture Specification
Rev 2.2", ACPI BIOS should implement ACPI _DSM method under the ACPI
object for the PCI host bridge to support DMAR hotplug.

This patch introduces interfaces to parse ACPI _DSM method for
DMAR unit hotplug. It also implements state machines for DMAR unit
hot-addition and hot-removal.

The PCI host bridge hotplug driver should call dmar_hotplug_hotplug()
before scanning PCI devices connected for hot-addition and after
destroying all PCI devices for hot-removal.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/dmar.c|  268 +--
 drivers/iommu/intel-iommu.c |   78 +-
 drivers/iommu/intel_irq_remapping.c |5 +
 include/linux/dmar.h|   33 +
 4 files changed, 370 insertions(+), 14 deletions(-)

diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 02a769347fcb..9d8f5c82b717 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -75,7 +75,7 @@ static unsigned long 
dmar_seq_ids[BITS_TO_LONGS(DMAR_UNITS_SUPPORTED)];
 static int alloc_iommu(struct dmar_drhd_unit *drhd);
 static void free_iommu(struct intel_iommu *iommu);
 
-static void __init dmar_register_drhd_unit(struct dmar_drhd_unit *drhd)
+static void dmar_register_drhd_unit(struct dmar_drhd_unit *drhd)
 {
/*
 * add INCLUDE_ALL at the tail, so scan the list will find it at
@@ -336,24 +336,45 @@ static struct notifier_block dmar_pci_bus_nb = {
.priority = INT_MIN,
 };
 
+static struct dmar_drhd_unit *
+dmar_find_dmaru(struct acpi_dmar_hardware_unit *drhd)
+{
+   struct dmar_drhd_unit *dmaru;
+
+   list_for_each_entry_rcu(dmaru, _drhd_units, list)
+   if (dmaru->segment == drhd->segment &&
+   dmaru->reg_base_addr == drhd->address)
+   return dmaru;
+
+   return NULL;
+}
+
 /**
  * dmar_parse_one_drhd - parses exactly one DMA remapping hardware definition
  * structure which uniquely represent one DMA remapping hardware unit
  * present in the platform
  */
-static int __init
-dmar_parse_one_drhd(struct acpi_dmar_header *header, void *arg)
+static int dmar_parse_one_drhd(struct acpi_dmar_header *header, void *arg)
 {
struct acpi_dmar_hardware_unit *drhd;
struct dmar_drhd_unit *dmaru;
int ret = 0;
 
drhd = (struct acpi_dmar_hardware_unit *)header;
-   dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL);
+   dmaru = dmar_find_dmaru(drhd);
+   if (dmaru)
+   goto out;
+
+   dmaru = kzalloc(sizeof(*dmaru) + header->length, GFP_KERNEL);
if (!dmaru)
return -ENOMEM;
 
-   dmaru->hdr = header;
+   /*
+* If header is allocated from slab by ACPI _DSM method, we need to
+* copy the content because the memory buffer will be freed on return.
+*/
+   dmaru->hdr = (void *)(dmaru + 1);
+   memcpy(dmaru->hdr, header, header->length);
dmaru->reg_base_addr = drhd->address;
dmaru->segment = drhd->segment;
dmaru->include_all = drhd->flags & 0x1; /* BIT0: INCLUDE_ALL */
@@ -374,6 +395,7 @@ dmar_parse_one_drhd(struct acpi_dmar_header *header, void 
*arg)
}
dmar_register_drhd_unit(dmaru);
 
+out:
if (arg)
(*(int *)arg)++;
 
@@ -411,8 +433,7 @@ static int __init dmar_parse_one_andd(struct 
acpi_dmar_header *header,
 }
 
 #ifdef CONFIG_ACPI_NUMA
-static int __init
-dmar_parse_one_rhsa(struct acpi_dmar_header *header, void *arg)
+static int dmar_parse_one_rhsa(struct acpi_dmar_header *header, void *arg)
 {
struct acpi_dmar_rhsa *rhsa;
struct dmar_drhd_unit *drhd;
@@ -806,14 +827,22 @@ dmar_validate_one_drhd(struct acpi_dmar_header *entry, 
void *arg)
return -EINVAL;
}
 
-   addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
+   if (arg)
+   addr = ioremap(drhd->address, VTD_PAGE_SIZE);
+   else
+   addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
if (!addr) {
pr_warn("IOMMU: can't validate: %llx\n", drhd->address);
return -EINVAL;
}
+
cap = dmar_readq(addr + DMAR_CAP_REG);
ecap = dmar_readq(addr + DMAR_ECAP_REG);
-   early_iounmap(addr, VTD_PAGE_SIZE);
+
+   if (arg)
+   iounmap(addr);
+   else
+   early_iounmap(addr, VTD_PAGE_SIZE);
 
if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {
warn_invalid_dmar(drhd->address, " returns all ones");
@@ -1687,12 +1716,17 @@ int __init dmar_ir_support(void)
return dmar->flags & 0x1;
 }
 
+/* Check whether DMAR units are in use */
+static inline bool dmar_in_use(void)
+{
+ 

[Patch Part3 V4 20/21] iommu/vt-d: Enhance intel-iommu driver to support DMAR unit hotplug

2014-07-11 Thread Jiang Liu
Implement required callback functions for intel-iommu driver
to support DMAR unit hotplug.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |  206 +++
 1 file changed, 151 insertions(+), 55 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d35141ab62c3..fb805caf9774 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1125,8 +1125,11 @@ static int iommu_alloc_root_entry(struct intel_iommu 
*iommu)
unsigned long flags;
 
root = (struct root_entry *)alloc_pgtable_page(iommu->node);
-   if (!root)
+   if (!root) {
+   pr_err("IOMMU: allocating root entry for %s failed\n",
+   iommu->name);
return -ENOMEM;
+   }
 
__iommu_flush_cache(iommu, root, ROOT_SIZE);
 
@@ -1466,7 +1469,7 @@ static int iommu_init_domains(struct intel_iommu *iommu)
return 0;
 }
 
-static void free_dmar_iommu(struct intel_iommu *iommu)
+static void disable_dmar_iommu(struct intel_iommu *iommu)
 {
struct dmar_domain *domain;
int i;
@@ -1490,11 +1493,16 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
 
if (iommu->gcmd & DMA_GCMD_TE)
iommu_disable_translation(iommu);
+}
 
-   kfree(iommu->domains);
-   kfree(iommu->domain_ids);
-   iommu->domains = NULL;
-   iommu->domain_ids = NULL;
+static void free_dmar_iommu(struct intel_iommu *iommu)
+{
+   if ((iommu->domains) && (iommu->domain_ids)) {
+   kfree(iommu->domains);
+   kfree(iommu->domain_ids);
+   iommu->domains = NULL;
+   iommu->domain_ids = NULL;
+   }
 
g_iommus[iommu->seq_id] = NULL;
 
@@ -2677,6 +2685,41 @@ static int __init 
iommu_prepare_static_identity_mapping(int hw)
return 0;
 }
 
+static void intel_iommu_init_qi(struct intel_iommu *iommu)
+{
+   /*
+* Start from the sane iommu hardware state.
+* If the queued invalidation is already initialized by us
+* (for example, while enabling interrupt-remapping) then
+* we got the things already rolling from a sane state.
+*/
+   if (!iommu->qi) {
+   /*
+* Clear any previous faults.
+*/
+   dmar_fault(-1, iommu);
+   /*
+* Disable queued invalidation if supported and already enabled
+* before OS handover.
+*/
+   dmar_disable_qi(iommu);
+   }
+
+   if (dmar_enable_qi(iommu)) {
+   /*
+* Queued Invalidate not enabled, use Register Based Invalidate
+*/
+   iommu->flush.flush_context = __iommu_flush_context;
+   iommu->flush.flush_iotlb = __iommu_flush_iotlb;
+   pr_info("IOMMU: %s using Register based invalidation\n",
+   iommu->name);
+   } else {
+   iommu->flush.flush_context = qi_flush_context;
+   iommu->flush.flush_iotlb = qi_flush_iotlb;
+   pr_info("IOMMU: %s using Queued invalidation\n", iommu->name);
+   }
+}
+
 static int __init init_dmars(void)
 {
struct dmar_drhd_unit *drhd;
@@ -2705,6 +2748,10 @@ static int __init init_dmars(void)
  DMAR_UNITS_SUPPORTED);
}
 
+   /* Preallocate enough resources for IOMMU hot-addition */
+   if (g_num_of_iommus < DMAR_UNITS_SUPPORTED)
+   g_num_of_iommus = DMAR_UNITS_SUPPORTED;
+
g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
GFP_KERNEL);
if (!g_iommus) {
@@ -2733,58 +2780,14 @@ static int __init init_dmars(void)
 * among all IOMMU's. Need to Split it later.
 */
ret = iommu_alloc_root_entry(iommu);
-   if (ret) {
-   printk(KERN_ERR "IOMMU: allocate root entry failed\n");
+   if (ret)
goto free_iommu;
-   }
if (!ecap_pass_through(iommu->ecap))
hw_pass_through = 0;
}
 
-   /*
-* Start from the sane iommu hardware state.
-*/
-   for_each_active_iommu(iommu, drhd) {
-   /*
-* If the queued invalidation is already initialized by us
-* (for example, while enabling interrupt-remapping) then
-* we got the things already rolling from a sane state.
-*/
-   if (iommu->qi)
-   continue;
-
-   /*
-* Clear any previous faults.
-*/
-   dmar_fault(-1, iommu);
-   /*
-* Disable queued invalidation if supported and already enabled
-* before OS handover.
-*/
-   dmar_disable_qi(iommu);
-   }
-
-  

[Patch Part3 V4 15/21] iommu/vt-d: Dynamically allocate and free seq_id for DMAR units

2014-07-11 Thread Jiang Liu
Introduce functions to support dynamic IOMMU seq_id allocating and
releasing, which will be used to support DMAR hotplug.

Also rename IOMMU_UNITS_SUPPORTED as DMAR_UNITS_SUPPORTED.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/dmar.c|   40 ++--
 drivers/iommu/intel-iommu.c |   13 +++--
 include/linux/dmar.h|6 ++
 3 files changed, 43 insertions(+), 16 deletions(-)

diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 4fdf238a2a28..02a769347fcb 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -70,6 +70,7 @@ LIST_HEAD(dmar_drhd_units);
 struct acpi_table_header * __initdata dmar_tbl;
 static acpi_size dmar_tbl_size;
 static int dmar_dev_scope_status = 1;
+static unsigned long dmar_seq_ids[BITS_TO_LONGS(DMAR_UNITS_SUPPORTED)];
 
 static int alloc_iommu(struct dmar_drhd_unit *drhd);
 static void free_iommu(struct intel_iommu *iommu);
@@ -929,11 +930,32 @@ out:
return err;
 }
 
+static int dmar_alloc_seq_id(struct intel_iommu *iommu)
+{
+   iommu->seq_id = find_first_zero_bit(dmar_seq_ids,
+   DMAR_UNITS_SUPPORTED);
+   if (iommu->seq_id >= DMAR_UNITS_SUPPORTED) {
+   iommu->seq_id = -1;
+   } else {
+   set_bit(iommu->seq_id, dmar_seq_ids);
+   sprintf(iommu->name, "dmar%d", iommu->seq_id);
+   }
+
+   return iommu->seq_id;
+}
+
+static void dmar_free_seq_id(struct intel_iommu *iommu)
+{
+   if (iommu->seq_id >= 0) {
+   clear_bit(iommu->seq_id, dmar_seq_ids);
+   iommu->seq_id = -1;
+   }
+}
+
 static int alloc_iommu(struct dmar_drhd_unit *drhd)
 {
struct intel_iommu *iommu;
u32 ver, sts;
-   static int iommu_allocated = 0;
int agaw = 0;
int msagaw = 0;
int err;
@@ -947,13 +969,16 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
if (!iommu)
return -ENOMEM;
 
-   iommu->seq_id = iommu_allocated++;
-   sprintf (iommu->name, "dmar%d", iommu->seq_id);
+   if (dmar_alloc_seq_id(iommu) < 0) {
+   pr_err("IOMMU: failed to allocate seq_id\n");
+   err = -ENOSPC;
+   goto error;
+   }
 
err = map_iommu(iommu, drhd->reg_base_addr);
if (err) {
pr_err("IOMMU: failed to map %s\n", iommu->name);
-   goto error;
+   goto error_free_seq_id;
}
 
err = -EINVAL;
@@ -1003,9 +1028,11 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
 
return 0;
 
- err_unmap:
+err_unmap:
unmap_iommu(iommu);
- error:
+error_free_seq_id:
+   dmar_free_seq_id(iommu);
+error:
kfree(iommu);
return err;
 }
@@ -1029,6 +1056,7 @@ static void free_iommu(struct intel_iommu *iommu)
if (iommu->reg)
unmap_iommu(iommu);
 
+   dmar_free_seq_id(iommu);
kfree(iommu);
 }
 
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d0c37d59e6be..9c5eacc28b0e 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -328,17 +328,10 @@ static int hw_pass_through = 1;
 /* si_domain contains mulitple devices */
 #define DOMAIN_FLAG_STATIC_IDENTITY(1 << 1)
 
-/* define the limit of IOMMUs supported in each domain */
-#ifdef CONFIG_X86
-# define   IOMMU_UNITS_SUPPORTED   MAX_IO_APICS
-#else
-# define   IOMMU_UNITS_SUPPORTED   64
-#endif
-
 struct dmar_domain {
int id; /* domain id */
int nid;/* node id */
-   DECLARE_BITMAP(iommu_bmp, IOMMU_UNITS_SUPPORTED);
+   DECLARE_BITMAP(iommu_bmp, DMAR_UNITS_SUPPORTED);
/* bitmap of iommus this domain uses*/
 
struct list_head devices;   /* all devices' list */
@@ -2704,12 +2697,12 @@ static int __init init_dmars(void)
 * threaded kernel __init code path all other access are read
 * only
 */
-   if (g_num_of_iommus < IOMMU_UNITS_SUPPORTED) {
+   if (g_num_of_iommus < DMAR_UNITS_SUPPORTED) {
g_num_of_iommus++;
continue;
}
printk_once(KERN_ERR "intel-iommu: exceeded %d IOMMUs\n",
- IOMMU_UNITS_SUPPORTED);
+ DMAR_UNITS_SUPPORTED);
}
 
g_iommus = kcalloc(g_num_of_iommus, sizeof(struct intel_iommu *),
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index fac8ca34f9a8..c8a576bc3a98 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -30,6 +30,12 @@
 
 struct acpi_dmar_header;
 
+#ifdef CONFIG_X86
+# define   DMAR_UNITS_SUPPORTEDMAX_IO_APICS
+#else
+# define   DMAR_UNITS_SUPPORTED64
+#endif
+
 /* DMAR Flags */
 #define DMAR_INTR_REMAP0x1
 #define DMAR_X2APIC_OPT_OUT0x2
-- 
1.7.10.4

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[Patch Part3 V4 13/21] iommu/vt-d: Fix issue in computing domain's iommu_snooping flag

2014-07-11 Thread Jiang Liu
IOMMU units may dynamically attached to/detached from domains,
so we should scan all active IOMMU units when computing iommu_snooping
flag for a domain instead of only scanning IOMMU units associated
with the domain.

Also check snooping and superpage capabilities when hot-adding DMAR units.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   42 --
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index cd1ba24c766a..58cc2b75d7ae 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -633,50 +633,56 @@ static void domain_update_iommu_coherency(struct 
dmar_domain *domain)
rcu_read_unlock();
 }
 
-static void domain_update_iommu_snooping(struct dmar_domain *domain)
+static int domain_update_iommu_snooping(struct intel_iommu *skip)
 {
-   int i;
-
-   domain->iommu_snooping = 1;
+   struct dmar_drhd_unit *drhd;
+   struct intel_iommu *iommu;
+   int ret = 1;
 
-   for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) {
-   if (!ecap_sc_support(g_iommus[i]->ecap)) {
-   domain->iommu_snooping = 0;
-   break;
+   rcu_read_lock();
+   for_each_active_iommu(iommu, drhd) {
+   if (iommu != skip) {
+   if (!ecap_sc_support(iommu->ecap)) {
+   ret = 0;
+   break;
+   }
}
}
+   rcu_read_unlock();
+
+   return ret;
 }
 
-static void domain_update_iommu_superpage(struct dmar_domain *domain)
+static int domain_update_iommu_superpage(struct intel_iommu *skip)
 {
struct dmar_drhd_unit *drhd;
-   struct intel_iommu *iommu = NULL;
+   struct intel_iommu *iommu;
int mask = 0xf;
 
if (!intel_iommu_superpage) {
-   domain->iommu_superpage = 0;
-   return;
+   return 0;
}
 
/* set iommu_superpage to the smallest common denominator */
rcu_read_lock();
for_each_active_iommu(iommu, drhd) {
-   mask &= cap_super_page_val(iommu->cap);
-   if (!mask) {
-   break;
+   if (iommu != skip) {
+   mask &= cap_super_page_val(iommu->cap);
+   if (!mask)
+   break;
}
}
rcu_read_unlock();
 
-   domain->iommu_superpage = fls(mask);
+   return fls(mask);
 }
 
 /* Some capabilities may be different across iommus */
 static void domain_update_iommu_cap(struct dmar_domain *domain)
 {
domain_update_iommu_coherency(domain);
-   domain_update_iommu_snooping(domain);
-   domain_update_iommu_superpage(domain);
+   domain->iommu_snooping = domain_update_iommu_snooping(NULL);
+   domain->iommu_superpage = domain_update_iommu_superpage(NULL);
 }
 
 static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 
*devfn)
-- 
1.7.10.4

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[Patch Part3 V4 17/21] iommu/vt-d: Search for ACPI _DSM method for DMAR hotplug

2014-07-11 Thread Jiang Liu
According to Intel VT-d specification, _DSM method to support DMAR
hotplug should exist directly under corresponding ACPI object
representing PCI host bridge. But some BIOSes doesn't conform to
this, so search for _DSM method in the subtree starting from the
ACPI object representing the PCI host bridge.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/dmar.c |   35 +++
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 9d8f5c82b717..cc1d19c33486 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -1927,21 +1927,48 @@ static int dmar_hotplug_remove(acpi_handle handle)
return ret;
 }
 
-static int dmar_device_hotplug(acpi_handle handle, bool insert)
+static acpi_status dmar_get_dsm_handle(acpi_handle handle, u32 lvl,
+  void *context, void **retval)
+{
+   acpi_handle *phdl = retval;
+
+   if (dmar_detect_dsm(handle, DMAR_DSM_FUNC_DRHD)) {
+   *phdl = handle;
+   return AE_CTRL_TERMINATE;
+   }
+
+   return AE_OK;
+}
+
+int dmar_device_hotplug(acpi_handle handle, bool insert)
 {
int ret;
+   acpi_handle tmp = NULL;
+   acpi_status status;
 
if (!dmar_in_use())
return 0;
 
-   if (!dmar_detect_dsm(handle, DMAR_DSM_FUNC_DRHD))
+   if (dmar_detect_dsm(handle, DMAR_DSM_FUNC_DRHD)) {
+   tmp = handle;
+   } else {
+   status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle,
+ACPI_UINT32_MAX,
+dmar_get_dsm_handle,
+NULL, NULL, );
+   if (ACPI_FAILURE(status)) {
+   pr_warn("Failed to locate _DSM method.\n");
+   return -ENXIO;
+   }
+   }
+   if (tmp == NULL)
return 0;
 
down_write(_global_lock);
if (insert)
-   ret = dmar_hotplug_insert(handle);
+   ret = dmar_hotplug_insert(tmp);
else
-   ret = dmar_hotplug_remove(handle);
+   ret = dmar_hotplug_remove(tmp);
up_write(_global_lock);
 
return ret;
-- 
1.7.10.4

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[Patch Part3 V4 14/21] iommu/vt-d: Introduce helper function dmar_walk_resources()

2014-07-11 Thread Jiang Liu
Introduce helper function dmar_walk_resources to walk resource entries
in DMAR table and ACPI buffer object returned by ACPI _DSM method
for IOMMU hot-plug.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/dmar.c|  208 +++
 drivers/iommu/intel-iommu.c |4 +-
 include/linux/dmar.h|   19 ++--
 3 files changed, 122 insertions(+), 109 deletions(-)

diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 4306885f48b1..4fdf238a2a28 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -44,6 +44,14 @@
 
 #include "irq_remapping.h"
 
+typedef int (*dmar_res_handler_t)(struct acpi_dmar_header *, void *);
+struct dmar_res_callback {
+   dmar_res_handler_t  cb[ACPI_DMAR_TYPE_RESERVED];
+   void*arg[ACPI_DMAR_TYPE_RESERVED];
+   boolignore_unhandled;
+   boolprint_entry;
+};
+
 /*
  * Assumptions:
  * 1) The hotplug framework guarentees that DMAR unit will be hot-added
@@ -333,7 +341,7 @@ static struct notifier_block dmar_pci_bus_nb = {
  * present in the platform
  */
 static int __init
-dmar_parse_one_drhd(struct acpi_dmar_header *header)
+dmar_parse_one_drhd(struct acpi_dmar_header *header, void *arg)
 {
struct acpi_dmar_hardware_unit *drhd;
struct dmar_drhd_unit *dmaru;
@@ -364,6 +372,10 @@ dmar_parse_one_drhd(struct acpi_dmar_header *header)
return ret;
}
dmar_register_drhd_unit(dmaru);
+
+   if (arg)
+   (*(int *)arg)++;
+
return 0;
 }
 
@@ -376,7 +388,8 @@ static void dmar_free_drhd(struct dmar_drhd_unit *dmaru)
kfree(dmaru);
 }
 
-static int __init dmar_parse_one_andd(struct acpi_dmar_header *header)
+static int __init dmar_parse_one_andd(struct acpi_dmar_header *header,
+ void *arg)
 {
struct acpi_dmar_andd *andd = (void *)header;
 
@@ -398,7 +411,7 @@ static int __init dmar_parse_one_andd(struct 
acpi_dmar_header *header)
 
 #ifdef CONFIG_ACPI_NUMA
 static int __init
-dmar_parse_one_rhsa(struct acpi_dmar_header *header)
+dmar_parse_one_rhsa(struct acpi_dmar_header *header, void *arg)
 {
struct acpi_dmar_rhsa *rhsa;
struct dmar_drhd_unit *drhd;
@@ -425,6 +438,8 @@ dmar_parse_one_rhsa(struct acpi_dmar_header *header)
 
return 0;
 }
+#else
+#definedmar_parse_one_rhsa dmar_res_noop
 #endif
 
 static void __init
@@ -486,6 +501,52 @@ static int __init dmar_table_detect(void)
return (ACPI_SUCCESS(status) ? 1 : 0);
 }
 
+static int dmar_walk_resources(struct acpi_dmar_header *start, size_t len,
+  struct dmar_res_callback *cb)
+{
+   int ret = 0;
+   struct acpi_dmar_header *iter, *next;
+   struct acpi_dmar_header *end = ((void *)start) + len;
+
+   for (iter = start; iter < end && ret == 0; iter = next) {
+   next = (void *)iter + iter->length;
+   if (iter->length == 0) {
+   /* Avoid looping forever on bad ACPI tables */
+   pr_debug(FW_BUG "Invalid 0-length structure\n");
+   break;
+   } else if (next > end) {
+   /* Avoid passing table end */
+   pr_warn(FW_BUG "record passes table end\n");
+   ret = -EINVAL;
+   break;
+   }
+
+   if (cb->print_entry)
+   dmar_table_print_dmar_entry(iter);
+
+   if (iter->type >= ACPI_DMAR_TYPE_RESERVED) {
+   /* continue for forward compatibility */
+   pr_debug("Unknown DMAR structure type %d\n",
+iter->type);
+   } else if (cb->cb[iter->type]) {
+   ret = cb->cb[iter->type](iter, cb->arg[iter->type]);
+   } else if (!cb->ignore_unhandled) {
+   pr_warn("No handler for DMAR structure type %d\n",
+   iter->type);
+   ret = -EINVAL;
+   }
+   }
+
+   return ret;
+}
+
+static inline int dmar_walk_dmar_table(struct acpi_table_dmar *dmar,
+  struct dmar_res_callback *cb)
+{
+   return dmar_walk_resources((struct acpi_dmar_header *)(dmar + 1),
+  dmar->header.length - sizeof(*dmar), cb);
+}
+
 /**
  * parse_dmar_table - parses the DMA reporting table
  */
@@ -493,9 +554,18 @@ static int __init
 parse_dmar_table(void)
 {
struct acpi_table_dmar *dmar;
-   struct acpi_dmar_header *entry_header;
int ret = 0;
int drhd_count = 0;
+   struct dmar_res_callback cb = {
+   .print_entry = true,
+   .ignore_unhandled = true,
+   .arg[ACPI_DMAR_TYPE_HARDWARE_UNIT] = _count,
+   .cb[ACPI_DMAR_TYPE_HARDWARE_UNIT] = _parse_one_drhd,
+   

[Patch Part3 V4 12/21] iommu/vt-d: Introduce helper function iova_size() to improve code readability

2014-07-11 Thread Jiang Liu
Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |7 +++
 include/linux/iova.h|5 +
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index c9e65edaa2ad..cd1ba24c766a 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3101,10 +3101,10 @@ static void flush_unmaps(void)
/* On real hardware multiple invalidations are 
expensive */
if (cap_caching_mode(iommu->cap))
iommu_flush_iotlb_psi(iommu, domain->id,
-   iova->pfn_lo, iova->pfn_hi - 
iova->pfn_lo + 1,
+   iova->pfn_lo, iova_size(iova),
!deferred_flush[i].freelist[j], 0);
else {
-   mask = ilog2(mm_to_dma_pfn(iova->pfn_hi - 
iova->pfn_lo + 1));
+   mask = ilog2(mm_to_dma_pfn(iova_size(iova)));

iommu_flush_dev_iotlb(deferred_flush[i].domain[j],
(uint64_t)iova->pfn_lo << 
PAGE_SHIFT, mask);
}
@@ -3905,8 +3905,7 @@ static int intel_iommu_memory_notifier(struct 
notifier_block *nb,
rcu_read_lock();
for_each_active_iommu(iommu, drhd)
iommu_flush_iotlb_psi(iommu, si_domain->id,
-   iova->pfn_lo,
-   iova->pfn_hi - iova->pfn_lo + 1,
+   iova->pfn_lo, iova_size(iova),
!freelist, 0);
rcu_read_unlock();
dma_free_pagelist(freelist);
diff --git a/include/linux/iova.h b/include/linux/iova.h
index 3277f4711349..19e81d5ccb6d 100644
--- a/include/linux/iova.h
+++ b/include/linux/iova.h
@@ -34,6 +34,11 @@ struct iova_domain {
unsigned long   dma_32bit_pfn;
 };
 
+static inline unsigned long iova_size(struct iova *iova)
+{
+   return iova->pfn_hi - iova->pfn_lo + 1;
+}
+
 struct iova *alloc_iova_mem(void);
 void free_iova_mem(struct iova *iova);
 void free_iova(struct iova_domain *iovad, unsigned long pfn);
-- 
1.7.10.4

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Re: [PATCH v2] cpufreq: Don't destroy/realloc policy/sysfs on hotplug/suspend

2014-07-11 Thread Viresh Kumar
Hi Saravana,

Thanks for trying this..

On 11 July 2014 09:48, Saravana Kannan  wrote:
> The CPUfreq driver moves the cpufreq policy ownership between CPUs when

s/driver/core

> CPUs within a cluster (CPUs sharing same policy) go ONLINE/OFFLINE. When
> moving policy ownership between CPUs, it also moves the cpufreq sysfs
> directory between CPUs and also fixes up the symlinks of the other CPUs in
> the cluster.
>
> Also, when all the CPUs in a cluster go OFFLINE, all the sysfs nodes and
> directories are deleted, the kobject is released and the policy is freed.
> And when the first CPU in a cluster comes up, the policy is reallocated and
> initialized, kobject is acquired, the sysfs nodes are created or symlinked,
> etc.
>
> All these steps end up creating unnecessarily complicated code and locking.
> There's no real benefit to adding/removing/moving the sysfs nodes and the
> policy between CPUs. Other per CPU sysfs directories like power and cpuidle
> are left alone during hotplug. So there's some precedence to what this
> patch is trying to do.
>
> This patch simplifies a lot of the code and locking by removing the
> adding/removing/moving of policy/sysfs/kobj and just leaves the cpufreq
> directory and policy in place irrespective of whether the CPUs are
> ONLINE/OFFLINE.
>
> Leaving the policy, sysfs and kobject in place also brings these additional
> benefits:
> * Faster suspend/resume.
> * Faster hotplug.
> * Sysfs file permissions maintained across hotplug without userspace
>   workarounds.
> * Policy settings and governor tunables maintained across suspend/resume
>   and hotplug.

Its already maintained during suspend/resume.

> * Cpufreq stats would be maintained across hotplug for all CPUs and can be
>   queried even after CPU goes OFFLINE.
>
> Change-Id: I39c395e1fee8731880c0fd7c8a9c1d83e2e4b8d0

remove these while sending stuff upstream..

> Tested-by: Stephen Boyd 
> Signed-off-by: Saravana Kannan 
> ---
>
> Preliminary testing has been done. cpufreq directories are getting created
> properly. Online/offline of CPUs work. Policies remain unmodifiable from
> userspace when all policy CPUs are offline.
>
> Error handling code has NOT been updated.
>
> I've added a bunch of FIXME comments next to where I'm not sure about the
> locking in the existing code. I believe most of the try_lock's were present
> to prevent a deadlock between sysfs lock and the cpufreq locks. Now that
> the sysfs entries are not touched after creating them, we should be able to
> replace most/all of these try_lock's with a normal lock.
>
> This patch has more room for code simplification, but I would like to get
> some acks for the functionality and this code before I do further
> simplification.
>
> I should also be able to remove get_online_cpus() in the store function and
> replace it with just a check for policy->governor_enabled. That should
> theoretically reduce some contention between cpufreq stats check and
> hotplug of unrelated CPUs.

Its just too much stuff in a single patch, I can still review it as I
am very much
aware of every bit of code written here. But would be very difficult for others
to review it. These are so many cases, configuration we have to think of
and adding bugs with such a large patch is so so so easy.

>  drivers/cpufreq/cpufreq.c | 331 
> ++
>  1 file changed, 69 insertions(+), 262 deletions(-)
>
> diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
> index 62259d2..e350b15 100644
> --- a/drivers/cpufreq/cpufreq.c
> +++ b/drivers/cpufreq/cpufreq.c
> @@ -859,16 +859,16 @@ void cpufreq_sysfs_remove_file(const struct attribute 
> *attr)
>  }
>  EXPORT_SYMBOL(cpufreq_sysfs_remove_file);
>
> -/* symlink affected CPUs */
> +/* symlink related CPUs */
>  static int cpufreq_add_dev_symlink(struct cpufreq_policy *policy)
>  {
> -   unsigned int j;
> +   unsigned int j, first_cpu = cpumask_first(policy->related_cpus);
> int ret = 0;
>
> -   for_each_cpu(j, policy->cpus) {
> +   for_each_cpu(j, policy->related_cpus) {
> struct device *cpu_dev;
>
> -   if (j == policy->cpu)
> +   if (j == first_cpu)

why?

> continue;
>
> pr_debug("Adding link for CPU: %u\n", j);
> @@ -881,12 +881,16 @@ static int cpufreq_add_dev_symlink(struct 
> cpufreq_policy *policy)
> return ret;
>  }
>
> -static int cpufreq_add_dev_interface(struct cpufreq_policy *policy,
> -struct device *dev)
> +static int cpufreq_add_dev_interface(struct cpufreq_policy *policy)
>  {
> struct freq_attr **drv_attr;
> +   struct device *dev;
> int ret = 0;
>
> +   dev = get_cpu_device(cpumask_first(policy->related_cpus));
> +   if (!dev)
> +   return -EINVAL;
> +

Why?

> /* prepare interface data */
> ret = kobject_init_and_add(>kobj, _cpufreq,
>

[Patch Part3 V4 07/21] iommu/vt-d: Avoid freeing virtual machine domain in free_dmar_iommu()

2014-07-11 Thread Jiang Liu
Virtual machine domains are created by intel_iommu_domain_init() and
should be destroyed by intel_iommu_domain_destroy(). So avoid freeing
virtual machine domain data structure in free_dmar_iommu() when
doamin->iommu_count reaches zero, otherwise it may cause invalid
memory access because the IOMMU framework still holds references
to the domain structure.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0984fa58d872..5d7383775bf1 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1480,7 +1480,8 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
 
domain = iommu->domains[i];
clear_bit(i, iommu->domain_ids);
-   if (domain_detach_iommu(domain, iommu) == 0)
+   if (domain_detach_iommu(domain, iommu) == 0 &&
+   !domain_type_is_vm(domain))
domain_exit(domain);
}
}
-- 
1.7.10.4

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Re: [PATCH v2 0/5] kvm, mem-hotplug: Do not pin ept identity pagetable and apic access page.

2014-07-11 Thread Tang Chen

hi Gleb, Marcelo, Nadav,

Would you please help to review these patches ?

Thanks. :)

On 07/08/2014 09:01 PM, Tang Chen wrote:

ept identity pagetable and apic access page in kvm are pinned in memory.
As a result, they cannot be migrated/hot-removed.

But actually they don't need to be pinned in memory.

[For ept identity page]
Just do not pin it. When it is migrated, guest will be able to find the
new page in the next ept violation.

[For apic access page]
The hpa of apic access page is stored in VMCS APIC_ACCESS_ADDR pointer.
When apic access page is migrated, we update VMCS APIC_ACCESS_ADDR pointer
for each vcpu in addition.

Change log v1 ->  v2:
1. Add [PATCH 4/5] to remove unnecessary kvm_arch->ept_identity_pagetable.
2. In [PATCH 3/5], only introduce KVM_REQ_APIC_PAGE_RELOAD request.
3. In [PATCH 3/5], add set_apic_access_page_addr() for svm.


Tang Chen (5):
   kvm: Add gfn_to_page_no_pin() to translate gfn to page without
 pinning.
   kvm: Use APIC_DEFAULT_PHYS_BASE macro as the apic access page address.
   kvm, mem-hotplug: Do not pin ept identity pagetable in memory.
   kvm: Remove ept_identity_pagetable from struct kvm_arch.
   kvm, mem-hotplug: Do not pin apic access page in memory.

  arch/x86/include/asm/kvm_host.h |  2 +-
  arch/x86/kvm/mmu.c  | 11 +++
  arch/x86/kvm/svm.c  |  9 -
  arch/x86/kvm/vmx.c  | 40 ++--
  arch/x86/kvm/x86.c  | 16 ++--
  include/linux/kvm_host.h|  3 +++
  virt/kvm/kvm_main.c | 29 -
  7 files changed, 87 insertions(+), 23 deletions(-)


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[PATCH 1/1] usb: Check if port status is equal to RxDetect

2014-07-11 Thread Gavin Guo
When using USB 3.0 pen drive with the [AMD] FCH USB XHCI Controller
[1022:7814], the second hotplugging will experience the USB 3.0 pen
drive is recognized as high-speed device. After bisecting the kernel,
I found the commit number 41e7e056cdc662f704fa9262e5c6e213b4ab45dd
(USB: Allow USB 3.0 ports to be disabled.) causes the bug. After doing
some experiments, the bug can be fixed by avoiding executing the function
hub_usb3_port_disable(). Because the port status with [AMD] FCH USB
XHCI Controlleris [1022:7814] is already in RxDetect
(I tried printing out the port status before setting to Disabled state),
it's reasonable to check the port status before really executing
hub_usb3_port_disable().

Fixes: 41e7e056cdc6 (USB: Allow USB 3.0 ports to be disabled.)
Signed-off-by: Gavin Guo 
---
 drivers/usb/core/hub.c | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 21b99b4..e02ab62 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -889,6 +889,25 @@ static int hub_usb3_port_disable(struct usb_hub *hub, int 
port1)
if (!hub_is_superspeed(hub->hdev))
return -EINVAL;
 
+   ret = hub_port_status(hub, port1, , );
+   if (ret < 0)
+   return ret;
+
+   /*
+* USB controller Advanced Micro Devices,
+* Inc. [AMD] FCH USB XHCI Controller [1022:7814] will have spurious 
result
+* making the following usb 3.0 device hotplugging route to the 2.0 
root hub
+* and recognized as high-speed device if we set the usb 3.0 port link 
state
+*  to Disabled. Since it's already in USB_SS_PORT_LS_RX_DETECT state, 
we
+*  check the state here to avoid the bug.
+*/
+   if ((portstatus & USB_PORT_STAT_LINK_STATE) ==
+   USB_SS_PORT_LS_RX_DETECT) {
+   dev_dbg(>ports[port1 - 1]->dev,
+"The link state is already in 
USB_SS_PORT_LS_RX_DETECT\n");
+   return ret;
+   }
+
ret = hub_set_port_link_state(hub, port1, USB_SS_PORT_LS_SS_DISABLED);
if (ret)
return ret;
-- 
2.0.0

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[Patch Part3 V4 04/21] iommu/vt-d: Introduce helper functions to make code symmetric for readability

2014-07-11 Thread Jiang Liu
Introduce domain_attach_iommu()/domain_detach_iommu() and refine
iommu_attach_domain()/iommu_detach_domain() to make code symmetric
and improve readability.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |  147 +++
 1 file changed, 80 insertions(+), 67 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 52250b3e58d1..eae9b0d8bc60 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1523,32 +1523,39 @@ static struct dmar_domain *alloc_domain(int flags)
return domain;
 }
 
-static int iommu_attach_domain(struct dmar_domain *domain,
-  struct intel_iommu *iommu)
+static int __iommu_attach_domain(struct dmar_domain *domain,
+struct intel_iommu *iommu)
 {
int num;
unsigned long ndomains;
-   unsigned long flags;
 
ndomains = cap_ndoms(iommu->cap);
-
-   spin_lock_irqsave(>lock, flags);
-
num = find_first_zero_bit(iommu->domain_ids, ndomains);
-   if (num >= ndomains) {
-   spin_unlock_irqrestore(>lock, flags);
-   printk(KERN_ERR "IOMMU: no free domain ids\n");
-   return -ENOMEM;
+   if (num < ndomains) {
+   set_bit(num, iommu->domain_ids);
+   iommu->domains[num] = domain;
+   } else {
+   num = -ENOSPC;
}
 
-   domain->id = num;
-   domain->iommu_count++;
-   set_bit(num, iommu->domain_ids);
-   set_bit(iommu->seq_id, domain->iommu_bmp);
-   iommu->domains[num] = domain;
+   return num;
+}
+
+static int iommu_attach_domain(struct dmar_domain *domain,
+  struct intel_iommu *iommu)
+{
+   int num;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   num = __iommu_attach_domain(domain, iommu);
+   if (num < 0)
+   pr_err("IOMMU: no free domain ids\n");
+   else
+   domain->id = num;
spin_unlock_irqrestore(>lock, flags);
 
-   return 0;
+   return num;
 }
 
 static void iommu_detach_domain(struct dmar_domain *domain,
@@ -1558,17 +1565,53 @@ static void iommu_detach_domain(struct dmar_domain 
*domain,
int num, ndomains;
 
spin_lock_irqsave(>lock, flags);
-   ndomains = cap_ndoms(iommu->cap);
-   for_each_set_bit(num, iommu->domain_ids, ndomains) {
-   if (iommu->domains[num] == domain) {
-   clear_bit(num, iommu->domain_ids);
-   iommu->domains[num] = NULL;
-   break;
+   if (domain_type_is_vm_or_si(domain)) {
+   ndomains = cap_ndoms(iommu->cap);
+   for_each_set_bit(num, iommu->domain_ids, ndomains) {
+   if (iommu->domains[num] == domain) {
+   clear_bit(num, iommu->domain_ids);
+   iommu->domains[num] = NULL;
+   break;
+   }
}
+   } else {
+   clear_bit(domain->id, iommu->domain_ids);
+   iommu->domains[domain->id] = NULL;
}
spin_unlock_irqrestore(>lock, flags);
 }
 
+static void domain_attach_iommu(struct dmar_domain *domain,
+  struct intel_iommu *iommu)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(>iommu_lock, flags);
+   if (!test_and_set_bit(iommu->seq_id, domain->iommu_bmp)) {
+   domain->iommu_count++;
+   if (domain->iommu_count == 1)
+   domain->nid = iommu->node;
+   domain_update_iommu_cap(domain);
+   }
+   spin_unlock_irqrestore(>iommu_lock, flags);
+}
+
+static int domain_detach_iommu(struct dmar_domain *domain,
+  struct intel_iommu *iommu)
+{
+   unsigned long flags;
+   int count = INT_MAX;
+
+   spin_lock_irqsave(>iommu_lock, flags);
+   if (test_and_clear_bit(iommu->seq_id, domain->iommu_bmp)) {
+   count = --domain->iommu_count;
+   domain_update_iommu_cap(domain);
+   }
+   spin_unlock_irqrestore(>iommu_lock, flags);
+
+   return count;
+}
+
 static struct iova_domain reserved_iova_list;
 static struct lock_class_key reserved_rbtree_key;
 
@@ -1706,9 +1749,7 @@ static void domain_exit(struct dmar_domain *domain)
/* clear attached or cached domains */
rcu_read_lock();
for_each_active_iommu(iommu, drhd)
-   if (domain_type_is_vm(domain) ||
-   test_bit(iommu->seq_id, domain->iommu_bmp))
-   iommu_detach_domain(domain, iommu);
+   iommu_detach_domain(domain, iommu);
rcu_read_unlock();
 
dma_free_pagelist(freelist);
@@ -1762,16 +1803,12 @@ static int domain_context_mapping_one(struct 
dmar_domain *domain,
}
 
if (found == 0) {
-   

[Patch Part3 V4 06/21] iommu/vt-d: Fix possible invalid memory access caused by free_dmar_iommu()

2014-07-11 Thread Jiang Liu
Static identity and virtual machine domains may be cached in
iommu->domain_ids array after corresponding IOMMUs have been removed
from domain->iommu_bmp. So we should check domain->iommu_bmp before
decreasing domain->iommu_count in function free_dmar_iommu(), otherwise
it may cause free of inuse domain data structure.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   11 ---
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 968e3d32e305..0984fa58d872 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -425,6 +425,8 @@ static void domain_remove_one_dev_info(struct dmar_domain 
*domain,
   struct device *dev);
 static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
   struct device *dev);
+static int domain_detach_iommu(struct dmar_domain *domain,
+  struct intel_iommu *iommu);
 
 #ifdef CONFIG_INTEL_IOMMU_DEFAULT_ON
 int dmar_disabled = 0;
@@ -1465,8 +1467,7 @@ static int iommu_init_domains(struct intel_iommu *iommu)
 static void free_dmar_iommu(struct intel_iommu *iommu)
 {
struct dmar_domain *domain;
-   int i, count;
-   unsigned long flags;
+   int i;
 
if ((iommu->domains) && (iommu->domain_ids)) {
for_each_set_bit(i, iommu->domain_ids, cap_ndoms(iommu->cap)) {
@@ -1479,11 +1480,7 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
 
domain = iommu->domains[i];
clear_bit(i, iommu->domain_ids);
-
-   spin_lock_irqsave(>iommu_lock, flags);
-   count = --domain->iommu_count;
-   spin_unlock_irqrestore(>iommu_lock, flags);
-   if (count == 0)
+   if (domain_detach_iommu(domain, iommu) == 0)
domain_exit(domain);
}
}
-- 
1.7.10.4

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[Patch Part3 V4 09/21] iommu/vt-d: Change iommu_enable/disable_translation to return void

2014-07-11 Thread Jiang Liu
Simplify error handling path by changing iommu_{enable|disable}_translation
to return void.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 5d7383775bf1..0ba078bc0f32 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1389,7 +1389,7 @@ static void iommu_disable_protect_mem_regions(struct 
intel_iommu *iommu)
raw_spin_unlock_irqrestore(>register_lock, flags);
 }
 
-static int iommu_enable_translation(struct intel_iommu *iommu)
+static void iommu_enable_translation(struct intel_iommu *iommu)
 {
u32 sts;
unsigned long flags;
@@ -1403,10 +1403,9 @@ static int iommu_enable_translation(struct intel_iommu 
*iommu)
  readl, (sts & DMA_GSTS_TES), sts);
 
raw_spin_unlock_irqrestore(>register_lock, flags);
-   return 0;
 }
 
-static int iommu_disable_translation(struct intel_iommu *iommu)
+static void iommu_disable_translation(struct intel_iommu *iommu)
 {
u32 sts;
unsigned long flag;
@@ -1420,7 +1419,6 @@ static int iommu_disable_translation(struct intel_iommu 
*iommu)
  readl, (!(sts & DMA_GSTS_TES)), sts);
 
raw_spin_unlock_irqrestore(>register_lock, flag);
-   return 0;
 }
 
 
@@ -2860,11 +2858,7 @@ static int __init init_dmars(void)
 
iommu->flush.flush_context(iommu, 0, 0, 0, 
DMA_CCMD_GLOBAL_INVL);
iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
-
-   ret = iommu_enable_translation(iommu);
-   if (ret)
-   goto free_iommu;
-
+   iommu_enable_translation(iommu);
iommu_disable_protect_mem_regions(iommu);
}
 
@@ -3578,10 +3572,8 @@ static int init_iommu_hw(void)
 
iommu->flush.flush_context(iommu, 0, 0, 0,
   DMA_CCMD_GLOBAL_INVL);
-   iommu->flush.flush_iotlb(iommu, 0, 0, 0,
-DMA_TLB_GLOBAL_FLUSH);
-   if (iommu_enable_translation(iommu))
-   return 1;
+   iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
+   iommu_enable_translation(iommu);
iommu_disable_protect_mem_regions(iommu);
}
 
-- 
1.7.10.4

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[Patch Part3 V4 05/21] iommu/vt-d: Allocate dynamic domain id for virtual domains only

2014-07-11 Thread Jiang Liu
Check the same domain id is allocated for si_domain on each IOMMU,
otherwise the IOTLB flush for si_domain will fail.

Now the rules to allocate and manage domain id are:
1) For normal and static identity domains, domain id is allocated
   when creating domain structure. And this id will be written into
   context entry.
2) For virtual machine domain, a virtual id is allocated when creating
   domain. And when binding virtual machine domain to an iommu, a real
   domain id is allocated on demand and this domain id will be written
   into context entry. So domain->id for virtual machine domain may be
   different from the domain id written into context entry(used by
   hardware).

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   47 ---
 1 file changed, 26 insertions(+), 21 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index eae9b0d8bc60..968e3d32e305 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1549,15 +1549,27 @@ static int iommu_attach_domain(struct dmar_domain 
*domain,
 
spin_lock_irqsave(>lock, flags);
num = __iommu_attach_domain(domain, iommu);
+   spin_unlock_irqrestore(>lock, flags);
if (num < 0)
pr_err("IOMMU: no free domain ids\n");
-   else
-   domain->id = num;
-   spin_unlock_irqrestore(>lock, flags);
 
return num;
 }
 
+static int iommu_attach_vm_domain(struct dmar_domain *domain,
+ struct intel_iommu *iommu)
+{
+   int num;
+   unsigned long ndomains;
+
+   ndomains = cap_ndoms(iommu->cap);
+   for_each_set_bit(num, iommu->domain_ids, ndomains)
+   if (iommu->domains[num] == domain)
+   return num;
+
+   return __iommu_attach_domain(domain, iommu);
+}
+
 static void iommu_detach_domain(struct dmar_domain *domain,
struct intel_iommu *iommu)
 {
@@ -1764,8 +1776,6 @@ static int domain_context_mapping_one(struct dmar_domain 
*domain,
struct context_entry *context;
unsigned long flags;
struct dma_pte *pgd;
-   unsigned long num;
-   unsigned long ndomains;
int id;
int agaw;
struct device_domain_info *info = NULL;
@@ -1790,20 +1800,8 @@ static int domain_context_mapping_one(struct dmar_domain 
*domain,
pgd = domain->pgd;
 
if (domain_type_is_vm_or_si(domain)) {
-   int found = 0;
-
-   /* find an available domain id for this device in iommu */
-   ndomains = cap_ndoms(iommu->cap);
-   for_each_set_bit(num, iommu->domain_ids, ndomains) {
-   if (iommu->domains[num] == domain) {
-   id = num;
-   found = 1;
-   break;
-   }
-   }
-
-   if (found == 0) {
-   id = __iommu_attach_domain(domain, iommu);
+   if (domain_type_is_vm(domain)) {
+   id = iommu_attach_vm_domain(domain, iommu);
if (id < 0) {
spin_unlock_irqrestore(>lock, flags);
pr_err("IOMMU: no free domain ids\n");
@@ -2257,8 +2255,8 @@ static struct dmar_domain *get_domain_for_dev(struct 
device *dev, int gaw)
domain = alloc_domain(0);
if (!domain)
return NULL;
-
-   if (iommu_attach_domain(domain, iommu) < 0) {
+   domain->id = iommu_attach_domain(domain, iommu);
+   if (domain->id < 0) {
free_domain_mem(domain);
return NULL;
}
@@ -2428,6 +2426,7 @@ static int __init si_domain_init(int hw)
struct dmar_drhd_unit *drhd;
struct intel_iommu *iommu;
int nid, ret = 0;
+   bool first = true;
 
si_domain = alloc_domain(DOMAIN_FLAG_STATIC_IDENTITY);
if (!si_domain)
@@ -2438,6 +2437,12 @@ static int __init si_domain_init(int hw)
if (ret < 0) {
domain_exit(si_domain);
return -EFAULT;
+   } else if (first) {
+   si_domain->id = ret;
+   first = false;
+   } else if (si_domain->id != ret) {
+   domain_exit(si_domain);
+   return -EFAULT;
}
domain_attach_iommu(si_domain, iommu);
}
-- 
1.7.10.4

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[Patch Part3 V4 00/21] Enable support of Intel DMAR device hotplug

2014-07-11 Thread Jiang Liu
When hot plugging a descrete IOH or a physical processor with embedded
IIO, we need to handle DMAR(or IOMMU) unit in the PCIe host bridge if
DMAR is in use. This patch set tries to enhance current DMAR/IOMMU/IR
drivers to support hotplug and is based on latest Joerg's iommu/next
branch.

Patch 1-13 are bugfixes and code improvement for current drivers.
Patch 14-17 enhances DMAR framework to support hotplug
Patch 18 enhances Intel interrupt remapping driver to support hotplug
Patch 19 enhances error handling in Intel IR driver
Patch 20 enhance Intel IOMMU to support hotplug
Patch 21 enhance ACPI pci_root driver to handle DMAR units

This patch set has been tested on Intel development machine.
Appreciate any comments and tests. With this patch set and
another IOAPIC hotplug patch set(http://www.mail-archive.com/linux-kernel
@vger.kernel.org/msg671316.html) applied, we could support full functional
socket hotplug on x86 platforms now.

V3->V4:
1) rebase onto iommu/next branch to solve conflicts
2) refine commit messages according to Bjorn's suggestion.

V2->V3:
1) rebase to latest v3.16-rc2
2) fix a bug in detecting super page support when hot-adding IOMMU

V1->V2:
1) enhance the way to simplify intel_unmap_sg()
2) rename dmar_device_hotplug() to dmar_device_add/remove()
3) coding style improvment

Best Regards!

Jiang Liu (21):
  iommu/vt-d: Match segment number when searching for dev_iotlb capable
devices
  iommu/vt-d: Use correct domain id to flush virtual machine domains
  iommu/vt-d: Introduce helper functions to improve code readability
  iommu/vt-d: Introduce helper functions to make code symmetric for
readability
  iommu/vt-d: Allocate dynamic domain id for virtual domains only
  iommu/vt-d: Fix possible invalid memory access caused by
free_dmar_iommu()
  iommu/vt-d: Avoid freeing virtual machine domain in free_dmar_iommu()
  iommu/vt-d: Simplify include/linux/dmar.h
  iommu/vt-d: Change iommu_enable/disable_translation to return void
  iommu/vt-d: Simplify intel_unmap_sg() and kill duplicated code
  iommu/vt-d: Introduce helper domain_pfn_within_range() to simplify
code
  iommu/vt-d: Introduce helper function iova_size() to improve code
readability
  iommu/vt-d: Fix issue in computing domain's iommu_snooping flag
  iommu/vt-d: Introduce helper function dmar_walk_resources()
  iommu/vt-d: Dynamically allocate and free seq_id for DMAR units
  iommu/vt-d: Implement DMAR unit hotplug framework
  iommu/vt-d: Search for ACPI _DSM method for DMAR hotplug
  iommu/vt-d: Enhance intel_irq_remapping driver to support DMAR unit
hotplug
  iommu/vt-d: Enhance error recovery in function
intel_enable_irq_remapping()
  iommu/vt-d: Enhance intel-iommu driver to support DMAR unit hotplug
  pci, ACPI, iommu: Enhance pci_root to support DMAR device hotplug

 drivers/acpi/pci_root.c |   16 +-
 drivers/iommu/dmar.c|  531 --
 drivers/iommu/intel-iommu.c |  720 +--
 drivers/iommu/intel_irq_remapping.c |  233 +---
 include/linux/dmar.h|   86 +++--
 include/linux/iova.h|5 +
 6 files changed, 1104 insertions(+), 487 deletions(-)

-- 
1.7.10.4

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[Patch Part3 V4 03/21] iommu/vt-d: Introduce helper functions to improve code readability

2014-07-11 Thread Jiang Liu
Introduce domain_type_is_vm() and domain_type_is_vm_or_si() to improve
code readability.

Also kill useless macro DOMAIN_FLAG_P2P_MULTIPLE_DEVICES.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |   59 +++
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d77009bdade5..52250b3e58d1 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -320,16 +320,13 @@ static inline int first_pte_in_page(struct dma_pte *pte)
 static struct dmar_domain *si_domain;
 static int hw_pass_through = 1;
 
-/* devices under the same p2p bridge are owned in one domain */
-#define DOMAIN_FLAG_P2P_MULTIPLE_DEVICES (1 << 0)
-
 /* domain represents a virtual machine, more than one devices
  * across iommus may be owned in one domain, e.g. kvm guest.
  */
-#define DOMAIN_FLAG_VIRTUAL_MACHINE(1 << 1)
+#define DOMAIN_FLAG_VIRTUAL_MACHINE(1 << 0)
 
 /* si_domain contains mulitple devices */
-#define DOMAIN_FLAG_STATIC_IDENTITY(1 << 2)
+#define DOMAIN_FLAG_STATIC_IDENTITY(1 << 1)
 
 /* define the limit of IOMMUs supported in each domain */
 #ifdef CONFIG_X86
@@ -539,6 +536,16 @@ void free_iova_mem(struct iova *iova)
kmem_cache_free(iommu_iova_cache, iova);
 }
 
+static inline int domain_type_is_vm(struct dmar_domain *domain)
+{
+   return domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE;
+}
+
+static inline int domain_type_is_vm_or_si(struct dmar_domain *domain)
+{
+   return domain->flags & (DOMAIN_FLAG_VIRTUAL_MACHINE |
+   DOMAIN_FLAG_STATIC_IDENTITY);
+}
 
 static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
 {
@@ -579,9 +586,7 @@ static struct intel_iommu *domain_get_iommu(struct 
dmar_domain *domain)
int iommu_id;
 
/* si_domain and vm domain should not get here. */
-   BUG_ON(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE);
-   BUG_ON(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY);
-
+   BUG_ON(domain_type_is_vm_or_si(domain));
iommu_id = find_first_bit(domain->iommu_bmp, g_num_of_iommus);
if (iommu_id < 0 || iommu_id >= g_num_of_iommus)
return NULL;
@@ -1497,7 +1502,7 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
free_context_table(iommu);
 }
 
-static struct dmar_domain *alloc_domain(bool vm)
+static struct dmar_domain *alloc_domain(int flags)
 {
/* domain id for virtual machine, it won't be set in context */
static atomic_t vm_domid = ATOMIC_INIT(0);
@@ -1507,16 +1512,13 @@ static struct dmar_domain *alloc_domain(bool vm)
if (!domain)
return NULL;
 
+   memset(domain, 0, sizeof(*domain));
domain->nid = -1;
-   domain->iommu_count = 0;
-   memset(domain->iommu_bmp, 0, sizeof(domain->iommu_bmp));
-   domain->flags = 0;
+   domain->flags = flags;
spin_lock_init(>iommu_lock);
INIT_LIST_HEAD(>devices);
-   if (vm) {
+   if (flags & DOMAIN_FLAG_VIRTUAL_MACHINE)
domain->id = atomic_inc_return(_domid);
-   domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
-   }
 
return domain;
 }
@@ -1704,7 +1706,7 @@ static void domain_exit(struct dmar_domain *domain)
/* clear attached or cached domains */
rcu_read_lock();
for_each_active_iommu(iommu, drhd)
-   if (domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE ||
+   if (domain_type_is_vm(domain) ||
test_bit(iommu->seq_id, domain->iommu_bmp))
iommu_detach_domain(domain, iommu);
rcu_read_unlock();
@@ -1746,8 +1748,7 @@ static int domain_context_mapping_one(struct dmar_domain 
*domain,
id = domain->id;
pgd = domain->pgd;
 
-   if (domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE ||
-   domain->flags & DOMAIN_FLAG_STATIC_IDENTITY) {
+   if (domain_type_is_vm_or_si(domain)) {
int found = 0;
 
/* find an available domain id for this device in iommu */
@@ -2094,7 +2095,7 @@ static void domain_remove_dev_info(struct dmar_domain 
*domain)
iommu_disable_dev_iotlb(info);
iommu_detach_dev(info->iommu, info->bus, info->devfn);
 
-   if (domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE) {
+   if (domain_type_is_vm(domain)) {
iommu_detach_dependent_devices(info->iommu, info->dev);
/* clear this iommu in iommu_bmp, update iommu count
 * and capabilities
@@ -2160,8 +2161,6 @@ static struct dmar_domain *dmar_insert_dev_info(struct 
intel_iommu *iommu,
info->dev = dev;
info->domain = domain;
info->iommu = iommu;
-   if (!dev)
-   domain->flags |= DOMAIN_FLAG_P2P_MULTIPLE_DEVICES;
 
spin_lock_irqsave(_domain_lock, flags);
if (dev)
@@ -2233,7 +2232,7 @@ static 

[Patch Part3 V4 02/21] iommu/vt-d: Use correct domain id to flush virtual machine domains

2014-07-11 Thread Jiang Liu
For virtual machine domains, domain->id is a virtual id, and the real
domain id written into context entry is dynamically allocated.
So use the real domain id instead of domain->id when flushing iotlbs
for virtual machine domains.

Signed-off-by: Jiang Liu 
---
 drivers/iommu/intel-iommu.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 147ab1c0b573..d77009bdade5 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1822,7 +1822,7 @@ static int domain_context_mapping_one(struct dmar_domain 
*domain,
   (((u16)bus) << 8) | devfn,
   DMA_CCMD_MASK_NOBIT,
   DMA_CCMD_DEVICE_INVL);
-   iommu->flush.flush_iotlb(iommu, domain->id, 0, 0, 
DMA_TLB_DSI_FLUSH);
+   iommu->flush.flush_iotlb(iommu, id, 0, 0, DMA_TLB_DSI_FLUSH);
} else {
iommu_flush_write_buffer(iommu);
}
-- 
1.7.10.4

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[PATCH 0/1] Fixes to the USB 3.0 detection as 2.0 on AMD platform

2014-07-11 Thread Gavin Guo
Hi Sarah and Mathias,

As the discussion in http://comments.gmane.org/gmane.linux.usb.general/107011, 
I found that [AMD] FCH USB XHCI Controller [1022:7814] the USB 3.0 disk 
can't work in SuperSpeed after several times of hotplug. After doing some 
experiments and bisection, I found the bug is caused by 
41e7e056cdc662f704fa9262e5c6e213b4ab45dd (USB: Allow USB 3.0 ports to be 
disabled.). And the bug can be fixed by not executing the 
hub_usb3_port_disable() function. I also found that the port status is 
already in RxDetect before setting the port to Disabled in 
hub_usb3_port_disable() function. So, there are 2 ways to fix the bug:

1) Check if the Vendor/Device id is [1022:7814] at the beginning of 
hub_usb3_port_disable() function. If yes, return without executing the 
remaining code.

2) Check if the port status is already in RxDetect, if yes, return without 
executing the remaining code.

The second method seems more reasonable, so the patch is the implementation
of the second one. But it will affect more platforms and I don't know if 
there'll be any negative result. Otherwise, if the first one is correct, 
I can reimplement a new one.

I'm appreciated if you can give me some advice, or if there is any thing I 
missed.

Thanks,
Gavin

Gavin Guo (1):
  usb: Check if port status is equal to RxDetect

 drivers/usb/core/hub.c | 19 +++
 1 file changed, 19 insertions(+)

-- 
2.0.0

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Re: [PATCH v2 1/2] gpio: Add driver for Zynq GPIO controller

2014-07-11 Thread Baruch Siach
Hi Linus,

On Tue, Jul 08, 2014 at 11:27:57AM +0200, Linus Walleij wrote:
> On Mon, Jul 7, 2014 at 5:23 PM, Baruch Siach  wrote:
> > On Mon, Jul 07, 2014 at 04:51:56PM +0200, Linus Walleij wrote:
> 
> >> This needs someone to step in and provide a replacement, my preferred
> >> mechanism would be a /dev/gpiochip0/... hierarchy using char devices.
> >
> > I really like the ability to control GPIOs from shell, both interactively 
> > and
> > scripted. I find it useful for quick hardware level debugging,
> 
> I would be happy to carry it in the unstable-ABI debugfs for sure.
> It's the supported ABI that bothers me.
> 
> > and for boot
> > time scripting (mainly in initramfs).
> 
> What is the usecase here?

During boot I need to know, for example, when an FPGA is ready to be 
programmed, and when said FPGA has finished its initialization. I also read 
the sate of on-board DIP switches to determine the desired boot method. I find 
the current sysfs interface quite convenient for these and similar tasks.

baruch

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Re: [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type

2014-07-11 Thread Daniel Vetter
On Thu, Jul 10, 2014 at 09:08:24PM +, Tian, Kevin wrote:
> actually I'm curious whether it's still necessary to __detect__ PCH. Could
> we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard
> code the knowledge:
> 
>   } else if (IS_BROADWELL(dev)) {
>   dev_priv->pch_type = PCH_LPT;
>   dev_priv->pch_id =
>   INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
>   DRM_DEBUG_KMS("This is Broadwell, assuming "
> "LynxPoint LP PCH\n");
> 
> Or if there is real usage on non-fixed mapping (not majority), could it be a 
> better option to have fixed mapping as a fallback instead of leaving as 
> PCH_NONE? Then even when Qemu doesn't provide a special tweaked PCH,
> the majority case just works.

I guess we can do it, at least I haven't seen any strange combinations in
the wild outside of Intel ...
-Daniel
-- 
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Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 4/8] Drivers: scsi: storvsc: Filter WRITE_SAME_16

2014-07-11 Thread h...@infradead.org
On Wed, Jul 09, 2014 at 10:27:24PM +, James Bottomley wrote:
> If we fix it at source, why would there be any need to filter?  That's
> the reason the no_write_same flag was introduced.  If we can find and
> fix the bug, it can go back into the stable trees as a bug fix, hence
> nothing should ever emit write_same(10 or 16) and additional driver code
> is redundant (and counter productive, since if this ever breaks again
> you're our best canary).
> 
> This looks like it might be the problem but Martin should confirm (I
> think the problem comes to us from the RC16 code which unconditionally
> sets WS16).

I think the problem is a differnet one.  If we have the logical
provisioning EVPD it configures what method to use, but if we don't have
one we simply check for a max unmap blocks field, and if that's not
present use WRITE SAME.

The patch checks the no_write_same flag before doing that, for which
we also have to do the write_same setup before the discard setup
in sd_revalidate_disk.

Ky: does hyperv support UNMAP?  If so any idea why it doesn't set
the maximum unmap block count field in the EVPD?

If we want to enable UNMAP in this case I'd prefer a blacklist entry
than trying UNMAP despite the device not advertising it.

diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index ba756b1..fbccfd2 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2614,9 +2614,10 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
 
if (sdkp->max_unmap_blocks)
sd_config_discard(sdkp, SD_LBP_UNMAP);
-   else
+   else if (!sdkp->device->no_write_same)
sd_config_discard(sdkp, SD_LBP_WS16);
-
+   else
+   sd_config_discard(sdkp, SD_LBP_DISABLE);
} else {/* LBP VPD page tells us what to use */
 
if (sdkp->lbpu && sdkp->max_unmap_blocks)
@@ -2766,6 +2767,7 @@ static int sd_revalidate_disk(struct gendisk *disk)
 */
if (sdkp->media_present) {
sd_read_capacity(sdkp, buffer);
+   sd_read_write_same(sdkp, buffer);
 
if (sd_try_extended_inquiry(sdp)) {
sd_read_block_provisioning(sdkp);
@@ -2776,7 +2778,6 @@ static int sd_revalidate_disk(struct gendisk *disk)
sd_read_write_protect_flag(sdkp, buffer);
sd_read_cache_type(sdkp, buffer);
sd_read_app_tag_own(sdkp, buffer);
-   sd_read_write_same(sdkp, buffer);
}
 
sdkp->first_scan = 0;
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Re: [PATCHv3 2/2] Add force_epp module option for parport_pc.

2014-07-11 Thread Matwey V. Kornilov



Or did I read the patch incorrectly?


Maybe I've implemented something incorrectly? I think I suggested
exactly inverse thing: the check is disabled only when the option is
touched by user:

!force_epp && intel_bug_present(pb) <=> intel_bug_present(pb) (given
that force_epp is false)


I don't understand, care to just resend the patches? I really don't
remember what the patch said...


The patch is in bottom of this message. My suggestion was that people 
suffering from false positives will set the option to TRUE, and other 
won't touch it.



Why not implement Alan's suggestion?


Why not, if you are fine with it. Are you sure that PPro was turning point?


If Alan says so, I believe him :)


Ok, then I believe you, I will go to reimplement it in Alan's way.



From cf37d0cc4d51da5c0b368e1f5ab05082c041d1e1 Mon Sep 17 00:00:00 2001

From: "Matwey V. Kornilov" 
Date: Wed, 25 Jun 2014 01:08:45 +0400
Subject: [PATCH 2/2] Add force_epp module option for parport_pc.

The detection of Intel EPP bug is known to produce much false positives.
The new option is introduced to force enable EPP in spite of the test result.

Tested-by: Heiko Andreas Sommer 
Signed-off-by: Matwey V. Kornilov 
---
 drivers/parport/parport_pc.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c
index a6eaafb..fb7530d 100644
--- a/drivers/parport/parport_pc.c
+++ b/drivers/parport/parport_pc.c
@@ -105,6 +105,9 @@ static int user_specified;
(defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO))
 static int verbose_probing;
 #endif
+#ifdef CONFIG_PARPORT_1284
+static int force_epp;
+#endif
 static int pci_registered_parport;
 static int pnp_registered_parport;

@@ -1764,7 +1767,7 @@ static int parport_EPP_supported(struct parport *pb)
return 0;  /* No way to clear timeout */

/* Check for Intel bug. */
-   if (intel_bug_present(pb))
+   if (!force_epp && intel_bug_present(pb))
return 0;

pb->modes |= PARPORT_MODE_EPP;
@@ -3147,6 +3150,10 @@ module_param_array(dma, charp, NULL, 0);
 MODULE_PARM_DESC(verbose_probing, "Log chit-chat during initialisation");
 module_param(verbose_probing, int, 0644);
 #endif
+#ifdef CONFIG_PARPORT_1284
+MODULE_PARM_DESC(force_epp, "Force EPP enabling when buggy hardware found by the 
module checks");
+module_param(force_epp, int, 0);
+#endif
 #ifdef CONFIG_PCI
 static char *init_mode;
 MODULE_PARM_DESC(init_mode,
--
1.8.1.4

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Re: [PATCH 6/6] tty: serial: Add 8250-core based omap driver

2014-07-11 Thread Tony Lindgren
* Sebastian Andrzej Siewior  [140710 08:50]:
> On 07/10/2014 09:09 AM, Tony Lindgren wrote:
> > You can test this pretty easily on beagleboard xm for example
> > using v3.16-r4:
> 
> I tried this with am335x-evm, dra7-evm and beaglebone (omap5-uevm and
> am335x-evmsk didn't want to boot a kernel and omap4-blaze didn't even
> want to show MLO/U-boot) with the same result.

None of these SoCs support off-idle with mainline kernel so testing
with those is not enough :) Best to use some omap3 based device for
testing this.

So far I have verified that beagleboard xm, n900, and omap3730-evm
all hit off-idle with v3.16-rc4.
 
> > 1. Compile the kernel using omap2plus_defconfig and enable your
> >driver. USB EHCI needs to be disabled and OTG port should
> >not have a USB cable connected.
> 
> EHCI was already disabled in the config. OTG was not connected.

OK
 
> > 2. Boot with init=/bin/sh to keep user space timers to minimum
> >at least until you have verified to hit off-idle
> 
> I had network up and configured. Was that okay? I also tried
> "ifconfig eth0 down; sleep 10; ifconfig eth0 up" to see if it works.

That's fine for GPMC connected devices, devices with Ethernet on
EHCI won't idle properly AFAIK.
 
> > 3. Enable UART timeouts with something like this. You may need
> >to update it for ttyS, I just changed ttyO to ttyS here:
> > 
> >#!/bin/bash
> >uarts=$(find /sys/class/tty/ttyS*/device/power/ -type d)
> >for uart in $uarts; do
> > echo 3000 > $uart/autosuspend_delay_ms
> >done
> > 
> >uarts=$(find /sys/class/tty/ttyS*/power/ -type d)
> >for uart in $uarts; do
> > echo enabled > $uart/wakeup
> > echo auto > $uart/control
> >done
> > 
> >echo 1 > /sys/kernel/debug/pm_debug/enable_off_mode
> > 
> > 4. Wait for UART to time out and verify you hit off-idle by
> >looking at the debugfs entry:
> > 
> ># cat /sys/kernel/debug/pm_debug/count
> >...
> >core_pwrdm 
> > (ON),OFF:6,RET:0,INA:0,ON:7,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0
> 
> That core_pwrdm shows only up on dra7. However with both drivers (mine
> and the current omap serial) the UART went down after three secs (as
> expected) and didn't accept any characters while writing on the
> console. If I wrote something on it via network (like echo a >
> /dev/ttyO0) it came back and was working as long as I kept it busy. The
> thing is that RX does not wake it up. Any idea?

If the RX pin does not wake it up, you need to configure the
pinctrl-single entry for it, and configure that pin as a wake-up
interrupt. See the interrupts-extended entry in omap3-beagle-xm.dts.

> Also, while it was I checked the core_pwrdm and I had ON:1 and OFF:0.
> So something is not right.
> Since Dra7 has some things missing I tried it on am335x with the same
> behavior. Should it work here?

Yes only omap3 currently has the pieces needed for off-idle in the
mainline kernel.
 
> > I just tried testing this, but did not get far on my omap3 evm:
> > 
> > [5.445953] Unhandled fault: external abort on non-linefetch (0x1028) at 
> > 0xfb02
> > [5.453674] Internal error: : 1028 [#1] SMP ARM
> > [5.458221] Modules linked in:
> > [5.461334] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 
> > 3.16.0-rc4-6-gaab2c6a #98
> > [5.469024] task: ce058b00 ti: ce05a000 task.ti: ce05a000
> > [5.474456] PC is at mem32_serial_in+0xc/0x1c
> > [5.478851] LR is at serial8250_do_startup+0xc8/0x89c
> > [5.483917] pc : []lr : []psr: 6113
> > [5.483917] sp : ce05bd10  ip : c0a0aba8  fp : ce275400
> > [5.495452] r10:   r9 : cda7a680  r8 : ce27568c
> > [5.500701] r7 : ce275400  r6 :   r5 : ce280408  r4 : c10b6234
> > [5.507263] r3 : fb02  r2 : 0002  r1 : fb02  r0 : c10b6234
> > [5.513854] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment 
> > kernel
> > [5.521179] Control: 10c5387d  Table: 80004019  DAC: 0015
> > [5.526977] Process swapper/0 (pid: 1, stack limit = 0xce05a248)
> > [5.532989] Stack: (0xce05bd10 to 0xce05c000)
> > ...
> > [5.734771] [] (mem32_serial_in) from [] 
> > (serial8250_do_startup+0xc8/0x89c)
> > [5.743530] [] (serial8250_do_startup) from [] 
> > (uart_startup.part.3+0x7c/0x1dc)
> > [5.752624] [] (uart_startup.part.3) from [] 
> > (uart_open+0xe4/0x124)
> > [5.760681] [] (uart_open) from [] 
> > (tty_open+0x130/0x58c)
> > [5.767852] [] (tty_open) from [] 
> > (chrdev_open+0x9c/0x174)
> > [5.775115] [] (chrdev_open) from [] 
> > (do_dentry_open+0x1d0/0x310)
> > [5.783020] [] (do_dentry_open) from [] 
> > (finish_open+0x34/0x4c)
> > [5.790710] [] (finish_open) from [] 
> > (do_last.isra.27+0x5a4/0xb98)
> > [5.798675] [] (do_last.isra.27) from [] 
> > (path_openat+0xb4/0x5e4)
> > [5.806549] [] (path_openat) from [] 
> > (do_filp_open+0x2c/0x80)
> > [5.814086] [] (do_filp_open) from [] 
> > (do_sys_open+0x100/0x1d0)
> > [5.821777] [] 

Re: [RFC PATCH 00/10] OMAP: GPMC: NAND: Introduce GPMC APIs for OMAP NAND

2014-07-11 Thread Tony Lindgren
* Roger Quadros  [140709 05:39]:
> Hi,
> 
> The following hardware modules/registers are meant for NAND controller driver
> usage:
> - NAND I/O control (NAND address, data, command registers)
> - Prefetch/Write-post engine
> - ECC/BCH engine
> 
> However, these registers sit in the GPMC controller's register space and there
> need to be some sane way to access them from the OMAP NAND controller driver.
> 
> Till now the GPMC driver was populating a data structure (struct 
> gpmc_nand_regs)
> with the register addresses and passing it to the OMAP NAND driver via 
> platform
> data. This mechanism cannot be used for true Device tree support as custom
> platform data passing mechanism doesn't seem to work. Moreover, direct
> access to these registers must be limited to the GPMC driver. This calls for
> a few custom OMAP GPMC specific APIs that the OMAP NAND driver can use
> to access these GPMC space registers.
> 
> This series attempts to add the following new APIs and gets rid of
> 'struct gpmc_nand_regs' and 'gpmc_update_nand_regs()'.
> 
> -For NAND I/O control registers
> u32 omap_gpmc_read_reg(int cs, enum omap_gpmc_reg reg);
> void omap_gpmc_write_reg(int cs, enum omap_gpmc_reg reg, u32 val);
> 
> -For Prefetch engine
> int omap_gpmc_prefetch_start(int cs, int fifo_th, bool dma,
>u32 count, int is_write);
> int omap_gpmc_prefetch_stop(int cs);
> u32 omap_gpmc_get_prefetch_count(void);
> u32 omap_gpmc_get_prefetch_fifo_count(void);
> 
> -For ECC/BCH engine
> void omap_gpmc_ecc_disable(void);
> void omap_gpmc_ecc_configure_enable(int cs, bool ecc16, u8 ecc_size0,
>   u8 ecc_size1, bool use_bch,
>   enum omap_gpmc_bch_type bch_type,
>   u8 bch_sectors, u8 bch_wrap_mode);
> void omap_gpmc_ecc_get_result(int length, u32 *result);
> void omap_gpmc_ecc_get_bch_result(int length, u8 sector, u32 *result);

These seem fine to me. At least I don't have any better ideas to
expose these GPMC registers to the NAND driver(s).
 
> These APIs don't implement any logic to serialize access to the
> NAND/Prefetch/ECC registers. It is upto the NAND controller driver
> to ensure that. As these modules can only handle one NAND controller context
> at a time, we set the nand_chip->hwcontrol to point to a single
> controller instance even if there are multiple NAND chips on different
> Chip select spaces. The NAND base driver then takes care of serializing
> access to the NAND controller (and ECC) through nandchip->hwcontrol->lock.
> 
> NOTE: Patches are still untested and only meant for review.

Regards,

Tony
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Re: + shmem-fix-faulting-into-a-hole-while-its-punched-take-2.patch added to -mm tree

2014-07-11 Thread Hugh Dickins
On Thu, 10 Jul 2014, Hugh Dickins wrote:
> On Thu, 10 Jul 2014, Sasha Levin wrote:
> > On 07/10/2014 01:55 PM, Hugh Dickins wrote:
> > >> And finally, (not) holding the i_mmap_mutex:
> > > I don't understand what prompts you to show this particular task.
> > > I imagine the dump shows lots of other tasks which are waiting to get an
> > > i_mmap_mutex, and quite a lot of other tasks which are neither waiting
> > > for nor holding an i_mmap_mutex.
> > > 
> > > Why are you showing this one in particular?  Because it looks like the
> > > one you fingered yesterday?  But I didn't see a good reason to finger
> > > that one either.
> > 
> > There are a few more tasks like this one, my criteria was tasks that lockdep
> > claims were holding i_mmap_mutex, but are actually not.
> 
> You and Vlastimil enlightened me yesterday that lockdep shows tasks as
> holding i_mmap_mutex when they are actually waiting to get i_mmap_mutex.
> Hundreds of those in yesterday's log, hundreds of them in today's.
> 
> The full log you've sent (thanks) is for a different run from the one
> you showed in today's mail.  No problem with that, except when I assert
> that trinity-c190 in today's mail is just like trinity-c402 in yesterday's,
> a task caught at one stage of exit_mmap in the stack dumps, then a later
> stage of exit_mmap in the locks held dumps, I'm guessing rather than
> confirming from the log.
> 
> There's nothing(?) interesting about those tasks, they're just tasks we
> have been lucky to catch a moment before they reach the i_mmap_mutex
> hang affecting the majority.
> 
> > 
> > One new thing that I did notice is that since trinity spins a lot of new 
> > children
> > to test out things like execve() which would kill said children, there 
> > tends to
> > be a rather large amount of new tasks created and killed constantly.
> > 
> > So if you look at the bottom of the new log (attached), you'll see that 
> > there
> > are quite a few "trinity-subchild" processes trying to die, unsuccessfully.
> 
> Lots of those in yesterday's log too: waiting to get i_mmap_mutex.
> 
> I'll pore over the new log.  It does help to know that its base kernel
> is more stable: thanks so much.  But whether I can work out any more...

In fact Thursday's log was good enough, and no need for the improved
lockdep messaging we talked about, not for this bug at least.

Not that I properly understand it yet, but at least I identified the
task holding the i_mmap_mutex in Wednesday's and in Thursday's log.
So very obvious that I'm embarrassed even to pass on the info: I
pretty much said which the task was, without realizing it myself.

In each log there was only one task down below unmap_mapping_range().

Wednesday on linux-next-based 
3.16.0-rc4-next-20140709-sasha-00024-gd22103d-dirty #775

trinity-c235R  running task12216  9169   8558 0x1002
 8800bbf978a8 0002 88010cfe3290 0282
 8800bbf97fd8 001e2740 001e2740 001e2740
 8800bdb03000 8800bbf2b000 8800bbf978a8 8800bbf97fd8
Call Trace:
preempt_schedule (./arch/x86/include/asm/preempt.h:80 kernel/sched/core.c:2889) 
 (that's the __preempt_count_sub line after __schedule, I believe)
___preempt_schedule (arch/x86/kernel/preempt.S:11)
? zap_pte_range (mm/memory.c:1218)
? _raw_spin_unlock (./arch/x86/include/asm/preempt.h:98 
include/linux/spinlock_api_smp.h:152 kernel/locking/spinlock.c:183)
? _raw_spin_unlock (include/linux/spinlock_api_smp.h:152 
kernel/locking/spinlock.c:183)
zap_pte_range (mm/memory.c:1218)
unmap_single_vma (mm/memory.c:1256 mm/memory.c:1277 mm/memory.c:1301 
mm/memory.c:1346)
zap_page_range_single (include/linux/mmu_notifier.h:234 mm/memory.c:1427)
? unmap_mapping_range (mm/memory.c:2392)
? _raw_spin_unlock_irq (./arch/x86/include/asm/paravirt.h:819 
include/linux/spinlock_api_smp.h:168 kernel/locking/spinlock.c:199)
unmap_mapping_range (mm/memory.c:2317 mm/memory.c:2393)
truncate_inode_page (mm/truncate.c:136 mm/truncate.c:180)
shmem_undo_range (mm/shmem.c:441)
shmem_truncate_range (mm/shmem.c:537)
shmem_fallocate (mm/shmem.c:1771)
? put_lock_stats.isra.12 (./arch/x86/include/asm/preempt.h:98 
kernel/locking/lockdep.c:254)
do_fallocate (include/linux/fs.h:1281 fs/open.c:299)
SyS_madvise (mm/madvise.c:332 mm/madvise.c:381 mm/madvise.c:531 
mm/madvise.c:462)
tracesys (arch/x86/kernel/entry_64.S:542)

Thursday on Linus-based 3.16.0-rc4-sasha-00069-g615ded7-dirty #793

trinity-c100R  running task13048  8967   8490 0x0006
 88001b903978 0002 0006 880404666fd8
 88001b903fd8 001d7740 001d7740 001d7740
 880007a4 88001b8f8000 88001b903968 88001b903fd8
Call Trace:
preempt_schedule_irq (./arch/x86/include/asm/paravirt.h:814 
kernel/sched/core.c:2912) (that's the local_irq_disable line after __schedule, 
I believe)
retint_kernel (arch/x86/kernel/entry_64.S:937)
? unmap_single_vma (mm/memory.c:1230 mm/memory.c:1277 

Re: [PATCH 2/2] staging: silicom: function return fixes

2014-07-11 Thread Davide Gianforte
On Wed, Jul 09, 2014 at 11:59:14, Greg Kroah-Hartman wrote:
> On Tue, Jul 01, 2014 at 02:33:43PM +0200, Davide Gianforte wrote:
> > +   uint32_t ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT);
> >  
> > -   ctrl_ext = BPCTL_READ_REG(pbpctl_dev, CTRL_EXT);
> 
> How about just removing the " = 0;" part of the variable definition?
> That would be a smaller patch, and still keep everything "clean".
> 
> thanks,
> 
> greg k-h

Also I prefer the style to keep definitions separated from assignments.
I've seen a lot of kernel code which initialize variables with function returns,
but as you said, it is not "clean", even if it is code-correct.

I'll rewrite the patch and I will send asap.

thanks
davide
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Re: No uart output on my snowball board

2014-07-11 Thread Lee Jones
> I decided to play with my snowball board as that's the easiest arm
> board I have to do testing on, and it was reported to me that I broke
> function graph tracing on the arm boards. But I haven't booted my
> snowball since 3.8. When I tried with the latest kernel, it didn't give
> me *any* output. I figured something was up with the uart, but the
> board also didn't boot.
> 
> I did a bisect to find out where the uart stopped working (I also
> stumbled on where the board stopped booting, but still need to find
> that commit). The uart died with this commit:
> 
> commit a0998b8321eb5f53ef51924f5ab6c69237ac1025
> Author: Lee Jones 
> Date:   Thu Aug 22 16:18:56 2013 +0100
> 
> ARM: ux500: Remove UART support when booting without Device Tree
> 
> It's time to remove all ATAG support from ux500 and rely solely on
> Device Tree booting. This patch is part of that endeavour.
> 
> Signed-off-by: Lee Jones 
> Signed-off-by: Linus Walleij 
> 
> This happened between 3.12 and 3.13.
> 
> Does this mean that I need to get device tree support for this. I have
> no idea how to fix it as a device tree to me is a christmas tree (a
> tree with little lighty devices on it). Thus I'll just go and throw
> this out at you.

This is a very slimmed down of my Makefile.  It should bootstrap you
with what you need.  If there are any issues with that that you can't
fix, ping me and I'll test it as-is.  Bear in mind that some of these
config options are probably deprecated by now.  If there are any holes
I'm sure LinusW will spot them.

CROSS_COMPILE   ?= arm-linux-gnueabi-
build_dir   := $(CURDIR)/build-snowball
config_file := $(build_dir)/.config
devicetree  := $(build_dir)/arch/arm/boot/dts/ste-snowball.dtb
defconfig   := u8500_defconfig
cpus:= 4

make_options := -f Makefile \
ARCH=arm \
CROSS_COMPILE=$(CROSS_COMPILE) \
KBUILD_OUTPUT=$(build_dir)

config-devicetree: config-base FORCE
# Configure in the optional device tree if available
@if [ -r $(devicetree) ] ; then \
$(CURDIR)/scripts/config --file $(config_file) \
  --enable USE_OF \
  --enable ARM_APPENDED_DTB \
  --enable ARM_ATAG_DTB_COMPAT \
  --enable PROC_DEVICETREE \
  --set-str ARM_APPENDED_DTB_FILE $(devicetree) ; \
else \
  echo "$(devicetree) not found, or not readable" ; \
fi

build: config-devicetree FORCE
@mkdir -p $(build_dir)
$(MAKE) $(make_options) dtbs
$(MAKE) $(make_options) $(defconfig)
$(MAKE) $(make_options) -j $(cpus) zImage
cat $(devicetree) >> $(build_dir)/arch/arm/boot/zImage

mkimage -A arm -O linux -T kernel -C none \
-a 0x8000 -e 0x8000 -n "Linux"\
-d $(build_dir)/arch/arm/boot/zImage  \
$(build_dir)/uImage

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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Re: [PATCH 10/13] ARM: tegra: Enable the DFLL on the Jetson TK1

2014-07-11 Thread Mikko Perttunen
It might look nicer if the voltage table was in a separate file. A bit 
of a border case, maybe.


On 11/07/14 00:42, Tuomas Tynkkynen wrote:

...
+   nvidia,pmic-voltage-table =
+   <0x1e 70>,
+   <0x1f 71>,
+   <0x20 72>,
+   <0x21 73>,
+   <0x22 74>,
+   <0x23 75>,
+   <0x24 76>,
+   <0x25 77>,
+   <0x26 78>,
+   <0x27 79>,
+   <0x28 80>,
+   <0x29 81>,
+   <0x2a 82>,
+   <0x2b 83>,
+   <0x2c 84>,
+   <0x2d 85>,
+   <0x2e 86>,
+   <0x2f 87>,
+   <0x30 88>,
+   <0x31 89>,
+   <0x32 90>,
+   <0x33 91>,
+   <0x34 92>,
+   <0x35 93>,
+   <0x36 94>,
+   <0x37 95>,
+   <0x38 96>,
+   <0x39 97>,
+   <0x3a 98>,
+   <0x3b 99>,
+   <0x3c 100>,
+   <0x3d 101>,
+   <0x3e 102>,
+   <0x3f 103>,
+   <0x40 104>,
+   <0x41 105>,
+   <0x42 106>,
+   <0x43 107>,
+   <0x44 108>,
+   <0x45 109>,
+   <0x46 110>,
+   <0x47 111>,
+   <0x48 112>,
+   <0x49 113>,
+   <0x4a 114>,
+   <0x4b 115>,
+   <0x4c 116>,
+   <0x4d 117>,
+   <0x4e 118>,
+   <0x4f 119>,
+   <0x50 120>,
+   <0x51 121>,
+   <0x52 122>,
+   <0x53 123>,
+   <0x54 124>,
+   <0x55 125>,
+   <0x56 126>,
+   <0x57 127>,
+   <0x58 128>,
+   <0x59 129>,
+   <0x5a 130>,
+   <0x5b 131>,
+   <0x5c 132>,
+   <0x5d 133>,
+   <0x5e 134>,
+   <0x5f 135>,
+   <0x60 136>,
+   <0x61 137>,
+   <0x62 138>,
+   <0x63 139>,
+   <0x64 140>;

> ...
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linux-next: Tree for Jul 11

2014-07-11 Thread Stephen Rothwell
Hi all,

Changes since 20140710:

My fixes tree contains:
powerpc: Disable RELOCATABLE for COMPILE_TEST with PPC64

The tty.current tree gained a build failure so I used the version from
next-20140710.

The irqchip tree gained a conflict against the arm64 tree.

The staging tree lost its build failure and gained a conflict against
the tty tree.

Non-merge commits (relative to Linus' tree): 5114
 4474 files changed, 191199 insertions(+), 226003 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log files
in the Next directory.  Between each merge, the tree was built with
a ppc64_defconfig for powerpc and an allmodconfig for x86_64 and a
multi_v7_defconfig for arm. After the final fixups (if any), it is also
built with powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig and
allyesconfig (this fails its final link) and i386, sparc, sparc64 and arm
defconfig.

Below is a summary of the state of the merge.

I am currently merging 222 trees (counting Linus' and 30 trees of patches
pending for Linus' tree).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au

$ git checkout master
$ git reset --hard stable
Merging origin/master (4c71842375f5 Merge branch 'for-3.16-fixes' of 
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata)
Merging fixes/master (b8accbbce667 powerpc: Disable RELOCATABLE for 
COMPILE_TEST with PPC64)
Merging kbuild-current/rc-fixes (dd5a6752ae7d firmware: Create directories for 
external firmware)
Merging arc-current/for-curr (89ca3b881987 Linux 3.15-rc4)
Merging arm-current/fixes (9a2c33a422d6 ARM: l2c: fix revision checking)
Merging m68k-current/for-linus (f1a1b6352998 m68k: Fix boot regression on 
machines with RAM at non-zero)
Merging metag-fixes/fixes (ffe6902b66aa asm-generic: remove _STK_LIM_MAX)
Merging powerpc-merge/merge (6663a4fa6711 powerpc: Don't skip ePAPR spin-table 
CPUs)
Merging sparc/master (894e552cfaa3 Merge branch 'for-linus' of 
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security)
Merging net/master (f6864c6f3513 Merge branch 'for-davem' of 
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless)
Merging ipsec/master (a0e5ef53aac8 xfrm: Fix installation of AH IPsec SAs)
Merging sound-current/for-linus (91947d8cc553 ALSA: hda - Add new GPU codec ID 
0x10de0070 to snd-hda)
Merging pci-current/for-linus (bf177a1eb6d1 MAINTAINERS: Update mx6 PCI driver 
maintainer's email)
Merging wireless/master (2c4db12ec469 rt2800usb: Don't perform DMA from stack)
Merging driver-core.current/driver-core-linus (cd3de83f1476 Linux 3.16-rc4)
Merging tty.current/tty-linus (99ecb001f52e serial: arc_uart: Use 
uart_circ_empty() for open-coded comparison)
$ git reset --hard HEAD^
Merging next-20140710 version of tty.current
Merging usb.current/usb-linus (5a7fbe7e9ea0 USB: ftdi_sio: Add extra PID.)
Merging usb-gadget-fixes/fixes (8035691365b8 usb: musb: dsps: fix the base 
address for accessing the mode register)
Merging usb-serial-fixes/usb-linus (3d28bd840b2d usb: option: Add ID for 
Telewell TW-LTE 4G v2)
Merging staging.current/staging-linus (bdac8ca90e07 Merge tag 
'iio-fixes-for-3.16c' of 
git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus)
Merging char-misc.current/char-misc-linus (6d827fbcc370 i8k: Fix non-SMP 
operation)
Merging input-current/for-linus (31972f6e517d Input: ti_am335x_tsc - warn about 
incorrect spelling)
Merging md-current/for-linus (d47648fcf061 raid5: avoid finding "discard" 
stripe)
Merging crypto-current/master (0378c9a855bf crypto: caam - fix memleak in 
caam_jr module)
Merging ide/master (5b40dd30bbfa ide: Fix SC1200 dependencies)
Merging dwmw2/master (5950f0803ca9 pcmcia: remove RPX board stuff)
Merging devicetree-current/devicetree/merge (356facff5275 of/platform: Fix 
of_platform_device_destroy iteration of devices)
Merging rr-fixes/fixes (79465d2fd48e module: remove warning about waiting 
module removal.)
Merging mfd-fixes/master (73beb63d290f mfd: rtsx_pcr: Disable interrupts before 
cancelling delayed works)

Re: Interrupt randomness in 3.14.10-rt

2014-07-11 Thread Thomas Gleixner
On Fri, 11 Jul 2014, Ben Hutchings wrote:

> I noticed this change between 3.14.3-rt5 and 3.14.10-rt7:
> 
> --- debian/patches/features/all/rt/random-make-it-work-on-rt.patch  
> (revision 21522)
> +++ debian/patches/features/all/rt/random-make-it-work-on-rt.patch  
> (working copy)
> [...]
>  a/kernel/irq/manage.c
> -+++ b/kernel/irq/manage.c
> -@@ -942,6 +942,12 @@ static int irq_thread(void *data)
> -   if (action_ret == IRQ_HANDLED)
> -   atomic_inc(>threads_handled);
> - 
> -+#ifdef CONFIG_PREEMPT_RT_FULL
> -+  migrate_disable();
> -+  add_interrupt_randomness(action->irq, 0,
> -+   desc->random_ip ^ (unsigned long) action);
> -+  migrate_enable();
> -+#endif
> -   wake_threads_waitq(desc);
> -   }
> - 
> 
> (I.e. old patch included these additions, new patch doesn't.)
> 
> Evidently this was made in the announced 3.14.10-rt6, not -rt7.  Was it
> intentional?  Now irq_desc::random_ip is set but never used.

Hmm, how did I lose that one? Thanks for spotting it! I'll pick it up for rt8

 tglx

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Could not mount sysfs when enable userns but disable netns

2014-07-11 Thread chenhanx...@cn.fujitsu.com
Hello,

How to reproduce:
1. Prepare a container, enable userns and disable netns
2. use libvirt-lxc to start a container
3. libvirt could not mount sysfs then failed to start.

Then I found that
commit 7dc5dbc879bd0779924b5132a48b731a0bc04a1e says:
"Don't allow mounting sysfs unless the caller has CAP_SYS_ADMIN rights
over the net namespace."

But why should we check sysfs mouont permission over net namespace?
We've already checked CAP_SYS_ADMIN though.

What the relationship between sysfs and net namespace,
or this check is a little redundant?

Any insights on this?

Thanks,
- Chen

PS: codes below could be a workaround

@@ -34,7 +35,8 @@ static struct dentry *sysfs_mount(struct file_system_type 
*fs_type,
if (!capable(CAP_SYS_ADMIN) && !fs_fully_visible(fs_type))
return ERR_PTR(-EPERM);
 
-   if (!kobj_ns_current_may_mount(KOBJ_NS_TYPE_NET))
+   if (current->nsproxy->net_ns != _net &&
+!kobj_ns_current_may_mount(KOBJ_NS_TYPE_NET))
return ERR_PTR(-EPERM);
}
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RE: [RFC PATCH 00/10] OMAP: GPMC: NAND: Introduce GPMC APIs for OMAP NAND

2014-07-11 Thread Gupta, Pekon
Hi Roger,

>From: Tony Lindgren [mailto:t...@atomide.com]
>>* Roger Quadros  [140709 05:39]:
>> Hi,
>>
>> The following hardware modules/registers are meant for NAND controller driver
>> usage:
>> - NAND I/O control (NAND address, data, command registers)
>> - Prefetch/Write-post engine
>> - ECC/BCH engine
>>
>> However, these registers sit in the GPMC controller's register space and 
>> there
>> need to be some sane way to access them from the OMAP NAND controller driver.
>>
>> Till now the GPMC driver was populating a data structure (struct 
>> gpmc_nand_regs)
>> with the register addresses and passing it to the OMAP NAND driver via 
>> platform
>> data. This mechanism cannot be used for true Device tree support as custom
>> platform data passing mechanism doesn't seem to work. Moreover, direct
>> access to these registers must be limited to the GPMC driver. This calls for
>> a few custom OMAP GPMC specific APIs that the OMAP NAND driver can use
>> to access these GPMC space registers.
>>
>> This series attempts to add the following new APIs and gets rid of
>> 'struct gpmc_nand_regs' and 'gpmc_update_nand_regs()'.
>>
>> -For NAND I/O control registers
>> u32 omap_gpmc_read_reg(int cs, enum omap_gpmc_reg reg);
>> void omap_gpmc_write_reg(int cs, enum omap_gpmc_reg reg, u32 val);
>>
>> -For Prefetch engine
>> int omap_gpmc_prefetch_start(int cs, int fifo_th, bool dma,
>>   u32 count, int is_write);
>> int omap_gpmc_prefetch_stop(int cs);
>> u32 omap_gpmc_get_prefetch_count(void);
>> u32 omap_gpmc_get_prefetch_fifo_count(void);
>>
>> -For ECC/BCH engine
>> void omap_gpmc_ecc_disable(void);
>> void omap_gpmc_ecc_configure_enable(int cs, bool ecc16, u8 ecc_size0,
>>  u8 ecc_size1, bool use_bch,
>>  enum omap_gpmc_bch_type bch_type,
>>  u8 bch_sectors, u8 bch_wrap_mode);

I think this one has too big argument list.
And also this interface will become inconsistent when you will expand the
NAND driver to support devices with larger page-size(like 8K NAND devices)
Why can't we just use 
omap_gpmc_write_reg(int cs, enum omap_gpmc_reg reg);
as already defined above?
This is one-time configuration per read/write cycle so using
'omap_gpmc_write_reg()' shouldn't be much of issue. And this will
automatically plugin to current chip->ecc.hwctl() calls.



>> void omap_gpmc_ecc_get_result(int length, u32 *result);
Can you please rename it to "omap_gpmc_ecc_get_hamming_result()"
Just to keep it consistent with "omap_gpmc_ecc_get_bch_result()"

>> void omap_gpmc_ecc_get_bch_result(int length, u8 sector, u32 *result);
>
This one looks good, but you should also take in int 'ecc-scheme'.

Actually you can just move omap_calculate_ecc_bch(...) out of NAND
driver into GPMC driver and rename it, because support of ECC
scheme is property of hardware controller not NAND driver.
What ecc-schemes GPMC controller supports should be inside GPMC driver,
and NAND driver should just attach them to appropriate interfaces. Right ?

Same way just think of moving chip->ecc.hwctl() callbacks implementations
out of NAND driver into GPMC driver. Then you would _not_ need to
export any GPMC registers into NAND driver.


with regards, pekon

>These seem fine to me. At least I don't have any better ideas to
>expose these GPMC registers to the NAND driver(s).
>
>> These APIs don't implement any logic to serialize access to the
>> NAND/Prefetch/ECC registers. It is upto the NAND controller driver
>> to ensure that. As these modules can only handle one NAND controller context
>> at a time, we set the nand_chip->hwcontrol to point to a single
>> controller instance even if there are multiple NAND chips on different
>> Chip select spaces. The NAND base driver then takes care of serializing
>> access to the NAND controller (and ECC) through nandchip->hwcontrol->lock.
>>
>> NOTE: Patches are still untested and only meant for review.
>
>Regards,
>
>Tony
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Re: [PATCH 2/2] sched: Rewrite per entity runnable load average tracking

2014-07-11 Thread Yuyang Du
On Thu, Jul 10, 2014 at 12:08:59PM +0200, Peter Zijlstra wrote:
> 
> Since clock_task is the regular clock minus some local amount, the
> difference between two regular clock reads is always a strict upper
> bound on clock_task differences.
> 
This is inspiring. Regarding the clock source in load avg tracking,
should we simply use rq_clock_task instead of cfs_rq_clock_task.

For the bandwidth control case, just update/increase the last_update_time when
unthrottled by this throttled time, so the time would look like freezed. Am I
understanding right?

Not sure how much bandwidth control is used, but even not used, every time
we read cfs_rq_clock_task, will burn useless cycles here.

Thanks,
Yuyang
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Re: [PATCH v8 0/9] Support for creating generic PCI host bridges from DT

2014-07-11 Thread Jingoo Han
On Friday, July 11, 2014 9:44 AM, Tanmay Inamdar wrote:
> On Tue, Jul 8, 2014 at 10:18 AM, Liviu Dudau  wrote:
> > On Sun, Jul 06, 2014 at 04:23:43PM +0100, Rob Herring wrote:
> >> On Tue, Jul 1, 2014 at 1:43 PM, Liviu Dudau  wrote:
> >> > This is my resurected attempt at adding support for generic PCI host
> >> > bridge controllers that make use of device tree information to
> >> > configure themselves. I've tagged it as v8 although the patches
> >> > have now been reshuffled in order to ease adoption so referring to
> >> > the older versions might be a bit of a hoop jumping exercise.
> >> >
> >> > Changes from v7:
> >> >   - Reordered the patches so that fixes and non-controversial patches
> >> > from v7 can be accepted more easily. If agreed I can split the
> >> > series again into patches that can be upstreamed easily and ones
> >> > that still need discussion.
> >> >   - Moved the of_create_host_bridge() function to drivers/of/of_pci.c
> >> > to better reflect its target use.
> >> >   - Added the function to remap the bus I/O resources that used to be
> >> > provided in my arm64 patch series and (re)named it 
> >> > pci_remap_iospace()
> >> >   - Removed error code checking from parsing and mapping of IRQ from DT
> >> > in recognition that some PCI devices will not have legacy IRQ 
> >> > mappings.
> >> >
> >> > v7 thread here with all the historic information: 
> >> > https://lkml.org/lkml/2014/3/14/279
> >>
> >> Can you publish a branch for this series please.
> >>
> >> Rob
> >>
> >
> > Hi Rob,
> >
> > I have pushed a brach that matches my v8 patchset +1 obvious missing header 
> > include
> > here: 
> > http://www.linux-arm.org/git?p=linux-ld.git;a=shortlog;h=refs/heads/for-upstream/pci_v8
> >
> 
> I was still getting following compilation error after applying arm64
> pci headers. Please let me know if I am missing something.
> 
> linux-git/drivers/of/of_pci.c: In function ‘pci_host_bridge_of_get_ranges’:
> linux-git/drivers/of/of_pci.c:114:22: error: storage size of ‘range’ isn’t 
> known
>   struct of_pci_range range;
>   ^
> linux-git/drivers/of/of_pci.c:115:29: error: storage size of ‘parser’
> isn’t known
>   struct of_pci_range_parser parser;
>  ^
> linux-git/drivers/of/of_pci.c:121:2: error: implicit declaration of
> function ‘of_pci_range_parser_init’
> [-Werror=implicit-function-declaration]
>   err = of_pci_range_parser_init(, dev);
> 
> 
> Below patch fixes the errors.
> 
> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
> index 55d8320..da88dac 100644
> --- a/drivers/of/of_pci.c
> +++ b/drivers/of/of_pci.c
> @@ -2,6 +2,7 @@
>  #include 
>  #include 
>  #include 
> +#include 

Yes, right. I also found the build errors as above mentioned.
"of_address.h" should be included, in order to fix the build errors.
However, for readability, the following would be better.

 #include 
+#include 
 #include 

Best regards,
Jingoo Han

> 
>  static inline int __of_pci_pci_compare(struct device_node *node,
>unsigned int data)
> 
> 
> > Best regards,
> > Liviu
> >
> >
> > --
> > 
> > | I would like to |
> > | fix the world,  |
> > | but they're not |
> > | giving me the   |
> >  \ source code!  /
> >   ---
> > ¯\_(ツ)_/¯
> >

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[RFC Patch V1 06/30] mm, tracing: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 kernel/trace/ring_buffer.c  |   12 ++--
 kernel/trace/trace_uprobe.c |2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 7c56c3d06943..38c51583f968 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -1124,13 +1124,13 @@ static int __rb_allocate_pages(int nr_pages, struct 
list_head *pages, int cpu)
 */
bpage = kzalloc_node(ALIGN(sizeof(*bpage), cache_line_size()),
GFP_KERNEL | __GFP_NORETRY,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
if (!bpage)
goto free_pages;
 
list_add(>list, pages);
 
-   page = alloc_pages_node(cpu_to_node(cpu),
+   page = alloc_pages_node(cpu_to_mem(cpu),
GFP_KERNEL | __GFP_NORETRY, 0);
if (!page)
goto free_pages;
@@ -1183,7 +1183,7 @@ rb_allocate_cpu_buffer(struct ring_buffer *buffer, int 
nr_pages, int cpu)
int ret;
 
cpu_buffer = kzalloc_node(ALIGN(sizeof(*cpu_buffer), cache_line_size()),
- GFP_KERNEL, cpu_to_node(cpu));
+ GFP_KERNEL, cpu_to_mem(cpu));
if (!cpu_buffer)
return NULL;
 
@@ -1198,14 +1198,14 @@ rb_allocate_cpu_buffer(struct ring_buffer *buffer, int 
nr_pages, int cpu)
init_waitqueue_head(_buffer->irq_work.waiters);
 
bpage = kzalloc_node(ALIGN(sizeof(*bpage), cache_line_size()),
-   GFP_KERNEL, cpu_to_node(cpu));
+   GFP_KERNEL, cpu_to_mem(cpu));
if (!bpage)
goto fail_free_buffer;
 
rb_check_bpage(cpu_buffer, bpage);
 
cpu_buffer->reader_page = bpage;
-   page = alloc_pages_node(cpu_to_node(cpu), GFP_KERNEL, 0);
+   page = alloc_pages_node(cpu_to_mem(cpu), GFP_KERNEL, 0);
if (!page)
goto fail_free_reader;
bpage->page = page_address(page);
@@ -4378,7 +4378,7 @@ void *ring_buffer_alloc_read_page(struct ring_buffer 
*buffer, int cpu)
struct buffer_data_page *bpage;
struct page *page;
 
-   page = alloc_pages_node(cpu_to_node(cpu),
+   page = alloc_pages_node(cpu_to_mem(cpu),
GFP_KERNEL | __GFP_NORETRY, 0);
if (!page)
return NULL;
diff --git a/kernel/trace/trace_uprobe.c b/kernel/trace/trace_uprobe.c
index 3c9b97e6b1f4..e585fb67472b 100644
--- a/kernel/trace/trace_uprobe.c
+++ b/kernel/trace/trace_uprobe.c
@@ -692,7 +692,7 @@ static int uprobe_buffer_init(void)
return -ENOMEM;
 
for_each_possible_cpu(cpu) {
-   struct page *p = alloc_pages_node(cpu_to_node(cpu),
+   struct page *p = alloc_pages_node(cpu_to_mem(cpu),
  GFP_KERNEL, 0);
if (p == NULL) {
err_cpu = cpu;
-- 
1.7.10.4

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[RFC Patch V1 01/30] mm, kernel: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 kernel/rcu/rcutorture.c |2 +-
 kernel/smp.c|2 +-
 kernel/smpboot.c|2 +-
 kernel/taskstats.c  |2 +-
 kernel/timer.c  |2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/kernel/rcu/rcutorture.c b/kernel/rcu/rcutorture.c
index 7fa34f86e5ba..f593762d3214 100644
--- a/kernel/rcu/rcutorture.c
+++ b/kernel/rcu/rcutorture.c
@@ -1209,7 +1209,7 @@ static int rcutorture_booster_init(int cpu)
mutex_lock(_mutex);
VERBOSE_TOROUT_STRING("Creating rcu_torture_boost task");
boost_tasks[cpu] = kthread_create_on_node(rcu_torture_boost, NULL,
- cpu_to_node(cpu),
+ cpu_to_mem(cpu),
  "rcu_torture_boost");
if (IS_ERR(boost_tasks[cpu])) {
retval = PTR_ERR(boost_tasks[cpu]);
diff --git a/kernel/smp.c b/kernel/smp.c
index 80c33f8de14f..2f3b84aef159 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -41,7 +41,7 @@ hotplug_cfd(struct notifier_block *nfb, unsigned long action, 
void *hcpu)
case CPU_UP_PREPARE:
case CPU_UP_PREPARE_FROZEN:
if (!zalloc_cpumask_var_node(>cpumask, GFP_KERNEL,
-   cpu_to_node(cpu)))
+   cpu_to_mem(cpu)))
return notifier_from_errno(-ENOMEM);
cfd->csd = alloc_percpu(struct call_single_data);
if (!cfd->csd) {
diff --git a/kernel/smpboot.c b/kernel/smpboot.c
index eb89e1807408..9c08e68e48a9 100644
--- a/kernel/smpboot.c
+++ b/kernel/smpboot.c
@@ -171,7 +171,7 @@ __smpboot_create_thread(struct smp_hotplug_thread *ht, 
unsigned int cpu)
if (tsk)
return 0;
 
-   td = kzalloc_node(sizeof(*td), GFP_KERNEL, cpu_to_node(cpu));
+   td = kzalloc_node(sizeof(*td), GFP_KERNEL, cpu_to_mem(cpu));
if (!td)
return -ENOMEM;
td->cpu = cpu;
diff --git a/kernel/taskstats.c b/kernel/taskstats.c
index 13d2f7cd65db..cf5cba1e7fbe 100644
--- a/kernel/taskstats.c
+++ b/kernel/taskstats.c
@@ -304,7 +304,7 @@ static int add_del_listener(pid_t pid, const struct cpumask 
*mask, int isadd)
if (isadd == REGISTER) {
for_each_cpu(cpu, mask) {
s = kmalloc_node(sizeof(struct listener),
-   GFP_KERNEL, cpu_to_node(cpu));
+   GFP_KERNEL, cpu_to_mem(cpu));
if (!s) {
ret = -ENOMEM;
goto cleanup;
diff --git a/kernel/timer.c b/kernel/timer.c
index 3bb01a323b2a..5831a38b5681 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -1546,7 +1546,7 @@ static int init_timers_cpu(int cpu)
 * The APs use this path later in boot
 */
base = kzalloc_node(sizeof(*base), GFP_KERNEL,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
if (!base)
return -ENOMEM;
 
-- 
1.7.10.4

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[RFC Patch V1 00/30] Enable memoryless node on x86 platforms

2014-07-11 Thread Jiang Liu
Previously we have posted a patch fix a memory crash issue caused by
memoryless node on x86 platforms, please refer to
http://comments.gmane.org/gmane.linux.kernel/1687425

As suggested by David Rientjes, the most suitable fix for the issue
should be to use cpu_to_mem() rather than cpu_to_node() in the caller.
So this is the patchset according to David's suggestion.

Patch 1-26 prepare for enabling memoryless node on x86 platforms by
replacing cpu_to_node()/numa_node_id() with cpu_to_mem()/numa_mem_id().
Patch 27-29 enable support of memoryless node on x86 platforms.
Patch 30 tunes order to online NUMA node when doing CPU hot-addition.

This patchset fixes the issue mentioned by Mike Galbraith that CPUs
are associated with wrong node after adding memory to a memoryless
node.

With support of memoryless node enabled, it will correctly report system
hardware topology for nodes without memory installed.
root@bkd01sdp:~# numactl --hardware
available: 4 nodes (0-3)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 60 61 62 63 64 65 66 67 68 69 
70 71 72 73 74
node 0 size: 15725 MB
node 0 free: 15129 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15862 MB
node 1 free: 15627 MB
node 2 cpus: 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 90 91 92 93 94 95 96 
97 98 99 100 101 102 103 104
node 2 size: 0 MB
node 2 free: 0 MB
node 3 cpus: 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 105 106 107 108 109 
110 111 112 113 114 115 116 117 118 119
node 3 size: 0 MB
node 3 free: 0 MB
node distances:
node   0   1   2   3
  0:  10  21  21  21
  1:  21  10  21  21
  2:  21  21  10  21
  3:  21  21  21  10

With memoryless node enabled, CPUs are correctly associated with node 2
after memory hot-addition to node 2.
root@bkd01sdp:/sys/devices/system/node/node2# numactl --hardware
available: 4 nodes (0-3)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 60 61 62 63 64 65 66 67 68 69 
70 71 72 73 74
node 0 size: 15725 MB
node 0 free: 14872 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15862 MB
node 1 free: 15641 MB
node 2 cpus: 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 90 91 92 93 94 95 96 
97 98 99 100 101 102 103 104
node 2 size: 128 MB
node 2 free: 127 MB
node 3 cpus: 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 105 106 107 108 109 
110 111 112 113 114 115 116 117 118 119
node 3 size: 0 MB
node 3 free: 0 MB
node distances:
node   0   1   2   3
  0:  10  21  21  21
  1:  21  10  21  21
  2:  21  21  10  21
  3:  21  21  21  10

The patchset is based on the latest mainstream kernel and has been
tested on a 4-socket Intel platform with CPU/memory hot-addition
capability.

Any comments are welcomed!

Jiang Liu (30):
  mm, kernel: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, sched: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, net: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, netfilter: Use cpu_to_mem()/numa_mem_id() to support memoryless
node
  mm, perf: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, tracing: Use cpu_to_mem()/numa_mem_id() to support memoryless
node
  mm: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, thp: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, memcg: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, xfrm: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, char/mspec.c: Use cpu_to_mem()/numa_mem_id() to support
memoryless node
  mm, IB/qib: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, i40e: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, i40evf: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, igb: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, ixgbe: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, intel_powerclamp: Use cpu_to_mem()/numa_mem_id() to support
memoryless node
  mm, bnx2fc: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, bnx2i: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, fcoe: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, irqchip: Use cpu_to_mem()/numa_mem_id() to support memoryless
node
  mm, of: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, x86: Use cpu_to_mem()/numa_mem_id() to support memoryless node
  mm, x86/platform/uv: Use cpu_to_mem()/numa_mem_id() to support
memoryless node
  mm, x86, kvm: Use cpu_to_mem()/numa_mem_id() to support memoryless
node
  mm, x86, perf: Use cpu_to_mem()/numa_mem_id() to support memoryless
node
  x86, numa: Kill useless code to improve code readability
  mm: Update _mem_id_[] for every possible CPU when memory
configuration changes
  mm, x86: Enable memoryless node support to better support CPU/memory
hotplug
  x86, NUMA: Online node earlier when doing CPU hot-addition

 arch/x86/Kconfig   

[RFC Patch V1 04/30] mm, netfilter: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 net/netfilter/x_tables.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/net/netfilter/x_tables.c b/net/netfilter/x_tables.c
index 227aa11e8409..6e7d4bc81422 100644
--- a/net/netfilter/x_tables.c
+++ b/net/netfilter/x_tables.c
@@ -692,10 +692,10 @@ struct xt_table_info *xt_alloc_table_info(unsigned int 
size)
if (size <= PAGE_SIZE)
newinfo->entries[cpu] = kmalloc_node(size,
GFP_KERNEL,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
else
newinfo->entries[cpu] = vmalloc_node(size,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
 
if (newinfo->entries[cpu] == NULL) {
xt_free_table_info(newinfo);
@@ -801,10 +801,10 @@ static int xt_jumpstack_alloc(struct xt_table_info *i)
for_each_possible_cpu(cpu) {
if (size > PAGE_SIZE)
i->jumpstack[cpu] = vmalloc_node(size,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
else
i->jumpstack[cpu] = kmalloc_node(size,
-   GFP_KERNEL, cpu_to_node(cpu));
+   GFP_KERNEL, cpu_to_mem(cpu));
if (i->jumpstack[cpu] == NULL)
/*
 * Freeing will be done later on by the callers. The
-- 
1.7.10.4

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[RFC Patch V1 07/30] mm: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 include/linux/gfp.h |6 +++---
 mm/memory.c |2 +-
 mm/percpu-vm.c  |2 +-
 mm/vmalloc.c|2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 6eb1fb37de9a..56dd2043f510 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -314,7 +314,7 @@ static inline struct page *alloc_pages_node(int nid, gfp_t 
gfp_mask,
 {
/* Unknown node is current node */
if (nid < 0)
-   nid = numa_node_id();
+   nid = numa_mem_id();
 
return __alloc_pages(gfp_mask, order, node_zonelist(nid, gfp_mask));
 }
@@ -340,13 +340,13 @@ extern struct page *alloc_pages_vma(gfp_t gfp_mask, int 
order,
int node);
 #else
 #define alloc_pages(gfp_mask, order) \
-   alloc_pages_node(numa_node_id(), gfp_mask, order)
+   alloc_pages_node(numa_mem_id(), gfp_mask, order)
 #define alloc_pages_vma(gfp_mask, order, vma, addr, node)  \
alloc_pages(gfp_mask, order)
 #endif
 #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0)
 #define alloc_page_vma(gfp_mask, vma, addr)\
-   alloc_pages_vma(gfp_mask, 0, vma, addr, numa_node_id())
+   alloc_pages_vma(gfp_mask, 0, vma, addr, numa_mem_id())
 #define alloc_page_vma_node(gfp_mask, vma, addr, node) \
alloc_pages_vma(gfp_mask, 0, vma, addr, node)
 
diff --git a/mm/memory.c b/mm/memory.c
index d67fd9fcf1f2..f434d2692f70 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -3074,7 +3074,7 @@ static int numa_migrate_prep(struct page *page, struct 
vm_area_struct *vma,
get_page(page);
 
count_vm_numa_event(NUMA_HINT_FAULTS);
-   if (page_nid == numa_node_id()) {
+   if (page_nid == numa_mem_id()) {
count_vm_numa_event(NUMA_HINT_FAULTS_LOCAL);
*flags |= TNF_FAULT_LOCAL;
}
diff --git a/mm/percpu-vm.c b/mm/percpu-vm.c
index 3707c71ae4cd..a20b8f7d0dd0 100644
--- a/mm/percpu-vm.c
+++ b/mm/percpu-vm.c
@@ -115,7 +115,7 @@ static int pcpu_alloc_pages(struct pcpu_chunk *chunk,
for (i = page_start; i < page_end; i++) {
struct page **pagep = [pcpu_page_idx(cpu, i)];
 
-   *pagep = alloc_pages_node(cpu_to_node(cpu), gfp, 0);
+   *pagep = alloc_pages_node(cpu_to_mem(cpu), gfp, 0);
if (!*pagep) {
pcpu_free_pages(chunk, pages, populated,
page_start, page_end);
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index f64632b67196..c06f90641916 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -800,7 +800,7 @@ static struct vmap_block *new_vmap_block(gfp_t gfp_mask)
unsigned long vb_idx;
int node, err;
 
-   node = numa_node_id();
+   node = numa_mem_id();
 
vb = kmalloc_node(sizeof(struct vmap_block),
gfp_mask & GFP_RECLAIM_MASK, node);
-- 
1.7.10.4

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[RFC Patch V1 10/30] mm, xfrm: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 net/xfrm/xfrm_ipcomp.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/xfrm/xfrm_ipcomp.c b/net/xfrm/xfrm_ipcomp.c
index ccfdc7115a83..129f469ae75d 100644
--- a/net/xfrm/xfrm_ipcomp.c
+++ b/net/xfrm/xfrm_ipcomp.c
@@ -235,7 +235,7 @@ static void * __percpu *ipcomp_alloc_scratches(void)
for_each_possible_cpu(i) {
void *scratch;
 
-   scratch = vmalloc_node(IPCOMP_SCRATCH_SIZE, cpu_to_node(i));
+   scratch = vmalloc_node(IPCOMP_SCRATCH_SIZE, cpu_to_mem(i));
if (!scratch)
return NULL;
*per_cpu_ptr(scratches, i) = scratch;
-- 
1.7.10.4

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[RFC Patch V1 15/30] mm, igb: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/net/ethernet/intel/igb/igb_main.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c 
b/drivers/net/ethernet/intel/igb/igb_main.c
index f145adbb55ac..2b74bffa5648 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -6518,7 +6518,7 @@ static bool igb_can_reuse_rx_page(struct igb_rx_buffer 
*rx_buffer,
  unsigned int truesize)
 {
/* avoid re-using remote pages */
-   if (unlikely(page_to_nid(page) != numa_node_id()))
+   if (unlikely(page_to_nid(page) != numa_mem_id()))
return false;
 
 #if (PAGE_SIZE < 8192)
@@ -6588,7 +6588,7 @@ static bool igb_add_rx_frag(struct igb_ring *rx_ring,
memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
 
/* we can reuse buffer as-is, just make sure it is local */
-   if (likely(page_to_nid(page) == numa_node_id()))
+   if (likely(page_to_nid(page) == numa_mem_id()))
return true;
 
/* this page cannot be reused so discard it */
-- 
1.7.10.4

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[RFC Patch V1 14/30] mm, i40evf: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/net/ethernet/intel/i40evf/i40e_txrx.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c 
b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
index 48ebb6cd69f2..5c057ae21c22 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
@@ -877,7 +877,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int 
budget)
unsigned int total_rx_bytes = 0, total_rx_packets = 0;
u16 rx_packet_len, rx_header_len, rx_sph, rx_hbo;
u16 cleaned_count = I40E_DESC_UNUSED(rx_ring);
-   const int current_node = numa_node_id();
+   const int current_node = numa_mem_id();
struct i40e_vsi *vsi = rx_ring->vsi;
u16 i = rx_ring->next_to_clean;
union i40e_rx_desc *rx_desc;
-- 
1.7.10.4

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[RFC Patch V1 09/30] mm, memcg: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 mm/memcontrol.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index a2c7bcb0e6eb..d6c4b7255ca9 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -1933,7 +1933,7 @@ int mem_cgroup_select_victim_node(struct mem_cgroup 
*memcg)
 * we use curret node.
 */
if (unlikely(node == MAX_NUMNODES))
-   node = numa_node_id();
+   node = numa_mem_id();
 
memcg->last_scanned_node = node;
return node;
-- 
1.7.10.4

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Re: [Nouveau] [PATCH v4 2/6] drm/nouveau: map pages using DMA API on platform devices

2014-07-11 Thread Daniel Vetter
On Fri, Jul 11, 2014 at 11:35:23AM +0900, Alexandre Courbot wrote:
> On 07/10/2014 09:58 PM, Daniel Vetter wrote:
> >On Tue, Jul 08, 2014 at 05:25:57PM +0900, Alexandre Courbot wrote:
> >>page_to_phys() is not the correct way to obtain the DMA address of a
> >>buffer on a non-PCI system. Use the DMA API functions for this, which
> >>are portable and will allow us to use other DMA API functions for
> >>buffer synchronization.
> >>
> >>Signed-off-by: Alexandre Courbot 
> >>---
> >>  drivers/gpu/drm/nouveau/core/engine/device/base.c | 8 +++-
> >>  1 file changed, 7 insertions(+), 1 deletion(-)
> >>
> >>diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c 
> >>b/drivers/gpu/drm/nouveau/core/engine/device/base.c
> >>index 18c8c7245b73..e4e9e64988fe 100644
> >>--- a/drivers/gpu/drm/nouveau/core/engine/device/base.c
> >>+++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c
> >>@@ -489,7 +489,10 @@ nv_device_map_page(struct nouveau_device *device, 
> >>struct page *page)
> >>if (pci_dma_mapping_error(device->pdev, ret))
> >>ret = 0;
> >>} else {
> >>-   ret = page_to_phys(page);
> >>+   ret = dma_map_page(>platformdev->dev, page, 0,
> >>+  PAGE_SIZE, DMA_BIDIRECTIONAL);
> >>+   if (dma_mapping_error(>platformdev->dev, ret))
> >>+   ret = 0;
> >>}
> >>
> >>return ret;
> >>@@ -501,6 +504,9 @@ nv_device_unmap_page(struct nouveau_device *device, 
> >>dma_addr_t addr)
> >>if (nv_device_is_pci(device))
> >>pci_unmap_page(device->pdev, addr, PAGE_SIZE,
> >>   PCI_DMA_BIDIRECTIONAL);
> >
> >pci_map/unmap alias to dma_unmap/map when called on the underlying struct
> >device embedded in pci_device (like for platform drivers). Dunno whether
> >it's worth to track a pointer to the struct device directly and always
> >call dma_unmap/map.
> 
> Isn't it (theoretically) possible to have a platform that does not use the
> DMA API for its PCI implementation and thus requires the pci_* functions to
> be called? I could not find such a case in -next, which suggests that all
> PCI platforms have been converted to the DMA API already and that we could
> indeed refactor this to always use the DMA functions.
> 
> But at the same time the way we use APIs should not be directed by their
> implementation, but by their intent - and unless the PCI API has been
> deprecated in some way (something I am not aware of), the rule is still that
> you should use it on a PCI device.

Hm, somehow I've thought that it's recommended to just use the dma api
directly. It's what we're doing in i915 at least, but now I'm not so sure
any more. My guess is that this is just history really when the dma api
was pci-only.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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[PATCH net-next 8/8] ethernet: amd: switch case fixes

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch fix the *swith* case indentation and usage issues

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |  117 +--
 1 file changed, 58 insertions(+), 59 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index f0d3809..ab2e09b9 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -197,23 +197,24 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE);
tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
switch (lp->ext_phy_option) {
-   default:
-   case SPEED_AUTONEG: /* advertise all values */
-   tmp |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
-   ADVERTISE_100HALF | ADVERTISE_100FULL);
-   break;
-   case SPEED10_HALF:
-   tmp |= ADVERTISE_10HALF;
-   break;
-   case SPEED10_FULL:
-   tmp |= ADVERTISE_10FULL;
-   break;
-   case SPEED100_HALF:
-   tmp |= ADVERTISE_100HALF;
-   break;
-   case SPEED100_FULL:
-   tmp |= ADVERTISE_100FULL;
-   break;
+   case SPEED_AUTONEG: /* advertise all values */
+   tmp |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
+   ADVERTISE_100HALF | ADVERTISE_100FULL);
+   break;
+   case SPEED10_HALF:
+   tmp |= ADVERTISE_10HALF;
+   break;
+   case SPEED10_FULL:
+   tmp |= ADVERTISE_10FULL;
+   break;
+   case SPEED100_HALF:
+   tmp |= ADVERTISE_100HALF;
+   break;
+   case SPEED100_FULL:
+   tmp |= ADVERTISE_100FULL;
+   break;
+   default:
+   break;
}
 
if (advert != tmp)
@@ -383,49 +384,47 @@ static int amd8111e_set_coalesce(struct net_device *dev, 
enum coal_mode cmod)
void __iomem *mmio = lp->mmio;
struct amd8111e_coalesce_conf *coal_conf = >coal_conf;
 
+   switch (cmod) {
+   case RX_INTR_COAL:
+   timeout = coal_conf->rx_timeout;
+   event_count = coal_conf->rx_event_count;
+   if (timeout > MAX_TIMEOUT ||
+   event_count > MAX_EVENT_COUNT)
+   return -EINVAL;
+
+   timeout = timeout * DELAY_TIMER_CONV;
+   writel(VAL0 | STINTEN, mmio + INTEN0);
+   writel((u32)DLY_INT_A_R0 | (event_count << 16) |
+  timeout, mmio+DLY_INT_A);
+   break;
 
-   switch (cmod)
-   {
-   case RX_INTR_COAL:
-   timeout = coal_conf->rx_timeout;
-   event_count = coal_conf->rx_event_count;
-   if (timeout > MAX_TIMEOUT ||
-   event_count > MAX_EVENT_COUNT)
-   return -EINVAL;
-
-   timeout = timeout * DELAY_TIMER_CONV;
-   writel(VAL0 | STINTEN, mmio + INTEN0);
-   writel((u32)DLY_INT_A_R0 | (event_count << 16) |
-  timeout, mmio+DLY_INT_A);
-   break;
-
-   case TX_INTR_COAL:
-   timeout = coal_conf->tx_timeout;
-   event_count = coal_conf->tx_event_count;
-   if (timeout > MAX_TIMEOUT ||
-   event_count > MAX_EVENT_COUNT)
-   return -EINVAL;
-
-
-   timeout = timeout * DELAY_TIMER_CONV;
-   writel(VAL0 | STINTEN, mmio + INTEN0);
-   writel((u32)DLY_INT_B_T0 | (event_count << 16) |
-  timeout, mmio + DLY_INT_B);
-   break;
-
-   case DISABLE_COAL:
-   writel(0, mmio + STVAL);
-   writel(STINTEN, mmio + INTEN0);
-   writel(0, mmio + DLY_INT_B);
-   writel(0, mmio + DLY_INT_A);
-   break;
-case ENABLE_COAL:
-  /* Start the timer (0.5 sec) */
-   writel((u32)SOFT_TIMER_FREQ, mmio + STVAL);
-   writel(VAL0 | STINTEN, mmio + INTEN0);
-   break;
-   default:
-   break;
+   case TX_INTR_COAL:
+   timeout = coal_conf->tx_timeout;
+   event_count = coal_conf->tx_event_count;
+   if (timeout > MAX_TIMEOUT ||
+   event_count > MAX_EVENT_COUNT)
+   return -EINVAL;
+
+   timeout = timeout * DELAY_TIMER_CONV;
+   

[RFC Patch V1 27/30] x86, numa: Kill useless code to improve code readability

2014-07-11 Thread Jiang Liu
According to x86 boot sequence, early_cpu_to_node() always returns
NUMA_NO_NODE when called from numa_init(). So kill useless code
to improve code readability.

Related code sequence as below:
x86_cpu_to_node_map is set until step 2, so it is still the default
value (NUMA_NO_NODE) when accessed at step 1.

start_kernel()
setup_arch()
initmem_init()
x86_numa_init()
numa_init()
early_cpu_to_node()
1)  return 
early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
acpi_boot_init();
sfi_init()
x86_dtb_init()
generic_processor_info()
early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
init_cpu_to_node()
numa_set_node(cpu, node);
2)  per_cpu(x86_cpu_to_node_map, cpu) = node;

rest_init()
kernel_init()
smp_init()
native_cpu_up()
start_secondary()
numa_set_node()

per_cpu(x86_cpu_to_node_map, cpu) = node;

Signed-off-by: Jiang Liu 
---
 arch/x86/mm/numa.c |   10 --
 1 file changed, 10 deletions(-)

diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index a32b706c401a..eec4f6c322bb 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -545,8 +545,6 @@ static void __init numa_init_array(void)
 
rr = first_node(node_online_map);
for (i = 0; i < nr_cpu_ids; i++) {
-   if (early_cpu_to_node(i) != NUMA_NO_NODE)
-   continue;
numa_set_node(i, rr);
rr = next_node(rr, node_online_map);
if (rr == MAX_NUMNODES)
@@ -633,14 +631,6 @@ static int __init numa_init(int (*init_func)(void))
if (ret < 0)
return ret;
 
-   for (i = 0; i < nr_cpu_ids; i++) {
-   int nid = early_cpu_to_node(i);
-
-   if (nid == NUMA_NO_NODE)
-   continue;
-   if (!node_online(nid))
-   numa_clear_node(i);
-   }
numa_init_array();
 
/*
-- 
1.7.10.4

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[PATCH net-next 6/8] ethernet: amd: fix 'foo* bar'

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch fix the 'foo*' bar with 'foo *bar'
and (foo*) with (foo *).

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |   72 +--
 1 file changed, 36 insertions(+), 36 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index c47019d..8231be7 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -109,7 +109,7 @@ module_param_array(dynamic_ipg, bool, NULL, 0);
 MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: 
Disable");
 
 /* This function will read the PHY registers. */
-static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, 
u32* val)
+static int amd8111e_read_phy(struct amd8111e_priv *lp, int phy_id, int reg, 
u32 *val)
 {
void __iomem *mmio = lp->mmio;
unsigned int reg_val;
@@ -137,7 +137,7 @@ err_phy_read:
 }
 
 /* This function will write into PHY registers. */
-static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, 
u32 val)
+static int amd8111e_write_phy(struct amd8111e_priv *lp,int phy_id, int reg, 
u32 val)
 {
unsigned int repeat = REPEAT_CNT;
void __iomem *mmio = lp->mmio;
@@ -166,9 +166,9 @@ err_phy_write:
 }
 
 /* This is the mii register read function provided to the mii interface. */
-static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num)
+static int amd8111e_mdio_read(struct net_device *dev, int phy_id, int reg_num)
 {
-   struct amd8111e_priv* lp = netdev_priv(dev);
+   struct amd8111e_priv *lp = netdev_priv(dev);
unsigned int reg_val;
 
amd8111e_read_phy(lp,phy_id,reg_num,_val);
@@ -177,9 +177,9 @@ static int amd8111e_mdio_read(struct net_device * dev, int 
phy_id, int reg_num)
 }
 
 /* This is the mii register write function provided to the mii interface. */
-static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int 
reg_num, int val)
+static void amd8111e_mdio_write(struct net_device *dev, int phy_id, int 
reg_num, int val)
 {
-   struct amd8111e_priv* lp = netdev_priv(dev);
+   struct amd8111e_priv *lp = netdev_priv(dev);
 
amd8111e_write_phy(lp, phy_id, reg_num, val);
 }
@@ -231,7 +231,7 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
 static int amd8111e_free_skbs(struct net_device *dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
-   struct sk_buff* rx_skbuff;
+   struct sk_buff *rx_skbuff;
int i;
 
/* Freeing transmit skbs */
@@ -261,9 +261,9 @@ static int amd8111e_free_skbs(struct net_device *dev)
 /* This will set the receive buffer length corresponding
  * to the mtu size of networkinterface.
  */
-static inline void amd8111e_set_rx_buff_len(struct net_device* dev)
+static inline void amd8111e_set_rx_buff_len(struct net_device *dev)
 {
-   struct amd8111e_priv* lp = netdev_priv(dev);
+   struct amd8111e_priv *lp = netdev_priv(dev);
unsigned int mtu = dev->mtu;
 
if (mtu > ETH_DATA_LEN){
@@ -366,14 +366,14 @@ err_no_mem:
 /* This function will set the interrupt coalescing according
  * to the input arguments
  */
-static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
+static int amd8111e_set_coalesce(struct net_device *dev, enum coal_mode cmod)
 {
unsigned int timeout;
unsigned int event_count;
 
struct amd8111e_priv *lp = netdev_priv(dev);
void __iomem *mmio = lp->mmio;
-   struct amd8111e_coalesce_conf * coal_conf = >coal_conf;
+   struct amd8111e_coalesce_conf *coal_conf = >coal_conf;
 
 
switch(cmod)
@@ -502,7 +502,7 @@ static int amd8111e_restart(struct net_device *dev)
 }
 
 /* This function clears necessary the device registers. */
-static void amd8111e_init_hw_default( struct amd8111e_priv* lp)
+static void amd8111e_init_hw_default( struct amd8111e_priv *lp)
 {
unsigned int reg_val;
unsigned int logic_filter[2] ={0,};
@@ -572,7 +572,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* 
lp)
writew(MIB_CLEAR, mmio + MIB_ADDR);
 
/* Clear LARF */
-   amd8111e_writeq(*(u64*)logic_filter,mmio+LADRF);
+   amd8111e_writeq(*(u64 *)logic_filter,mmio+LADRF);
 
/* SRAM_SIZE register */
reg_val = readl(mmio + SRAM_SIZE);
@@ -593,7 +593,7 @@ static void amd8111e_init_hw_default( struct amd8111e_priv* 
lp)
 /* This function disables the interrupt and clears all the pending
  * interrupts in INT0
  */
-static void amd8111e_disable_interrupt(struct amd8111e_priv* lp)
+static void amd8111e_disable_interrupt(struct amd8111e_priv *lp)
 {
u32 intr0;
 
@@ -610,7 +610,7 @@ static void amd8111e_disable_interrupt(struct 
amd8111e_priv* lp)
 }
 
 /* This function stops the chip. */
-static void amd8111e_stop_chip(struct amd8111e_priv* lp)
+static void amd8111e_stop_chip(struct amd8111e_priv *lp)
 {
writel(RUN, lp->mmio + CMD0);
 

[RFC Patch V1 22/30] mm, of: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/of/base.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index b9864806e9b8..40d4772973ad 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -85,7 +85,7 @@ EXPORT_SYMBOL(of_n_size_cells);
 #ifdef CONFIG_NUMA
 int __weak of_node_to_nid(struct device_node *np)
 {
-   return numa_node_id();
+   return numa_mem_id();
 }
 #endif
 
-- 
1.7.10.4

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[RFC Patch V1 21/30] mm, irqchip: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/irqchip/irq-clps711x.c |2 +-
 drivers/irqchip/irq-gic.c  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-clps711x.c b/drivers/irqchip/irq-clps711x.c
index 33340dc97d1d..b0acf8b32a1a 100644
--- a/drivers/irqchip/irq-clps711x.c
+++ b/drivers/irqchip/irq-clps711x.c
@@ -186,7 +186,7 @@ static int __init _clps711x_intc_init(struct device_node 
*np,
writel_relaxed(0, clps711x_intc->intmr[1]);
writel_relaxed(0, clps711x_intc->intmr[2]);
 
-   err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_node_id());
+   err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_mem_id());
if (IS_ERR_VALUE(err))
goto out_iounmap;
 
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 7e11c9d6ae8c..a7e6c043d823 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1005,7 +1005,7 @@ void __init gic_init_bases(unsigned int gic_nr, int 
irq_start,
if (of_property_read_u32(node, "arm,routable-irqs",
 _routable_irqs)) {
irq_base = irq_alloc_descs(irq_start, 16, gic_irqs,
-  numa_node_id());
+  numa_mem_id());
if (IS_ERR_VALUE(irq_base)) {
WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming 
pre-allocated\n",
 irq_start);
-- 
1.7.10.4

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[RFC Patch V1 26/30] mm, x86, perf: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 arch/x86/kernel/cpu/perf_event_amd.c  |2 +-
 arch/x86/kernel/cpu/perf_event_amd_uncore.c   |2 +-
 arch/x86/kernel/cpu/perf_event_intel.c|2 +-
 arch/x86/kernel/cpu/perf_event_intel_ds.c |6 +++---
 arch/x86/kernel/cpu/perf_event_intel_rapl.c   |2 +-
 arch/x86/kernel/cpu/perf_event_intel_uncore.c |2 +-
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_amd.c 
b/arch/x86/kernel/cpu/perf_event_amd.c
index beeb7cc07044..ee5120ce3e98 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -347,7 +347,7 @@ static struct amd_nb *amd_alloc_nb(int cpu)
struct amd_nb *nb;
int i;
 
-   nb = kzalloc_node(sizeof(struct amd_nb), GFP_KERNEL, cpu_to_node(cpu));
+   nb = kzalloc_node(sizeof(struct amd_nb), GFP_KERNEL, cpu_to_mem(cpu));
if (!nb)
return NULL;
 
diff --git a/arch/x86/kernel/cpu/perf_event_amd_uncore.c 
b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
index 3bbdf4cd38b9..1a7f4129bf4c 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_uncore.c
@@ -291,7 +291,7 @@ static struct pmu amd_l2_pmu = {
 static struct amd_uncore *amd_uncore_alloc(unsigned int cpu)
 {
return kzalloc_node(sizeof(struct amd_uncore), GFP_KERNEL,
-   cpu_to_node(cpu));
+   cpu_to_mem(cpu));
 }
 
 static void amd_uncore_cpu_up_prepare(unsigned int cpu)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c 
b/arch/x86/kernel/cpu/perf_event_intel.c
index adb02aa62af5..4f48d1bb7608 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1957,7 +1957,7 @@ struct intel_shared_regs *allocate_shared_regs(int cpu)
int i;
 
regs = kzalloc_node(sizeof(struct intel_shared_regs),
-   GFP_KERNEL, cpu_to_node(cpu));
+   GFP_KERNEL, cpu_to_mem(cpu));
if (regs) {
/*
 * initialize the locks to keep lockdep happy
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c 
b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 980970cb744d..bb0327411bf1 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -250,7 +250,7 @@ static DEFINE_PER_CPU(void *, insn_buffer);
 static int alloc_pebs_buffer(int cpu)
 {
struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
-   int node = cpu_to_node(cpu);
+   int node = cpu_to_mem(cpu);
int max, thresh = 1; /* always use a single PEBS record */
void *buffer, *ibuffer;
 
@@ -304,7 +304,7 @@ static void release_pebs_buffer(int cpu)
 static int alloc_bts_buffer(int cpu)
 {
struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
-   int node = cpu_to_node(cpu);
+   int node = cpu_to_mem(cpu);
int max, thresh;
void *buffer;
 
@@ -341,7 +341,7 @@ static void release_bts_buffer(int cpu)
 
 static int alloc_ds_buffer(int cpu)
 {
-   int node = cpu_to_node(cpu);
+   int node = cpu_to_mem(cpu);
struct debug_store *ds;
 
ds = kzalloc_node(sizeof(*ds), GFP_KERNEL, node);
diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c 
b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
index 619f7699487a..9df1ec3b505d 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
@@ -547,7 +547,7 @@ static int rapl_cpu_prepare(int cpu)
if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, _rapl_power_unit_bits))
return -1;
 
-   pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu));
+   pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_mem(cpu));
if (!pmu)
return -1;
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c 
b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 65bbbea38b9c..4b77ba4b4e36 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -4011,7 +4011,7 @@ static int uncore_cpu_prepare(int cpu, int phys_id)
if (pmu->func_id < 0)
pmu->func_id = j;
 
-   box = uncore_alloc_box(type, cpu_to_node(cpu));
+   box = uncore_alloc_box(type, cpu_to_mem(cpu));
if (!box)
return -ENOMEM;
 
-- 
1.7.10.4

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Re: WARNING: CPU: 2 PID: 1 at arch/x86/mm/ioremap.c:171 __ioremap_caller+0x290/0x2fa()

2014-07-11 Thread Fabio Coatti
In data giovedì 10 luglio 2014 14:05:27, Bjorn Helgaas ha scritto:
> On Thu, Jul 10, 2014 at 09:12:44PM +0200, Stephane Eranian wrote:
> > On Thu, Jul 10, 2014 at 2:13 PM, Fabio Coatti  
wrote:
> > > In data giovedì 10 luglio 2014 10:54:48, Peter Zijlstra ha scritto:
> > >> On Thu, Jul 10, 2014 at 10:52:08AM +0200, Peter Zijlstra wrote:
> > >> > On Thu, Jul 10, 2014 at 10:44:21AM +0200, Peter Zijlstra wrote:
> > >> > > On Wed, Jul 09, 2014 at 12:48:05PM -0700, Fabio Coatti wrote:
> > >> > > > In data mercoledì 9 luglio 2014 11:54:21, Greg Kroah-Hartman ha
> > > 
> > > scritto:
> > >> > > > > Try cc:ing everyone on that patch, with the original
> > >> > > > > information you
> > >> > > > > provided, and the linux-kernel mailing list.  Those developers
> > >> > > > > should be
> > >> > > > > able to help you out properly.
> > >> > > > 
> > >> > > > Ok, here you can find the description of a problem that I'm
> > >> > > > experiencing on
> > >> > > > latest kernels, since 3.15.0.  (this report comes from 3.15.4)
> > >> > > > 
> > >> > > > lug 07 22:08:00 calvin kernel: resource map sanity check
> > >> > > > conflict:
> > >> > > > 0xfed1 0xfed15fff 0xfed1 0xfed13fff reserved
> > >> > > > lug 07 22:08:00 calvin kernel: [ cut here
> > >> > > > ]
> > >> > > 
> > >> > > I think this is a 'known' issue on Thinkpad (iirc). For some
> > >> > > obscure
> > >> > > reason its BIOS has funny ideas about resources etc.
> > >> > > 
> > >> > > I couldn't quickly find the prvious thread, maybe Stephane knows.
> > >> > 
> > >> > Found it:
> > >> >   lkml.kernel.org/r/20140224162400.ge16...@pd.tnic
> > >> 
> > >> Ok, reread that thread and no definite conclusion was found I think.
> > >> Just Thinkpad firmware having overlapping resources.
> > > 
> > > So I guess that this happens also for HP Folio 9470m, not only in
> > > thinkpads. I wonder how many machines shares this behaviour...
> > 
> > Somehow, I thought that Bjorn had proposed a fix for this.
> 
> Yep, this [1]:
> 
> cb171f7abb9a PNP: Work around BIOS defects in Intel MCH area reporting
> 
> which appeared in v3.15, so it should be in your kernel.  But apparently
> it didn't work.  Fabio, can you pastebin your complete dmesg log?
> 
> [1]
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c
> b171f7abb9a

Sure, here you go:

http://pastebin.com/FiL7N64b


-- 
Fabio
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[RFC Patch V1 25/30] mm, x86, kvm: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 arch/x86/kvm/vmx.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 801332edefc3..beb7c6d5d51b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2964,7 +2964,7 @@ static __init int setup_vmcs_config(struct vmcs_config 
*vmcs_conf)
 
 static struct vmcs *alloc_vmcs_cpu(int cpu)
 {
-   int node = cpu_to_node(cpu);
+   int node = cpu_to_mem(cpu);
struct page *pages;
struct vmcs *vmcs;
 
-- 
1.7.10.4

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[RFC Patch V1 24/30] mm, x86/platform/uv: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 arch/x86/platform/uv/tlb_uv.c  |2 +-
 arch/x86/platform/uv/uv_nmi.c  |3 ++-
 arch/x86/platform/uv/uv_time.c |2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index dfe605ac1bcd..4612b4396004 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -2116,7 +2116,7 @@ static int __init uv_bau_init(void)
 
for_each_possible_cpu(cur_cpu) {
mask = _cpu(uv_flush_tlb_mask, cur_cpu);
-   zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
+   zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_mem(cur_cpu));
}
 
nuvhubs = uv_num_possible_blades();
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
index c89c93320c12..d17758215a61 100644
--- a/arch/x86/platform/uv/uv_nmi.c
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -715,7 +715,8 @@ void uv_nmi_setup(void)
nid = cpu_to_node(cpu);
if (uv_hub_nmi_list[nid] == NULL) {
uv_hub_nmi_list[nid] = kzalloc_node(size,
-   GFP_KERNEL, nid);
+   GFP_KERNEL,
+   cpu_to_mem(cpu));
BUG_ON(!uv_hub_nmi_list[nid]);
raw_spin_lock_init(&(uv_hub_nmi_list[nid]->nmi_lock));
atomic_set(_hub_nmi_list[nid]->cpu_owner, -1);
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c
index 5c86786bbfd2..c369fb2eb7d3 100644
--- a/arch/x86/platform/uv/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -164,7 +164,7 @@ static __init int uv_rtc_allocate_timers(void)
return -ENOMEM;
 
for_each_present_cpu(cpu) {
-   int nid = cpu_to_node(cpu);
+   int nid = cpu_to_mem(cpu);
int bid = uv_cpu_to_blade_id(cpu);
int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
struct uv_rtc_timer_head *head = blade_info[bid];
-- 
1.7.10.4

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[RFC Patch V1 30/30] x86, NUMA: Online node earlier when doing CPU hot-addition

2014-07-11 Thread Jiang Liu
With typical CPU hot-addition flow on x86, PCI host bridges embedded
in physical processor are always associated with NOMA_NO_NODE, which
may cause sub-optimal performance.
1) Handle CPU hot-addition notification
acpi_processor_add()
acpi_processor_get_info()
acpi_processor_hotadd_init()
acpi_map_lsapic()
1.a)acpi_map_cpu2node()

2) Handle PCI host bridge hot-addition notification
acpi_pci_root_add()
pci_acpi_scan_root()
2.a)if (node != NUMA_NO_NODE && !node_online(node)) node = 
NUMA_NO_NODE;

3) Handle memory hot-addition notification
acpi_memory_device_add()
acpi_memory_enable_device()
add_memory()
3.a)node_set_online();

4) Online CPUs through sysfs interfaces
cpu_subsys_online()
cpu_up()
try_online_node()
4.a)node_set_online();

So associated node is always in offline state because it is onlined
until step 3.a or 4.a.

We could improve performance by online node at step 1.a. This change
also makes the code symmetric. Nodes are always created when handling
CPU/memory hot-addition events instead of handling user requests from
sysfs interfaces, and are destroyed when handling CPU/memory hot-removal
events.

It also close a race window caused by kmalloc_node(cpu_to_node(cpu)),
which may cause system panic as below.
[ 3663.324476] BUG: unable to handle kernel paging request at 1f08
[ 3663.332348] IP: [] __alloc_pages_nodemask+0xb9/0x2d0
[ 3663.339719] PGD 82fe10067 PUD 82ebef067 PMD 0
[ 3663.344773] Oops:  [#1] SMP
[ 3663.348455] Modules linked in: shpchp gpio_ich x86_pkg_temp_thermal 
intel_powerclamp coretemp kvm_intel kvm crct10dif_pclmul crc32_pclmul 
ghash_clmulni_intel aesni_intel aes_x86_64 lrw gf128mul glue_helper ablk_helper 
cryptd microcode joydev sb_edac edac_core lpc_ich ipmi_si tpm_tis 
ipmi_msghandler ioatdma wmi acpi_pad mac_hid lp parport ixgbe isci mpt2sas dca 
ahci ptp libsas libahci raid_class pps_core scsi_transport_sas mdio hid_generic 
usbhid hid
[ 3663.394393] CPU: 61 PID: 2416 Comm: cron Tainted: GW3.14.0-rc5+ 
#21
[ 3663.402643] Hardware name: Intel Corporation BRICKLAND/BRICKLAND, BIOS 
BRIVTIN1.86B.0047.F03.1403031049 03/03/2014
[ 3663.414299] task: 88082fe54b00 ti: 880845fba000 task.ti: 
880845fba000
[ 3663.422741] RIP: 0010:[]  [] 
__alloc_pages_nodemask+0xb9/0x2d0
[ 3663.432857] RSP: 0018:880845fbbcd0  EFLAGS: 00010246
[ 3663.439265] RAX: 1f00 RBX:  RCX: 
[ 3663.447291] RDX:  RSI: 0a8d RDI: 81a8d950
[ 3663.455318] RBP: 880845fbbd58 R08: 880823293400 R09: 0001
[ 3663.463345] R10: 0001 R11:  R12: 002052d0
[ 3663.471363] R13: 880854c07600 R14: 0002 R15: 
[ 3663.479389] FS:  7f2e8b99e800() GS:88105a40() 
knlGS:
[ 3663.488514] CS:  0010 DS:  ES:  CR0: 80050033
[ 3663.495018] CR2: 1f08 CR3: 0008237b1000 CR4: 001407e0
[ 3663.503476] Stack:
[ 3663.505757]  811bd74d 880854c01d98 880854c01df0 
880854c01dd0
[ 3663.514167]  0003208ca420 00075a5d84d0 88082fe54b00 
811bb35f
[ 3663.522567]  880854c07600 0003 1f00 
880845fbbd48
[ 3663.530976] Call Trace:
[ 3663.533753]  [] ? deactivate_slab+0x41d/0x4f0
[ 3663.540421]  [] ? new_slab+0x3f/0x2d0
[ 3663.546307]  [] new_slab+0xa5/0x2d0
[ 3663.552001]  [] __slab_alloc+0x35d/0x54a
[ 3663.558185]  [] ? local_clock+0x25/0x30
[ 3663.564686]  [] ? __do_page_fault+0x4ec/0x5e0
[ 3663.571356]  [] ? alloc_fair_sched_group+0xc4/0x190
[ 3663.578609]  [] ? __raw_spin_lock_init+0x21/0x60
[ 3663.585570]  [] kmem_cache_alloc_node_trace+0xa6/0x1d0
[ 3663.593112]  [] ? alloc_fair_sched_group+0xc4/0x190
[ 3663.600363]  [] alloc_fair_sched_group+0xc4/0x190
[ 3663.607423]  [] sched_create_group+0x3f/0x80
[ 3663.613994]  [] sched_autogroup_create_attach+0x3f/0x1b0
[ 3663.621732]  [] sys_setsid+0xea/0x110
[ 3663.628020]  [] system_call_fastpath+0x1a/0x1f
[ 3663.634780] Code: 00 44 89 e7 e8 b9 f8 f4 ff 41 f6 c4 10 74 18 31 d2 be 8d 
0a 00 00 48 c7 c7 50 d9 a8 81 e8 70 6a f2 ff e8 db dd 5f 00 48 8b 45 c8 <48> 83 
78 08 00 0f 84 b5 01 00 00 48 83 c0 08 44 89 75 c0 4d 89
[ 3663.657032] RIP  [] __alloc_pages_nodemask+0xb9/0x2d0
[ 3663.664491]  RSP 
[ 3663.668429] CR2: 1f08
[ 3663.672659] ---[ end trace df13f08ed9de18ad ]---

Signed-off-by: Jiang Liu 
---
 arch/x86/kernel/acpi/boot.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 3b5641703a49..00c2ed507460 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ 

[RFC Patch V1 28/30] mm: Update _mem_id_[] for every possible CPU when memory configuration changes

2014-07-11 Thread Jiang Liu
Current kernel only updates _mem_id_[cpu] for onlined CPUs when memory
configuration changes. So kernel may allocate memory from remote node
for a CPU if the CPU is still in absent or offline state even if the
node associated with the CPU has already been onlined. This patch tries
to improve performance by updating _mem_id_[cpu] for each possible CPU
when memory configuration changes, thus kernel could always allocate
from local node once the node is onlined.

We check node_online(cpu_to_node(cpu)) because:
1) local_memory_node(nid) needs to access NODE_DATA(nid)
2) try_offline_node(nid) just zeroes out NODE_DATA(nid) instead of free it

Signed-off-by: Jiang Liu 
---
 mm/page_alloc.c |   10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 0ea758b898fd..de86e941ed57 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -3844,13 +3844,13 @@ static int __build_all_zonelists(void *data)
/*
 * We now know the "local memory node" for each node--
 * i.e., the node of the first zone in the generic zonelist.
-* Set up numa_mem percpu variable for on-line cpus.  During
-* boot, only the boot cpu should be on-line;  we'll init the
-* secondary cpus' numa_mem as they come on-line.  During
-* node/memory hotplug, we'll fixup all on-line cpus.
+* Set up numa_mem percpu variable for all possible cpus
+* if associated node has been onlined.
 */
-   if (cpu_online(cpu))
+   if (node_online(cpu_to_node(cpu)))
set_cpu_numa_mem(cpu, 
local_memory_node(cpu_to_node(cpu)));
+   else
+   set_cpu_numa_mem(cpu, NUMA_NO_NODE);
 #endif
}
 
-- 
1.7.10.4

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[RFC Patch V1 23/30] mm, x86: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 arch/x86/kernel/apic/io_apic.c |   10 +-
 arch/x86/kernel/devicetree.c   |2 +-
 arch/x86/kernel/irq_32.c   |4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 81e08eff05ee..7cb3d58b11e8 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -204,7 +204,7 @@ int __init arch_early_irq_init(void)
 
cfg = irq_cfgx;
count = ARRAY_SIZE(irq_cfgx);
-   node = cpu_to_node(0);
+   node = cpu_to_mem(0);
 
for (i = 0; i < count; i++) {
irq_set_chip_data(i, [i]);
@@ -1348,7 +1348,7 @@ static bool __init io_apic_pin_not_connected(int idx, int 
ioapic_idx, int pin)
 
 static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
 {
-   int idx, node = cpu_to_node(0);
+   int idx, node = cpu_to_mem(0);
struct io_apic_irq_attr attr;
unsigned int pin, irq;
 
@@ -1394,7 +1394,7 @@ static void __init setup_IO_APIC_irqs(void)
  */
 void setup_IO_APIC_irq_extra(u32 gsi)
 {
-   int ioapic_idx = 0, pin, idx, irq, node = cpu_to_node(0);
+   int ioapic_idx = 0, pin, idx, irq, node = cpu_to_mem(0);
struct io_apic_irq_attr attr;
 
/*
@@ -2662,7 +2662,7 @@ int timer_through_8259 __initdata;
 static inline void __init check_timer(void)
 {
struct irq_cfg *cfg = irq_get_chip_data(0);
-   int node = cpu_to_node(0);
+   int node = cpu_to_mem(0);
int apic1, pin1, apic2, pin2;
unsigned long flags;
int no_pin1 = 0;
@@ -3387,7 +3387,7 @@ int io_apic_set_pci_routing(struct device *dev, int irq,
return -EINVAL;
}
 
-   node = dev ? dev_to_node(dev) : cpu_to_node(0);
+   node = dev ? dev_to_node(dev) : cpu_to_mem(0);
 
return io_apic_setup_irq_pin_once(irq, node, irq_attr);
 }
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 7db54b5d5f86..289762f4ea06 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -295,7 +295,7 @@ static int ioapic_xlate(struct irq_domain *domain,
set_io_apic_irq_attr(, idx, line, it->trigger, it->polarity);
 
rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
-   cpu_to_node(0), );
+   cpu_to_mem(0), );
if (rc)
return rc;
 
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 63ce838e5a54..425bb4b1110a 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -128,12 +128,12 @@ void irq_ctx_init(int cpu)
if (per_cpu(hardirq_stack, cpu))
return;
 
-   irqstk = page_address(alloc_pages_node(cpu_to_node(cpu),
+   irqstk = page_address(alloc_pages_node(cpu_to_mem(cpu),
   THREADINFO_GFP,
   THREAD_SIZE_ORDER));
per_cpu(hardirq_stack, cpu) = irqstk;
 
-   irqstk = page_address(alloc_pages_node(cpu_to_node(cpu),
+   irqstk = page_address(alloc_pages_node(cpu_to_mem(cpu),
   THREADINFO_GFP,
   THREAD_SIZE_ORDER));
per_cpu(softirq_stack, cpu) = irqstk;
-- 
1.7.10.4

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[RFC Patch V1 29/30] mm, x86: Enable memoryless node support to better support CPU/memory hotplug

2014-07-11 Thread Jiang Liu
With current implementation, all CPUs within a NUMA node will be
assocaited with another NUMA node if the node has no memory installed.

For example, on a four-node system, CPUs on node 2 and 3 are associated
with node 0 when are no memory install on node 2 and 3, which may
confuse users.
root@bkd01sdp:~# numactl --hardware
available: 2 nodes (0-1)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 30 31 32 33 34 35 36 37 38 39 
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 
66 67 68 69 70 71 72 73 74 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 
105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
node 0 size: 15602 MB
node 0 free: 15014 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15985 MB
node 1 free: 15686 MB
node distances:
node   0   1
  0:  10  21
  1:  21  10

To be worse, the CPU affinity relationship won't get fixed even after
memory has been added to those nodes. After memory hot-addition to
node 2, CPUs on node 2 are still associated with node 0. This may cause
sub-optimal performance.
root@bkd01sdp:/sys/devices/system/node/node2# numactl --hardware
available: 3 nodes (0-2)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 30 31 32 33 34 35 36 37 38 39 
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 
66 67 68 69 70 71 72 73 74 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 
105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
node 0 size: 15602 MB
node 0 free: 14743 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15985 MB
node 1 free: 15715 MB
node 2 cpus:
node 2 size: 128 MB
node 2 free: 128 MB
node distances:
node   0   1   2
  0:  10  21  21
  1:  21  10  21
  2:  21  21  10

With support of memoryless node enabled, it will correctly report system
hardware topology for nodes without memory installed.
root@bkd01sdp:~# numactl --hardware
available: 4 nodes (0-3)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 60 61 62 63 64 65 66 67 68 69 
70 71 72 73 74
node 0 size: 15725 MB
node 0 free: 15129 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15862 MB
node 1 free: 15627 MB
node 2 cpus: 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 90 91 92 93 94 95 96 
97 98 99 100 101 102 103 104
node 2 size: 0 MB
node 2 free: 0 MB
node 3 cpus: 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 105 106 107 108 109 
110 111 112 113 114 115 116 117 118 119
node 3 size: 0 MB
node 3 free: 0 MB
node distances:
node   0   1   2   3
  0:  10  21  21  21
  1:  21  10  21  21
  2:  21  21  10  21
  3:  21  21  21  10

With memoryless node enabled, CPUs are correctly associated with node 2
after memory hot-addition to node 2.
root@bkd01sdp:/sys/devices/system/node/node2# numactl --hardware
available: 4 nodes (0-3)
node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 60 61 62 63 64 65 66 67 68 69 
70 71 72 73 74
node 0 size: 15725 MB
node 0 free: 14872 MB
node 1 cpus: 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 75 76 77 78 79 80 81 
82 83 84 85 86 87 88 89
node 1 size: 15862 MB
node 1 free: 15641 MB
node 2 cpus: 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 90 91 92 93 94 95 96 
97 98 99 100 101 102 103 104
node 2 size: 128 MB
node 2 free: 127 MB
node 3 cpus: 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 105 106 107 108 109 
110 111 112 113 114 115 116 117 118 119
node 3 size: 0 MB
node 3 free: 0 MB
node distances:
node   0   1   2   3
  0:  10  21  21  21
  1:  21  10  21  21
  2:  21  21  10  21
  3:  21  21  21  10

Signed-off-by: Jiang Liu 
---
 arch/x86/Kconfig|3 +++
 arch/x86/kernel/acpi/boot.c |5 -
 arch/x86/kernel/smpboot.c   |2 ++
 arch/x86/mm/numa.c  |   42 +++---
 4 files changed, 44 insertions(+), 8 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a8f749ef0fdc..f35b25b88625 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1887,6 +1887,9 @@ config USE_PERCPU_NUMA_NODE_ID
def_bool y
depends on NUMA
 
+config HAVE_MEMORYLESS_NODES
+   def_bool NUMA
+
 config ARCH_ENABLE_SPLIT_PMD_PTLOCK
def_bool y
depends on X86_64 || X86_PAE
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 86281ffb96d6..3b5641703a49 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -612,6 +612,8 @@ static void acpi_map_cpu2node(acpi_handle handle, int cpu, 
int physid)
if (nid != -1) {
set_apicid_to_node(physid, nid);
numa_set_node(cpu, nid);
+   if (node_online(nid))
+   set_cpu_numa_mem(cpu, local_memory_node(nid));
}
 #endif
 }
@@ -644,9 +646,10 @@ int acpi_unmap_lsapic(int cpu)
 {
 #ifdef CONFIG_ACPI_NUMA
set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
+   

Re: [Nouveau] [PATCH v4 4/6] drm/nouveau: synchronize BOs when required

2014-07-11 Thread Daniel Vetter
On Fri, Jul 11, 2014 at 11:40:27AM +0900, Alexandre Courbot wrote:
> On 07/10/2014 10:04 PM, Daniel Vetter wrote:
> >On Tue, Jul 08, 2014 at 05:25:59PM +0900, Alexandre Courbot wrote:
> >>On architectures for which access to GPU memory is non-coherent,
> >>caches need to be flushed and invalidated explicitly when BO control
> >>changes between CPU and GPU.
> >>
> >>This patch adds buffer synchronization functions which invokes the
> >>correct API (PCI or DMA) to ensure synchronization is effective.
> >>
> >>Based on the TTM DMA cache helper patches by Lucas Stach.
> >>
> >>Signed-off-by: Lucas Stach 
> >>Signed-off-by: Alexandre Courbot 
> >>---
> >>  drivers/gpu/drm/nouveau/nouveau_bo.c  | 56 
> >> +++
> >>  drivers/gpu/drm/nouveau/nouveau_bo.h  |  2 ++
> >>  drivers/gpu/drm/nouveau/nouveau_gem.c | 12 
> >>  3 files changed, 70 insertions(+)
> >>
> >>diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
> >>b/drivers/gpu/drm/nouveau/nouveau_bo.c
> >>index 67e9e8e2e2ec..47e4e8886769 100644
> >>--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> >>+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> >>@@ -402,6 +402,60 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo)
> >>ttm_bo_kunmap(>kmap);
> >>  }
> >>
> >>+void
> >>+nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
> >>+{
> >>+   struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
> >>+   struct nouveau_device *device = nouveau_dev(drm->dev);
> >>+   struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
> >>+   int i;
> >>+
> >>+   if (!ttm_dma)
> >>+   return;
> >>+
> >>+   if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent)
> >>+   return;
> >
> >Is the is_cpu_coherent check really required? On coherent platforms the
> >sync_for_foo should be a noop. It's the dma api's job to encapsulate this
> >knowledge so that drivers can be blissfully ignorant. The explicit
> >is_coherent check makes this a bit leaky. And same comment that underlying
> >the bus-specifics dma-mapping functions are identical.
> 
> I think you are right, the is_cpu_coherent check should not be needed here.
> I still think we should have separate paths for the PCI/DMA cases though,
> unless you can point me to a source that clearly states that the PCI API is
> deprecated and that DMA should be used instead.

Ah, on 2nd look I've found it again. Quoting
Documentation/DMA-API-HOWTO.txt:

"Note that the DMA API works with any bus independent of the underlying
microprocessor architecture. You should use the DMA API rather than the
bus-specific DMA API, i.e., use the dma_map_*() interfaces rather than the
pci_map_*() interfaces."

The advice is fairly strong here I think ;-) And imo the idea makes sense,
since it allows drivers like nouveau here to care much less about the
actual bus used to get data to/from the ip block. And if you look at intel
gfx it makes even more sense since the pci layer we have is really just a
thin fake shim whacked on top of the hw (on SoCs at least).

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH] x86, eboot: Support initrd loaded above 4G

2014-07-11 Thread Matt Fleming
On Thu, 10 Jul, at 11:00:06AM, Yinghai Lu wrote:
> 
> Oh, no.
> 
> so efi could allocate buffer above 4g but can not access it?

I'm not exactly sure what's wrong with the buffer - whether it's a case
of not being able to access it properly or somehing buggy in the EFI
code for reading files. No fault occurs when reading into it, it just
doesn't contain the correct data.

Either way, I'm going to leave your patch as-is and just ensure I fix
this before the merge window. I think it's a good idea to have whatever
workaround we come up with documented via an entirely separate patch.

-- 
Matt Fleming, Intel Open Source Technology Center
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[PATCH net-next 7/8] ethernet: amd: fix spaces and few coding styles

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch fix the following spacing issues:
no space before tabs
space required after that ';'
space required before the open parenthesis '(
space prohibited before that ':' (ctx:WxE)
space prohibited before that close parenthesis ')'
no spaces at the start of a line

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |  577 +--
 1 file changed, 286 insertions(+), 291 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index 8231be7..f0d3809 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -32,14 +32,14 @@ Module Name:
 
 Abstract:
 
-AMD8111 based 10/100 Ethernet Controller Driver.
+   AMD8111 based 10/100 ethernet controller driver.
 
 Environment:
 
Kernel Mode
 
 Revision History:
-   3.0.0
+   3.0.0
   Initial Revision.
3.0.1
 1. Dynamic interrupt coalescing.
@@ -99,7 +99,8 @@ Revision History:
 #define MODULE_NAME"amd8111e"
 #define MODULE_VERS"3.0.7"
 MODULE_AUTHOR("Advanced Micro Devices, Inc.");
-MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version 
"MODULE_VERS);
+MODULE_DESCRIPTION("AMD8111 based 10/100 Ethernet Controller. Driver Version "
+  MODULE_VERS);
 MODULE_LICENSE("GPL");
 module_param_array(speed_duplex, int, NULL, 0);
 MODULE_PARM_DESC(speed_duplex, "Set device speed and duplex modes, 0: Auto 
Negotiate, 1: 10Mbps Half Duplex, 2: 10Mbps Full Duplex, 3: 100Mbps Half 
Duplex, 4: 100Mbps Full Duplex");
@@ -113,19 +114,20 @@ static int amd8111e_read_phy(struct amd8111e_priv *lp, 
int phy_id, int reg, u32
 {
void __iomem *mmio = lp->mmio;
unsigned int reg_val;
-   unsigned int repeat= REPEAT_CNT;
+   unsigned int repeat = REPEAT_CNT;
 
reg_val = readl(mmio + PHY_ACCESS);
while (reg_val & PHY_CMD_ACTIVE)
-   reg_val = readl( mmio + PHY_ACCESS );
+   reg_val = readl(mmio + PHY_ACCESS);
 
-   writel( PHY_RD_CMD | ((phy_id & 0x1f) << 21) |
+   writel(PHY_RD_CMD | ((phy_id & 0x1f) << 21) |
   ((reg & 0x1f) << 16),  mmio +PHY_ACCESS);
-   do{
+   do {
reg_val = readl(mmio + PHY_ACCESS);
udelay(30);  /* It takes 30 us to read/write data */
} while (--repeat && (reg_val & PHY_CMD_ACTIVE));
-   if(reg_val & PHY_RD_ERR)
+
+   if (reg_val & PHY_RD_ERR)
goto err_phy_read;
 
*val = reg_val & 0x;
@@ -133,11 +135,11 @@ static int amd8111e_read_phy(struct amd8111e_priv *lp, 
int phy_id, int reg, u32
 err_phy_read:
*val = 0;
return -EINVAL;
-
 }
 
 /* This function will write into PHY registers. */
-static int amd8111e_write_phy(struct amd8111e_priv *lp,int phy_id, int reg, 
u32 val)
+static int amd8111e_write_phy(struct amd8111e_priv *lp,
+ int phy_id, int reg, u32 val)
 {
unsigned int repeat = REPEAT_CNT;
void __iomem *mmio = lp->mmio;
@@ -145,17 +147,17 @@ static int amd8111e_write_phy(struct amd8111e_priv 
*lp,int phy_id, int reg, u32
 
reg_val = readl(mmio + PHY_ACCESS);
while (reg_val & PHY_CMD_ACTIVE)
-   reg_val = readl( mmio + PHY_ACCESS );
+   reg_val = readl(mmio + PHY_ACCESS);
 
-   writel( PHY_WR_CMD | ((phy_id & 0x1f) << 21) |
+   writel(PHY_WR_CMD | ((phy_id & 0x1f) << 21) |
   ((reg & 0x1f) << 16)|val, mmio + PHY_ACCESS);
 
-   do{
+   do {
reg_val = readl(mmio + PHY_ACCESS);
udelay(30);  /* It takes 30 us to read/write the data */
} while (--repeat && (reg_val & PHY_CMD_ACTIVE));
 
-   if(reg_val & PHY_RD_ERR)
+   if (reg_val & PHY_RD_ERR)
goto err_phy_write;
 
return 0;
@@ -171,9 +173,8 @@ static int amd8111e_mdio_read(struct net_device *dev, int 
phy_id, int reg_num)
struct amd8111e_priv *lp = netdev_priv(dev);
unsigned int reg_val;
 
-   amd8111e_read_phy(lp,phy_id,reg_num,_val);
+   amd8111e_read_phy(lp, phy_id, reg_num, _val);
return reg_val;
-
 }
 
 /* This is the mii register write function provided to the mii interface. */
@@ -190,17 +191,16 @@ static void amd8111e_mdio_write(struct net_device *dev, 
int phy_id, int reg_num,
 static void amd8111e_set_ext_phy(struct net_device *dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
-   u32 bmcr,advert,tmp;
+   u32 bmcr, advert, tmp;
 
/* Determine mii register values to set the speed */
advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE);
tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-   switch (lp->ext_phy_option){
-
+   switch (lp->ext_phy_option) {
default:
case SPEED_AUTONEG: /* advertise all values 

[RFC Patch V1 18/30] mm, bnx2fc: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/scsi/bnx2fc/bnx2fc_fcoe.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/bnx2fc/bnx2fc_fcoe.c 
b/drivers/scsi/bnx2fc/bnx2fc_fcoe.c
index 785d0d71781e..144534a51cbb 100644
--- a/drivers/scsi/bnx2fc/bnx2fc_fcoe.c
+++ b/drivers/scsi/bnx2fc/bnx2fc_fcoe.c
@@ -2453,7 +2453,7 @@ static void bnx2fc_percpu_thread_create(unsigned int cpu)
p = _cpu(bnx2fc_percpu, cpu);
 
thread = kthread_create_on_node(bnx2fc_percpu_io_thread,
-   (void *)p, cpu_to_node(cpu),
+   (void *)p, cpu_to_mem(cpu),
"bnx2fc_thread/%d", cpu);
/* bind thread to the cpu */
if (likely(!IS_ERR(thread))) {
-- 
1.7.10.4

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Re: [PATCH 0/3] drm/gk20a: support for reclocking

2014-07-11 Thread Martin Peres

On 11/07/2014 03:42, Alexandre Courbot wrote:

On 07/10/2014 06:50 PM, Mikko Perttunen wrote:

Does GK20A itself have any kind of thermal protection capabilities?
Upstream SOCTHERM support is not yet available (though I have a driver
in my tree), so we are thinking of disabling CPU DVFS on boards that
don't have always-on active cooling for now. Same might be necessary for
GPU as well.


There is a small thermal driver ( 
https://android.googlesource.com/kernel/tegra/+/b445e5296764d18861a6450f6851f25b9ca59dee/drivers/video/tegra/host/gk20a/therm_gk20a.c 
) but it doesn't seem to do much. I believe that for Tegra we rely in 
SOCTHERM instead, but maybe Ken could confirm?


Unless it changed a great deal, I reverse engineered most of the 
registers in this area (for the nv50), but some stuff didn't change that 
much and could be used straight away (temperature reading, sending IRQs 
on thresholds, auto downclocking when overheating). We are not really 
using those features on nouveau right now, we just poll on the 
temperature every second.


If we are moving to using the PMU for thermal monitoring, we can do the 
polling there and warn the userspace when the temperature is too high or 
if performance is insufficient / too much. I have part of the code for 
performance counters in PMU, it's dead simple.


Martin
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[RFC Patch V1 19/30] mm, bnx2i: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/scsi/bnx2i/bnx2i_init.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/bnx2i/bnx2i_init.c b/drivers/scsi/bnx2i/bnx2i_init.c
index 80c03b452d61..f67a5a63134e 100644
--- a/drivers/scsi/bnx2i/bnx2i_init.c
+++ b/drivers/scsi/bnx2i/bnx2i_init.c
@@ -423,7 +423,7 @@ static void bnx2i_percpu_thread_create(unsigned int cpu)
p = _cpu(bnx2i_percpu, cpu);
 
thread = kthread_create_on_node(bnx2i_percpu_io_thread, (void *)p,
-   cpu_to_node(cpu),
+   cpu_to_mem(cpu),
"bnx2i_thread/%d", cpu);
/* bind thread to the cpu */
if (likely(!IS_ERR(thread))) {
-- 
1.7.10.4

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[PATCH net-next 5/8] ethernet: amd: move pci device ids

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

Normally any device ids will be above the corresponding device driver
structure. This patch moves the pci device ids and MODULE_DEVICE_TABLE()
above the pci driver structure.

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |   16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index e2fb9e2..c47019d 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -101,7 +101,6 @@ Revision History:
 MODULE_AUTHOR("Advanced Micro Devices, Inc.");
 MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version 
"MODULE_VERS);
 MODULE_LICENSE("GPL");
-MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl);
 module_param_array(speed_duplex, int, NULL, 0);
 MODULE_PARM_DESC(speed_duplex, "Set device speed and duplex modes, 0: Auto 
Negotiate, 1: 10Mbps Half Duplex, 2: 10Mbps Full Duplex, 3: 100Mbps Half 
Duplex, 4: 100Mbps Full Duplex");
 module_param_array(coalesce, bool, NULL, 0);
@@ -109,14 +108,6 @@ MODULE_PARM_DESC(coalesce, "Enable or Disable interrupt 
coalescing, 1: Enable, 0
 module_param_array(dynamic_ipg, bool, NULL, 0);
 MODULE_PARM_DESC(dynamic_ipg, "Enable or Disable dynamic IPG, 1: Enable, 0: 
Disable");
 
-static DEFINE_PCI_DEVICE_TABLE(amd8111e_pci_tbl) = {
-
-   { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462,
-PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-   { 0, }
-
-};
-
 /* This function will read the PHY registers. */
 static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, 
u32* val)
 {
@@ -1953,6 +1944,13 @@ static void amd8111e_remove_one(struct pci_dev *pdev)
}
 }
 
+static DEFINE_PCI_DEVICE_TABLE(amd8111e_pci_tbl) = {
+   { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD8111E_7462,
+   PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+   { 0, }
+};
+MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl);
+
 static struct pci_driver amd8111e_driver = {
.name   = MODULE_NAME,
.id_table   = amd8111e_pci_tbl,
-- 
1.7.9.5

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[PATCH net-next 4/8] ethernet: amd: fix comment styles

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch fixes the comment style issues

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |  181 +--
 1 file changed, 86 insertions(+), 95 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index 2d3a55e..e2fb9e2 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -116,9 +116,8 @@ static DEFINE_PCI_DEVICE_TABLE(amd8111e_pci_tbl) = {
{ 0, }
 
 };
-/*
-This function will read the PHY registers.
-*/
+
+/* This function will read the PHY registers. */
 static int amd8111e_read_phy(struct amd8111e_priv* lp, int phy_id, int reg, 
u32* val)
 {
void __iomem *mmio = lp->mmio;
@@ -146,9 +145,7 @@ err_phy_read:
 
 }
 
-/*
-This function will write into PHY registers.
-*/
+/* This function will write into PHY registers. */
 static int amd8111e_write_phy(struct amd8111e_priv* lp,int phy_id, int reg, 
u32 val)
 {
unsigned int repeat = REPEAT_CNT;
@@ -176,9 +173,8 @@ err_phy_write:
return -EINVAL;
 
 }
-/*
-This is the mii register read function provided to the mii interface.
-*/
+
+/* This is the mii register read function provided to the mii interface. */
 static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num)
 {
struct amd8111e_priv* lp = netdev_priv(dev);
@@ -189,9 +185,7 @@ static int amd8111e_mdio_read(struct net_device * dev, int 
phy_id, int reg_num)
 
 }
 
-/*
-This is the mii register write function provided to the mii interface.
-*/
+/* This is the mii register write function provided to the mii interface. */
 static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int 
reg_num, int val)
 {
struct amd8111e_priv* lp = netdev_priv(dev);
@@ -199,9 +193,9 @@ static void amd8111e_mdio_write(struct net_device * dev, 
int phy_id, int reg_num
amd8111e_write_phy(lp, phy_id, reg_num, val);
 }
 
-/*
-This function will set PHY speed. During initialization sets the original 
speed to 100 full.
-*/
+/* This function will set PHY speed. During initialization sets
+ * the original speed to 100 full
+ */
 static void amd8111e_set_ext_phy(struct net_device *dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
@@ -240,10 +234,9 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
 
 }
 
-/*
-This function will unmap skb->data space and will free
-all transmit and receive skbuffs.
-*/
+/* This function will unmap skb->data space and will free
+ * all transmit and receive skbuffs.
+ */
 static int amd8111e_free_skbs(struct net_device *dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
@@ -274,9 +267,9 @@ static int amd8111e_free_skbs(struct net_device *dev)
return 0;
 }
 
-/*
-This will set the receive buffer length corresponding to the mtu size of 
networkinterface.
-*/
+/* This will set the receive buffer length corresponding
+ * to the mtu size of networkinterface.
+ */
 static inline void amd8111e_set_rx_buff_len(struct net_device* dev)
 {
struct amd8111e_priv* lp = netdev_priv(dev);
@@ -284,8 +277,8 @@ static inline void amd8111e_set_rx_buff_len(struct 
net_device* dev)
 
if (mtu > ETH_DATA_LEN){
/* MTU + ethernet header + FCS
-   + optional VLAN tag + skb reserve space 2 */
-
+* + optional VLAN tag + skb reserve space 2
+*/
lp->rx_buff_len = mtu + ETH_HLEN + 10;
lp->options |= OPTION_JUMBO_ENABLE;
} else{
@@ -294,8 +287,10 @@ static inline void amd8111e_set_rx_buff_len(struct 
net_device* dev)
}
 }
 
-/*
-This function will free all the previously allocated buffers, determine new 
receive buffer length  and will allocate new receive buffers. This function 
also allocates and initializes both the transmitter and receive hardware 
descriptors.
+/* This function will free all the previously allocated buffers,
+ * determine new receive buffer length  and will allocate new receive buffers.
+ * This function also allocates and initializes both the transmitter
+ * and receive hardware descriptors.
  */
 static int amd8111e_init_ring(struct net_device *dev)
 {
@@ -376,7 +371,10 @@ err_free_tx_ring:
 err_no_mem:
return -ENOMEM;
 }
-/* This function will set the interrupt coalescing according to the input 
arguments */
+
+/* This function will set the interrupt coalescing according
+ * to the input arguments
+ */
 static int amd8111e_set_coalesce(struct net_device * dev, enum coal_mode cmod)
 {
unsigned int timeout;
@@ -435,9 +433,7 @@ static int amd8111e_set_coalesce(struct net_device * dev, 
enum coal_mode cmod)
 
 }
 
-/*
-This function initializes the device registers  and starts the device.
-*/
+/* This function initializes the device registers  and starts the device. */
 static int amd8111e_restart(struct net_device *dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
@@ -513,9 +509,8 @@ 

[RFC Patch V1 20/30] mm, fcoe: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/scsi/fcoe/fcoe.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c
index 00ee0ed642aa..779a7af0e410 100644
--- a/drivers/scsi/fcoe/fcoe.c
+++ b/drivers/scsi/fcoe/fcoe.c
@@ -1257,7 +1257,7 @@ static void fcoe_percpu_thread_create(unsigned int cpu)
p = _cpu(fcoe_percpu, cpu);
 
thread = kthread_create_on_node(fcoe_percpu_receive_thread,
-   (void *)p, cpu_to_node(cpu),
+   (void *)p, cpu_to_mem(cpu),
"fcoethread/%d", cpu);
 
if (likely(!IS_ERR(thread))) {
-- 
1.7.10.4

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RE: [RFC PATCH 02/10] mtd: nand: omap: Always use chip->ecc.steps for BCH sector count

2014-07-11 Thread Gupta, Pekon
>From: Quadros, Roger
>
>Instead of hardcoding use the pre-calculated chip->ecc.steps for
>configuring number of sectors to process with the BCH algorithm.
>
>This also avoids unnecessary access to the ECC_CONFIG register in
>omap_calculate_ecc_bch().
>
>Signed-off-by: Roger Quadros 
>---
> drivers/mtd/nand/omap2.c | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
>index 5b8739c..6f3d7cd 100644
>--- a/drivers/mtd/nand/omap2.c
>+++ b/drivers/mtd/nand/omap2.c
>@@ -1066,10 +1066,10 @@ static void __maybe_unused 
>omap_enable_hwecc_bch(struct mtd_info
>*mtd, int mode)
>   unsigned int ecc_size1, ecc_size0;
>
>   /* GPMC configurations for calculating ECC */
>+  nsectors = chip->ecc.steps;
>   switch (ecc_opt) {
>   case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW:
>   bch_type = 0;
>-  nsectors = 1;
>   if (mode == NAND_ECC_READ) {
>   wr_mode   = BCH_WRAPMODE_6;
>   ecc_size0 = BCH_ECC_SIZE0;
>@@ -1082,7 +1082,6 @@ static void __maybe_unused omap_enable_hwecc_bch(struct 
>mtd_info
>*mtd, int mode)
>   break;
>   case OMAP_ECC_BCH4_CODE_HW:
>   bch_type = 0;
>-  nsectors = chip->ecc.steps;
>   if (mode == NAND_ECC_READ) {
>   wr_mode   = BCH_WRAPMODE_1;
>   ecc_size0 = BCH4R_ECC_SIZE0;
>@@ -1095,7 +1094,6 @@ static void __maybe_unused omap_enable_hwecc_bch(struct 
>mtd_info
>*mtd, int mode)
>   break;
>   case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
>   bch_type = 1;
>-  nsectors = 1;
>   if (mode == NAND_ECC_READ) {
>   wr_mode   = BCH_WRAPMODE_6;
>   ecc_size0 = BCH_ECC_SIZE0;
>@@ -1108,7 +1106,6 @@ static void __maybe_unused omap_enable_hwecc_bch(struct 
>mtd_info
>*mtd, int mode)
>   break;
>   case OMAP_ECC_BCH8_CODE_HW:
>   bch_type = 1;
>-  nsectors = chip->ecc.steps;
>   if (mode == NAND_ECC_READ) {
>   wr_mode   = BCH_WRAPMODE_1;
>   ecc_size0 = BCH8R_ECC_SIZE0;
>@@ -1121,7 +1118,6 @@ static void __maybe_unused omap_enable_hwecc_bch(struct 
>mtd_info
>*mtd, int mode)
>   break;
>   case OMAP_ECC_BCH16_CODE_HW:
>   bch_type = 0x2;
>-  nsectors = chip->ecc.steps;
>   if (mode == NAND_ECC_READ) {
>   wr_mode   = 0x01;
>   ecc_size0 = 52; /* ECC bits in nibbles per sector */
>@@ -1176,6 +1172,7 @@ static int __maybe_unused omap_calculate_ecc_bch(struct 
>mtd_info *mtd,
> {
>   struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
>  mtd);
>+  struct nand_chip *chip = mtd->priv;
>   int eccbytes= info->nand.ecc.bytes;
>   struct gpmc_nand_regs   *gpmc_regs = >reg;
>   u8 *ecc_code;
>@@ -1183,7 +1180,7 @@ static int __maybe_unused omap_calculate_ecc_bch(struct 
>mtd_info *mtd,
>   u32 val;
>   int i, j;
>
>-  nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
>+  nsectors = chip->ecc.steps;

Sorry NAK.. I'm sure you are breaking something here :-)

NAND driver supports multiple ECC schemes like;
OMAP_ECC_CODE_HAM1_HW (support for legacy reasons)
OMAP_ECC_CODE_BCH4_HW_DETECTION_SW (needed for OMAP3 and AM35xx)
OMAP_ECC_CODE_BCH4_HW
OMAP_ECC_CODE_BCH8_HW
OMAP_ECC_CODE_BCH8_HW_DETECTION_SW  (needed for OMAP3 and AM35xx)
OMAP_ECC_CODE_BCH16_HW

IIRC ..
- software based ecc-schemes OMAP_ECC_CODE_BCHx_HW_DETECTION_SW
  Reads/Write in per-sector granularity. (here nsector != chip->ecc.steps)

- hardware based ecc-schemes OMAP_ECC_CODE_BCHx_HW, perform
  Reads/Write in per-page granularity (or something like this).
  Therefore you have custom implementation of 
  chip->ecc.read_page = omap_read_page_bch()
 Also if you change the configurations here, it will break the compatibility 
with
 u-boot, so images flashed via u-boot will stop to boot in kernel and 
vice-versa.

I suggest, please refrain from these tweaks for now..
All these optimizations have been tested on multiple scenario so please test
all ecc-schemes before doing anything, otherwise you will end-up in
a bad loop of breaking and fixing NAND driver :-).


with regards, pekon
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Re: [PATCH v8 8/9] pci: Add support for creating a generic host_bridge from device tree

2014-07-11 Thread Jingoo Han
On Wednesday, July 02, 2014 3:44 AM, Liviu Dudau wrote:
> 
> Several platforms use a rather generic version of parsing
> the device tree to find the host bridge ranges. Move the common code
> into the generic PCI code and use it to create a pci_host_bridge
> structure that can be used by arch code.
> 
> Based on early attempts by Andrew Murray to unify the code.
> Used powerpc and microblaze PCI code as starting point.
> 
> Signed-off-by: Liviu Dudau 
> Tested-by: Tanmay Inamdar 
> ---
>  drivers/of/of_pci.c   | 135 
> ++
>  drivers/pci/host-bridge.c |  18 +++
>  include/linux/of_pci.h|  10 
>  include/linux/pci.h   |   8 +++
>  4 files changed, 171 insertions(+)
> 
> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
> index 8481996..55d8320 100644
> --- a/drivers/of/of_pci.c
> +++ b/drivers/of/of_pci.c

[.]

> +struct pci_host_bridge *
> +of_create_pci_host_bridge(struct device *parent, struct pci_ops *ops, void 
> *host_data)
> +{
> + int err, domain, busno;
> + struct resource *bus_range;
> + struct pci_bus *root_bus;
> + struct pci_host_bridge *bridge;
> + resource_size_t io_base;
> + LIST_HEAD(res);
> +
> + bus_range = kzalloc(sizeof(*bus_range), GFP_KERNEL);
> + if (!bus_range)
> + return ERR_PTR(-ENOMEM);
> +
> + domain = of_alias_get_id(parent->of_node, "pci-domain");
> + if (domain == -ENODEV)
> + domain = atomic_inc_return(_nr);
> +
> + err = of_pci_parse_bus_range(parent->of_node, bus_range);
> + if (err) {
> + dev_info(parent, "No bus range for %s, using default [0-255]\n",
> + parent->of_node->full_name);
> + bus_range->start = 0;
> + bus_range->end = 255;
> + bus_range->flags = IORESOURCE_BUS;
> + }
> + busno = bus_range->start;
> + pci_add_resource(, bus_range);
> +
> + /* now parse the rest of host bridge bus ranges */
> + err = pci_host_bridge_of_get_ranges(parent->of_node, , _base);
> + if (err)
> + goto err_create;
> +
> + /* then create the root bus */
> + root_bus = pci_create_root_bus_in_domain(parent, domain, busno,
> + ops, host_data, );
> + if (IS_ERR(root_bus)) {
> + err = PTR_ERR(root_bus);
> + goto err_create;
> + }
> +
> + bridge = to_pci_host_bridge(root_bus->bridge);
> + bridge->io_base = io_base;

Hi Liviu Dudau,

Would you fix the following warning?

drivers/of/of_pci.c: In function 'of_create_pci_host_bridge'
drivers/of/of_pci.c:218:18: warning: 'of_base' may be used uninitialized in 
this function [-Wmaybe-uninitialized]
  bridge->io_base = io_base;

Best regards,
Jingoo Han

[.]

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[RFC Patch V1 16/30] mm, ixgbe: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c 
b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index f5aa3311ea28..46dc083573ea 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1962,7 +1962,7 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
 
/* we can reuse buffer as-is, just make sure it is local */
-   if (likely(page_to_nid(page) == numa_node_id()))
+   if (likely(page_to_nid(page) == numa_mem_id()))
return true;
 
/* this page cannot be reused so discard it */
@@ -1974,7 +1974,7 @@ static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
rx_buffer->page_offset, size, truesize);
 
/* avoid re-using remote pages */
-   if (unlikely(page_to_nid(page) != numa_node_id()))
+   if (unlikely(page_to_nid(page) != numa_mem_id()))
return false;
 
 #if (PAGE_SIZE < 8192)
-- 
1.7.10.4

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[RFC Patch V1 17/30] mm, intel_powerclamp: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/thermal/intel_powerclamp.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/intel_powerclamp.c 
b/drivers/thermal/intel_powerclamp.c
index 95cb7fc20e17..9d9be8cd1b50 100644
--- a/drivers/thermal/intel_powerclamp.c
+++ b/drivers/thermal/intel_powerclamp.c
@@ -531,7 +531,7 @@ static int start_power_clamp(void)
 
thread = kthread_create_on_node(clamp_thread,
(void *) cpu,
-   cpu_to_node(cpu),
+   cpu_to_mem(cpu),
"kidle_inject/%ld", cpu);
/* bind to cpu here */
if (likely(!IS_ERR(thread))) {
@@ -582,7 +582,7 @@ static int powerclamp_cpu_callback(struct notifier_block 
*nfb,
case CPU_ONLINE:
thread = kthread_create_on_node(clamp_thread,
(void *) cpu,
-   cpu_to_node(cpu),
+   cpu_to_mem(cpu),
"kidle_inject/%lu", cpu);
if (likely(!IS_ERR(thread))) {
kthread_bind(thread, cpu);
-- 
1.7.10.4

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[PATCH net-next 3/8] ethernet: amd: dynamic debug fixes

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch convert printk() to netdev_dbg/info/err or dev_info/err/dbg

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |   58 ---
 1 file changed, 26 insertions(+), 32 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index 433107c..2d3a55e 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -501,8 +501,7 @@ static int amd8111e_restart(struct net_device *dev)
 
/* Enable interrupt coalesce */
if(lp->options & OPTION_INTR_COAL_ENABLE){
-   printk(KERN_INFO "%s: Interrupt Coalescing Enabled.\n",
-   dev->name);
+   netdev_info(dev, "Interrupt Coalescing Enabled");
amd8111e_set_coalesce(dev,ENABLE_COAL);
}
 
@@ -860,16 +859,19 @@ static int amd8111e_link_change(struct net_device* dev)
else if(speed == PHY_SPEED_100)
lp->link_config.speed = SPEED_100;
 
-   printk(KERN_INFO "%s: Link is Up. Speed is %s Mbps %s 
Duplex\n",dev->name,
-  (lp->link_config.speed == SPEED_100) ? "100": "10",
-  (lp->link_config.duplex == DUPLEX_FULL)? "Full": "Half");
+   netdev_info(dev, "Link is Up. Speed is %s Mbps %s Duplex\n",
+   (lp->link_config.speed == SPEED_100) ?
+   "100" : "10",
+   (lp->link_config.duplex == DUPLEX_FULL) ?
+   "Full" : "Half");
+
netif_carrier_on(dev);
}
else{
lp->link_config.speed = SPEED_INVALID;
lp->link_config.duplex = DUPLEX_INVALID;
lp->link_config.autoneg = AUTONEG_INVALID;
-   printk(KERN_INFO "%s: Link is Down.\n",dev->name);
+   netdev_info(dev, "Link is Down.\n");
netif_carrier_off(dev);
}
 
@@ -1168,7 +1170,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void 
*dev_id)
/* Schedule a polling routine */
__napi_schedule(>napi);
} else if (intren0 & RINTEN0) {
-   printk("Driver bug! interrupt while in 
poll\n");
+   netdev_dbg(dev, "Driver bug! interrupt 
while in poll\n");
/* Fix by disable receive interrupts */
writel(RINTEN0, mmio + INTEN0);
}
@@ -1264,7 +1266,7 @@ static int amd8111e_open(struct net_device * dev )
/* Start ipg timer */
if(lp->options & OPTION_DYN_IPG_ENABLE){
add_timer(>ipg_data.ipg_timer);
-   printk(KERN_INFO "%s: Dynamic IPG Enabled.\n",dev->name);
+   netdev_info(dev, "Dynamic IPG Enabled\n");
}
 
lp->opened = 1;
@@ -1623,8 +1625,8 @@ static void amd8111e_tx_timeout(struct net_device *dev)
struct amd8111e_priv* lp = netdev_priv(dev);
int err;
 
-   printk(KERN_ERR "%s: transmit timed out, resetting\n",
- dev->name);
+   netdev_err(dev, "transmit timed out, resetting\n");
+
spin_lock_irq(>lock);
err = amd8111e_restart(dev);
spin_unlock_irq(>lock);
@@ -1807,22 +1809,19 @@ static int amd8111e_probe_one(struct pci_dev *pdev,
 
err = pci_enable_device(pdev);
if(err){
-   printk(KERN_ERR "amd8111e: Cannot enable new PCI device, "
-   "exiting.\n");
+   dev_err(>dev, "Cannot enable new PCI device\n");
return err;
}
 
if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)){
-   printk(KERN_ERR "amd8111e: Cannot find PCI base address, "
-  "exiting.\n");
+   dev_err(>dev, "Cannot find PCI base address\n");
err = -ENODEV;
goto err_disable_pdev;
}
 
err = pci_request_regions(pdev, MODULE_NAME);
if(err){
-   printk(KERN_ERR "amd8111e: Cannot obtain PCI resources, "
-  "exiting.\n");
+   dev_err(>dev, "Cannot obtain PCI resources\n");
goto err_disable_pdev;
}
 
@@ -1830,16 +1829,14 @@ static int amd8111e_probe_one(struct pci_dev *pdev,
 
/* Find power-management capability. */
if (!pdev->pm_cap) {
-   printk(KERN_ERR "amd8111e: No Power Management capability, "
-  "exiting.\n");
+   dev_err(>dev, "No Power Management capability\n");
err = -ENODEV;
goto err_free_reg;
}
 
/* Initialize DMA */
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) < 0) {
-   

Re: [PATCH v2] cpufreq: Don't destroy/realloc policy/sysfs on hotplug/suspend

2014-07-11 Thread Srivatsa S. Bhat
On 07/11/2014 09:48 AM, Saravana Kannan wrote:
> The CPUfreq driver moves the cpufreq policy ownership between CPUs when
> CPUs within a cluster (CPUs sharing same policy) go ONLINE/OFFLINE. When
> moving policy ownership between CPUs, it also moves the cpufreq sysfs
> directory between CPUs and also fixes up the symlinks of the other CPUs in
> the cluster.
> 
> Also, when all the CPUs in a cluster go OFFLINE, all the sysfs nodes and
> directories are deleted, the kobject is released and the policy is freed.
> And when the first CPU in a cluster comes up, the policy is reallocated and
> initialized, kobject is acquired, the sysfs nodes are created or symlinked,
> etc.
> 
> All these steps end up creating unnecessarily complicated code and locking.
> There's no real benefit to adding/removing/moving the sysfs nodes and the
> policy between CPUs. Other per CPU sysfs directories like power and cpuidle
> are left alone during hotplug. So there's some precedence to what this
> patch is trying to do.
> 
> This patch simplifies a lot of the code and locking by removing the
> adding/removing/moving of policy/sysfs/kobj and just leaves the cpufreq
> directory and policy in place irrespective of whether the CPUs are
> ONLINE/OFFLINE.
> 
> Leaving the policy, sysfs and kobject in place also brings these additional
> benefits:
> * Faster suspend/resume.
> * Faster hotplug.
> * Sysfs file permissions maintained across hotplug without userspace
>   workarounds.
> * Policy settings and governor tunables maintained across suspend/resume
>   and hotplug.
> * Cpufreq stats would be maintained across hotplug for all CPUs and can be
>   queried even after CPU goes OFFLINE.
> 
> Change-Id: I39c395e1fee8731880c0fd7c8a9c1d83e2e4b8d0
> Tested-by: Stephen Boyd 
> Signed-off-by: Saravana Kannan 
> ---
> 
> Preliminary testing has been done. cpufreq directories are getting created
> properly. Online/offline of CPUs work. Policies remain unmodifiable from
> userspace when all policy CPUs are offline.
> 
> Error handling code has NOT been updated.
> 
> I've added a bunch of FIXME comments next to where I'm not sure about the
> locking in the existing code. I believe most of the try_lock's were present
> to prevent a deadlock between sysfs lock and the cpufreq locks. Now that
> the sysfs entries are not touched after creating them, we should be able to
> replace most/all of these try_lock's with a normal lock.
> 
> This patch has more room for code simplification, but I would like to get
> some acks for the functionality and this code before I do further
> simplification.
> 

The idea behind this work is very welcome indeed! IMHO, there is nothing
conceptually wrong in maintaining the per-cpu sysfs files across CPU hotplug
(as long as we take care to return appropriate error codes if userspace
tries to set values using the control files of offline CPUs). So, it really
boils down to whether or not we get the implementation right; the idea itself
looks fine as of now. Hence, your efforts in making this patch(set) easier to
review will certainly help. Perhaps you can simplify the code later, but at
this point, splitting up this patch into multiple smaller, reviewable pieces
(accompanied by well-written changelogs that explain the intent) is the utmost
priority. Just like Viresh, even I had a hard time reviewing all of this in
one go.

Thank you for taking up this work!

Regards,
Srivatsa S. Bhat

> I should also be able to remove get_online_cpus() in the store function and
> replace it with just a check for policy->governor_enabled. That should
> theoretically reduce some contention between cpufreq stats check and
> hotplug of unrelated CPUs.
> 
> Appreciate all the feedback.
> 
> Thanks,
> Saravana
> 
>  drivers/cpufreq/cpufreq.c | 331 
> ++
>  1 file changed, 69 insertions(+), 262 deletions(-)
> 
> diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
> index 62259d2..e350b15 100644
> --- a/drivers/cpufreq/cpufreq.c
> +++ b/drivers/cpufreq/cpufreq.c
> @@ -859,16 +859,16 @@ void cpufreq_sysfs_remove_file(const struct attribute 
> *attr)
>  }
>  EXPORT_SYMBOL(cpufreq_sysfs_remove_file);
> 
> -/* symlink affected CPUs */
> +/* symlink related CPUs */
>  static int cpufreq_add_dev_symlink(struct cpufreq_policy *policy)
>  {
> - unsigned int j;
> + unsigned int j, first_cpu = cpumask_first(policy->related_cpus);
>   int ret = 0;
> 
> - for_each_cpu(j, policy->cpus) {
> + for_each_cpu(j, policy->related_cpus) {
>   struct device *cpu_dev;
> 
> - if (j == policy->cpu)
> + if (j == first_cpu)
>   continue;
> 
>   pr_debug("Adding link for CPU: %u\n", j);
> @@ -881,12 +881,16 @@ static int cpufreq_add_dev_symlink(struct 
> cpufreq_policy *policy)
>   return ret;
>  }
> 
> -static int cpufreq_add_dev_interface(struct cpufreq_policy *policy,
> -  struct device *dev)
> 

Re: [RFC Patch V1 25/30] mm, x86, kvm: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Paolo Bonzini

Il 11/07/2014 09:37, Jiang Liu ha scritto:

When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 arch/x86/kvm/vmx.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 801332edefc3..beb7c6d5d51b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2964,7 +2964,7 @@ static __init int setup_vmcs_config(struct vmcs_config 
*vmcs_conf)

 static struct vmcs *alloc_vmcs_cpu(int cpu)
 {
-   int node = cpu_to_node(cpu);
+   int node = cpu_to_mem(cpu);
struct page *pages;
struct vmcs *vmcs;




Acked-by: Paolo Bonzini 
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Re: [PATCH v7 29/33] net: brcmfmac - set name assign type

2014-07-11 Thread Arend van Spriel
On 10-07-14 22:24, Tom Gundersen wrote:
> On Thu, Jul 10, 2014 at 10:08 PM, Arend van Spriel  wrote:
>> On 10-07-14 10:17, Tom Gundersen wrote:
>>> The name is given by the firmware, so we assume it is predictable.
>>
>> How about the scenario where one would have multiple broadcom wifi
>> devices in the system. Both driver instances would alloc_netdev with
>> predictable but also the same ifname. Wondering whether we should ignore
>> the firmware ifname altogether.
> 
> Hm, that would just fail irrespective of this patch, right? Sounds
> like ignoring the firmware names is the right thing to do.

True. I realized that when starting to type my reply. I think at the
moment we never run into the scenario that trigger this code path. Will
make a separate patch for that. Probably on top of your changes.

Regards,
Arend

> Cheers,
> 
> Tom
> 

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[PATCH net-next 1/8] ethernet: amd: move amd111e_remove_one after probe

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch moves the remove functionalities after the probe 
so that we can see the registered and released resources properly.
Every driver follows the same concept.

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |   25 +
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index 068dc7c..ddd09e8 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -1701,18 +1701,6 @@ static int amd8111e_resume(struct pci_dev *pci_dev)
return 0;
 }
 
-
-static void amd8111e_remove_one(struct pci_dev *pdev)
-{
-   struct net_device *dev = pci_get_drvdata(pdev);
-   if (dev) {
-   unregister_netdev(dev);
-   iounmap(((struct amd8111e_priv *)netdev_priv(dev))->mmio);
-   free_netdev(dev);
-   pci_release_regions(pdev);
-   pci_disable_device(pdev);
-   }
-}
 static void amd8111e_config_ipg(struct net_device* dev)
 {
struct amd8111e_priv *lp = netdev_priv(dev);
@@ -1970,6 +1958,19 @@ err_disable_pdev:
 
 }
 
+static void amd8111e_remove_one(struct pci_dev *pdev)
+{
+   struct net_device *dev = pci_get_drvdata(pdev);
+
+   if (dev) {
+   unregister_netdev(dev);
+   iounmap(((struct amd8111e_priv *)netdev_priv(dev))->mmio);
+   free_netdev(dev);
+   pci_release_regions(pdev);
+   pci_disable_device(pdev);
+   }
+}
+
 static struct pci_driver amd8111e_driver = {
.name   = MODULE_NAME,
.id_table   = amd8111e_pci_tbl,
-- 
1.7.9.5

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Re: [PATCH 1/3] usb: host: st-hcd: Add USB HCD support for STi SoCs

2014-07-11 Thread Peter Griffin
Hi Alan,

Thanks for reviewing.

On Thu, 10 Jul 2014, Alan Stern wrote:

> On Thu, 10 Jul 2014, Peter Griffin wrote:
> 
> > This driver adds support for the USB HCD present in STi
> > SoC's from STMicroelectronics. It has been tested on the
> > stih416-b2020 board.
> 
> This driver file, along with the Kconfig changes, belongs in the
> arch/platform-specific source directory.  Not in drivers/usb/host/.  
> It is, after all, a platform driver that registers two platform
> devices.

Why do think that?

AFAIK certainly for ARM we are trying NOT to add code
under the arch/platform directorys and get the code into the relevant 
subsystems.

In order to prove the above if you look in drivers/usb/host/ there are many 
other 
similar platform drivers for other SoC families: -
bcma-hcd.c
ehci-atmel.c
ssb-hcd.c
ehci-exynos.c
ehci-fsl.c
ehci-mxc.c 
ehci-omap.c
ehci-orion.c
ohci-nxp.c
and more, but you get the idea. In short I believe this to be the correct 
directory :-)

> 
> > +++ b/drivers/usb/host/Kconfig
> > @@ -753,6 +753,23 @@ config USB_HCD_SSB
> >  
> >   If unsure, say N.
> >  
> > +config USB_HCD_ST
> > +   tristate "STMicroelectronics STi family HCD support"
> 
> Why does this need to be tristate?  Why not always build it into the 
> kernel?  Or at least make it boolean rather than tristate.

Building as a module is useful on these embedded SoCs usually as a mechanism 
for speeding up boot time.
Anything which isn't critical to getting the core functionality of the device 
going (in this case decoding
TV and outputting on HDMI), can be deffered to a later point. Things like USB 
drivers, can then be loaded in
after that point (deffered module loading), to give the appearence of 'instant 
on' (which in consumer electronics
is what everyone wishes to achieve).

Going back to my examples above, most of these platforms are also defined as 
tristate.

> 
> > +   depends on ARCH_STI
> > +   select USB_OHCI_HCD_PLATFORM if USB_OHCI_HCD
> > +   select USB_EHCI_HCD_PLATFORM if USB_EHCI_HCD
> > +   select MFD_SYSCON
> > +   select GENERIC_PHY
> > +   help
> > + Enable support for the EHCI and OCHI host controller on ST
> 
> s/OCHI/OHCI/

Good spot, will fix in V2

> 
> > + consumer electronics SoCs.
> > +
> > + It converts the ST driver into two platform device drivers
> 
> It converts the ST driver?  That doesn't sound right at all.  You could 
> eliminate this paragraph completely and nobody would miss it.

I agree the wording is a little off there, I can remove or re-phrase it. What 
it is trying to express
is that it is slightly different to some other platform drivers, in that it 
creates two platform drivers one
for the ehci controller and the other for the OHCI controller. From looking at 
other drivers in this directory 
this driver is quite similar to USB_HCD_BCMA, which also deemed it noteworthy 
to mention in the help, although
phrased somewhat more succinctly.

regards,

Peter.
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[PATCH net-next 2/8] ethernet: amd: use devm_ioremap()

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This patch replace ioremap() with the devm_ioremap() so that
the resource will be freed automatically with the probe failed.

Signed-off-by: Varka Bhadram 
---
 drivers/net/ethernet/amd/amd8111e.c |7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/amd/amd8111e.c 
b/drivers/net/ethernet/amd/amd8111e.c
index ddd09e8..433107c 100644
--- a/drivers/net/ethernet/amd/amd8111e.c
+++ b/drivers/net/ethernet/amd/amd8111e.c
@@ -1866,7 +1866,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev,
 
spin_lock_init(>lock);
 
-   lp->mmio = ioremap(reg_addr, reg_len);
+   lp->mmio = devm_ioremap(>dev, reg_addr, reg_len);
if (!lp->mmio) {
printk(KERN_ERR "amd8111e: Cannot map device registers, "
   "exiting\n");
@@ -1913,7 +1913,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev,
if (err) {
printk(KERN_ERR "amd8111e: Cannot register net device, "
   "exiting.\n");
-   goto err_iounmap;
+   goto err_free_dev;
}
 
pci_set_drvdata(pdev, dev);
@@ -1943,8 +1943,6 @@ static int amd8111e_probe_one(struct pci_dev *pdev,
printk(KERN_INFO "%s: Couldn't detect MII PHY, assuming address 
0x01\n",
   dev->name);
return 0;
-err_iounmap:
-   iounmap(lp->mmio);
 
 err_free_dev:
free_netdev(dev);
@@ -1964,7 +1962,6 @@ static void amd8111e_remove_one(struct pci_dev *pdev)
 
if (dev) {
unregister_netdev(dev);
-   iounmap(((struct amd8111e_priv *)netdev_priv(dev))->mmio);
free_netdev(dev);
pci_release_regions(pdev);
pci_disable_device(pdev);
-- 
1.7.9.5

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Re: [PATCH net-next 8/8] ethernet: amd: switch case fixes

2014-07-11 Thread Geert Uytterhoeven
On Fri, Jul 11, 2014 at 9:35 AM,   wrote:
> --- a/drivers/net/ethernet/amd/amd8111e.c
> +++ b/drivers/net/ethernet/amd/amd8111e.c
> @@ -197,23 +197,24 @@ static void amd8111e_set_ext_phy(struct net_device *dev)
> advert = amd8111e_mdio_read(dev, lp->ext_phy_addr, MII_ADVERTISE);
> tmp = advert & ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
> switch (lp->ext_phy_option) {
> -   default:

Behavior change from fall through and consider as auto-negotation...

> -   case SPEED_AUTONEG: /* advertise all values */
> -   tmp |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
> -   ADVERTISE_100HALF | ADVERTISE_100FULL);
> -   break;
> -   case SPEED10_HALF:
> -   tmp |= ADVERTISE_10HALF;
> -   break;
> -   case SPEED10_FULL:
> -   tmp |= ADVERTISE_10FULL;
> -   break;
> -   case SPEED100_HALF:
> -   tmp |= ADVERTISE_100HALF;
> -   break;
> -   case SPEED100_FULL:
> -   tmp |= ADVERTISE_100FULL;
> -   break;
> +   case SPEED_AUTONEG: /* advertise all values */
> +   tmp |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
> +   ADVERTISE_100HALF | ADVERTISE_100FULL);
> +   break;
> +   case SPEED10_HALF:
> +   tmp |= ADVERTISE_10HALF;
> +   break;
> +   case SPEED10_FULL:
> +   tmp |= ADVERTISE_10FULL;
> +   break;
> +   case SPEED100_HALF:
> +   tmp |= ADVERTISE_100HALF;
> +   break;
> +   case SPEED100_FULL:
> +   tmp |= ADVERTISE_100FULL;
> +   break;
> +   default:

... to do nothing.

> +   break;
> }

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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[RFC Patch V1 08/30] mm, thp: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 mm/huge_memory.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 33514d88fef9..3307dd840873 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -822,7 +822,7 @@ int do_huge_pmd_anonymous_page(struct mm_struct *mm, struct 
vm_area_struct *vma,
return 0;
}
page = alloc_hugepage_vma(transparent_hugepage_defrag(vma),
-   vma, haddr, numa_node_id(), 0);
+   vma, haddr, numa_mem_id(), 0);
if (unlikely(!page)) {
count_vm_event(THP_FAULT_FALLBACK);
return VM_FAULT_FALLBACK;
@@ -,7 +,7 @@ alloc:
if (transparent_hugepage_enabled(vma) &&
!transparent_hugepage_debug_cow())
new_page = alloc_hugepage_vma(transparent_hugepage_defrag(vma),
- vma, haddr, numa_node_id(), 0);
+ vma, haddr, numa_mem_id(), 0);
else
new_page = NULL;
 
@@ -1255,7 +1255,7 @@ int do_huge_pmd_numa_page(struct mm_struct *mm, struct 
vm_area_struct *vma,
struct anon_vma *anon_vma = NULL;
struct page *page;
unsigned long haddr = addr & HPAGE_PMD_MASK;
-   int page_nid = -1, this_nid = numa_node_id();
+   int page_nid = -1, this_nid = numa_mem_id();
int target_nid, last_cpupid = -1;
bool page_locked;
bool migrated = false;
-- 
1.7.10.4

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[RFC Patch V1 11/30] mm, char/mspec.c: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/char/mspec.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/char/mspec.c b/drivers/char/mspec.c
index f1d7fa45c275..20e893cde9fd 100644
--- a/drivers/char/mspec.c
+++ b/drivers/char/mspec.c
@@ -206,7 +206,7 @@ mspec_fault(struct vm_area_struct *vma, struct vm_fault 
*vmf)
 
maddr = (volatile unsigned long) vdata->maddr[index];
if (maddr == 0) {
-   maddr = uncached_alloc_page(numa_node_id(), 1);
+   maddr = uncached_alloc_page(numa_mem_id(), 1);
if (maddr == 0)
return VM_FAULT_OOM;
 
-- 
1.7.10.4

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[RFC Patch V1 03/30] mm, net: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 net/core/dev.c |6 +++---
 net/core/flow.c|2 +-
 net/core/pktgen.c  |   10 +-
 net/core/sysctl_net_core.c |2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/net/core/dev.c b/net/core/dev.c
index 30eedf677913..e4c1e84374b7 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1910,7 +1910,7 @@ static struct xps_map *expand_xps_map(struct xps_map *map,
 
/* Need to allocate new map to store queue on this CPU's map */
new_map = kzalloc_node(XPS_MAP_SIZE(alloc_len), GFP_KERNEL,
-  cpu_to_node(cpu));
+  cpu_to_mem(cpu));
if (!new_map)
return NULL;
 
@@ -1973,8 +1973,8 @@ int netif_set_xps_queue(struct net_device *dev, const 
struct cpumask *mask,
map->queues[map->len++] = index;
 #ifdef CONFIG_NUMA
if (numa_node_id == -2)
-   numa_node_id = cpu_to_node(cpu);
-   else if (numa_node_id != cpu_to_node(cpu))
+   numa_node_id = cpu_to_mem(cpu);
+   else if (numa_node_id != cpu_to_mem(cpu))
numa_node_id = -1;
 #endif
} else if (dev_maps) {
diff --git a/net/core/flow.c b/net/core/flow.c
index a0348fde1fdf..4139dbb50cc0 100644
--- a/net/core/flow.c
+++ b/net/core/flow.c
@@ -396,7 +396,7 @@ static int flow_cache_cpu_prepare(struct flow_cache *fc, 
int cpu)
size_t sz = sizeof(struct hlist_head) * flow_cache_hash_size(fc);
 
if (!fcp->hash_table) {
-   fcp->hash_table = kzalloc_node(sz, GFP_KERNEL, 
cpu_to_node(cpu));
+   fcp->hash_table = kzalloc_node(sz, GFP_KERNEL, cpu_to_mem(cpu));
if (!fcp->hash_table) {
pr_err("NET: failed to allocate flow cache sz %zu\n", 
sz);
return -ENOMEM;
diff --git a/net/core/pktgen.c b/net/core/pktgen.c
index fc17a9d309ac..45d18f88dce4 100644
--- a/net/core/pktgen.c
+++ b/net/core/pktgen.c
@@ -2653,7 +2653,7 @@ static void pktgen_finalize_skb(struct pktgen_dev 
*pkt_dev, struct sk_buff *skb,
   (datalen/frags) : PAGE_SIZE;
while (datalen > 0) {
if (unlikely(!pkt_dev->page)) {
-   int node = numa_node_id();
+   int node = numa_mem_id();
 
if (pkt_dev->node >= 0 && (pkt_dev->flags & 
F_NODE))
node = pkt_dev->node;
@@ -2698,7 +2698,7 @@ static struct sk_buff *pktgen_alloc_skb(struct net_device 
*dev,
pkt_dev->pkt_overhead;
 
if (pkt_dev->flags & F_NODE) {
-   int node = pkt_dev->node >= 0 ? pkt_dev->node : numa_node_id();
+   int node = pkt_dev->node >= 0 ? pkt_dev->node : numa_mem_id();
 
skb = __alloc_skb(NET_SKB_PAD + size, GFP_NOWAIT, 0, node);
if (likely(skb)) {
@@ -3533,7 +3533,7 @@ static int pktgen_add_device(struct pktgen_thread *t, 
const char *ifname)
 {
struct pktgen_dev *pkt_dev;
int err;
-   int node = cpu_to_node(t->cpu);
+   int node = cpu_to_mem(t->cpu);
 
/* We don't allow a device to be on several threads */
 
@@ -3621,7 +3621,7 @@ static int __net_init pktgen_create_thread(int cpu, 
struct pktgen_net *pn)
struct task_struct *p;
 
t = kzalloc_node(sizeof(struct pktgen_thread), GFP_KERNEL,
-cpu_to_node(cpu));
+cpu_to_mem(cpu));
if (!t) {
pr_err("ERROR: out of memory, can't create new thread\n");
return -ENOMEM;
@@ -3637,7 +3637,7 @@ static int __net_init pktgen_create_thread(int cpu, 
struct pktgen_net *pn)
 
p = kthread_create_on_node(pktgen_thread_worker,
   t,
-  cpu_to_node(cpu),
+  cpu_to_mem(cpu),
   "kpktgend_%d", cpu);
if (IS_ERR(p)) {
pr_err("kernel_thread() failed for cpu %d\n", t->cpu);
diff --git a/net/core/sysctl_net_core.c b/net/core/sysctl_net_core.c
index cf9cd13509a7..1375447b833e 100644
--- a/net/core/sysctl_net_core.c
+++ b/net/core/sysctl_net_core.c
@@ -123,7 +123,7 @@ static int flow_limit_cpu_sysctl(struct ctl_table *table, 
int write,

[RFC Patch V1 13/30] mm, i40e: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/net/ethernet/intel/i40e/i40e_txrx.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c 
b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index e49f31dbd5d8..e9f6f9efd944 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -1342,7 +1342,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, 
int budget)
unsigned int total_rx_bytes = 0, total_rx_packets = 0;
u16 rx_packet_len, rx_header_len, rx_sph, rx_hbo;
u16 cleaned_count = I40E_DESC_UNUSED(rx_ring);
-   const int current_node = numa_node_id();
+   const int current_node = numa_mem_id();
struct i40e_vsi *vsi = rx_ring->vsi;
u16 i = rx_ring->next_to_clean;
union i40e_rx_desc *rx_desc;
-- 
1.7.10.4

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[RFC Patch V1 12/30] mm, IB/qib: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 drivers/infiniband/hw/qib/qib_file_ops.c |4 ++--
 drivers/infiniband/hw/qib/qib_init.c |2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c 
b/drivers/infiniband/hw/qib/qib_file_ops.c
index b15e34eeef68..55540295e0e3 100644
--- a/drivers/infiniband/hw/qib/qib_file_ops.c
+++ b/drivers/infiniband/hw/qib/qib_file_ops.c
@@ -1312,8 +1312,8 @@ static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
assign_ctxt_affinity(fp, dd);
 
numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
-   cpu_to_node(fd->rec_cpu_num) :
-   numa_node_id()) : dd->assigned_node_id;
+   cpu_to_mem(fd->rec_cpu_num) : numa_mem_id()) :
+   dd->assigned_node_id;
 
rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
 
diff --git a/drivers/infiniband/hw/qib/qib_init.c 
b/drivers/infiniband/hw/qib/qib_init.c
index 8d3c78ddc906..85ff56ad1075 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -133,7 +133,7 @@ int qib_create_ctxts(struct qib_devdata *dd)
int local_node_id = pcibus_to_node(dd->pcidev->bus);
 
if (local_node_id < 0)
-   local_node_id = numa_node_id();
+   local_node_id = numa_mem_id();
dd->assigned_node_id = local_node_id;
 
/*
-- 
1.7.10.4

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[PATCH net-next 0/8] cleanup for AMD811E ethernet driver

2014-07-11 Thread varkabhadram
From: Varka Bhadram 

This series cleanup for AMD811E ethernet driver

Varka Bhadram (8):
  ethernet: amd: move amd111e_remove_one after probe
  ethernet: amd: use devm_ioremap()
  ethernet: amd: dynamic debug fixes
  ethernet: amd: fix comment styles
  ethernet: amd: move pci device ids
  ethernet: amd: fix 'foo* bar'
  ethernet: amd: fix spaces and few coding styles
  ethernet: amd: switch case fixes

 drivers/net/ethernet/amd/amd8111e.c |  993 +--
 1 file changed, 484 insertions(+), 509 deletions(-)

-- 
1.7.9.5

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[RFC Patch V1 05/30] mm, perf: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 kernel/events/callchain.c   |2 +-
 kernel/events/core.c|2 +-
 kernel/events/ring_buffer.c |2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/kernel/events/callchain.c b/kernel/events/callchain.c
index 97b67df8fbfe..09f470a9262e 100644
--- a/kernel/events/callchain.c
+++ b/kernel/events/callchain.c
@@ -77,7 +77,7 @@ static int alloc_callchain_buffers(void)
 
for_each_possible_cpu(cpu) {
entries->cpu_entries[cpu] = kmalloc_node(size, GFP_KERNEL,
-cpu_to_node(cpu));
+cpu_to_mem(cpu));
if (!entries->cpu_entries[cpu])
goto fail;
}
diff --git a/kernel/events/core.c b/kernel/events/core.c
index a33d9a2bcbd7..bb1a5f326309 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7911,7 +7911,7 @@ static void perf_event_init_cpu(int cpu)
if (swhash->hlist_refcount > 0) {
struct swevent_hlist *hlist;
 
-   hlist = kzalloc_node(sizeof(*hlist), GFP_KERNEL, 
cpu_to_node(cpu));
+   hlist = kzalloc_node(sizeof(*hlist), GFP_KERNEL, 
cpu_to_mem(cpu));
WARN_ON(!hlist);
rcu_assign_pointer(swhash->swevent_hlist, hlist);
}
diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
index 146a5792b1d2..22128f58aa0b 100644
--- a/kernel/events/ring_buffer.c
+++ b/kernel/events/ring_buffer.c
@@ -265,7 +265,7 @@ static void *perf_mmap_alloc_page(int cpu)
struct page *page;
int node;
 
-   node = (cpu == -1) ? cpu : cpu_to_node(cpu);
+   node = (cpu == -1) ? NUMA_NO_NODE : cpu_to_mem(cpu);
page = alloc_pages_node(node, GFP_KERNEL | __GFP_ZERO, 0);
if (!page)
return NULL;
-- 
1.7.10.4

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[RFC Patch V1 02/30] mm, sched: Use cpu_to_mem()/numa_mem_id() to support memoryless node

2014-07-11 Thread Jiang Liu
When CONFIG_HAVE_MEMORYLESS_NODES is enabled, cpu_to_node()/numa_node_id()
may return a node without memory, and later cause system failure/panic
when calling kmalloc_node() and friends with returned node id.
So use cpu_to_mem()/numa_mem_id() instead to get the nearest node with
memory for the/current cpu.

If CONFIG_HAVE_MEMORYLESS_NODES is disabled, cpu_to_mem()/numa_mem_id()
is the same as cpu_to_node()/numa_node_id().

Signed-off-by: Jiang Liu 
---
 kernel/sched/core.c |8 
 kernel/sched/deadline.c |2 +-
 kernel/sched/fair.c |4 ++--
 kernel/sched/rt.c   |6 +++---
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 3bdf01b494fe..27e3af246310 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -5743,7 +5743,7 @@ build_overlap_sched_groups(struct sched_domain *sd, int 
cpu)
continue;
 
sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
-   GFP_KERNEL, cpu_to_node(cpu));
+   GFP_KERNEL, cpu_to_mem(cpu));
 
if (!sg)
goto fail;
@@ -6397,14 +6397,14 @@ static int __sdt_alloc(const struct cpumask *cpu_map)
struct sched_group_capacity *sgc;
 
sd = kzalloc_node(sizeof(struct sched_domain) + 
cpumask_size(),
-   GFP_KERNEL, cpu_to_node(j));
+   GFP_KERNEL, cpu_to_mem(j));
if (!sd)
return -ENOMEM;
 
*per_cpu_ptr(sdd->sd, j) = sd;
 
sg = kzalloc_node(sizeof(struct sched_group) + 
cpumask_size(),
-   GFP_KERNEL, cpu_to_node(j));
+   GFP_KERNEL, cpu_to_mem(j));
if (!sg)
return -ENOMEM;
 
@@ -6413,7 +6413,7 @@ static int __sdt_alloc(const struct cpumask *cpu_map)
*per_cpu_ptr(sdd->sg, j) = sg;
 
sgc = kzalloc_node(sizeof(struct sched_group_capacity) 
+ cpumask_size(),
-   GFP_KERNEL, cpu_to_node(j));
+   GFP_KERNEL, cpu_to_mem(j));
if (!sgc)
return -ENOMEM;
 
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index fc4f98b1258f..95104d363a8c 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -1559,7 +1559,7 @@ void init_sched_dl_class(void)
 
for_each_possible_cpu(i)
zalloc_cpumask_var_node(_cpu(local_cpu_mask_dl, i),
-   GFP_KERNEL, cpu_to_node(i));
+   GFP_KERNEL, cpu_to_mem(i));
 }
 
 #endif /* CONFIG_SMP */
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index fea7d3335e1f..26e75b8a52e6 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -7611,12 +7611,12 @@ int alloc_fair_sched_group(struct task_group *tg, 
struct task_group *parent)
 
for_each_possible_cpu(i) {
cfs_rq = kzalloc_node(sizeof(struct cfs_rq),
- GFP_KERNEL, cpu_to_node(i));
+ GFP_KERNEL, cpu_to_mem(i));
if (!cfs_rq)
goto err;
 
se = kzalloc_node(sizeof(struct sched_entity),
- GFP_KERNEL, cpu_to_node(i));
+ GFP_KERNEL, cpu_to_mem(i));
if (!se)
goto err_free_rq;
 
diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
index a49083192c64..88d1315c6223 100644
--- a/kernel/sched/rt.c
+++ b/kernel/sched/rt.c
@@ -184,12 +184,12 @@ int alloc_rt_sched_group(struct task_group *tg, struct 
task_group *parent)
 
for_each_possible_cpu(i) {
rt_rq = kzalloc_node(sizeof(struct rt_rq),
-GFP_KERNEL, cpu_to_node(i));
+GFP_KERNEL, cpu_to_mem(i));
if (!rt_rq)
goto err;
 
rt_se = kzalloc_node(sizeof(struct sched_rt_entity),
-GFP_KERNEL, cpu_to_node(i));
+GFP_KERNEL, cpu_to_mem(i));
if (!rt_se)
goto err_free_rq;
 
@@ -1945,7 +1945,7 @@ void __init init_sched_rt_class(void)
 
for_each_possible_cpu(i) {
zalloc_cpumask_var_node(_cpu(local_cpu_mask, i),
-   GFP_KERNEL, cpu_to_node(i));
+   GFP_KERNEL, cpu_to_mem(i));
}
 }
 #endif /* CONFIG_SMP */
-- 
1.7.10.4

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