Re: [PATCH] ARM: wire up io_pgetevents syscall
On Mon, Aug 27, 2018 at 10:05:05PM +0200, Stefan Agner wrote: > Wire up the new io_pgetevents syscall for ARM. > > Signed-off-by: Stefan Agner Looks good to me: Acked-by: Christoph Hellwig
Re: [PATCH v13 10/13] x86/sgx: Add sgx_einit() for initializing enclaves
On Mon, Aug 27, 2018 at 09:41:22PM +, Huang, Kai wrote:
> On Mon, 2018-08-27 at 21:53 +0300, Jarkko Sakkinen wrote:
> > From: Sean Christopherson
> >
> > Add a function to perform ENCLS(EINIT), which initializes an enclave,
> > which can be used by a driver for running enclaves and VMMs.
> >
> > Writing the LE hash MSRs is extraordinarily expensive, e.g. 3-4x
> > slower
> > than normal MSRs, so we use a per-cpu cache to track the last known
> > value
> > of the MSRs to avoid unnecessarily writing the MSRs with the current
> > value.
> >
> > Signed-off-by: Sean Christopherson
> > Co-developed-by: Jarkko Sakkinen
> > Signed-off-by: Jarkko Sakkinen
> > ---
> > arch/x86/include/asm/sgx.h | 2 +
> > arch/x86/kernel/cpu/intel_sgx.c | 86
> > +++--
> > 2 files changed, 85 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
> > index baf30d49b71f..c15c156436be 100644
> > --- a/arch/x86/include/asm/sgx.h
> > +++ b/arch/x86/include/asm/sgx.h
> > @@ -108,6 +108,8 @@ void sgx_free_page(struct sgx_epc_page *page);
> > void sgx_page_reclaimable(struct sgx_epc_page *page);
> > struct page *sgx_get_backing(struct file *file, pgoff_t index);
> > void sgx_put_backing(struct page *backing_page, bool write);
> > +int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken
> > *token,
> > + struct sgx_epc_page *secs_page, u64 lepubkeyhash[4]);
> >
> > #define ENCLS_FAULT_FLAG 0x4000UL
> > #define ENCLS_FAULT_FLAG_ASM "$0x4000"
> > diff --git a/arch/x86/kernel/cpu/intel_sgx.c
> > b/arch/x86/kernel/cpu/intel_sgx.c
> > index 1046478a3ab9..fe25e6805680 100644
> > --- a/arch/x86/kernel/cpu/intel_sgx.c
> > +++ b/arch/x86/kernel/cpu/intel_sgx.c
> > @@ -9,6 +9,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -38,6 +39,18 @@ static LIST_HEAD(sgx_active_page_list);
> > static DEFINE_SPINLOCK(sgx_active_page_list_lock);
> > static struct task_struct *ksgxswapd_tsk;
> > static DECLARE_WAIT_QUEUE_HEAD(ksgxswapd_waitq);
> > +static struct notifier_block sgx_pm_notifier;
> > +static u64 sgx_pm_cnt;
> > +
> > +/* The cache for the last known values of IA32_SGXLEPUBKEYHASHx MSRs
> > for each
> > + * CPU. The entries are initialized when they are first used by
> > sgx_einit().
> > + */
> > +struct sgx_lepubkeyhash {
> > + u64 msrs[4];
> > + u64 pm_cnt;
>
> May I ask why do we need pm_cnt here? In fact why do we need suspend
> staff (namely, sgx_pm_cnt above, and related code in this patch) here
> in this patch? From the patch commit message I don't see why we need PM
> staff here. Please give comment why you need PM staff, or you may
> consider to split the PM staff to another patch.
Refining the commit message probably makes more sense because without PM
code sgx_einit() would be broken. The MSRs have been reset after waking
up.
Some kind of counter is required to keep track of the power cycle. When
going to sleep the sgx_pm_cnt is increased. sgx_einit() compares the
current value of the global count to the value in the cache entry to see
whether we are in a new power cycle.
This brings up one question though: how do we deal with VM host going
to sleep? VM guest would not be aware of this.
I think the best measure would be to add a new parameter to sgx_einit()
that enforces update of the MSRs. The driver can then set this parameter
in the case when sgx_einit() returns SGX_INVALID_LICENSE. This is
coherent because the driver requires writable MSRs. It would not be
coherent to do it directly in the core because KVM does not require
writable MSRs.
>
> > +};
> > +
> > +static DEFINE_PER_CPU(struct sgx_lepubkeyhash *,
> > sgx_lepubkeyhash_cache);
> >
> > /**
> > * sgx_reclaim_pages - reclaim EPC pages from the consumers
> > @@ -328,6 +341,54 @@ void sgx_put_backing(struct page *backing_page,
> > bool write)
> > }
> > EXPORT_SYMBOL_GPL(sgx_put_backing);
> >
> > +/**
> > + * sgx_einit - initialize an enclave
> > + * @sigstruct: a pointer to the SIGSTRUCT
> > + * @token: a pointer to the EINITTOKEN
> > + * @secs_page: a pointer to the SECS EPC page
> > + * @lepubkeyhash: the desired value for IA32_SGXLEPUBKEYHASHx
> > MSRs
> > + *
> > + * Try to perform EINIT operation. If the MSRs are writable, they
> > are updated
> > + * according to @lepubkeyhash.
> > + *
> > + * Return:
> > + * 0 on success,
> > + * -errno on failure
> > + * SGX error code if EINIT fails
> > + */
> > +int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken
> > *token,
> > + struct sgx_epc_page *secs_page, u64 lepubkeyhash[4])
> > +{
> > + struct sgx_lepubkeyhash __percpu *cache;
> > + bool cache_valid;
> > + int i, ret;
> > +
> > + if (!sgx_lc_enabled)
> > + return __einit(sigstruct, token,
> > sgx_epc_addr(secs_page));
> > +
> > + cache = per_cpu(sgx_lepubkeyhash_cache, smp_processor_id()
Re: Removing entry trampoline and associated reversions
On 27/08/18 19:42, Andy Lutomirski wrote: > [gah -- accidentally hit send] > > On Mon, Aug 27, 2018 at 9:42 AM, Andy Lutomirski wrote: >> Hi all- >> >> We had an unfortunate conflict. Adrian did all the plumbing to get >> entry_trampoline to play nicelyh with kcore and perf. Meanwhile, I >> was working on getting rid of the entry trampoline. Adrian's code is >> merged and mine is finally in good shape, and there's an obvious >> conflict. >> >> So I did a bunch of reverts, all but one of which were clean. The >> series is here: >> >> https://git.kernel.org/pub/scm/linux/kernel/git/luto/linux.git/log/?h=x86/pti We are kind of stuck with the 'perf tools' changes as they are. That is because CONFIG_KASAN changes the size of the cpu entry area, which means that the kernel patches are still potentially useful for kernels from v4.15 to v4.19 incl., which in turn means we still need 'perf tools' support for them. If we didn't want to support that, we still need the tools workaround that hard-codes the trampoline addresses for v4.15 to v4.19. And possibly we would need to ensure perf.data files (and copies of kcore) with trampoline maps recorded, are still handled correctly. >> >> and the messy revert is here: > > https://git.kernel.org/pub/scm/linux/kernel/git/luto/linux.git/commit/?h=x86/pti&id=50ef6380e448650b48db979d7d1f20a325b0a273 Should be able to get rid of KCORE_REMAP and kcore_list.vaddr also. > > Is this the right approach? > You could leave the tools changes to me if you want.
Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
On Mon, Aug 27, 2018 at 7:32 PM Anson Huang wrote: > > Hi, Andrey > > Anson Huang > Best Regards! > > > > -Original Message- > > From: Andrey Smirnov > > Sent: Tuesday, August 28, 2018 7:04 AM > > To: Anson Huang > > Cc: Shawn Guo ; Sascha Hauer > > ; Sascha Hauer ; Fabio > > Estevam ; linux-arm-kernel > > ; linux-kernel > > ; dl-linux-imx > > Subject: Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for > > other i.MX platforms > > > > On Mon, Aug 27, 2018 at 3:51 PM Andrey Smirnov > > wrote: > > > > > > On Sun, Aug 5, 2018 at 11:45 PM Anson Huang > > wrote: > > > > > > > > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can > > > > reuse gpcv2 pgc driver for power domain control, this patch renames > > > > all functions and structure definitions started with "imx7" to > > > > "imx", and check machine type to pass platform specific power domain > > > > data for power domain driver, thus make > > > > gpcv2 pgc driver more generic for i.MX platforms. > > > > > > > > > > Just for the sake of > > > > Oops, forgot to type out the question I had about i.MX8MQ GPC in general. > > I've > > noticed that vendor tree for i.MX8MQ has a separate driver for GPC that > > relies > > on code in ARM Trusted Firmware binary blob to do the actual switching. Do > > you by any chances know the relation between this code and the driver I > > describe? Are they mutually exclusive or complimentary (I assume the > > former)? > > Will the ATF-based driver be eventually deprecated? > > Yes, our internal NXP tree currently put all GPC registers operation in ARM > Trusted Firmware, and > Linux kernel has a gpc-psci.c which is a virtual GPC driver to call SMC and > trap into ARM Trusted Firmware > whenever it wants to read/write GPC registers. But for upstream, we plan to > reuse i.MX7D's > GPC driver for power domain control, since the GPC registers for power domain > control are > independent with other low power mode's control registers, it is NOT > necessary to introduce > another virtual GPC driver to call ARM Trusted Firmware for power domain > control. > > So yes, ATF-based gpc driver for power domain control will be deprecated when > we upstream the ATF for > i.MX8MQ series SoCs. We prefer to reuse the i.MX7D's GPC driver in upstream > Linux kernel. If you are OK > with this, I will send out a V2 patch set to address your comments, thanks. By all means, I have no objections, the more this code can be reused the better. I just wanted to confirm if I understood the relation between two drivers and their future right, that's all. Thanks, Andrey Smirnov
Re: [PATCH] [v2] HID: add support for Apple Magic Keyboards
On Mon, Aug 27, 2018 at 10:02 PM Sean O'Brien wrote:
>
> USB device
> Vendor 05ac (Apple)
> Device 026c (Magic Keyboard with Numeric Keypad)
>
> Bluetooth devices
> Vendor 004c (Apple)
> Device 0267 (Magic Keyboard)
> Device 026c (Magic Keyboard with Numeric Keypad)
>
> Support already exists for the Magic Keyboard over USB connection.
> Add support for the Magic Keyboard over Bluetooth connection, and for
> the Magic Keyboard with Numeric Keypad over Bluetooth and USB
> connection.
>
> Signed-off-by: Sean O'Brien
> ---
Looks good now.
Reviewed-by: Benjamin Tissoires
However, now that I read it, I believe the quirk APPLE_HAS_FN could be
autodetected or at least renamed to something better (or inverted to
not have 80% of the devices that need it). Anyway, that's for someone
who will want to do it, I am not requesting this to be changed.
Cheers,
Benjamin
>
> drivers/hid/hid-apple.c | 9 -
> drivers/hid/hid-ids.h | 2 ++
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c
> index 25b7bd56ae11..1cb41992aaa1 100644
> --- a/drivers/hid/hid-apple.c
> +++ b/drivers/hid/hid-apple.c
> @@ -335,7 +335,8 @@ static int apple_input_mapping(struct hid_device *hdev,
> struct hid_input *hi,
> struct hid_field *field, struct hid_usage *usage,
> unsigned long **bit, int *max)
> {
> - if (usage->hid == (HID_UP_CUSTOM | 0x0003)) {
> + if (usage->hid == (HID_UP_CUSTOM | 0x0003) ||
> + usage->hid == (HID_UP_MSVENDOR | 0x0003)) {
> /* The fn key on Apple USB keyboards */
> set_bit(EV_REP, hi->input->evbit);
> hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN);
> @@ -472,6 +473,12 @@ static const struct hid_device_id apple_devices[] = {
> .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
> { HID_USB_DEVICE(USB_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI),
> .driver_data = APPLE_HAS_FN },
> + { HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI),
> + .driver_data = APPLE_HAS_FN },
> + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI),
> + .driver_data = APPLE_HAS_FN },
> + { HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI),
> + .driver_data = APPLE_HAS_FN },
> { HID_USB_DEVICE(USB_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_WELLSPRING_ANSI),
> .driver_data = APPLE_HAS_FN },
> { HID_USB_DEVICE(USB_VENDOR_ID_APPLE,
> USB_DEVICE_ID_APPLE_WELLSPRING_ISO),
> diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
> index 79bdf0c7e351..5dbe3fb82690 100644
> --- a/drivers/hid/hid-ids.h
> +++ b/drivers/hid/hid-ids.h
> @@ -88,6 +88,7 @@
> #define USB_DEVICE_ID_ANTON_TOUCH_PAD 0x3101
>
> #define USB_VENDOR_ID_APPLE0x05ac
> +#define BT_VENDOR_ID_APPLE 0x004c
> #define USB_DEVICE_ID_APPLE_MIGHTYMOUSE0x0304
> #define USB_DEVICE_ID_APPLE_MAGICMOUSE 0x030d
> #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD 0x030e
> @@ -157,6 +158,7 @@
> #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO 0x0256
> #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_JIS 0x0257
> #define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI 0x0267
> +#define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI 0x026c
> #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0290
> #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO0x0291
> #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS0x0292
> --
> 2.19.0.rc0.228.g281dcd1b4d0-goog
>
[PATCH] arm64: dts: qcom: sdm845: Add smp2p nodes
Add the SMP2P nodes for the remoteproc states for adsp, cdsp, mpss and
slpi.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 88
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0c9a2aa6a1b5..d977117acac4 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -230,6 +230,94 @@
hwlocks = <&tcsr_mutex 3>;
};
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 6>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ cdsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ cdsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-lpass {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 10>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ adsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ adsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-mpss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+ interrupts = ;
+ mboxes = <&apss_shared 14>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ modem_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ modem_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-slpi {
+ compatible = "qcom,smp2p";
+ qcom,smem = <481>, <430>;
+ interrupts = ;
+ mboxes = <&apss_shared 26>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <3>;
+
+ slpi_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ slpi_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.18.0
Re: [PATCH v2 2/6] reset: qcom: PDC Global (Power Domain Controller) reset controller
Hi Bjorn/Matthias,
Thanks for the review, will fix them in the next-respin.
On 2018-08-28 08:32, Bjorn Andersson wrote:
On Mon 27 Aug 17:22 PDT 2018, Matthias Kaehlcke wrote:
On Fri, Aug 24, 2018 at 06:48:56PM +0530, Sibi Sankar wrote:
> diff --git a/drivers/reset/reset-qcom-pdc.c b/drivers/reset/reset-qcom-pdc.c
[..]
> +struct qcom_pdc_desc {
> + const struct regmap_config *config;
> + const struct qcom_pdc_reset_map *resets;
> + size_t num_resets;
> +};
Not sure if this structure adds much value or just a layer of
indirection:
- .config is only accessed in _probe(), sdm845_pdc_regmap_config could
be used directly
- .resets is used in _(de)assert(), sdm845_pdc_resets could be used
directly
- .num_resets is only accessed in _probe(),
ARRAY_SIZE(sdm845_pdc_resets) could be used instead
It probably makes sense if it is planned to support reset controllers
of other SoCs with this driver.
I like this suggestion, once we need the configurability we can add the
type for it. It also shows that only .resets would need to be
referenced
by qcom_pdc_reset_data.
Will change it accordingly
> +struct qcom_pdc_reset_data {
> + struct reset_controller_dev rcdev;
> + struct regmap *regmap;
> + const struct qcom_pdc_desc *desc;
> +};
[..]
> +static int qcom_pdc_reset_probe(struct platform_device *pdev)
> +{
[..]
> + data->regmap = devm_regmap_init_mmio(dev, base, desc->config);
> + if (IS_ERR(data->regmap)) {
> + dev_err(dev, "Unable to get pdc-global regmap");
Add missing '\n'
Say 'pdc-reset' instead of 'pdc-global'? (see also my other comment
below).
This regmap is created out of the single anonymous "reg", so I think
the
error should be reduced to "Unable to initialize regmap\n".
Sure will add it but aren't we trying to regmap the entire pdc-global
register space though?
[..]
> +static const struct of_device_id qcom_pdc_reset_of_match[] = {
> + { .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_desc },
Should this be 'qcom,sdm845-pdc-reset' which is more specific than
'global' and in line with the name and purpose of the driver?
Obviously this would require to adjust the bindings doc too.
No, the binding describes the hardware block named "PDC Global",
currently implemented as a reset controller. The reason for doing this
is so that we one day can expose additional interfaces in a backwards
compatible fashion.
Regards,
Bjorn
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH] RISC-V: Mask out the F extension on systems without D
Hi Palmer,
On Mon, Aug 27, 2018 at 03:03:52PM -0700, Palmer Dabbelt wrote:
> The RISC-V Linux port doesn't support systems that have the F extension
> but don't have the D extension -- we actually don't support systems
> without D either, but Alan's patch set is rectifying that soon. For now
> I think we can leave this in a semi-broken state and just wait for
> Alan's patch set to get merged for proper non-FPU support -- the patch
> set is starting to look good, so doing something in-between doesn't seem
> like it's worth the work.
>
> I don't think it's worth fretting about support for systems with F but
> not D for now: our glibc ABIs are IMAC and IMAFDC so they probably won't
> end up being popular. We can always extend this in the future.
>
> CC: Alan Kao
> Signed-off-by: Palmer Dabbelt
> ---
> arch/riscv/kernel/cpufeature.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 17011a870044..652d102ffa06 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -57,5 +57,12 @@ void riscv_fill_hwcap(void)
> for (i = 0; i < strlen(isa); ++i)
> elf_hwcap |= isa2hwcap[(unsigned char)(isa[i])];
>
> + /* We don't support systems with F but without D, so mask those out
> + * here. */
> + if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap &
> COMPAT_HWCAP_ISA_D)) {
> + pr_info("This kernel does not support systems with F but not
> D");
> + elf_hwcap &= ~COMPAT_HWCAP_ISA_F;
> + }
> +
The commit message does address the problem and this patch does provide checks
and helpful information to users, but I wonder if we really need this patch, for
two reasons:
* Just as you mentioned, current glibc ABI does not support such a thing as
IMAFC, so probably no one has had trouble with this. To be honest, I suppose
that anybody (RISC-V enthusiasts or vendors) who really need F-only support
in kernel should get themself involved in the development by sending patches
to improve.
* There are corner cases to let a F-only machine to pass the check in this
patch. For instance, a vendor decides to name her extension ISA as doom,
and supports single-precision FP only, so her ISA string would be
IMAFCXdoom.
The variable elf_hwcap is calculated at the loop in line 57,58, the 'd'
from Xdoom would bypass the check, while the underlying machine does not
support double-precision FP.
> pr_info("elf_hwcap is 0x%lx", elf_hwcap);
> }
> --
> 2.16.4
>
I don't know if the reasons make sense to you, but anyway that's all I
would like to say about this patch.
Alan
[PATCH] remoteproc: qcom: adsp: Add SDM845 ADSP and CDSP support
Add support for booting the Audio and Compute DSPs found in Qualcomm's
SDM845 platform.
As with the previous platforms the power rail handling needs to be
updated once the appropriate support lands upstream.
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/remoteproc/qcom,adsp.txt | 2 ++
drivers/remoteproc/qcom_q6v5_pas.c | 12
2 files changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
index 728e4193f7a6..b7d058228185 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
@@ -10,6 +10,8 @@ on the Qualcomm ADSP Hexagon core.
"qcom,msm8974-adsp-pil"
"qcom,msm8996-adsp-pil"
"qcom,msm8996-slpi-pil"
+ "qcom,sdm845-adsp-pas"
+ "qcom,sdm845-cdsp-pas"
- interrupts-extended:
Usage: required
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5_pas.c
index 2478ef3cd519..53eff2afda06 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -342,6 +342,16 @@ static const struct adsp_data adsp_resource_init = {
.ssctl_id = 0x14,
};
+static const struct adsp_data cdsp_resource_init = {
+ .crash_reason_smem = 601,
+ .firmware_name = "cdsp.mdt",
+ .pas_id = 18,
+ .has_aggre2_clk = false,
+ .ssr_name = "cdsp",
+ .sysmon_name = "cdsp",
+ .ssctl_id = 0x17,
+};
+
static const struct adsp_data slpi_resource_init = {
.crash_reason_smem = 424,
.firmware_name = "slpi.mdt",
@@ -355,6 +365,8 @@ static const struct adsp_data slpi_resource_init = {
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
{ .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
{ .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
+ { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
+ { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
{ },
};
--
2.18.0
Re: [PATCH v13 02/13] x86/cpufeature: Add SGX and SGX_LC CPU features
On Tue, Aug 28, 2018 at 12:07:41AM +, Huang, Kai wrote: > > +#define X86_FEATURE_SGX_LC (16*32+30) /* supports SGX launch > > configuration */ > > Sorry if it was me who wrote the comment "SGX launch configuration". I > think we should just use "SGX launch control". :) Not sure if we should change though. The former is more self-explaining, the latter is "more official". /Jarkko
Re: [PATCH v5 2/2] media: usb: pwc: Don't use coherent DMA buffers for ISO transfer
вт, 21 авг. 2018 г. в 20:06, Matwey V. Kornilov :
>
> DMA cocherency slows the transfer down on systems without hardware
> coherent DMA.
> Instead we use noncocherent DMA memory and explicit sync at data receive
> handler.
>
> Based on previous commit the following performance benchmarks have been
> carried out. Average memcpy() data transfer rate (rate) and handler
> completion time (time) have been measured when running video stream at
> 640x480 resolution at 10fps.
>
> x86_64 based system (Intel Core i5-3470). This platform has hardware
> coherent DMA support and proposed change doesn't make big difference here.
>
> * kmalloc:rate = (2.0 +- 0.4) GBps
>time = (5.0 +- 3.0) usec
> * usb_alloc_coherent: rate = (3.4 +- 1.2) GBps
>time = (3.5 +- 3.0) usec
>
> We see that the measurements agree within error ranges in this case.
> So theoretically predicted performance downgrade cannot be reliably
> measured here.
>
> armv7l based system (TI AM335x BeagleBone Black @ 300MHz). This platform
> has no hardware coherent DMA support. DMA coherence is implemented via
> disabled page caching that slows down memcpy() due to memory controller
> behaviour.
>
> * kmalloc:rate = (114 +- 5) MBps
>time = (84 +- 4) usec
> * usb_alloc_coherent: rate = (28.1 +- 0.1) MBps
>time = (341 +- 2) usec
>
> Note, that quantative difference leads (this commit leads to 4 times
> acceleration) to qualitative behavior change in this case. As it was
> stated before, the video stream cannot be successfully received at AM335x
> platforms with MUSB based USB host controller due to performance issues
> [1].
>
> [1] https://www.spinics.net/lists/linux-usb/msg165735.html
>
> Signed-off-by: Matwey V. Kornilov
Ping
> ---
> drivers/media/usb/pwc/pwc-if.c | 57
> --
> 1 file changed, 44 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/media/usb/pwc/pwc-if.c b/drivers/media/usb/pwc/pwc-if.c
> index 72d2897a4b9f..1360722ab423 100644
> --- a/drivers/media/usb/pwc/pwc-if.c
> +++ b/drivers/media/usb/pwc/pwc-if.c
> @@ -159,6 +159,32 @@ static const struct video_device pwc_template = {
> /***/
> /* Private functions */
>
> +static void *pwc_alloc_urb_buffer(struct device *dev,
> + size_t size, dma_addr_t *dma_handle)
> +{
> + void *buffer = kmalloc(size, GFP_KERNEL);
> +
> + if (!buffer)
> + return NULL;
> +
> + *dma_handle = dma_map_single(dev, buffer, size, DMA_FROM_DEVICE);
> + if (dma_mapping_error(dev, *dma_handle)) {
> + kfree(buffer);
> + return NULL;
> + }
> +
> + return buffer;
> +}
> +
> +static void pwc_free_urb_buffer(struct device *dev,
> + size_t size,
> + void *buffer,
> + dma_addr_t dma_handle)
> +{
> + dma_unmap_single(dev, dma_handle, size, DMA_FROM_DEVICE);
> + kfree(buffer);
> +}
> +
> static struct pwc_frame_buf *pwc_get_next_fill_buf(struct pwc_device *pdev)
> {
> unsigned long flags = 0;
> @@ -306,6 +332,11 @@ static void pwc_isoc_handler(struct urb *urb)
> /* Reset ISOC error counter. We did get here, after all. */
> pdev->visoc_errors = 0;
>
> + dma_sync_single_for_cpu(&urb->dev->dev,
> + urb->transfer_dma,
> + urb->transfer_buffer_length,
> + DMA_FROM_DEVICE);
> +
> /* vsync: 0 = don't copy data
> 1 = sync-hunt
> 2 = synched
> @@ -428,16 +459,15 @@ static int pwc_isoc_init(struct pwc_device *pdev)
> urb->dev = udev;
> urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint);
> urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
> - urb->transfer_buffer = usb_alloc_coherent(udev,
> - ISO_BUFFER_SIZE,
> - GFP_KERNEL,
> - &urb->transfer_dma);
> + urb->transfer_buffer_length = ISO_BUFFER_SIZE;
> + urb->transfer_buffer = pwc_alloc_urb_buffer(&udev->dev,
> +
> urb->transfer_buffer_length,
> +
> &urb->transfer_dma);
> if (urb->transfer_buffer == NULL) {
> PWC_ERROR("Failed to allocate urb buffer %d\n", i);
> pwc_isoc_cleanup(pdev);
> return -ENOMEM;
> }
> - urb->transfer_buffer_length = ISO_BUFFER_SIZE;
> urb->compl
Re: [PATCH] pinctrl: Convert to using %pOFn instead of device_node.name
On 27/08/2018 20:52:41-0500, Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Linus Walleij
> Cc: Dong Aisheng
> Cc: Fabio Estevam
> Cc: Shawn Guo
> Cc: Stefan Agner
> Cc: Pengutronix Kernel Team
> Cc: Sean Wang
> Cc: Matthias Brugger
> Cc: Carlo Caione
> Cc: Kevin Hilman
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Sebastian Hesselbarth
> Cc: Jean-Christophe Plagniol-Villard
> Cc: Nicolas Ferre
> Cc: Alexandre Belloni
> Cc: Heiko Stuebner
> Cc: Tony Lindgren
> Cc: Haojian Zhuang
> Cc: Patrice Chotard
> Cc: Barry Song
> Cc: Maxime Coquelin
> Cc: Alexandre Torgue
> Cc: Maxime Ripard
> Cc: Chen-Yu Tsai
> Cc: linux-g...@vger.kernel.org
> Cc: linux-media...@lists.infradead.org
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-amlo...@lists.infradead.org
> Cc: linux-rockc...@lists.infradead.org
> Cc: linux-o...@vger.kernel.org
> Signed-off-by: Rob Herring
For at91:
Reviewed-by: Alexandre Belloni
> ---
> drivers/pinctrl/berlin/berlin.c | 6 ++--
> drivers/pinctrl/freescale/pinctrl-imx.c | 7 ++--
> drivers/pinctrl/freescale/pinctrl-imx1-core.c | 12 +++
> drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 4 +--
> drivers/pinctrl/meson/pinctrl-meson.c | 2 +-
> drivers/pinctrl/mvebu/pinctrl-mvebu.c | 4 +--
> drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 ++--
> drivers/pinctrl/pinctrl-at91.c| 8 ++---
> drivers/pinctrl/pinctrl-lantiq.c | 8 ++---
> drivers/pinctrl/pinctrl-rockchip.c| 8 ++---
> drivers/pinctrl/pinctrl-rza1.c| 8 ++---
> drivers/pinctrl/pinctrl-single.c | 32 +--
> drivers/pinctrl/pinctrl-st.c | 6 ++--
> drivers/pinctrl/sirf/pinctrl-atlas7.c | 4 +--
> drivers/pinctrl/stm32/pinctrl-stm32.c | 4 +--
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 8 ++---
> drivers/pinctrl/ti/pinctrl-ti-iodelay.c | 8 ++---
> 17 files changed, 66 insertions(+), 69 deletions(-)
>
> diff --git a/drivers/pinctrl/berlin/berlin.c b/drivers/pinctrl/berlin/berlin.c
> index b5903fffb3d0..b17a03cf87be 100644
> --- a/drivers/pinctrl/berlin/berlin.c
> +++ b/drivers/pinctrl/berlin/berlin.c
> @@ -64,16 +64,14 @@ static int berlin_pinctrl_dt_node_to_map(struct
> pinctrl_dev *pctrl_dev,
> ret = of_property_read_string(node, "function", &function_name);
> if (ret) {
> dev_err(pctrl->dev,
> - "missing function property in node %s\n",
> - node->name);
> + "missing function property in node %pOFn\n", node);
> return -EINVAL;
> }
>
> ngroups = of_property_count_strings(node, "groups");
> if (ngroups < 0) {
> dev_err(pctrl->dev,
> - "missing groups property in node %s\n",
> - node->name);
> + "missing groups property in node %pOFn\n", node);
> return -EINVAL;
> }
>
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c
> b/drivers/pinctrl/freescale/pinctrl-imx.c
> index b04edc22dad7..4e8cf0e357c6 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx.c
> @@ -69,8 +69,7 @@ static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
>*/
> grp = imx_pinctrl_find_group_by_name(pctldev, np->name);
> if (!grp) {
> - dev_err(ipctl->dev, "unable to find group for node %s\n",
> - np->name);
> + dev_err(ipctl->dev, "unable to find group for node %pOFn\n",
> np);
> return -EINVAL;
> }
>
> @@ -434,7 +433,7 @@ static int imx_pinctrl_parse_groups(struct device_node
> *np,
> int i;
> u32 config;
>
> - dev_dbg(ipctl->dev, "group(%d): %s\n", index, np->name);
> + dev_dbg(ipctl->dev, "group(%d): %pOFn\n", index, np);
>
> if (info->flags & SHARE_MUX_CONF_REG)
> pin_size = FSL_PIN_SHARE_SIZE;
> @@ -544,7 +543,7 @@ static int imx_pinctrl_parse_functions(struct device_node
> *np,
> struct group_desc *grp;
> u32 i = 0;
>
> - dev_dbg(pctl->dev, "parse function(%d): %s\n", index, np->name);
> + dev_dbg(pctl->dev, "parse function(%d): %pOFn\n", index, np);
>
> func = pinmux_generic_get_function(pctl, index);
> if (!func)
> diff --git a/drivers/pinctrl/freescale/pinctrl-imx1-core.c
> b/drivers/pinctrl/freescale/pinctrl-imx1-core.c
> index deb7870b3d1a..7e29e3fecdb2 100644
> --- a/drivers/pinctrl/freescale/pinctrl-imx1-core.c
> +++ b/drivers/pinctrl/freescale/pinctrl-imx1-core.c
> @@ -233,8 +233,8 @@ static int imx1_dt_node_to_map(struct pinctrl_dev
> *pctldev,
>*/
> grp = imx1_pinctrl_find_group_by_name(info, np->name);
> if (!grp) {
> - dev_err(info->dev,
Re: [PATCH] sysctl: do not allow a 64bit value write in a 32bit knob
Hi Aristeu,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.19-rc1 next-20180827]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Aristeu-Rozanski/sysctl-do-not-allow-a-64bit-value-write-in-a-32bit-knob/20180828-043801
config: i386-randconfig-x017-201834 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
In file included from include/linux/export.h:45:0,
from include/linux/linkage.h:7,
from include/linux/kernel.h:7,
from include/linux/list.h:9,
from include/linux/module.h:9,
from kernel/sysctl.c:21:
kernel/sysctl.c: In function 'do_proc_dointvec_minmax_conv':
kernel/sysctl.c:2558:14: warning: right shift count >= width of type
[-Wshift-count-overflow]
*lvalp >> (sizeof(int) * 8))
^
include/linux/compiler.h:58:30: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> kernel/sysctl.c:2556:3: note: in expansion of macro 'if'
if ((param->min && *param->min > val) ||
^~
kernel/sysctl.c:2558:14: warning: right shift count >= width of type
[-Wshift-count-overflow]
*lvalp >> (sizeof(int) * 8))
^
include/linux/compiler.h:58:42: note: in definition of macro '__trace_if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~~~
>> kernel/sysctl.c:2556:3: note: in expansion of macro 'if'
if ((param->min && *param->min > val) ||
^~
kernel/sysctl.c:2558:14: warning: right shift count >= width of type
[-Wshift-count-overflow]
*lvalp >> (sizeof(int) * 8))
^
include/linux/compiler.h:69:16: note: in definition of macro '__trace_if'
__r = !!(cond); \
^~~~
>> kernel/sysctl.c:2556:3: note: in expansion of macro 'if'
if ((param->min && *param->min > val) ||
^~
vim +/if +2556 kernel/sysctl.c
^1da177e Linus Torvalds 2005-04-16 2548
00b7c339 Amerigo Wang 2010-05-05 2549 static int
do_proc_dointvec_minmax_conv(bool *negp, unsigned long *lvalp,
^1da177e Linus Torvalds 2005-04-16 2550
int *valp,
^1da177e Linus Torvalds 2005-04-16 2551
int write, void *data)
^1da177e Linus Torvalds 2005-04-16 2552 {
^1da177e Linus Torvalds 2005-04-16 2553 struct
do_proc_dointvec_minmax_conv_param *param = data;
^1da177e Linus Torvalds 2005-04-16 2554 if (write) {
^1da177e Linus Torvalds 2005-04-16 2555 int val = *negp ?
-*lvalp : *lvalp;
^1da177e Linus Torvalds 2005-04-16 @2556 if ((param->min &&
*param->min > val) ||
b79ce51f Aristeu Rozanski 2018-08-27 2557 (param->max &&
*param->max < val) ||
b79ce51f Aristeu Rozanski 2018-08-27 2558 *lvalp >>
(sizeof(int) * 8))
^1da177e Linus Torvalds 2005-04-16 2559 return -EINVAL;
^1da177e Linus Torvalds 2005-04-16 2560 *valp = val;
^1da177e Linus Torvalds 2005-04-16 2561 } else {
^1da177e Linus Torvalds 2005-04-16 2562 int val = *valp;
^1da177e Linus Torvalds 2005-04-16 2563 if (val < 0) {
00b7c339 Amerigo Wang 2010-05-05 2564 *negp = true;
9a5bc726 Ilya Dryomov 2015-09-09 2565 *lvalp =
-(unsigned long)val;
^1da177e Linus Torvalds 2005-04-16 2566 } else {
00b7c339 Amerigo Wang 2010-05-05 2567 *negp = false;
^1da177e Linus Torvalds 2005-04-16 2568 *lvalp =
(unsigned long)val;
^1da177e Linus Torvalds 2005-04-16 2569 }
^1da177e Linus Torvalds 2005-04-16 2570 }
^1da177e Linus Torvalds 2005-04-16 2571 return 0;
^1da177e Linus Torvalds 2005-04-16 2572 }
^1da177e Linus Torvalds 2005-04-16 2573
:: The code at line 2556 was first introduced by commit
:: 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Linux-2.6.12-rc2
:: TO: Linus Torvalds
:: CC: Linus Torvalds
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH v13 03/13] x86/cpufeatures: Add Intel-defined SGX leaf CPUID_12_EAX
On Mon, Aug 27, 2018 at 12:39:36PM -0700, Dave Hansen wrote:
> On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> > + /* Intel SGX features: level 0x0012 */
> > + if (c->cpuid_level >= 0x0012) {
> > + cpuid(0x0012, &eax, &ebx, &ecx, &edx);
> > +
> > + c->x86_capability[CPUID_12_EAX] = eax;
> > + }
>
> I've given this specific bit of feedback at least once in the past.
> These patches are not ordered properly. You introduce this in the next
> patch:
>
> +#define SGX_CPUID 0x12
Yeah, my mistake probably when squashing fixups.
/Jarkko
RE: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
Anson Huang
Best Regards!
> -Original Message-
> From: Andrey Smirnov
> Sent: Tuesday, August 28, 2018 6:51 AM
> To: Anson Huang
> Cc: Shawn Guo ; Sascha Hauer
> ; Sascha Hauer ; Fabio
> Estevam ; linux-arm-kernel
> ; linux-kernel
> ; dl-linux-imx
> Subject: Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for
> other i.MX platforms
>
> On Sun, Aug 5, 2018 at 11:45 PM Anson Huang
> wrote:
> >
> > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can reuse
> > gpcv2 pgc driver for power domain control, this patch renames all
> > functions and structure definitions started with "imx7" to "imx", and
> > check machine type to pass platform specific power domain data for
> > power domain driver, thus make
> > gpcv2 pgc driver more generic for i.MX platforms.
> >
>
> Just for the sake of
>
>
> > Signed-off-by: Anson Huang
> > ---
> > drivers/soc/imx/gpcv2.c | 68
> > +
> > 1 file changed, 40 insertions(+), 28 deletions(-)
> >
> > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index
> > 0e31465..0e33cb5 100644
> > --- a/drivers/soc/imx/gpcv2.c
> > +++ b/drivers/soc/imx/gpcv2.c
> > @@ -53,7 +53,7 @@
> >
> > #define GPC_PGC_CTRL_PCR BIT(0)
> >
> > -struct imx7_pgc_domain {
> > +struct imx_pgc_domain {
> > struct generic_pm_domain genpd;
> > struct regmap *regmap;
> > struct regulator *regulator;
> > @@ -69,11 +69,11 @@ struct imx7_pgc_domain {
> > struct device *dev;
> > };
> >
> > -static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain
> > *genpd,
> > +static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
> > bool on) {
> > - struct imx7_pgc_domain *domain = container_of(genpd,
> > - struct
> imx7_pgc_domain,
> > + struct imx_pgc_domain *domain = container_of(genpd,
> > + struct
> > + imx_pgc_domain,
> > genpd);
> > unsigned int offset = on ?
> > GPC_PU_PGC_SW_PUP_REQ :
> GPC_PU_PGC_SW_PDN_REQ; @@
> > -150,17 +150,17 @@ static int imx7_gpc_pu_pgc_sw_pxx_req(struct
> generic_pm_domain *genpd,
> > return ret;
> > }
> >
> > -static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain
> > *genpd)
> > +static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
> > {
> > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > }
> >
> > -static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain
> > *genpd)
> > +static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
> > {
> > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > }
> >
> > -static const struct imx7_pgc_domain imx7_pgc_domains[] = {
> > +static const struct imx_pgc_domain imx7_pgc_domains[] = {
> > [IMX7_POWER_DOMAIN_MIPI_PHY] = {
> > .genpd = {
> > .name = "mipi-phy",
> > @@ -198,9 +198,9 @@ static const struct imx7_pgc_domain
> imx7_pgc_domains[] = {
> > },
> > };
> >
> > -static int imx7_pgc_domain_probe(struct platform_device *pdev)
> > +static int imx_pgc_domain_probe(struct platform_device *pdev)
> > {
> > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> > int ret;
> >
> > domain->dev = &pdev->dev;
> > @@ -233,9 +233,9 @@ static int imx7_pgc_domain_probe(struct
> platform_device *pdev)
> > return ret;
> > }
> >
> > -static int imx7_pgc_domain_remove(struct platform_device *pdev)
> > +static int imx_pgc_domain_remove(struct platform_device *pdev)
> > {
> > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> >
> > of_genpd_del_provider(domain->dev->of_node);
> > pm_genpd_remove(&domain->genpd); @@ -243,23 +243,24 @@
> static
> > int imx7_pgc_domain_remove(struct platform_device *pdev)
> > return 0;
> > }
> >
> > -static const struct platform_device_id imx7_pgc_domain_id[] = {
> > - { "imx7-pgc-domain", },
> > +static const struct platform_device_id imx_pgc_domain_id[] = {
> > + { "imx-pgc-domain", },
> > { },
> > };
> >
> > -static struct platform_driver imx7_pgc_domain_driver = {
> > +static struct platform_driver imx_pgc_domain_driver = {
> > .driver = {
> > - .name = "imx7-pgc",
> > + .name = "imx-pgc",
> > },
> > - .probe= imx7_pgc_domain_probe,
> > - .remove = imx7_pgc_domain_remove,
> > - .id_table = imx7_pgc_domain_id,
> > + .probe= imx_pgc_domain_probe,
> > + .remove = imx_pgc_do
[Fwd: 11 minute NTP hw clock update racy?]
No luck on linuxppc-dev, trying LKML ... Forwarded Message From: Joakim Tjernlund To: linuxppc-dev linuxppc-dev Subject: 11 minute NTP hw clock update racy? Date: Mon, 27 Aug 2018 10:01:12 +0200 We see corrupt HW clock time every now and then(really hard to reproduce) Our RTC is a DS1388 on an I2C bus. Looking at ntp_notify_cmos_timer() and it's delayed work queue impl. I wonder if there could be a race here w.r.t reboot ? Could the 11 minute update kick in just as the system is about to reset the CPU? I am on 4.14.51, ppc32 and using the ppc_md.restart() hook which will reset the CPU immediately. Question, is safe to call ntp_notify_cmos_timer() when the work queue is already armed(like do_adjtimex() does) ? Jocke
Re: [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
On 27/08/18 11:24, Jisheng Zhang wrote:
> When using DMA, if the DMA addr spans 128MB boundary, we have to split
> the DMA transfer into two so that each one doesn't exceed the boundary.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 41 +
> 1 file changed, 41 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 1b7cd144fb01..cfbdae8703a1 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -8,21 +8,50 @@
> */
>
> #include
> +#include
> #include
> #include
> +#include
>
> #include "sdhci-pltfm.h"
>
> +#define BOUNDARY_OK(addr, len) \
> + ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> +
> struct dwcmshc_priv {
> struct clk *bus_clk;
> };
>
> +/*
> + * If DMA addr spans 128MB boundary, we split the DMA transfer into two
> + * so that each DMA transfer doesn't exceed the boundary.
> + */
> +static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
> + dma_addr_t addr, int len, unsigned int cmd)
> +{
> + int tmplen, offset;
> +
> + if (likely(!len || BOUNDARY_OK(addr, len))) {
> + sdhci_adma_write_desc(host, desc, addr, len, cmd);
> + return;
> + }
> +
> + offset = addr & (SZ_128M - 1);
> + tmplen = SZ_128M - offset;
> + sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> +
> + addr += tmplen;
> + len -= tmplen;
> + sdhci_adma_write_desc(host, desc, addr, len, cmd);
> +}
> +
> static const struct sdhci_ops sdhci_dwcmshc_ops = {
> .set_clock = sdhci_set_clock,
> .set_bus_width = sdhci_set_bus_width,
> .set_uhs_signaling = sdhci_set_uhs_signaling,
> .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> .reset = sdhci_reset,
> + .adma_write_desc= dwcmshc_adma_write_desc,
> };
>
> static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> @@ -36,12 +65,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> struct sdhci_host *host;
> struct dwcmshc_priv *priv;
> int err;
> + u32 extra;
>
> host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> sizeof(struct dwcmshc_priv));
> if (IS_ERR(host))
> return PTR_ERR(host);
>
> + /*
> + * The DMA table descriptor count is calculated as the maximum
> + * number of segments times 2, to allow for an alignment
> + * descriptor for each segment, plus 1 for a nop end descriptor,
> + * plus extra number for cross 128M boundary handling.
> + */
> + extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
The amount of RAM is not necessarily the same as the highest physical
address. I think what you really want is max_pfn or max_possible_pfn
> + if (extra > SDHCI_MAX_SEGS)
> + extra = SDHCI_MAX_SEGS;
> + host->adma_table_cnt += extra;
> +
> pltfm_host = sdhci_priv(host);
> priv = sdhci_pltfm_priv(pltfm_host);
>
>
Re: [PATCH] cpu/hotplug: Remove skip_onerr field from cpuhp_step structure
On Tue, Aug 28, 2018 at 12:24:54PM +0530, Mukesh Ojha wrote: > When notifiers were there, we were using `skip_onerr` to avoid > calling particular step startup/teardown callback in CPU up/down > rollback path, which made the hotplug a bit asymmetric. > > As notifiers are gone now after state machine introduction. So, > `skip_onerr` field is no longer valid. > > Remove it from the structure and its usage. There are indeed no users left. Acked-by: Peter Zijlstra (Intel)
Re: [PATCH] x86/alternatives: lockdep-enforce text_mutex in text_poke*()
On Tue, Aug 28, 2018 at 08:55:14AM +0200, Jiri Kosina wrote: > From: Jiri Kosina > > text_poke() and text_poke_bp() must be called with text_mutex held. > Let's put proper lockdep anotation in place instead of just mentioning > the requirement in comment. Thanks Jiri! > Reported-by: Peter Zijlstra > Signed-off-by: Jiri Kosina Acked-by: Peter Zijlstra (Intel)
Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
On Tue, Aug 28, 2018 at 12:28 AM Anson Huang wrote:
>
>
>
> Anson Huang
> Best Regards!
>
>
> > -Original Message-
> > From: Andrey Smirnov
> > Sent: Tuesday, August 28, 2018 6:51 AM
> > To: Anson Huang
> > Cc: Shawn Guo ; Sascha Hauer
> > ; Sascha Hauer ; Fabio
> > Estevam ; linux-arm-kernel
> > ; linux-kernel
> > ; dl-linux-imx
> > Subject: Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for
> > other i.MX platforms
> >
> > On Sun, Aug 5, 2018 at 11:45 PM Anson Huang
> > wrote:
> > >
> > > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can reuse
> > > gpcv2 pgc driver for power domain control, this patch renames all
> > > functions and structure definitions started with "imx7" to "imx", and
> > > check machine type to pass platform specific power domain data for
> > > power domain driver, thus make
> > > gpcv2 pgc driver more generic for i.MX platforms.
> > >
> >
> > Just for the sake of
> >
> >
> > > Signed-off-by: Anson Huang
> > > ---
> > > drivers/soc/imx/gpcv2.c | 68
> > > +
> > > 1 file changed, 40 insertions(+), 28 deletions(-)
> > >
> > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index
> > > 0e31465..0e33cb5 100644
> > > --- a/drivers/soc/imx/gpcv2.c
> > > +++ b/drivers/soc/imx/gpcv2.c
> > > @@ -53,7 +53,7 @@
> > >
> > > #define GPC_PGC_CTRL_PCR BIT(0)
> > >
> > > -struct imx7_pgc_domain {
> > > +struct imx_pgc_domain {
> > > struct generic_pm_domain genpd;
> > > struct regmap *regmap;
> > > struct regulator *regulator;
> > > @@ -69,11 +69,11 @@ struct imx7_pgc_domain {
> > > struct device *dev;
> > > };
> > >
> > > -static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain
> > > *genpd,
> > > +static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
> > > bool on) {
> > > - struct imx7_pgc_domain *domain = container_of(genpd,
> > > - struct
> > imx7_pgc_domain,
> > > + struct imx_pgc_domain *domain = container_of(genpd,
> > > + struct
> > > + imx_pgc_domain,
> > > genpd);
> > > unsigned int offset = on ?
> > > GPC_PU_PGC_SW_PUP_REQ :
> > GPC_PU_PGC_SW_PDN_REQ; @@
> > > -150,17 +150,17 @@ static int imx7_gpc_pu_pgc_sw_pxx_req(struct
> > generic_pm_domain *genpd,
> > > return ret;
> > > }
> > >
> > > -static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain
> > > *genpd)
> > > +static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
> > > {
> > > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > > }
> > >
> > > -static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain
> > > *genpd)
> > > +static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
> > > {
> > > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > > }
> > >
> > > -static const struct imx7_pgc_domain imx7_pgc_domains[] = {
> > > +static const struct imx_pgc_domain imx7_pgc_domains[] = {
> > > [IMX7_POWER_DOMAIN_MIPI_PHY] = {
> > > .genpd = {
> > > .name = "mipi-phy",
> > > @@ -198,9 +198,9 @@ static const struct imx7_pgc_domain
> > imx7_pgc_domains[] = {
> > > },
> > > };
> > >
> > > -static int imx7_pgc_domain_probe(struct platform_device *pdev)
> > > +static int imx_pgc_domain_probe(struct platform_device *pdev)
> > > {
> > > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> > > int ret;
> > >
> > > domain->dev = &pdev->dev;
> > > @@ -233,9 +233,9 @@ static int imx7_pgc_domain_probe(struct
> > platform_device *pdev)
> > > return ret;
> > > }
> > >
> > > -static int imx7_pgc_domain_remove(struct platform_device *pdev)
> > > +static int imx_pgc_domain_remove(struct platform_device *pdev)
> > > {
> > > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> > >
> > > of_genpd_del_provider(domain->dev->of_node);
> > > pm_genpd_remove(&domain->genpd); @@ -243,23 +243,24 @@
> > static
> > > int imx7_pgc_domain_remove(struct platform_device *pdev)
> > > return 0;
> > > }
> > >
> > > -static const struct platform_device_id imx7_pgc_domain_id[] = {
> > > - { "imx7-pgc-domain", },
> > > +static const struct platform_device_id imx_pgc_domain_id[] = {
> > > + { "imx-pgc-domain", },
> > > { },
> > > };
> > >
> > > -static struct platform_driver imx7_pgc_domain_driver = {
> > > +static struct platform_driver imx_pgc_domain_driver = {
> > > .drive
Re: [PATCH] mmc: Convert to using %pOFn instead of device_node.name
On 28/08/18 04:52, Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Adrian Hunter
> Cc: Hu Ziji
> Cc: Ulf Hansson
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Rob Herring
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-xenon-phy.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-xenon-phy.c
> b/drivers/mmc/host/sdhci-xenon-phy.c
> index c335052d0c02..5956e90380e8 100644
> --- a/drivers/mmc/host/sdhci-xenon-phy.c
> +++ b/drivers/mmc/host/sdhci-xenon-phy.c
> @@ -660,8 +660,8 @@ static int get_dt_pad_ctrl_data(struct sdhci_host *host,
> return 0;
>
> if (of_address_to_resource(np, 1, &iomem)) {
> - dev_err(mmc_dev(host->mmc), "Unable to find SoC PAD ctrl
> register address for %s\n",
> - np->name);
> + dev_err(mmc_dev(host->mmc), "Unable to find SoC PAD ctrl
> register address for %pOFn\n",
> + np);
> return -EINVAL;
> }
>
>
RE: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
Anson Huang
Best Regards!
> -Original Message-
> From: Andrey Smirnov
> Sent: Tuesday, August 28, 2018 4:01 PM
> To: Anson Huang
> Cc: Shawn Guo ; Sascha Hauer
> ; Sascha Hauer ; Fabio
> Estevam ; linux-arm-kernel
> ; linux-kernel
> ; dl-linux-imx
> Subject: Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more generic for
> other i.MX platforms
>
> On Tue, Aug 28, 2018 at 12:28 AM Anson Huang
> wrote:
> >
> >
> >
> > Anson Huang
> > Best Regards!
> >
> >
> > > -Original Message-
> > > From: Andrey Smirnov
> > > Sent: Tuesday, August 28, 2018 6:51 AM
> > > To: Anson Huang
> > > Cc: Shawn Guo ; Sascha Hauer
> > > ; Sascha Hauer ;
> > > Fabio Estevam ; linux-arm-kernel
> > > ; linux-kernel
> > > ; dl-linux-imx
> > > Subject: Re: [PATCH 2/2] soc: imx: gpcv2: make pgc driver more
> > > generic for other i.MX platforms
> > >
> > > On Sun, Aug 5, 2018 at 11:45 PM Anson Huang
> > > wrote:
> > > >
> > > > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can
> > > > reuse
> > > > gpcv2 pgc driver for power domain control, this patch renames all
> > > > functions and structure definitions started with "imx7" to "imx",
> > > > and check machine type to pass platform specific power domain data
> > > > for power domain driver, thus make
> > > > gpcv2 pgc driver more generic for i.MX platforms.
> > > >
> > >
> > > Just for the sake of
> > >
> > >
> > > > Signed-off-by: Anson Huang
> > > > ---
> > > > drivers/soc/imx/gpcv2.c | 68
> > > > +
> > > > 1 file changed, 40 insertions(+), 28 deletions(-)
> > > >
> > > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> > > > index
> > > > 0e31465..0e33cb5 100644
> > > > --- a/drivers/soc/imx/gpcv2.c
> > > > +++ b/drivers/soc/imx/gpcv2.c
> > > > @@ -53,7 +53,7 @@
> > > >
> > > > #define GPC_PGC_CTRL_PCR BIT(0)
> > > >
> > > > -struct imx7_pgc_domain {
> > > > +struct imx_pgc_domain {
> > > > struct generic_pm_domain genpd;
> > > > struct regmap *regmap;
> > > > struct regulator *regulator; @@ -69,11 +69,11 @@ struct
> > > > imx7_pgc_domain {
> > > > struct device *dev;
> > > > };
> > > >
> > > > -static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain
> > > > *genpd,
> > > > +static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain
> > > > +*genpd,
> > > > bool on) {
> > > > - struct imx7_pgc_domain *domain = container_of(genpd,
> > > > - struct
> > > imx7_pgc_domain,
> > > > + struct imx_pgc_domain *domain = container_of(genpd,
> > > > + struct
> > > > + imx_pgc_domain,
> > > >
> genpd);
> > > > unsigned int offset = on ?
> > > > GPC_PU_PGC_SW_PUP_REQ :
> > > GPC_PU_PGC_SW_PDN_REQ; @@
> > > > -150,17 +150,17 @@ static int imx7_gpc_pu_pgc_sw_pxx_req(struct
> > > generic_pm_domain *genpd,
> > > > return ret;
> > > > }
> > > >
> > > > -static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain
> > > > *genpd)
> > > > +static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain
> > > > +*genpd)
> > > > {
> > > > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > > > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
> > > > }
> > > >
> > > > -static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain
> > > > *genpd)
> > > > +static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain
> > > > +*genpd)
> > > > {
> > > > - return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > > > + return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
> > > > }
> > > >
> > > > -static const struct imx7_pgc_domain imx7_pgc_domains[] = {
> > > > +static const struct imx_pgc_domain imx7_pgc_domains[] = {
> > > > [IMX7_POWER_DOMAIN_MIPI_PHY] = {
> > > > .genpd = {
> > > > .name = "mipi-phy",
> > > > @@ -198,9 +198,9 @@ static const struct imx7_pgc_domain
> > > imx7_pgc_domains[] = {
> > > > },
> > > > };
> > > >
> > > > -static int imx7_pgc_domain_probe(struct platform_device *pdev)
> > > > +static int imx_pgc_domain_probe(struct platform_device *pdev)
> > > > {
> > > > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > > > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> > > > int ret;
> > > >
> > > > domain->dev = &pdev->dev;
> > > > @@ -233,9 +233,9 @@ static int imx7_pgc_domain_probe(struct
> > > platform_device *pdev)
> > > > return ret;
> > > > }
> > > >
> > > > -static int imx7_pgc_domain_remove(struct platform_device *pdev)
> > > > +static int imx_pgc_domain_remove(struct platform_device *pdev)
> > > > {
> > > > - struct imx7_pgc_domain *domain = pdev->dev.platform_data;
> > > > + struct imx_pgc_domain *domain = pdev->dev.platform_data;
> > > >
> > > > of_genpd_del_provider(
Re: [PATCH] HID: add support for Apple Magic Trackpad 2
Hi Sean,
On Tue, Aug 28, 2018 at 3:29 AM Sean O'Brien wrote:
>
> USB device
> Vendor 05ac (Apple)
> Device 0265 (Magic Trackpad 2)
> Bluetooth device
> Vendor 004c (Apple)
> Device 0265 (Magic Trackpad 2)
>
> Add support for Apple Magic Trackpad 2 over USB and bluetooth, putting
> the device in multi-touch mode.
>
> Signed-off-by: Claudio Mettler
> Signed-off-by: Marek Wyborski
> Signed-off-by: Sean O'Brien
> ---
A few nitpicks, otherwise looks good. I must confess this driver is
depressing and we could surely simplify it a lot by rewriting their
report descriptors.
>
> drivers/hid/hid-ids.h| 2 +
> drivers/hid/hid-magicmouse.c | 187 ---
> 2 files changed, 152 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
> index 79bdf0c7e351..d6d0b20cc015 100644
> --- a/drivers/hid/hid-ids.h
> +++ b/drivers/hid/hid-ids.h
> @@ -88,9 +88,11 @@
> #define USB_DEVICE_ID_ANTON_TOUCH_PAD 0x3101
>
> #define USB_VENDOR_ID_APPLE0x05ac
> +#define BT_VENDOR_ID_APPLE 0x004c
> #define USB_DEVICE_ID_APPLE_MIGHTYMOUSE0x0304
> #define USB_DEVICE_ID_APPLE_MAGICMOUSE 0x030d
> #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD 0x030e
> +#define USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 0x0265
> #define USB_DEVICE_ID_APPLE_FOUNTAIN_ANSI 0x020e
> #define USB_DEVICE_ID_APPLE_FOUNTAIN_ISO 0x020f
> #define USB_DEVICE_ID_APPLE_GEYSER_ANSI0x0214
> diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c
> index b454c4386157..34152d2d2221 100644
> --- a/drivers/hid/hid-magicmouse.c
> +++ b/drivers/hid/hid-magicmouse.c
> @@ -19,6 +19,7 @@
> #include
> #include
> #include
> +#include
Please don't. HID should not directly use the transport layer as it
will break any attempt to replay the devices through uhid.
>
> #include "hid-ids.h"
>
> @@ -54,6 +55,8 @@ module_param(report_undeciphered, bool, 0644);
> MODULE_PARM_DESC(report_undeciphered, "Report undeciphered multi-touch state
> field using a MSC_RAW event");
>
> #define TRACKPAD_REPORT_ID 0x28
> +#define TRACKPAD2_USB_REPORT_ID 0x02
> +#define TRACKPAD2_BT_REPORT_ID 0x31
> #define MOUSE_REPORT_ID0x29
> #define DOUBLE_REPORT_ID 0xf7
> /* These definitions are not precise, but they're close enough. (Bits
> @@ -91,6 +94,19 @@ MODULE_PARM_DESC(report_undeciphered, "Report undeciphered
> multi-touch state fie
> #define TRACKPAD_RES_Y \
> ((TRACKPAD_MAX_Y - TRACKPAD_MIN_Y) / (TRACKPAD_DIMENSION_Y / 100))
>
> +#define TRACKPAD2_DIMENSION_X (float)16000
> +#define TRACKPAD2_MIN_X -3678
> +#define TRACKPAD2_MAX_X 3934
> +#define TRACKPAD2_RES_X \
> + ((TRACKPAD2_MAX_X - TRACKPAD2_MIN_X) / (TRACKPAD2_DIMENSION_X / 100))
> +#define TRACKPAD2_DIMENSION_Y (float)11490
> +#define TRACKPAD2_MIN_Y -2478
> +#define TRACKPAD2_MAX_Y 2587
> +#define TRACKPAD2_RES_Y \
> + ((TRACKPAD2_MAX_Y - TRACKPAD2_MIN_Y) / (TRACKPAD2_DIMENSION_Y / 100))
> +
> +#define MAX_TOUCHES16
> +
> /**
> * struct magicmouse_sc - Tracks Magic Mouse-specific data.
> * @input: Input device through which we report events.
> @@ -115,8 +131,8 @@ struct magicmouse_sc {
> short scroll_x;
> short scroll_y;
> u8 size;
> - } touches[16];
> - int tracking_ids[16];
> + } touches[MAX_TOUCHES];
> + int tracking_ids[MAX_TOUCHES];
> };
>
> static int magicmouse_firm_touch(struct magicmouse_sc *msc)
> @@ -183,6 +199,7 @@ static void magicmouse_emit_touch(struct magicmouse_sc
> *msc, int raw_id, u8 *tda
> {
> struct input_dev *input = msc->input;
> int id, x, y, size, orientation, touch_major, touch_minor, state,
> down;
> + int pressure = 0;
>
> if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) {
> id = (tdata[6] << 2 | tdata[5] >> 6) & 0xf;
> @@ -194,7 +211,7 @@ static void magicmouse_emit_touch(struct magicmouse_sc
> *msc, int raw_id, u8 *tda
> touch_minor = tdata[4];
> state = tdata[7] & TOUCH_STATE_MASK;
> down = state != TOUCH_STATE_NONE;
> - } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */
> + } else if (input->id.product == USB_DEVICE_ID_APPLE_MAGICTRACKPAD) {
> id = (tdata[7] << 2 | tdata[6] >> 6) & 0xf;
> x = (tdata[1] << 27 | tdata[0] << 19) >> 19;
> y = -((tdata[3] << 30 | tdata[2] << 22 | tdata[1] << 14) >>
> 19);
> @@ -204,6 +221,17 @@ static void magicmouse_emit_touch(struct magicmouse_sc
> *msc, int raw_id, u8 *tda
> touch_minor = tdata[5];
> state = tdata[8] & TOUCH_STATE_MASK;
> down = state != TOUCH_STATE_NONE;
> + } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD2 */
> + id = tdata[8] & 0xf;
> + x = (tdata[1] << 27 | tdata[0] << 19) >> 19;
> + y = -((tdata[3]
Re: [PATCH v2 7/9] net: stmmac: dwmac-sun8i: fix OF child-node lookup
On Mon, Aug 27, 2018 at 10:21:51AM +0200, Johan Hovold wrote:
> Use the new of_get_compatible_child() helper to lookup the mdio-internal
> child node instead of using of_find_compatible_node(), which searches
> the entire tree from a given start node and thus can return an unrelated
> (i.e. non-child) node.
>
> This also addresses a potential use-after-free (e.g. after probe
> deferral) as the tree-wide helper drops a reference to its first
> argument (i.e. the mdio-mux node). Fortunately, this was inadvertently
> balanced by a failure to drop the mdio-mux reference after lookup.
>
> While at it, also fix the related mdio-internal- and phy-node reference
> leaks.
>
> Fixes: 634db83b8265 ("net: stmmac: dwmac-sun8i: Handle integrated/external
> MDIOs")
> Cc: Corentin Labbe
> Cc: Andrew Lunn
> Cc: Giuseppe Cavallaro
> Cc: Alexandre Torgue
> Cc: Jose Abreu
> Cc: David S. Miller
> Signed-off-by: Johan Hovold
You should have CCed sunxi maintainers
Maxime Ripard (maintainer:ARM/Allwinner sunXi SoC
support)
Chen-Yu Tsai (maintainer:ARM/Allwinner sunXi SoC support)
Since I am just back from holidays, I will test this patch this week.
Regards
Re: [PATCH v13 04/13] x86/sgx: Architectural structures
On Mon, Aug 27, 2018 at 12:41:29PM -0700, Dave Hansen wrote:
> > +/**
> > + * enum sgx_encls_leaves - return codes for ENCLS, ENCLU and ENCLV
> > + * %SGX_SUCCESS: No error.
> > + * %SGX_INVALID_SIG_STRUCT:SIGSTRUCT contains an invalid value.
> > + * %SGX_INVALID_ATTRIBUTE: Enclave is not attempting to access a resource
> > + * for which it is not authorized.
> > + * %SGX_BLKSTATE: EPC page is already blocked.
> > + * %SGX_INVALID_MEASUREMENT: SIGSTRUCT or EINITTOKEN contains an
> > incorrect
> > + * measurement.
> ...
> > +enum sgx_return_codes {
> > + SGX_SUCCESS = 0,
> > + SGX_INVALID_SIG_STRUCT = 1,
> > + SGX_INVALID_ATTRIBUTE = 2,
> > + SGX_BLKSTATE= 3,
> > + SGX_INVALID_MEASUREMENT = 4,
> ...
>
> I don't think I've ever seen this particular method of commenting
> before. It's rather verbose and duplicates the names twice, which seems
> a bit silly.
>
> Can you talk a bit about why you chose to do it this way? I'd
> personally much rather see at least some brief comments inline with the
> definitions.
The reason that I chose this was
https://www.kernel.org/doc/Documentation/kernel-doc-nano-HOWTO.txt
It is recommended in the "kernel-doc for structs, unions, enums, and
typedefs" section.
/Jarkko
Re: [PATCH v13 05/13] x86/msr: Add SGX definitions to msr-index.h
On Mon, Aug 27, 2018 at 12:42:32PM -0700, Dave Hansen wrote:
> On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> > @@ -866,10 +867,9 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
> > }
> > }
> >
> > - /* Intel SGX features: level 0x0012 */
> > - if (c->cpuid_level >= 0x0012) {
> > - cpuid(0x0012, &eax, &ebx, &ecx, &edx);
> > -
> > + /* Intel SGX features */
> > + if (c->cpuid_level >= SGX_CPUID) {
> > + cpuid(SGX_CPUID, &eax, &ebx, &ecx, &edx);
> > c->x86_capability[CPUID_12_EAX] = eax;
> > }
>
> This hunk has no apparent connection to the changelog.
Thanks for catching this, the same squashing mistake :-)
/Jarkko
Re: [PATCH] perf/x86/intel: Export mem events only if there's PEBs support
On Mon, Aug 27, 2018 at 11:06:24AM +0200, Jiri Olsa wrote:
> +static __init struct attribute **get_hsw_events_attrs(bool *alloc)
> {
> + if (boot_cpu_has(X86_FEATURE_RTM)) {
> + *alloc = true;
> + return merge_attr(hsw_events_attrs, hsw_tsx_events_attrs);
> + }
> + return hsw_events_attrs;
> }
> @@ -4357,6 +4374,15 @@ __init int intel_pmu_init(void)
> WARN_ON(!x86_pmu.format_attrs);
> }
>
> + if (x86_pmu.pebs && mem_attr) {
> + struct attribute **attr = x86_pmu.cpu_events;
> +
> + x86_pmu.cpu_events = merge_attr(x86_pmu.cpu_events, mem_attr);
> +
> + if (alloc_events)
> + kfree(attr);
> + }
> +
> if (x86_pmu.num_counters > INTEL_PMC_MAX_GENERIC) {
> WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
>x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
static __init struct attribute **
get_events_attrs(struct attribute **base,
struct attribute **mem,
struct attribute **tsx)
{
struct attribute **attrs = base;
struct attribute **old;
if (mem) {
old = attrs;
attrs = merge_attrs(attrs, mem);
if (old != base)
kfree(old);
}
if (tsx && boot_cpu_has(X86_FEATURE_RTM)) {
old = attrs;
attrs = merge_attrs(attrs, tsx);
if (old != base)
kfree(old);
}
return attrs;
}
Would that not help to concentrate things a little more?
Re: [PATCH] Revert "net: stmmac: Do not keep rearming the coalesce timer in stmmac_xmit"
Hi Jerome, On 24-08-2018 10:04, Jerome Brunet wrote: > This reverts commit 4ae0169fd1b3c792b66be58995b7e6b629919ecf. > > This change in the handling of the coalesce timer is causing regression on > (at least) amlogic platforms. > > Network will break down very quickly (a few seconds) after starting > a download. This can easily be reproduced using iperf3 for example. > > The problem has been reported on the S805, S905, S912 and A113 SoCs > (Realtek and Micrel PHYs) and it is likely impacting all Amlogics > platforms using Gbit ethernet > > No problem was seen with the platform using 10/100 only PHYs (GXL internal) > > Reverting change brings things back to normal and allows to use network > again until we better understand the problem with the coalesce timer. > > Apologies for the delayed answer but I was in FTO. I'm not sure what can be causing this but I have some questions for you: - What do you mean by "network will break down"? Do you see queue timeout? - What do you see in ethtool/ifconfig stats? Can you send me the stats before and after network break? - Is your setup multi-queue/channel? - Can you point me to the DT bindings of your setup? Thanks and Best Regards, Jose Miguel Abreu
Re: [PATCH] perf/x86/intel: Export mem events only if there's PEBs support
On Tue, Aug 28, 2018 at 10:12:32AM +0200, Peter Zijlstra wrote:
> On Mon, Aug 27, 2018 at 11:06:24AM +0200, Jiri Olsa wrote:
> > +static __init struct attribute **get_hsw_events_attrs(bool *alloc)
> > {
> > + if (boot_cpu_has(X86_FEATURE_RTM)) {
> > + *alloc = true;
> > + return merge_attr(hsw_events_attrs, hsw_tsx_events_attrs);
> > + }
> > + return hsw_events_attrs;
> > }
>
>
>
> > @@ -4357,6 +4374,15 @@ __init int intel_pmu_init(void)
> > WARN_ON(!x86_pmu.format_attrs);
> > }
> >
> > + if (x86_pmu.pebs && mem_attr) {
> > + struct attribute **attr = x86_pmu.cpu_events;
> > +
> > + x86_pmu.cpu_events = merge_attr(x86_pmu.cpu_events, mem_attr);
> > +
> > + if (alloc_events)
> > + kfree(attr);
> > + }
> > +
> > if (x86_pmu.num_counters > INTEL_PMC_MAX_GENERIC) {
> > WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
> > x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
>
>
> static __init struct attribute **
> get_events_attrs(struct attribute **base,
>struct attribute **mem,
>struct attribute **tsx)
> {
> struct attribute **attrs = base;
> struct attribute **old;
>
> if (mem) {
> old = attrs;
> attrs = merge_attrs(attrs, mem);
> if (old != base)
> kfree(old);
> }
>
> if (tsx && boot_cpu_has(X86_FEATURE_RTM)) {
> old = attrs;
> attrs = merge_attrs(attrs, tsx);
> if (old != base)
> kfree(old);
> }
>
> return attrs;
> }
>
> Would that not help to concentrate things a little more?
looks like it would ;-) will check and repost
thanks,
jirka
Re: [PATCH v13 06/13] x86/sgx: Detect Intel SGX
On Mon, Aug 27, 2018 at 12:53:59PM -0700, Dave Hansen wrote:
> > +config INTEL_SGX_CORE
> > + prompt "Intel SGX core functionality"
> > + def_bool n
> > + depends on X86_64 && CPU_SUP_INTEL
> > + help
> > + Intel Software Guard eXtensions (SGX) is a set of CPU instructions
> > + that allows ring 3 applications to create enclaves, private regions
> > + of memory that are protected, by hardware, from unauthorized access
> > + and/or modification.
>
> This is a bit comma-crazy. Also, considering some of our recent CVE
> fun, I'd probably not claim hardware protection. :)
Agreed :)
> Maybe:
>
> Intel Software Guard eXtensions (SGX) CPU feature that allows
> ring 3 applications to create enclaves: private regions
> of memory that are architecturally protected from unauthorized
> access and/or modification.
Yeah, looks way more better structured.
> > + This option enables kernel recognition of SGX, high-level management
> > + of the Enclave Page Cache (EPC), tracking and writing of SGX Launch
> > + Enclave Hash MSRs, and allows for virtualization of SGX via KVM. By
> > + iteslf, this option does not provide SGX support to userspace.
>
> itself
>
>
> > diff --git a/arch/x86/include/asm/sgx_pr.h b/arch/x86/include/asm/sgx_pr.h
> > new file mode 100644
> > index ..c68578127620
> > --- /dev/null
> > +++ b/arch/x86/include/asm/sgx_pr.h
> > @@ -0,0 +1,13 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> > +// Copyright(c) 2016-17 Intel Corporation.
> > +
> > +#ifndef _ASM_X86_SGX_PR_H
> > +#define _ASM_X86_SGX_PR_H
> > +
> > +#include
> > +#include
> > +
> > +#undef pr_fmt
> > +#define pr_fmt(fmt) "sgx: " fmt
> > +
> > +#endif /* _ASM_X86_SGX_PR_H */
>
> I don't think this belongs in a generic header. Generally, we do the
> pr_fmt stuff in .c files, not in headers. If someone includes this
> header directly or indirectly, they'll get a big surprise.
>
> If you *must* have this in a .h file, put it in
> arch/x86/kernel/cpu/intel_sgx.h or something and #include "intel_sgx.h"
> in all the .c files where you want this.
I think for intel_sgx.c (the core part) we could just manually add the
"sgx:" prefix because there are only few log messages. I would move the
definition to drivers/platform/x86/intel_sgx/sgx.h because the prefix
makes sense for all .c files there AFAIK.
> > +static __init int sgx_init(void)
> > +{
> > + unsigned long fc;
> > +
> > + if (!boot_cpu_has(X86_FEATURE_SGX))
> > + return false;
> > +
> > + if (!boot_cpu_has(X86_FEATURE_SGX1))
> > + return false;
> > +
> > + rdmsrl(MSR_IA32_FEATURE_CONTROL, fc);
> > + if (!(fc & FEATURE_CONTROL_LOCKED)) {
> > + pr_info("IA32_FEATURE_CONTROL MSR is not locked\n");
> > + return false;
> > + }
>
> This is a rather crummy error message. Doesn't this keep sgx from
> initializing? Would something like this be more informative?
>
> pr_info("failed init: IA32_FEATURE_CONTROL MSR not locked\n");
What about:
pr_err(FW_BUG "IA32_FEATURE_CONTROL MSR not locked\n");
> > + if (!(fc & FEATURE_CONTROL_SGX_ENABLE)) {
> > + pr_info("disabled by the firmware\n");
> > + return false;
> > + }
> > +
> > + if (!(fc & FEATURE_CONTROL_SGX_LE_WR))
> > + pr_info("IA32_SGXLEPUBKEYHASHn MSRs are not writable\n");
>
> How about something that might help an end user? Perhaps:
>
> pr_warn("launch configuration not available\n");
I think this message is a false flag here in the first place as KVM does
not require writable MSRs. It really should be moved to the driver.
> > + sgx_enabled = true;
> > + sgx_lc_enabled = !!(fc & FEATURE_CONTROL_SGX_LE_WR);
> > + return 0;
> > +}
> > +
> > +arch_initcall(sgx_init);
> >
>
>
/Jarkko
Re: [PATCH] nios2: Convert to using %pOFn instead of device_node.name
On Mon, 2018-08-27 at 20:52 -0500, Rob Herring wrote:
> In preparation to remove the node name pointer from struct
> device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Ley Foon Tan
> Cc: nios2-...@lists.rocketboards.org
> Signed-off-by: Rob Herring
Acked-by: Ley Foon Tan
> ---
> arch/nios2/kernel/time.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/nios2/kernel/time.c b/arch/nios2/kernel/time.c
> index ab88b6dd4679..54467d0085a1 100644
> --- a/arch/nios2/kernel/time.c
> +++ b/arch/nios2/kernel/time.c
> @@ -214,12 +214,12 @@ static int __init
> nios2_timer_get_base_and_freq(struct device_node *np,
> {
> *base = of_iomap(np, 0);
> if (!*base) {
> - pr_crit("Unable to map reg for %s\n", np->name);
> + pr_crit("Unable to map reg for %pOFn\n", np);
> return -ENXIO;
> }
>
> if (of_property_read_u32(np, "clock-frequency", freq)) {
> - pr_crit("Unable to get %s clock frequency\n", np-
> >name);
> + pr_crit("Unable to get %pOFn clock frequency\n", np);
> return -EINVAL;
> }
>
> --
> 2.17.1
>
>
>
>
> Confidentiality Notice.
> This message may contain information that is confidential or
> otherwise protected from disclosure. If you are not the intended
> recipient, you are hereby notified that any use, disclosure,
> dissemination, distribution, or copying of this message, or any
> attachments, is strictly prohibited. If you have received this
> message in error, please advise the sender by reply e-mail, and
> delete the message and any attachments. Thank you.
Re: [PATCH v13 09/13] x86/sgx: Enclave Page Cache (EPC) memory manager
On Mon, Aug 27, 2018 at 02:15:34PM -0700, Dave Hansen wrote:
> On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> > +struct sgx_epc_page_ops {
> > + bool (*get)(struct sgx_epc_page *epc_page);
> > + void (*put)(struct sgx_epc_page *epc_page);
> > + bool (*reclaim)(struct sgx_epc_page *epc_page);
> > + void (*block)(struct sgx_epc_page *epc_page);
> > + void (*write)(struct sgx_epc_page *epc_page);
> > +};
>
> Why do we need a fancy, slow (retpoline'd) set of function pointers when
> we only have one user of these (the SGX driver)?
KVM has its own implementation for these operations.
/Jarkko
[PATCH v2 0/3] RISC-V: Add new smp features
This patch series implements following smp related features. Some of the work has been inspired from ARM64. 1. Decouple linux logical cpu ids from hardware cpu id 2. Support cpu hotplug. Tested on QEMU & HighFive Unleashed board with/without SMP enabled. v1->v2: 1. Dropped cpu_ops patch. 2. Moved back IRQ cause definiations to irq.h 3. Keep boot cpu hart id and assign zero as the cpu id for boot cpu. 4. Renamed cpu id and hart id correctly. Atish Patra (3): RISC-V: Add logical CPU indexing for RISC-V RISC-V: Use Linux logical cpu number instead of hartid RISC-V: Support cpu hotplug. arch/riscv/Kconfig| 12 +- arch/riscv/include/asm/irq.h | 1 + arch/riscv/include/asm/smp.h | 33 ++- arch/riscv/include/asm/tlbflush.h | 17 ++-- arch/riscv/kernel/cpu.c | 8 ++-- arch/riscv/kernel/head.S | 17 +++- arch/riscv/kernel/irq.c | 27 +++- arch/riscv/kernel/process.c | 7 arch/riscv/kernel/setup.c | 25 ++- arch/riscv/kernel/smp.c | 51 +++ arch/riscv/kernel/smpboot.c | 87 +-- arch/riscv/kernel/traps.c | 6 +-- drivers/clocksource/riscv_timer.c | 12 -- drivers/irqchip/irq-sifive-plic.c | 11 +++-- 14 files changed, 269 insertions(+), 45 deletions(-) -- 2.7.4
[PATCH v2 3/3] RISC-V: Support cpu hotplug.
This patch enable support for cpu hotplug in RISC-V.
In absence of generic cpu stop functions, WFI is used
to put the cpu in low power state during offline. An IPI
is sent to bring it out of WFI during online operation.
Tested both on QEMU and HighFive Unleashed board with
4 cpus. Test result follows.
$ echo 0 > /sys/devices/system/cpu/cpu2/online
[ 31.828562] CPU2: shutdown
$ cat /proc/cpuinfo
hart: 0
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
hart: 1
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
hart: 3
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
$ echo 0 > /sys/devices/system/cpu/cpu3/online
[ 52.968495] CPU3: shutdown
$ cat /proc/cpuinfo
hart: 0
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
hart: 2
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
$ echo 1 > /sys/devices/system/cpu/cpu3/online
[ 64.298250] CPU3: online
$ cat /proc/cpuinfo
hart: 0
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
hart: 1
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
hart: 3
isa : rv64imafdc
mmu : sv39
uarch : sifive,rocket0
Signed-off-by: Atish Patra
---
arch/riscv/Kconfig | 12 -
arch/riscv/include/asm/irq.h | 1 +
arch/riscv/include/asm/smp.h | 15 +++
arch/riscv/kernel/head.S | 13 ++
arch/riscv/kernel/irq.c | 27 +++-
arch/riscv/kernel/process.c | 7 ++
arch/riscv/kernel/setup.c| 17 -
arch/riscv/kernel/smp.c | 8 ++
arch/riscv/kernel/smpboot.c | 59 ++--
arch/riscv/kernel/traps.c| 6 ++---
10 files changed, 157 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 4764fdeb..51c6ac8d 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -21,7 +21,6 @@ config RISCV
select COMMON_CLK
select DMA_DIRECT_OPS
select GENERIC_CLOCKEVENTS
- select GENERIC_CPU_DEVICES
select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP
select GENERIC_STRNCPY_FROM_USER
@@ -167,6 +166,17 @@ config SMP
If you don't know what to do here, say N.
+config HOTPLUG_CPU
+ bool "Support for hot-pluggable CPUs"
+ depends on SMP
+ select GENERIC_IRQ_MIGRATION
+ help
+
+ Say Y here to experiment with turning CPUs off and on. CPUs
+ can be controlled through /sys/devices/system/cpu.
+
+ Say N if you want to disable CPU hotplug.
+
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h
index 996b6fbe..a873a72d 100644
--- a/arch/riscv/include/asm/irq.h
+++ b/arch/riscv/include/asm/irq.h
@@ -19,6 +19,7 @@
void riscv_timer_interrupt(void);
void riscv_software_interrupt(void);
+void wait_for_software_interrupt(void);
#include
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index a5c257b3..5e481e69 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -29,6 +29,14 @@
extern unsigned long __cpu_logical_map[NR_CPUS];
#define cpu_logical_map(cpu)__cpu_logical_map[cpu]
+#if defined CONFIG_SMP && defined CONFIG_HOTPLUG_CPU
+void arch_send_call_wakeup_ipi(int cpu);
+bool can_hotplug_cpu(void);
+#else
+static inline bool can_hotplug_cpu(void) { return 0; }
+static inline void arch_send_call_wakeup_ipi(int cpu) { }
+#endif
+
#ifdef CONFIG_SMP
/* SMP initialization hook for setup_arch */
@@ -50,6 +58,13 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in,
struct cpumask *out);
*/
#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
+#ifdef CONFIG_HOTPLUG_CPU
+int __cpu_disable(void);
+void __cpu_die(unsigned int cpu);
+void cpu_play_dead(void);
+void boot_sec_cpu(void);
+#endif /* CONFIG_HOTPLUG_CPU */
+
#else
static inline int riscv_hartid_to_cpuid(int hartid) { return 0 ; }
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 19085349..b20edc6a 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -152,6 +152,19 @@ relocate:
j .Lsecondary_park
END(_start)
+#ifdef CONFIG_SMP
+.section .text
+.global boot_sec_cpu
+
+boot_sec_cpu:
+ /* clear all pending flags */
+ csrw sip, zero
+ /* Mask all interrupts */
+ csrw sie, zero
+ fence
+
+ tail smp_callin
+#endif
__PAGE_ALIGNED_BSS
/* Empty zero page */
.balign PAGE_SIZE
diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index 0cfac48a..5f8ba901 100644
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -23,13 +23,14 @@
* need to mask it off.
*/
#define INTERRUPT_CAUSE_FLAG (1UL << (__riscv_xlen - 1))
+#define get_scause(cause) (cause & ~INTERRUPT_CAUSE_FLAG)
asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs, unsigned long cause)
Re: [PATCH] tty:serial:imx: use spin_lock instead of spin_lock_irqsave in isr
jun qian 于2018年8月27日周一 下午10:49写道： > > Before the program enters the uart ISR, the local interrupt has been > disabled by the system, so it's not appropriate to use spin_lock_irqsave > interface in the ISR. > > Signed-off-by: jun qian many discussions have been done with jun in wechat regarding this patch. and Reviewed-by: Barry Song <21cn...@gmail.com> > --- > drivers/tty/serial/imx.c | 21 - > 1 file changed, 8 insertions(+), 13 deletions(-) >
Re: [PATCH v13 09/13] x86/sgx: Enclave Page Cache (EPC) memory manager
On Mon, Aug 27, 2018 at 02:14:24PM -0700, Dave Hansen wrote:
> On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> > +enum sgx_alloc_flags {
> > + SGX_ALLOC_ATOMIC= BIT(0),
> > +};
>
> Doing this with enums is unprecedented IMNHO. Why are you doing it this
> way for simple, one-off constants?
I'll change it to bool, thanks.
/Jarkko
[PATCH v2 2/3] RISC-V: Use Linux logical cpu number instead of hartid
Setup the cpu_logical_map during boot. Moreover, every SBI call
and PLIC context are based on the physical hartid. Use the logical
cpu to hartid mapping to pass correct hartid to respective functions.
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/tlbflush.h | 17 +
arch/riscv/kernel/cpu.c | 8 +---
arch/riscv/kernel/head.S | 4 +++-
arch/riscv/kernel/setup.c | 6 ++
arch/riscv/kernel/smp.c | 24 +++-
arch/riscv/kernel/smpboot.c | 30 ++
drivers/clocksource/riscv_timer.c | 12
drivers/irqchip/irq-sifive-plic.c | 11 +++
8 files changed, 75 insertions(+), 37 deletions(-)
diff --git a/arch/riscv/include/asm/tlbflush.h
b/arch/riscv/include/asm/tlbflush.h
index 85c2d8ba..c6b51059 100644
--- a/arch/riscv/include/asm/tlbflush.h
+++ b/arch/riscv/include/asm/tlbflush.h
@@ -16,6 +16,7 @@
#define _ASM_RISCV_TLBFLUSH_H
#include
+#include
/*
* Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction
@@ -49,13 +50,21 @@ static inline void flush_tlb_range(struct vm_area_struct
*vma,
#include
-#define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1)
+static inline void remote_sfence_vma(struct cpumask *cmask, unsigned long
start,
+unsigned long size)
+{
+ struct cpumask hmask;
+
+ riscv_cpuid_to_hartid_mask(cmask, &hmask);
+ sbi_remote_sfence_vma(hmask.bits, start, size);
+}
+
+#define flush_tlb_all() remote_sfence_vma(NULL, 0, -1)
#define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0)
#define flush_tlb_range(vma, start, end) \
- sbi_remote_sfence_vma(mm_cpumask((vma)->vm_mm)->bits, \
- start, (end) - (start))
+ remote_sfence_vma(mm_cpumask((vma)->vm_mm), start, (end) - (start))
#define flush_tlb_mm(mm) \
- sbi_remote_sfence_vma(mm_cpumask(mm)->bits, 0, -1)
+ remote_sfence_vma(mm_cpumask(mm), 0, -1)
#endif /* CONFIG_SMP */
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index ca6c81e5..4684b915 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
/* Return -1 if not a valid hart */
int riscv_of_processor_hart(struct device_node *node)
@@ -78,11 +79,12 @@ static void c_stop(struct seq_file *m, void *v)
static int c_show(struct seq_file *m, void *v)
{
- unsigned long hart_id = (unsigned long)v - 1;
- struct device_node *node = of_get_cpu_node(hart_id, NULL);
+ unsigned long cpu_id = (unsigned long)v - 1;
+ struct device_node *node = of_get_cpu_node(cpu_logical_map(cpu_id),
+ NULL);
const char *compat, *isa, *mmu;
- seq_printf(m, "hart\t: %lu\n", hart_id);
+ seq_printf(m, "hart\t: %lu\n", cpu_id);
if (!of_property_read_string(node, "riscv,isa", &isa)
&& isa[0] == 'r'
&& isa[1] == 'v')
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index d1beecf1..19085349 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -47,6 +47,8 @@ ENTRY(_start)
/* Save hart ID and DTB physical address */
mv s0, a0
mv s1, a1
+ la a2, boot_cpu_hartid
+ REG_S a0, (a2)
/* Initialize page tables and relocate to virtual addresses */
la sp, init_thread_union + THREAD_SIZE
@@ -55,7 +57,7 @@ ENTRY(_start)
/* Restore C environment */
la tp, init_task
- sw s0, TASK_TI_CPU(tp)
+ sw zero, TASK_TI_CPU(tp)
la sp, init_thread_union
li a0, ASM_THREAD_SIZE
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index 7b52b4cd..4af7952c 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -81,9 +81,15 @@ EXPORT_SYMBOL(empty_zero_page);
/* The lucky hart to first increment this variable will boot the other cores */
atomic_t hart_lottery;
+unsigned long boot_cpu_hartid;
unsigned long __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] =
INVALID_HARTID };
+void __init smp_setup_processor_id(void)
+{
+ cpu_logical_map(0) = boot_cpu_hartid;
+}
+
#ifdef CONFIG_BLK_DEV_INITRD
static void __init setup_initrd(void)
{
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index 9b288c9a..82da5c4c 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -97,14 +97,18 @@ void riscv_software_interrupt(void)
static void
send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type
operation)
{
- int i;
+ int cpuid, hartid;
+ struct cpumask hartid_mask;
+ cpumask_clear(&hartid_mask);
mb();
- for_each_cpu(i, to_whom)
- set_bit(operation, &ipi_data[i].bits);
-
+ for_each_cpu(cpuid, to_whom) {
+ set_bit(operation, &ipi_data[cpuid].bits);
+ hartid = cpu_
[PATCH v2 1/3] RISC-V: Add logical CPU indexing for RISC-V
Currently, both linux cpu id and hardware cpu id are same.
This is not recommended as it will lead to discontinuous cpu
indexing in Linux. Moreover, kdump kernel will run from CPU0
which would be absent if we follow existing scheme.
Implement a logical mapping between Linux cpu id and hardware
cpuid to decouple these two. Always mark the boot processor as
cpu0 and all other cpus get the logical cpu id based on their
booting order.
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/smp.h | 18 +-
arch/riscv/kernel/setup.c| 2 ++
arch/riscv/kernel/smp.c | 19 +++
3 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 36016845..a5c257b3 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -22,6 +22,13 @@
#include
#include
+#define INVALID_HARTID -1
+/*
+ * Mapping between linux logical cpu index and hartid.
+ */
+extern unsigned long __cpu_logical_map[NR_CPUS];
+#define cpu_logical_map(cpu)__cpu_logical_map[cpu]
+
#ifdef CONFIG_SMP
/* SMP initialization hook for setup_arch */
@@ -33,6 +40,8 @@ void arch_send_call_function_ipi_mask(struct cpumask *mask);
/* Hook for the generic smp_call_function_single() routine. */
void arch_send_call_function_single_ipi(int cpu);
+int riscv_hartid_to_cpuid(int hartid);
+void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out);
/*
* This is particularly ugly: it appears we can't actually get the definition
* of task_struct here, but we need access to the CPU this task is running on.
@@ -41,6 +50,13 @@ void arch_send_call_function_single_ipi(int cpu);
*/
#define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
-#endif /* CONFIG_SMP */
+#else
+
+static inline int riscv_hartid_to_cpuid(int hartid) { return 0 ; }
+static inline void riscv_cpuid_to_hartid_mask(const struct cpumask *in,
+ struct cpumask *out) {
+ cpumask_set_cpu(cpu_logical_map(0), out);
+}
+#endif /* CONFIG_SMP */
#endif /* _ASM_RISCV_SMP_H */
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index db20dc63..7b52b4cd 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -82,6 +82,8 @@ EXPORT_SYMBOL(empty_zero_page);
/* The lucky hart to first increment this variable will boot the other cores */
atomic_t hart_lottery;
+unsigned long __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] =
INVALID_HARTID };
+
#ifdef CONFIG_BLK_DEV_INITRD
static void __init setup_initrd(void)
{
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index 906fe21e..9b288c9a 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -38,7 +38,26 @@ enum ipi_message_type {
IPI_MAX
};
+int riscv_hartid_to_cpuid(int hartid)
+{
+ int i = -1;
+
+ for (i = 0; i < NR_CPUS; i++)
+ if (cpu_logical_map(i) == hartid)
+ return i;
+
+ pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
+ BUG();
+ return i;
+}
+void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
+{
+ int cpu;
+
+ for_each_cpu(cpu, in)
+ cpumask_set_cpu(cpu_logical_map(cpu), out);
+}
/* Unsupported */
int setup_profiling_timer(unsigned int multiplier)
{
--
2.7.4
[PATCH V2 1/2] soc: imx: gpc: use A_CORE instread of A7 for more i.MX platforms
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.
Signed-off-by: Anson Huang
Acked-by: Andrey Smirnov
---
no change since V1.
drivers/soc/imx/gpcv2.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 6ef18cf..0e31465 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -20,14 +20,14 @@
#include
#include
-#define GPC_LPCR_A7_BSC0x000
+#define GPC_LPCR_A_CORE_BSC0x000
#define GPC_PGC_CPU_MAPPING0x0ec
-#define USB_HSIC_PHY_A7_DOMAIN BIT(6)
-#define USB_OTG2_PHY_A7_DOMAIN BIT(5)
-#define USB_OTG1_PHY_A7_DOMAIN BIT(4)
-#define PCIE_PHY_A7_DOMAIN BIT(3)
-#define MIPI_PHY_A7_DOMAIN BIT(2)
+#define USB_HSIC_PHY_A_CORE_DOMAIN BIT(6)
+#define USB_OTG2_PHY_A_CORE_DOMAIN BIT(5)
+#define USB_OTG1_PHY_A_CORE_DOMAIN BIT(4)
+#define PCIE_PHY_A_CORE_DOMAIN BIT(3)
+#define MIPI_PHY_A_CORE_DOMAIN BIT(2)
#define GPC_PU_PGC_SW_PUP_REQ 0x0f8
#define GPC_PU_PGC_SW_PDN_REQ 0x104
@@ -167,7 +167,7 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
},
.bits = {
.pxx = MIPI_PHY_SW_Pxx_REQ,
- .map = MIPI_PHY_A7_DOMAIN,
+ .map = MIPI_PHY_A_CORE_DOMAIN,
},
.voltage = 100,
.pgc = PGC_MIPI,
@@ -179,7 +179,7 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
},
.bits = {
.pxx = PCIE_PHY_SW_Pxx_REQ,
- .map = PCIE_PHY_A7_DOMAIN,
+ .map = PCIE_PHY_A_CORE_DOMAIN,
},
.voltage = 100,
.pgc = PGC_PCIE,
@@ -191,7 +191,7 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
},
.bits = {
.pxx = USB_HSIC_PHY_SW_Pxx_REQ,
- .map = USB_HSIC_PHY_A7_DOMAIN,
+ .map = USB_HSIC_PHY_A_CORE_DOMAIN,
},
.voltage = 120,
.pgc = PGC_USB_HSIC,
@@ -261,7 +261,7 @@ builtin_platform_driver(imx7_pgc_domain_driver)
static int imx_gpcv2_probe(struct platform_device *pdev)
{
static const struct regmap_range yes_ranges[] = {
- regmap_reg_range(GPC_LPCR_A7_BSC,
+ regmap_reg_range(GPC_LPCR_A_CORE_BSC,
GPC_M4_PU_PDN_FLG),
regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
GPC_PGC_SR(PGC_MIPI)),
--
2.7.4
[PATCH V2 2/2] soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
can reuse gpcv2 pgc driver for power domain control, this
patch renames all functions and structure definitions started
with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to
pass platform specific power domain data for power domain
driver, thus make gpcv2 pgc driver more generic for i.MX
platforms.
Signed-off-by: Anson Huang
Acked-by: Andrey Smirnov
---
changes since V1:
use .data in imx_gpcv2_dt_ids[] instead of calling
of_machine_is_compatible() for different platforms support.
drivers/soc/imx/gpcv2.c | 72 +
1 file changed, 43 insertions(+), 29 deletions(-)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 0e31465..938103a 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -14,6 +14,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
+#include
#include
#include
#include
@@ -53,7 +54,7 @@
#define GPC_PGC_CTRL_PCR BIT(0)
-struct imx7_pgc_domain {
+struct imx_pgc_domain {
struct generic_pm_domain genpd;
struct regmap *regmap;
struct regulator *regulator;
@@ -69,11 +70,16 @@ struct imx7_pgc_domain {
struct device *dev;
};
-static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
+struct imx_pgc_domain_data {
+ const struct imx_pgc_domain *domains;
+ size_t domains_num;
+};
+
+static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
bool on)
{
- struct imx7_pgc_domain *domain = container_of(genpd,
- struct imx7_pgc_domain,
+ struct imx_pgc_domain *domain = container_of(genpd,
+ struct imx_pgc_domain,
genpd);
unsigned int offset = on ?
GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ;
@@ -150,17 +156,17 @@ static int imx7_gpc_pu_pgc_sw_pxx_req(struct
generic_pm_domain *genpd,
return ret;
}
-static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
+static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
{
- return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
+ return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
}
-static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
+static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
{
- return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
+ return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
}
-static const struct imx7_pgc_domain imx7_pgc_domains[] = {
+static const struct imx_pgc_domain imx7_pgc_domains[] = {
[IMX7_POWER_DOMAIN_MIPI_PHY] = {
.genpd = {
.name = "mipi-phy",
@@ -198,9 +204,14 @@ static const struct imx7_pgc_domain imx7_pgc_domains[] = {
},
};
-static int imx7_pgc_domain_probe(struct platform_device *pdev)
+static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
+ .domains = imx7_pgc_domains,
+ .domains_num = ARRAY_SIZE(imx7_pgc_domains),
+};
+
+static int imx_pgc_domain_probe(struct platform_device *pdev)
{
- struct imx7_pgc_domain *domain = pdev->dev.platform_data;
+ struct imx_pgc_domain *domain = pdev->dev.platform_data;
int ret;
domain->dev = &pdev->dev;
@@ -233,9 +244,9 @@ static int imx7_pgc_domain_probe(struct platform_device
*pdev)
return ret;
}
-static int imx7_pgc_domain_remove(struct platform_device *pdev)
+static int imx_pgc_domain_remove(struct platform_device *pdev)
{
- struct imx7_pgc_domain *domain = pdev->dev.platform_data;
+ struct imx_pgc_domain *domain = pdev->dev.platform_data;
of_genpd_del_provider(domain->dev->of_node);
pm_genpd_remove(&domain->genpd);
@@ -243,23 +254,24 @@ static int imx7_pgc_domain_remove(struct platform_device
*pdev)
return 0;
}
-static const struct platform_device_id imx7_pgc_domain_id[] = {
- { "imx7-pgc-domain", },
+static const struct platform_device_id imx_pgc_domain_id[] = {
+ { "imx-pgc-domain", },
{ },
};
-static struct platform_driver imx7_pgc_domain_driver = {
+static struct platform_driver imx_pgc_domain_driver = {
.driver = {
- .name = "imx7-pgc",
+ .name = "imx-pgc",
},
- .probe= imx7_pgc_domain_probe,
- .remove = imx7_pgc_domain_remove,
- .id_table = imx7_pgc_domain_id,
+ .probe= imx_pgc_domain_probe,
+ .remove = imx_pgc_domain_remove,
+ .id_table = imx_pgc_domain_id,
};
-builtin_platform_driver(imx7_pgc_domain_driver)
+builtin_platform_driver(imx_pgc_domain_driver)
static int imx_gpcv2_probe(struct platform_device *pdev)
{
+ static const struct imx_pgc_domain_data *domain_data;
static const struct regmap_range yes_range
[PATCH] mfd: madera: Remove unused forward reference
The madera_irqchip_pdata struct was replaced by the irq_flags member of struct madera_pdata so the forward reference is obsolete. Signed-off-by: Richard Fitzgerald --- include/linux/mfd/madera/pdata.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/linux/mfd/madera/pdata.h b/include/linux/mfd/madera/pdata.h index 0b311f39c8f4..8dc852402dbb 100644 --- a/include/linux/mfd/madera/pdata.h +++ b/include/linux/mfd/madera/pdata.h @@ -24,7 +24,6 @@ struct gpio_desc; struct pinctrl_map; -struct madera_irqchip_pdata; struct madera_codec_pdata; /** -- 2.11.0
Re: [PATCH] remoteproc: qcom: adsp: Add SDM845 ADSP and CDSP support
Tested-by: Sibi Sankar
On 2018-08-28 12:44, Bjorn Andersson wrote:
Add support for booting the Audio and Compute DSPs found in Qualcomm's
SDM845 platform.
As with the previous platforms the power rail handling needs to be
updated once the appropriate support lands upstream.
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/remoteproc/qcom,adsp.txt | 2 ++
drivers/remoteproc/qcom_q6v5_pas.c | 12
2 files changed, 14 insertions(+)
diff --git
a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
index 728e4193f7a6..b7d058228185 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt
@@ -10,6 +10,8 @@ on the Qualcomm ADSP Hexagon core.
"qcom,msm8974-adsp-pil"
"qcom,msm8996-adsp-pil"
"qcom,msm8996-slpi-pil"
+ "qcom,sdm845-adsp-pas"
+ "qcom,sdm845-cdsp-pas"
- interrupts-extended:
Usage: required
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c
b/drivers/remoteproc/qcom_q6v5_pas.c
index 2478ef3cd519..53eff2afda06 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -342,6 +342,16 @@ static const struct adsp_data adsp_resource_init =
{
.ssctl_id = 0x14,
};
+static const struct adsp_data cdsp_resource_init = {
+ .crash_reason_smem = 601,
+ .firmware_name = "cdsp.mdt",
+ .pas_id = 18,
+ .has_aggre2_clk = false,
+ .ssr_name = "cdsp",
+ .sysmon_name = "cdsp",
+ .ssctl_id = 0x17,
+};
+
static const struct adsp_data slpi_resource_init = {
.crash_reason_smem = 424,
.firmware_name = "slpi.mdt",
@@ -355,6 +365,8 @@ static const struct adsp_data slpi_resource_init =
{
static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,msm8974-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-adsp-pil", .data =
&adsp_resource_init},
{ .compatible = "qcom,msm8996-slpi-pil", .data =
&slpi_resource_init},
+ { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
+ { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
{ },
};
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
[PATCH] pinctrl: madera: Fix possible NULL pointer with pdata config
If we are being configured via pdata we don't necessarily have
any gpio mappings being configured that way so pdata->gpio_config
could be NULL.
Signed-off-by: Richard Fitzgerald
---
drivers/pinctrl/cirrus/pinctrl-madera-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/cirrus/pinctrl-madera-core.c
b/drivers/pinctrl/cirrus/pinctrl-madera-core.c
index ece41fb2848f..c4f4d904e4a6 100644
--- a/drivers/pinctrl/cirrus/pinctrl-madera-core.c
+++ b/drivers/pinctrl/cirrus/pinctrl-madera-core.c
@@ -1040,7 +1040,7 @@ static int madera_pin_probe(struct platform_device *pdev)
}
/* if the configuration is provided through pdata, apply it */
- if (pdata) {
+ if (pdata && pdata->gpio_configs) {
ret = pinctrl_register_mappings(pdata->gpio_configs,
pdata->n_gpio_configs);
if (ret) {
--
2.11.0
Re: [PATCH v2 1/2]: perf util: map data buffer for preserving collected data
On Mon, Aug 27, 2018 at 12:02:35PM +0300, Alexey Budankov wrote:
> Hi,
>
> On 27.08.2018 11:33, Jiri Olsa wrote:
> > On Thu, Aug 23, 2018 at 07:42:09PM +0300, Alexey Budankov wrote:
> >
> > SNIP
> >
> >> diff --git a/tools/perf/util/mmap.c b/tools/perf/util/mmap.c
> >> index fc832676a798..e71d46cb01cc 100644
> >> --- a/tools/perf/util/mmap.c
> >> +++ b/tools/perf/util/mmap.c
> >> @@ -155,6 +155,10 @@ void __weak auxtrace_mmap_params__set_idx(struct
> >> auxtrace_mmap_params *mp __mayb
> >>
> >> void perf_mmap__munmap(struct perf_mmap *map)
> >> {
> >> + if (map->data != NULL) {
> >> + munmap(map->data, perf_mmap__mmap_len(map));
> >> + map->data = NULL;
> >> + }
> >>if (map->base != NULL) {
> >>munmap(map->base, perf_mmap__mmap_len(map));
> >>map->base = NULL;
> >> @@ -190,6 +194,14 @@ int perf_mmap__mmap(struct perf_mmap *map, struct
> >> mmap_params *mp, int fd)
> >>map->base = NULL;
> >>return -1;
> >>}
> >> + map->data = mmap(NULL, perf_mmap__mmap_len(map), PROT_READ | PROT_WRITE,
> >> + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
> >
> > hum, why does map->data need to be mmap-ed?
>
> The same way as for kernel buffers. If you see better alternatives it could
> be applied.
I meant why not just allocate them with mmaloc?
jirka
Re: [PATCH 3/3] Enable high-resolution scrolling on Logitech mice
Hi Harry,
On Thu, Aug 23, 2018 at 8:31 PM Harry Cutts wrote:
>
> There are three features used by various Logitech mice for
> high-resolution scrolling: the fast scrolling bit in HID++ 1.0, and the
> x2120 and x2121 features in HID++ 2.0 and above. This patch supports
> all three, and uses the multiplier reported by the mouse for the HID++
> 2.0+ features.
>
> The full list of product IDs of mice which support high-resolution
> scrolling was provided by Logitech, but the patch was tested using the
> following mice (over both Bluetooth and Unifying where applicable):
>
> * HID++ 1.0: Anywhere MX, Performance MX
> * x2120: M560
> * x2121: MX Anywhere 2, MX Master 2S
>
> Signed-off-by: Harry Cutts
Patches 1 and 2 look fine (I'd rather have the micrometers too).
I have more concerns about this one.
My main issue is that this patch both reshuffle existing parts and add
new features, which makes it hard to review.
> ---
>
> drivers/hid/hid-ids.h| 15 ++
> drivers/hid/hid-logitech-hidpp.c | 341 ---
> drivers/hid/hid-quirks.c | 11 +
> 3 files changed, 340 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
> index 79bdf0c7e351..64fbe6174189 100644
> --- a/drivers/hid/hid-ids.h
> +++ b/drivers/hid/hid-ids.h
> @@ -717,6 +717,21 @@
> #define USB_DEVICE_ID_LOGITECH_MOUSE_C01A 0xc01a
> #define USB_DEVICE_ID_LOGITECH_MOUSE_C05A 0xc05a
> #define USB_DEVICE_ID_LOGITECH_MOUSE_C06A 0xc06a
> +/*
> + * The following mice have different IDs over Bluetooth than Logitech
> Unifying
> + * protocol, hence the _BT suffix.
> + */
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_M336_337_535_BT1 0xb014
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_M336_337_535_BT2 0xb016
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_M720_BT 0xb015
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_ANYWHERE_2_BT1 0xb013
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_ANYWHERE_2_BT2 0xb018
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_ANYWHERE_2_BT3 0xb01f
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_ANYWHERE_2S_BT 0xb01a
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_MASTER_BT1 0xb012
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_MASTER_BT2 0xb017
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_MASTER_BT3 0xb01e
> +#define USB_DEVICE_ID_LOGITECH_MOUSE_MX_MASTER_2S_BT 0xb019
> #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD_CORD 0xc20a
> #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD 0xc211
> #define USB_DEVICE_ID_LOGITECH_EXTREME_3D 0xc215
> diff --git a/drivers/hid/hid-logitech-hidpp.c
> b/drivers/hid/hid-logitech-hidpp.c
> index 19cc980eebce..17598b87f1b7 100644
> --- a/drivers/hid/hid-logitech-hidpp.c
> +++ b/drivers/hid/hid-logitech-hidpp.c
> @@ -64,6 +64,14 @@ MODULE_PARM_DESC(disable_tap_to_click,
> #define HIDPP_QUIRK_NO_HIDINPUTBIT(23)
> #define HIDPP_QUIRK_FORCE_OUTPUT_REPORTS BIT(24)
> #define HIDPP_QUIRK_UNIFYING BIT(25)
> +#define HIDPP_QUIRK_HI_RES_SCROLL_1P0 BIT(26)
> +#define HIDPP_QUIRK_HI_RES_SCROLL_X2120BIT(27)
> +#define HIDPP_QUIRK_HI_RES_SCROLL_X2121BIT(28)
> +
> +/* Convenience constant to check for any high-res support. */
> +#define HIDPP_QUIRK_HI_RES_SCROLL (HIDPP_QUIRK_HI_RES_SCROLL_1P0 | \
> +HIDPP_QUIRK_HI_RES_SCROLL_X2120 | \
> +HIDPP_QUIRK_HI_RES_SCROLL_X2121)
>
> #define HIDPP_QUIRK_DELAYED_INIT HIDPP_QUIRK_NO_HIDINPUT
>
> @@ -149,6 +157,7 @@ struct hidpp_device {
> unsigned long capabilities;
>
> struct hidpp_battery battery;
> + struct hid_scroll_counter vertical_wheel_counter;
> };
>
> /* HID++ 1.0 error codes */
> @@ -400,32 +409,53 @@ static void hidpp_prefix_name(char **name, int
> name_length)
> #define HIDPP_SET_LONG_REGISTER0x82
> #define HIDPP_GET_LONG_REGISTER0x83
>
> -#define HIDPP_REG_GENERAL 0x00
> -
> -static int hidpp10_enable_battery_reporting(struct hidpp_device *hidpp_dev)
> +/**
> + * hidpp10_set_register_bit() - Sets a single bit in a HID++ 1.0 register.
> + * @hidpp_dev: the device to set the register on.
> + * @register_address: the address of the register to modify.
> + * @byte: the byte of the register to modify. Should be less than 3.
> + * Return: 0 if successful, otherwise a negative error code.
> + */
> +static int hidpp10_set_register_bit(struct hidpp_device *hidpp_dev,
> + u8 register_address, u8 byte, u8 bit)
> {
> struct hidpp_report response;
> int ret;
> u8 params[3] = { 0 };
>
> ret = hidpp_send_rap_command_sync(hidpp_dev,
> - REPORT_ID_HIDPP_SHORT,
> - HIDPP_GET_REGISTER,
> - HIDPP_REG_GENERAL,
> -
Re: TLB flushes on fixmap changes
On Mon, 27 Aug 2018 16:01:32 -0700
Andy Lutomirski wrote:
> On Mon, Aug 27, 2018 at 3:54 PM, Nadav Amit wrote:
> > at 3:32 PM, Andy Lutomirski wrote:
> >
> >> On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
> >>> at 1:16 PM, Nadav Amit wrote:
> >>>
> at 12:58 PM, Andy Lutomirski wrote:
>
> > On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit
> > wrote:
> >> at 12:10 PM, Nadav Amit wrote:
> >>
> >>> at 11:58 AM, Andy Lutomirski wrote:
> >>>
> On Mon, Aug 27, 2018 at 11:54 AM, Nadav Amit
> wrote:
> >> On Mon, Aug 27, 2018 at 10:34 AM, Nadav Amit
> >> wrote:
> >> What do you all think?
> >
> > I agree in general. But I think that current->mm would need to be
> > loaded, as
> > otherwise I am afraid it would break switch_mm_irqs_off().
>
> What breaks?
> >>>
> >>> Actually nothing. I just saw the IBPB stuff regarding tsk, but it
> >>> should not
> >>> matter.
> >>
> >> So here is what I got. It certainly needs some cleanup, but it boots.
> >>
> >> Let me know how crappy you find it...
> >>
> >>
> >> diff --git a/arch/x86/include/asm/mmu_context.h
> >> b/arch/x86/include/asm/mmu_context.h
> >> index bbc796eb0a3b..336779650a41 100644
> >> --- a/arch/x86/include/asm/mmu_context.h
> >> +++ b/arch/x86/include/asm/mmu_context.h
> >> @@ -343,4 +343,24 @@ static inline unsigned long
> >> __get_current_cr3_fast(void)
> >> return cr3;
> >> }
> >>
> >> +typedef struct {
> >> + struct mm_struct *prev;
> >> +} temporary_mm_state_t;
> >> +
> >> +static inline temporary_mm_state_t use_temporary_mm(struct mm_struct
> >> *mm)
> >> +{
> >> + temporary_mm_state_t state;
> >> +
> >> + lockdep_assert_irqs_disabled();
> >> + state.prev = this_cpu_read(cpu_tlbstate.loaded_mm);
> >> + switch_mm_irqs_off(NULL, mm, current);
> >> + return state;
> >> +}
> >> +
> >> +static inline void unuse_temporary_mm(temporary_mm_state_t prev)
> >> +{
> >> + lockdep_assert_irqs_disabled();
> >> + switch_mm_irqs_off(NULL, prev.prev, current);
> >> +}
> >> +
> >> #endif /* _ASM_X86_MMU_CONTEXT_H */
> >> diff --git a/arch/x86/include/asm/pgtable.h
> >> b/arch/x86/include/asm/pgtable.h
> >> index 5715647fc4fe..ef62af9a0ef7 100644
> >> --- a/arch/x86/include/asm/pgtable.h
> >> +++ b/arch/x86/include/asm/pgtable.h
> >> @@ -976,6 +976,10 @@ static inline void __meminit
> >> init_trampoline_default(void)
> >> /* Default trampoline pgd value */
> >> trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
> >> }
> >> +
> >> +void __init patching_mm_init(void);
> >> +#define patching_mm_init patching_mm_init
> >> +
> >> # ifdef CONFIG_RANDOMIZE_MEMORY
> >> void __meminit init_trampoline(void);
> >> # else
> >> diff --git a/arch/x86/include/asm/pgtable_64_types.h
> >> b/arch/x86/include/asm/pgtable_64_types.h
> >> index 054765ab2da2..9f44262abde0 100644
> >> --- a/arch/x86/include/asm/pgtable_64_types.h
> >> +++ b/arch/x86/include/asm/pgtable_64_types.h
> >> @@ -116,6 +116,9 @@ extern unsigned int ptrs_per_p4d;
> >> #define LDT_PGD_ENTRY (pgtable_l5_enabled() ?
> >> LDT_PGD_ENTRY_L5 : LDT_PGD_ENTRY_L4)
> >> #define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
> >>
> >> +#define TEXT_POKE_PGD_ENTRY-5UL
> >> +#define TEXT_POKE_ADDR (TEXT_POKE_PGD_ENTRY << PGDIR_SHIFT)
> >> +
> >> #define __VMALLOC_BASE_L4 0xc900UL
> >> #define __VMALLOC_BASE_L5 0xffa0UL
> >>
> >> diff --git a/arch/x86/include/asm/pgtable_types.h
> >> b/arch/x86/include/asm/pgtable_types.h
> >> index 99fff853c944..840c72ec8c4f 100644
> >> --- a/arch/x86/include/asm/pgtable_types.h
> >> +++ b/arch/x86/include/asm/pgtable_types.h
> >> @@ -505,6 +505,9 @@ pgprot_t phys_mem_access_prot(struct file *file,
> >> unsigned long pfn,
> >> /* Install a pte for a particular vaddr in kernel space. */
> >> void set_pte_vaddr(unsigned long vaddr, pte_t pte);
> >>
> >> +struct mm_struct;
> >> +void set_mm_pte_vaddr(struct mm_struct *mm, unsigned long vaddr,
> >> pte_t pte);
> >> +
> >> #ifdef CONFIG_X86_32
> >> extern void native_pagetable_init(void);
> >> #else
> >> diff --git a/arch/x86/include/asm/text-patching.h
> >> b/arch/x86/include/asm/text-patching.h
> >> index 2ecd34e2d46c..cb364ea5b19d 100644
> >> --- a/arch/x86/include/asm/text-patching.h
> >> +++ b/arch/x86/include/asm/text-patching.h
> >> @@ -38,4 +38,6 @@ extern void *text_poke(void *addr, const void
> >> *opcode, size_t len);
> >> extern int poke_int3_handler(struct pt_regs
Re: [PATCH] x86/alternatives: lockdep-enforce text_mutex in text_poke*()
On Tue, 28 Aug 2018 08:55:14 +0200 (CEST)
Jiri Kosina wrote:
> From: Jiri Kosina
>
> text_poke() and text_poke_bp() must be called with text_mutex held.
> Let's put proper lockdep anotation in place instead of just mentioning
> the requirement in comment.
Thank you!
Acked-by: Masami Hiramatsu
>
> Reported-by: Peter Zijlstra
> Signed-off-by: Jiri Kosina
> ---
> arch/x86/kernel/alternative.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
> index 014f214da581..b9d5e7c9ef43 100644
> --- a/arch/x86/kernel/alternative.c
> +++ b/arch/x86/kernel/alternative.c
> @@ -684,8 +684,6 @@ void *__init_or_module text_poke_early(void *addr, const
> void *opcode,
> * It means the size must be writable atomically and the address must be
> aligned
> * in a way that permits an atomic write. It also makes sure we fit on a
> single
> * page.
> - *
> - * Note: Must be called under text_mutex.
> */
> void *text_poke(void *addr, const void *opcode, size_t len)
> {
> @@ -700,6 +698,8 @@ void *text_poke(void *addr, const void *opcode, size_t
> len)
>*/
> BUG_ON(!after_bootmem);
>
> + lockdep_assert_held(&text_mutex);
> +
> if (!core_kernel_text((unsigned long)addr)) {
> pages[0] = vmalloc_to_page(addr);
> pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
> @@ -782,8 +782,6 @@ int poke_int3_handler(struct pt_regs *regs)
> * - replace the first byte (int3) by the first byte of
> * replacing opcode
> * - sync cores
> - *
> - * Note: must be called under text_mutex.
> */
> void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler)
> {
> @@ -792,6 +790,9 @@ void *text_poke_bp(void *addr, const void *opcode, size_t
> len, void *handler)
> bp_int3_handler = handler;
> bp_int3_addr = (u8 *)addr + sizeof(int3);
> bp_patching_in_progress = true;
> +
> + lockdep_assert_held(&text_mutex);
> +
> /*
>* Corresponding read barrier in int3 notifier for making sure the
>* in_progress and handler are correctly ordered wrt. patching.
>
> --
> Jiri Kosina
> SUSE Labs
>
--
Masami Hiramatsu
Re: [PATCH] rtc: rtc-omap: Replace mdelay() with msleep() in omap_rtc_power_off()
On Mon, Aug 27, 2018 at 10:55:17PM +0200, Alexandre Belloni wrote: > Hi, > > On 30/07/2018 21:53:14+0800, Jia-Ju Bai wrote: > > omap_rtc_power_off() is never called in atomic context. > > It calls mdelay() to busily wait, which is not necessary. > > mdelay() can be replaced with msleep(). > > > > This is found by a static analysis tool named DCNS written by myself. > > > > Signed-off-by: Jia-Ju Bai > > --- > > drivers/rtc/rtc-omap.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c > > index 39086398833e..ef3d09525d0f 100644 > > --- a/drivers/rtc/rtc-omap.c > > +++ b/drivers/rtc/rtc-omap.c > > @@ -476,7 +476,7 @@ static void omap_rtc_power_off(void) > > * power off the system. Add a 500 ms margin for external latencies > > * (e.g. debounce circuits). > > */ > > - mdelay(2500); > > + msleep(2500); > > I'm not sure about that one because this is a poweroff function so it > doesn't really make sense to sleep versus busy waiting (all the drivers > in power/reset use mdelay()) This power-off handler is called with interrupts disabled (as mentioned in the function header) and must not sleep. Johan
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
>
> Trace file offset are linearly calculated by perf_mmap__push() code
> for the next possible write operation, but file position is updated by
> the kernel only in the second lseek() syscall after the loop.
> The first lseek() syscall reads that file position for
> the next loop iterations.
>
> record__mmap_read_sync implements sort of a barrier between spilling
> ready profiling data to disk.
>
> Signed-off-by: Alexey Budankov
> ---
> Changes in v3:
> - written comments about nanosleep(0.5ms) call prior aio_suspend()
> to cope with intrusiveness of its implementation in glibc;
> - written comments about rationale behind coping profiling data
> into mmap->data buffer;
> ---
> tools/perf/builtin-record.c | 125
> +---
> tools/perf/util/mmap.c | 36 -
> tools/perf/util/mmap.h | 2 +-
> 3 files changed, 143 insertions(+), 20 deletions(-)
>
> diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
> index 22ebeb92ac51..4ac61399a09a 100644
> --- a/tools/perf/builtin-record.c
> +++ b/tools/perf/builtin-record.c
> @@ -53,6 +53,7 @@
> #include
> #include
> #include
> +#include
>
> struct switch_output {
> bool enabled;
> @@ -121,6 +122,23 @@ static int record__write(struct record *rec, void *bf,
> size_t size)
> return 0;
> }
>
> +static int record__aio_write(int trace_fd, struct aiocb *cblock,
> + void *buf, size_t size, off_t off)
> +{
> + cblock->aio_fildes = trace_fd;
> + cblock->aio_buf= buf;
> + cblock->aio_nbytes = size;
> + cblock->aio_offset = off;
> + cblock->aio_sigevent.sigev_notify = SIGEV_NONE;
> +
> + if (aio_write(cblock) == -1) {
> + pr_err("failed to queue perf data, error: %m\n");
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> static int process_synthesized_event(struct perf_tool *tool,
>union perf_event *event,
>struct perf_sample *sample __maybe_unused,
> @@ -130,12 +148,14 @@ static int process_synthesized_event(struct perf_tool
> *tool,
> return record__write(rec, event, event->header.size);
> }
>
> -static int record__pushfn(void *to, void *bf, size_t size)
> +static int record__pushfn(void *to, void *bf, size_t size, off_t off)
> {
> struct record *rec = to;
> + struct perf_mmap *map = bf;
the argument needs to change for record__pushfn,
now with your changes, it's no longer 'void *bf',
but 'struct perf_mmap *map'
also I'm little confused why we have '*to' and cast
it back to 'struct record', but so be it ;-)
thanks,
jirka
Re: [PATCH] arm64: dts: qcom: sdm845: Add smp2p nodes
Reviewed-by: Sibi Sankar
On 2018-08-28 12:42, Bjorn Andersson wrote:
Add the SMP2P nodes for the remoteproc states for adsp, cdsp, mpss and
slpi.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 88
1 file changed, 88 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0c9a2aa6a1b5..d977117acac4 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -230,6 +230,94 @@
hwlocks = <&tcsr_mutex 3>;
};
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 6>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ cdsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ cdsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-lpass {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+
+ interrupts = ;
+
+ mboxes = <&apss_shared 10>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ adsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ adsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-mpss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+ interrupts = ;
+ mboxes = <&apss_shared 14>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ modem_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ modem_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-slpi {
+ compatible = "qcom,smp2p";
+ qcom,smem = <481>, <430>;
+ interrupts = ;
+ mboxes = <&apss_shared 26>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <3>;
+
+ slpi_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ slpi_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
SNIP
> if ((md->start & md->mask) + size != (md->end & md->mask)) {
> buf = &data[md->start & md->mask];
> - size = md->mask + 1 - (md->start & md->mask);
> - md->start += size;
> -
> - if (push(to, buf, size) < 0) {
> - rc = -1;
> - goto out;
> - }
> + size0 = md->mask + 1 - (md->start & md->mask);
> + md->start += size0;
> + memcpy(md->data, buf, size0);
> }
>
> buf = &data[md->start & md->mask];
> size = md->end - md->start;
> md->start += size;
> + memcpy(md->data + size0, buf, size);
>
> - if (push(to, buf, size) < 0) {
> - rc = -1;
> + rc = push(to, md, size0 + size, *off) < 0 ? -1 : 1;
> + if (rc == -1)
> goto out;
> - }
> +
> + perf_mmap__get(md);
> + *off += size0 + size;
this get is for the perf_mmap pointer storage in the mmap_aio array right?
I see it's released in record__mmap_read_sync, which might also return
without releasing it.. this needs to be fixed and explained in here,
why we take the reference in the first place
thanks,
jirka
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
SNIP
> + int trace_fd = rec->session->data->file.fd;
> + struct aiocb **mmap_aio = rec->evlist->mmap_aio;
> + int mmap_aio_size = 0;
> + off_t off;
>
> if (!evlist)
> return 0;
> @@ -528,14 +632,17 @@ static int record__mmap_read_evlist(struct record *rec,
> struct perf_evlist *evli
> if (overwrite && evlist->bkw_mmap_state != BKW_MMAP_DATA_PENDING)
> return 0;
>
> + off = lseek(trace_fd, 0, SEEK_CUR);
> +
> for (i = 0; i < evlist->nr_mmaps; i++) {
> struct auxtrace_mmap *mm = &maps[i].auxtrace_mmap;
>
> if (maps[i].base) {
> - if (perf_mmap__push(&maps[i], rec, record__pushfn) !=
> 0) {
> - rc = -1;
> + rc = perf_mmap__push(&maps[i], rec, record__pushfn,
> &off);
> + if (rc < 0)
> goto out;
> - }
> + else if (rc > 0)
> + mmap_aio[mmap_aio_size++] = &maps[i].cblock;
I understand the purpose of mmap_aio array, but I don't see a reason
to fill it in every time we call record__mmap_read_evlist
the way I see it, when 'pushing the data' it's either all or nothing,
if there's an error in pushing one map, we bail out completely..
so the mmap_aio array could be preallocated (it is now) and
pre-filled with cblock pointers
that would probably ease up the reference counting I mentioned
in the previous email
thanks,
jirka
[BUG] Possible sleep-in-atomic-context bugs involving regmap_lock_mutex()
Hello,
My static tool DSAC reports many sleep-in-atomic-context bugs involving
regmap_lock_mutex(), so I wonder whether this function is possible to be
executed in atomic context.
Here are some example bugs and their call paths in Linux-4.16 (from
bottom to top, and [FUNC_PTR] means that there is a function pointer call):
[FUNC] mutex_lock_nested
drivers/base/regmap/regmap.c, 468:
mutex_lock_nested in regmap_lock_mutex
drivers/base/regmap/regmap.c, 2503:
[FUNC_PTR]regmap_lock_mutex in regmap_read
drivers/clk/clk-aspeed.c, 215:
regmap_read in aspeed_clk_is_enabled
drivers/clk/clk-aspeed.c, 230:
aspeed_clk_is_enabled in aspeed_clk_enable
drivers/clk/clk-aspeed.c, 228:
_raw_spin_lock_irqsave in aspeed_clk_enable
[FUNC] mutex_lock_nested
drivers/base/regmap/regmap.c, 468:
mutex_lock_nested in regmap_lock_mutex
drivers/base/regmap/regmap.c, 2821:
[FUNC_PTR]regmap_lock_mutex in regmap_update_bits_base
drivers/clk/clk-aspeed.c, 270:
regmap_update_bits_base in aspeed_clk_disable
drivers/clk/clk-aspeed.c, 267:
_raw_spin_lock_irqsave in aspeed_clk_disable
[FUNC] mutex_lock_nested
drivers/base/regmap/regmap.c, 468:
mutex_lock_nested in regmap_lock_mutex
drivers/base/regmap/regmap.c, 2503:
[FUNC_PTR]regmap_lock_mutex in regmap_read
drivers/char/ipmi/bt-bmc.c, 385:
regmap_read in bt_bmc_irq
[FUNC] mutex_lock_nested
drivers/base/regmap/regmap.c, 468:
mutex_lock_nested in regmap_lock_mutex
drivers/base/regmap/regmap.c, 2821:
[FUNC_PTR]regmap_lock_mutex in regmap_update_bits_base
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c, 213:
regmap_update_bits_base in hdmi_modb
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c, 429:
hdmi_modb in hdmi_set_cts_n
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c, 527:
hdmi_set_cts_n in hdmi_set_clk_regenerator
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c, 524:
spin_lock_irq in hdmi_set_clk_regenerator
[FUNC] mutex_lock_nested
drivers/base/regmap/regmap.c, 468:
mutex_lock_nested in regmap_lock_mutex
drivers/base/regmap/regmap.c, 2503:
[FUNC_PTR]regmap_lock_mutex in regmap_read
drivers/media/platform/atmel/atmel-isc.c, 1603:
regmap_read in isc_interrupt (interrupt handler)
I find the code about the assignment of regmap_lock_mutex():
if ((bus && bus->fast_io) ||
config->fast_io) {
spin_lock_init(&map->spinlock);
map->lock = regmap_lock_spinlock;
map->unlock = regmap_unlock_spinlock;
lockdep_set_class_and_name(&map->spinlock,
lock_key, lock_name);
} else {
mutex_init(&map->mutex);
map->lock = regmap_lock_mutex;
map->unlock = regmap_unlock_mutex;
lockdep_set_class_and_name(&map->mutex,
lock_key, lock_name);
}
But after reading the code, I cannot find the relationship between the
if condition and atomic context.
I am looking forward to your reply, thanks in advance :)
Best wishes,
Jia-Ju Bai
Re: [PATCH] irqchip/gic-v3-its: cap lpi_id_bits to reduce memory footprint
On Tue, 28 Aug 2018 05:53:26 +0100,
Jia He wrote:
>
> In commit fe8e93504ce8 ("irqchip/gic-v3-its: Use full range of LPIs"),
> it removes the cap for lpi_id_bits. But it will cause more pointless
> memory footprint.
>
> There is a WARN_ON when my QDF2400 server boots up (pagesize is 4k)
> begin===
[trimming not-so-useful trace]
> end
>
> In its_alloc_lpi_tables, lpi_id_bits is 24 in QDF2400. Then
> its_allocate_prop_table will try to allocate 16M(order 12 if
> pagesize=4k). Thus it causes the WARN_ON.
>
> As said by Marc,
> Capping lpi_id_bits at 16 (which is what we had before) is plenty,
> will save a some memory, and gives some margin before we need to push
> it up again.
>
> This patch re-caps the lpi_id_bits.
>
> Fixes: fe8e93504ce8 ("irqchip/gic-v3-its: Use full range of LPIs")
> Signed-off-by: Jia He
> Suggested-by: Marc Zyngier
Thanks for doing this. Small problem with this patch:
The email comes from hejia...@gmail.com, while the sign off is by
jia...@hxt-semitech.com. Your email should start with a:
From: Jia He
Other than that:
Acked-by: Marc Zyngier
Thomas, would you mind picking this up so that it gets into the next
convenient -rc?
Thanks,
M. (/me goes back hiking...)
--
Jazz is not dead, it just smell funny.
Re: [PATCH v3 0/2]: perf: reduce data loss when profiling highly parallel CPU bound workloads
On Mon, Aug 27, 2018 at 08:03:21PM +0300, Alexey Budankov wrote: > > Currently in record mode the tool implements trace writing serially. > The algorithm loops over mapped per-cpu data buffers and stores ready > data chunks into a trace file using write() system call. > > At some circumstances the kernel may lack free space in a buffer > because the other buffer's half is not yet written to disk due to > some other buffer's data writing by the tool at the moment. > > Thus serial trace writing implementation may cause the kernel > to loose profiling data and that is what observed when profiling > highly parallel CPU bound workloads on machines with big number > of cores. > > Experiment with profiling matrix multiplication code executing 128 > threads on Intel Xeon Phi (KNM) with 272 cores, like below, > demonstrates data loss metrics value of 98%: > > /usr/bin/time perf record -o /tmp/perf-ser.data -a -N -B -T -R -g \ > --call-graph dwarf,1024 --user-regs=IP,SP,BP \ > --switch-events -e > cycles,instructions,ref-cycles,software/period=1,name=cs,config=0x3/Duk -- \ > matrix.gcc > > Data loss metrics is the ratio lost_time/elapsed_time where > lost_time is the sum of time intervals containing PERF_RECORD_LOST > records and elapsed_time is the elapsed application run time > under profiling. I like the idea and I think it's good direction to go, but could you please share some from perf stat or whatever you used to meassure the new performance? thanks, jirka
Re: [PATCH] EDAC: Remove the i82443bxgx_edac driver
On Mon, Aug 27, 2018 at 08:30:23PM +0100, Tim Small wrote: > On that basis, I don't see a problem with removing it, but if there's a > preference for me to fix it, (and if I still have some old hardware > somewhere that I can test it on), I'll be happy to do that instead. Well, if you don't have the hardware anymore, fixing it would be moot and the only thing we can do is remove it. So, the question is, do you still have a functioning box and you want to waste your time with it? I mean, this is pentium III, it probably takes forever to build the latest kernel on it and if it were me, I'd simply buy new hardware. Because IMO, it is not worth the energy to even power such ancient crap and waste money on the electricity it is going to consume... -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
SNIP
> +static int record__mmap_read_sync(int trace_fd, struct aiocb **cblocks,
> + int cblocks_size, struct record *rec)
> +{
> + size_t rem;
> + ssize_t size;
> + off_t rem_off;
> + int i, aio_ret, aio_errno, do_suspend;
> + struct perf_mmap *md;
> + struct timespec timeout0 = { 0, 0 };
> + struct timespec timeoutS = { 0, 1000 * 500 * 1 }; // 0.5ms
> +
> + if (!cblocks_size)
> + return 0;
> +
> + do {
> + do_suspend = 0;
> + /* aio_suspend() implementation inside glibc (as of v2.27) is
> + * intrusive and not just blocks waiting io requests completion
> + * but polls requests queue inducing context switches in perf
> + * tool process. When profiling in system wide mode with tracing
> + * context switches the trace may be polluted by context
> switches
> + * from the perf process and the trace size becomes about 3-5
> + * times bigger than that of when writing the trace serially.
> + * To limit the volume of context switches from perf tool
> + * process nanosleep() call below is added prior aio_suspend()
> + * calling till every half of the kernel timer tick which is
> + * usually 1ms (depends on CONFIG_HZ value).
nice, any idea this is intentional for some reason?
was there some impact on the overall performance or
this is purely for the sanity of the trace size?
thanks,
jirka
[PATCH 1/2] dt-bindings: power: Add Spreadtrum SC2731 charger documentation
This patch adds the binding documentation for Spreadtrum SC2731 charger
device.
Signed-off-by: Baolin Wang
---
.../bindings/power/supply/sc2731_charger.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree/bindings/power/supply/sc2731_charger.txt
diff --git a/Documentation/devicetree/bindings/power/supply/sc2731_charger.txt
b/Documentation/devicetree/bindings/power/supply/sc2731_charger.txt
new file mode 100644
index 000..02b616c
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/supply/sc2731_charger.txt
@@ -0,0 +1,14 @@
+Spreadtrum SC2731 PMIC battery charger binding
+
+Required properties:
+ - compatible: Should be "sprd,sc2731-charger".
+ - reg: Address offset of charger register.
+ - phys: Contains a phandle to the USB phy.
+
+Example:
+
+ charger@0 {
+ compatible = "sprd,sc2731-charger";
+ reg = <0x0>;
+ phys = <&ssphy>;
+ };
--
1.7.9.5
[PATCH 2/2] power: supply: Add Spreadtrum SC2731 charger support
This patch adds the SC2731 PMIC switch charger support.
Signed-off-by: Baolin Wang
---
drivers/power/supply/Kconfig |7 +
drivers/power/supply/Makefile |1 +
drivers/power/supply/sc2731_charger.c | 451 +
3 files changed, 459 insertions(+)
create mode 100644 drivers/power/supply/sc2731_charger.c
diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
index ff6dab0..f27cf07 100644
--- a/drivers/power/supply/Kconfig
+++ b/drivers/power/supply/Kconfig
@@ -645,4 +645,11 @@ config CHARGER_CROS_USBPD
what is connected to USB PD ports from the EC and converts
that into power_supply properties.
+config CHARGER_SC2731
+ tristate "Spreadtrum SC2731 charger driver"
+ depends on MFD_SC27XX_PMIC || COMPILE_TEST
+ help
+Say Y here to enable support for battery charging with SC2731
+PMIC chips.
+
endif # POWER_SUPPLY
diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
index a26b402..767105b 100644
--- a/drivers/power/supply/Makefile
+++ b/drivers/power/supply/Makefile
@@ -85,3 +85,4 @@ obj-$(CONFIG_CHARGER_TPS65217)+= tps65217_charger.o
obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
obj-$(CONFIG_AXP288_CHARGER) += axp288_charger.o
obj-$(CONFIG_CHARGER_CROS_USBPD) += cros_usbpd-charger.o
+obj-$(CONFIG_CHARGER_SC2731) += sc2731_charger.o
diff --git a/drivers/power/supply/sc2731_charger.c
b/drivers/power/supply/sc2731_charger.c
new file mode 100644
index 000..49ae16a
--- /dev/null
+++ b/drivers/power/supply/sc2731_charger.c
@@ -0,0 +1,451 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Spreadtrum Communications Inc.
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* PMIC global registers definition */
+#define SC2731_CHARGE_STATUS 0xedc
+#define SC2731_CHARGE_FULL BIT(4)
+#define SC2731_MODULE_EN1 0xc0c
+#define SC2731_CHARGE_EN BIT(5)
+
+/* SC2731 switch charger registers definition */
+#define SC2731_CHG_CFG00x0
+#define SC2731_CHG_CFG10x4
+#define SC2731_CHG_CFG20x8
+#define SC2731_CHG_CFG30xc
+#define SC2731_CHG_CFG40x10
+#define SC2731_CHG_CFG50x28
+
+/* SC2731_CHG_CFG0 register definition */
+#define SC2731_PRECHG_RNG_SHIFT11
+#define SC2731_PRECHG_RNG_MASK GENMASK(12, 11)
+
+#define SC2731_TERMINATION_VOL_MASKGENMASK(2, 1)
+#define SC2731_TERMINATION_VOL_SHIFT 1
+#define SC2731_TERMINATION_VOL_CAL_MASKGENMASK(8, 3)
+#define SC2731_TERMINATION_VOL_CAL_SHIFT 3
+#define SC2731_TERMINATION_CUR_MASKGENMASK(2, 0)
+
+#define SC2731_CC_EN BIT(13)
+#define SC2731_CHARGER_PD BIT(0)
+
+/* SC2731_CHG_CFG1 register definition */
+#define SC2731_CUR_MASKGENMASK(5, 0)
+
+/* SC2731_CHG_CFG5 register definition */
+#define SC2731_CUR_LIMIT_SHIFT 8
+#define SC2731_CUR_LIMIT_MASK GENMASK(9, 8)
+
+#define SC2731_CURRENT_LIMIT_100 100
+#define SC2731_CURRENT_LIMIT_500 500
+#define SC2731_CURRENT_LIMIT_900 900
+#define SC2731_CURRENT_LIMIT_2000 2000
+
+#define SC2731_CURRENT_PRECHG 450
+#define SC2731_CURRENT_STEP50
+
+struct sc2731_charger_info {
+ struct device *dev;
+ struct regmap *regmap;
+ struct usb_phy *usb_phy;
+ struct notifier_block usb_notify;
+ struct power_supply *psy_usb;
+ bool charging;
+ u32 base;
+};
+
+static void sc2731_charger_stop_charge(struct sc2731_charger_info *info)
+{
+ regmap_update_bits(info->regmap, info->base + SC2731_CHG_CFG0,
+ SC2731_CC_EN, 0);
+
+ regmap_update_bits(info->regmap, info->base + SC2731_CHG_CFG0,
+ SC2731_CHARGER_PD, SC2731_CHARGER_PD);
+}
+
+static int sc2731_charger_start_charge(struct sc2731_charger_info *info)
+{
+ int ret;
+
+ /* Enable charger constant current mode */
+ ret = regmap_update_bits(info->regmap, info->base + SC2731_CHG_CFG0,
+SC2731_CC_EN, SC2731_CC_EN);
+ if (ret)
+ return ret;
+
+ /* Start charging */
+ return regmap_update_bits(info->regmap, info->base + SC2731_CHG_CFG0,
+ SC2731_CHARGER_PD, 0);
+}
+
+static int sc2731_charger_set_current_limit(struct sc2731_charger_info *info,
+ u32 limit)
+{
+ u32 val;
+
+ if (limit <= SC2731_CURRENT_LIMIT_100)
+ val = 0;
+ else if (limit <= SC2731_CURRENT_LIMIT_500)
+ val = 3;
+ else if (limit <= SC2731_CURRENT_LIMIT_900)
+ val = 2;
+ else
+ val = 1;
+
+ return regm
Re: [PATCH] x86/entry/64: wipe KASAN stack shadow in rewind_stack_do_exit()
On 08/25/2018 02:58 AM, Jann Horn wrote:
> Reset the KASAN shadow state of the task stack when rewinding RSP.
> Without this, a kernel oops will leave parts of the stack poisoned, and
> code running under do_exit() can trip over such poisoned regions and cause
> nonsensical false-positive KASAN reports about stack-out-of-bounds bugs.
>
> This patch is 64-bit only because KASAN doesn't exist on 32-bit.
>
> This patch does not wipe exception stacks; if you oops on an exception
> stack, you might get random KASAN false-positives from other tasks
> afterwards. This is probably relatively uninteresting, since if you're
> oopsing on an exception stack, you likely have bigger things to worry
> about. It'd be more interesting if vmapped stacks and KASAN were
> compatible, since then handle_stack_overflow() would oops from exception
> stack context.
>
> Fixes: 2deb4be28077 ("x86/dumpstack: When OOPSing, rewind the stack before
> do_exit()")
> Signed-off-by: Jann Horn
> ---
> I have manually tested that an oops that previously triggered this bug
> doesn't trigger it anymore.
>
> It would be possible to rewrite this assembly to use fewer instructions
> in non-KASAN builds, but I think it's clearer this way.
>
> If anyone thinks that this thing should also be wiping exception stacks:
> I did write some (entirely untested) code that should take care of that
> (before realizing that it's rather unlikely to occur in practice because
> vmapped stacks and KASAN are mutually exclusive), but I'm not sure
> whether it's worth complicating this code for that.
> In case anyone's curious how that would look:
> https://gist.github.com/thejh/c91f9b4e3cc4c58659bb3cd056c4fa40
>
> arch/x86/entry/entry_64.S | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 957dfb693ecc..92d3ad5bd365 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -1673,9 +1673,25 @@ ENTRY(rewind_stack_do_exit)
> /* Prevent any naive code from trying to unwind to our caller. */
> xorl%ebp, %ebp
>
> + movq%rdi, %r14
> +
> movqPER_CPU_VAR(cpu_current_top_of_stack), %rax
> - leaq-PTREGS_SIZE(%rax), %rsp
> + leaq-PTREGS_SIZE(%rax), %r15
> +
> +#ifdef CONFIG_KASAN
> + /*
> + * Remove stack poisons left behind by our old stack.
> + * Do this before updating RSP to avoid problems in case we get some
> + * interrupt that is not handled on an exception stack before we're done
> + * with the unpoisoning.
> + */
> + movq%r15, %rdi
> + callkasan_unpoison_task_stack_below
> +#endif
Why this has to be done in the rewind_stack_do_exit()?
Are there any problems with calling the kasan_unpoison_task_stack(current) from
oops_end(), before the rewind_stack_do_exit()?
> +
> + movq%r15, %rsp
> UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
>
> + movq%r14, %rdi
> calldo_exit
> END(rewind_stack_do_exit)
>
[PATCH] memory_hotplug: fix kernel_panic on offline page processing
Within show_valid_zones() the function test_pages_in_a_zone() should be
called for online memory blocks only. Otherwise it might lead to the
VM_BUG_ON due to uninitialized struct pages (when CONFIG_DEBUG_VM_PGFLAGS
kernel option is set):
page dumped because: VM_BUG_ON_PAGE(PagePoisoned(p))
[ cut here ]
Call Trace:
([<0038f91e>] test_pages_in_a_zone+0xe6/0x168)
[<00923472>] show_valid_zones+0x5a/0x1a8
[<00900284>] dev_attr_show+0x3c/0x78
[<0046f6f0>] sysfs_kf_seq_show+0xd0/0x150
[<003ef662>] seq_read+0x212/0x4b8
[<003bf202>] __vfs_read+0x3a/0x178
[<003bf3ca>] vfs_read+0x8a/0x148
[<003bfa3a>] ksys_read+0x62/0xb8
[<00bc2220>] system_call+0xdc/0x2d8
That VM_BUG_ON was triggered by the page poisoning introduced in
mm/sparse.c with the git commit d0dc12e86b31 ("mm/memory_hotplug: optimize
memory hotplug")
With the same commit the new 'nid' field has been added to the struct
memory_block in order to store and later on derive the node id for offline
pages (instead of accessing struct page which might be uninitialized). But
one reference to nid in show_valid_zones() function has been overlooked.
Fixed with current commit.
Also, nr_pages will not be used any more after test_pages_in_a_zone() call,
do not update it.
Fixes: d0dc12e86b31 ("mm/memory_hotplug: optimize memory hotplug")
Cc: # v4.17+
Cc: Pavel Tatashin
Signed-off-by: Mikhail Zaslonko
---
drivers/base/memory.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/base/memory.c b/drivers/base/memory.c
index f5e560188a18..622ab8edc035 100644
--- a/drivers/base/memory.c
+++ b/drivers/base/memory.c
@@ -416,26 +416,24 @@ static ssize_t show_valid_zones(struct device *dev,
struct zone *default_zone;
int nid;
- /*
-* The block contains more than one zone can not be offlined.
-* This can happen e.g. for ZONE_DMA and ZONE_DMA32
-*/
- if (!test_pages_in_a_zone(start_pfn, start_pfn + nr_pages,
&valid_start_pfn, &valid_end_pfn))
- return sprintf(buf, "none\n");
-
- start_pfn = valid_start_pfn;
- nr_pages = valid_end_pfn - start_pfn;
-
/*
* Check the existing zone. Make sure that we do that only on the
* online nodes otherwise the page_zone is not reliable
*/
if (mem->state == MEM_ONLINE) {
+ /*
+* The block contains more than one zone can not be offlined.
+* This can happen e.g. for ZONE_DMA and ZONE_DMA32
+*/
+ if (!test_pages_in_a_zone(start_pfn, start_pfn + nr_pages,
+ &valid_start_pfn, &valid_end_pfn))
+ return sprintf(buf, "none\n");
+ start_pfn = valid_start_pfn;
strcat(buf, page_zone(pfn_to_page(start_pfn))->name);
goto out;
}
- nid = pfn_to_nid(start_pfn);
+ nid = mem->nid;
default_zone = zone_for_pfn_range(MMOP_ONLINE_KEEP, nid, start_pfn,
nr_pages);
strcat(buf, default_zone->name);
--
2.16.4
Re: [PATCH] rtc: rtc-omap: Replace mdelay() with msleep() in omap_rtc_power_off()
On 2018/8/28 16:49, Johan Hovold wrote: On Mon, Aug 27, 2018 at 10:55:17PM +0200, Alexandre Belloni wrote: Hi, On 30/07/2018 21:53:14+0800, Jia-Ju Bai wrote: omap_rtc_power_off() is never called in atomic context. It calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep(). This is found by a static analysis tool named DCNS written by myself. Signed-off-by: Jia-Ju Bai --- drivers/rtc/rtc-omap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 39086398833e..ef3d09525d0f 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -476,7 +476,7 @@ static void omap_rtc_power_off(void) * power off the system. Add a 500 ms margin for external latencies * (e.g. debounce circuits). */ - mdelay(2500); + msleep(2500); I'm not sure about that one because this is a poweroff function so it doesn't really make sense to sleep versus busy waiting (all the drivers in power/reset use mdelay()) This power-off handler is called with interrupts disabled (as mentioned in the function header) and must not sleep. Thanks for your reply :) I check the code again, and find that you are right. Sorry for my incorrect report. Best wishes, Jia-Ju Bai
Re: [PATCH v4 0/2] clk: qcom: Add support for RCG to register for DFS
On 8/28/2018 2:34 AM, Stephen Boyd wrote: Quoting Stephen Boyd (2018-08-23 11:25:41) Quoting Taniya Das (2018-08-22 03:28:31) H. Ok. That won't work then. recalc_rate() better not try to populate the frequency table then or it will not work. So I suppose it needs to fallback to reading the registers and assuming the parent_rate coming in is the actual frequency of it's parent until the frequency table pointer is non-NULL. Would that work? Yes that would work. Ok. BTW, does DFS switch parents without software knowing about it? DFS would not switch until a HW request is sent, but SW would be unware of the switch except the current_perf_state being updated with the requested level. What happens in that case? Does the QUP driver make sure that the new parent of this RCG is properly enabled so that it can switch to it when needed? I am not sure if they poll for any of their QUP HW state to make sure the switch is complete. I'm still trying to understand this whole design. Who takes care of the voltage requirements in this case? The QUP driver as well? When the QUP driver requires to switch to new performance level, the first request would be to set_rate()(QUP driver would get the list of supported frequencies using the clk_round_rate()) which in QCOM clock driver would take care of setting the required voltage for the new parent switch. It would also make sure that the new parent is enabled if the QUP clk is enabled. That's another concern. Does the PLL turn on automatically when the RCG switches to it? Then the QUP driver would request the HW for a new perf switch which would result to a DFS switch for the QUP clocks. It sounds like the QUP driver does half of the work via the clk APIs and then the other half through the DFS register. Maybe the QUP driver should be registering a clk as well for its DFS register so it can all be clk API calls here. Something to consider. Anyway, that's not important to this patch so here's the updated patch. I've squashed this in and applied the patches. Thanks Stephen. -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
[PATCH] perf probe powerpc: Ignore SyS symbols irrespective of endianness
This makes sure that the SyS symbols are ignored for any powerpc
system, not just the big endian ones.
Fixes: fb6d59423115 ("perf probe ppc: Use the right prefix when ignoring SyS
symbols on ppc")
Reported-by: Naveen N. Rao
Signed-off-by: Sandipan Das
Reviewed-by: Kamalesh Babulal
---
tools/perf/arch/powerpc/util/sym-handling.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tools/perf/arch/powerpc/util/sym-handling.c
b/tools/perf/arch/powerpc/util/sym-handling.c
index 20e7d74d86cd..10a44e946f77 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -22,15 +22,16 @@ bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
#endif
-#if !defined(_CALL_ELF) || _CALL_ELF != 2
int arch__choose_best_symbol(struct symbol *syma,
struct symbol *symb __maybe_unused)
{
char *sym = syma->name;
+#if !defined(_CALL_ELF) || _CALL_ELF != 2
/* Skip over any initial dot */
if (*sym == '.')
sym++;
+#endif
/* Avoid "SyS" kernel syscall aliases */
if (strlen(sym) >= 3 && !strncmp(sym, "SyS", 3))
@@ -41,6 +42,7 @@ int arch__choose_best_symbol(struct symbol *syma,
return SYMBOL_A;
}
+#if !defined(_CALL_ELF) || _CALL_ELF != 2
/* Allow matching against dot variants */
int arch__compare_symbol_names(const char *namea, const char *nameb)
{
--
2.14.4
[PATCH 3/3] nds32: fix build error because of wrong semicolon
It shall be removed in the define usage. We shall not put a semicolon there.
/kisskb/src/arch/nds32/include/asm/elf.h:126:29: error: expected '}' before ';'
token
#define ELF_DATA ELFDATA2LSB;
^
/kisskb/src/fs/proc/kcore.c:318:17: note: in expansion of macro 'ELF_DATA'
[EI_DATA] = ELF_DATA,
^~~~
/kisskb/src/fs/proc/kcore.c:312:15: note: to match this '{'
.e_ident = {
^
/kisskb/src/scripts/Makefile.build:307: recipe for target 'fs/proc/kcore.o'
failed
Signed-off-by: Greentime Hu
---
arch/nds32/include/asm/elf.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/nds32/include/asm/elf.h b/arch/nds32/include/asm/elf.h
index 56c479058802..f5f9cf7e0544 100644
--- a/arch/nds32/include/asm/elf.h
+++ b/arch/nds32/include/asm/elf.h
@@ -121,9 +121,9 @@ struct elf32_hdr;
*/
#define ELF_CLASS ELFCLASS32
#ifdef __NDS32_EB__
-#define ELF_DATA ELFDATA2MSB;
+#define ELF_DATA ELFDATA2MSB
#else
-#define ELF_DATA ELFDATA2LSB;
+#define ELF_DATA ELFDATA2LSB
#endif
#define ELF_ARCH EM_NDS32
#define USE_ELF_CORE_DUMP
--
2.18.0
[PATCH 1/3] nds32: Only print one page of stack when die to prevent printing too much information.
It may print too much information sometimes if the stack is wrong or
too big. This patch can limit the debug information in a page of stack.
Signed-off-by: Greentime Hu
---
arch/nds32/kernel/traps.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/nds32/kernel/traps.c b/arch/nds32/kernel/traps.c
index b0b85b7ab079..1496aab48998 100644
--- a/arch/nds32/kernel/traps.c
+++ b/arch/nds32/kernel/traps.c
@@ -173,11 +173,10 @@ void die(const char *str, struct pt_regs *regs, int err)
pr_emerg("CPU: %i\n", smp_processor_id());
show_regs(regs);
pr_emerg("Process %s (pid: %d, stack limit = 0x%p)\n",
-tsk->comm, tsk->pid, task_thread_info(tsk) + 1);
+tsk->comm, tsk->pid, end_of_stack(tsk));
if (!user_mode(regs) || in_interrupt()) {
- dump_mem("Stack: ", regs->sp,
-THREAD_SIZE + (unsigned long)task_thread_info(tsk));
+ dump_mem("Stack: ", regs->sp, (regs->sp + PAGE_SIZE) &
PAGE_MASK);
dump_instr(regs);
dump_stack();
}
--
2.18.0
[PATCH 2/3] nds32: Fix a kernel panic issue because of wrong frame pointer access.
It can make sure that trace_hardirqs_off/trace_hardirqs_on can get a correct return address by frame pointer through __builtin_return_address() in this fix. Unable to handle kernel paging request at virtual address fffc pgd = 3c42e9cf [fffc] *pgd=02a9c000 Internal error: Oops: 1 [#1] Modules linked in: CPU: 0 PC is at trace_hardirqs_off+0x78/0xec LP is at common_exception_handler+0xda/0xf4 pc : []lp : []Tainted: GW sp : ada60ab0 fp : efcaff48 gp : 3a020490 r25: efcb r24: r23: r22: r21: r20: 000700c1 r19: 000700ca r18: 3a21b018 r17: 0001 r16: 0002 r15: 0001 r14: 002a r13: 3a00a804 r12: ada60ab0 r11: 3a113af8 r10: 3a01c530 r9 : 3a124404 r8 : 00120f9c r7 : b2352eba r6 : r5 : 3a126b58 r4 : r3 : 3a1726a8 r2 : b2921000 r1 : r0 : IRQs off Segment user Process init (pid: 1, stack limit = 0x069d7f15) Stack: (0xada60ab0 to 0xada61000) Stack: 0aa0: 0003 3a11 0011f000 Stack: 0ac0: 0005 ada60b10 3a01fe68 ada60b0c ada60b08 Stack: 0ae0: ada60ab8 ada60b30 3a020550 0001 3a11c2f8 3a01c6e8 Stack: 0b00: 3a01cb80 fba8 3a113af8 3a21b018 3a122c28 3ec4 0165 Stack: 0b20: 3a126aec 006c 0001 3a01fe68 0003 Stack: 0b40: 0001 03f8 3a020930 3a01c530 0008 ada60c18 3a020490 3a003120 Stack: 0b60: Stack: 0b80: 8000 Stack: 0ba0: 0001 3a020550 3a01d020 f000 f000 Stack: 0bc0: ada60f2c 0001 Stack: 0be0: 3a01fe68 fab0 8034 0008 3a0010cc 3a01fe68 Stack: 0c00: 0001 ada60c88 3a020490 3a0139d4 0009dc6f Stack: 0c20: ada60fce f000 ebe0 3a020038 3a020550 Stack: 0c40: ada60f20 ada60c90 3a0007f0 3a0002a8 ada60c8c ada60c88 Stack: 0c60: 3a020490 3a004570 ada60f20 3a0007f0 3a00 Stack: 0c80: 3a020490 3a004850 3a013f24 3a00 3a01ff44 Stack: 0ca0: 3a01ff84 3a01ff7c Stack: 0cc0: 3a01ff4c 3a01ff5c 3a01ff64 3a01ff9c 3a01ffa4 3a01ffac 3a01ff6c 3a01ff74 Stack: 0ce0: 3a01ff44 Stack: 0d00: 3a01ff8c 3a01ff94 Stack: 0d20: Stack: 0d40: 3a01ffbc 3a01ffb4 Stack: 0d60: 3a01ffc4 Stack: 0d80: Stack: 0da0: Stack: 0dc0: 3a01ff54 Stack: 0de0: Stack: 0e00: Stack: 0e20: 0004 Stack: 0e40: Stack: 0e60: Stack: 0e80: Stack: 0ea0: Stack: 0ec0: Stack: 0ee0: ada60f20 Stack: 0f00: 3a020490 3a000b24 Stack: 0f20: 0001 ada60fde ada60fe4 ada60feb 0021 3a038000 Stack: 0f40: 0010 0009dc6f 0006 1000 0011 0064 0003 8034 Stack: 0f60: 0004 0020 0005 0008 0007 3a00 0008 Stack: 0f80: 0009 ebe0 000b 000c 000d Stack: 0fa0: 000e 0017 0019 ada60fce 001f ada60ff6 Stack: 0fc0: b501 fa839914 23b5dd89 a2aea540 692fc82e Stack: 0fe0: 0074696e 454d4f48 54002f3d 3d4d5245 756e696c 692f0078 0074696e CPU: 0 PID: 1 Comm: init Tainted: GW 4.18.0-00015-g1888b64a2558-dirty #112 Hardware name: andestech,ae3xx (DT) Call Trace: [] dump_stack+0x2c/0x38 [] die+0x128/0x18c [] do_page_fault+0x3b8/0x4e0 [] ret_from_exception+0x0/0x10 [] common_exception_handler+0xda/0xf4 Signed-off-by: Greentime Hu --- arch/n
Re: [PATCH] mtd: rawnand: Convert to using %pOFn instead of device_node.name
On Mon, 27 Aug 2018 20:52:34 -0500
Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Boris Brezillon
> Cc: Miquel Raynal
> Cc: Richard Weinberger
> Cc: David Woodhouse
> Cc: Brian Norris
> Cc: Marek Vasut
> Cc: linux-...@lists.infradead.org
> Signed-off-by: Rob Herring
Acked-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/fsl_upm.c | 4 ++--
> drivers/mtd/nand/raw/ndfc.c| 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c
> index a88e2cf66e0f..ca82727eca94 100644
> --- a/drivers/mtd/nand/raw/fsl_upm.c
> +++ b/drivers/mtd/nand/raw/fsl_upm.c
> @@ -184,8 +184,8 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
> return -ENODEV;
>
> nand_set_flash_node(&fun->chip, flash_np);
> - mtd->name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
> - flash_np->name);
> + mtd->name = kasprintf(GFP_KERNEL, "0x%llx.%pOFn", (u64)io_res->start,
> + flash_np);
> if (!mtd->name) {
> ret = -ENOMEM;
> goto err;
> diff --git a/drivers/mtd/nand/raw/ndfc.c b/drivers/mtd/nand/raw/ndfc.c
> index 540fa1a0ea24..b193f373f235 100644
> --- a/drivers/mtd/nand/raw/ndfc.c
> +++ b/drivers/mtd/nand/raw/ndfc.c
> @@ -174,8 +174,8 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
> return -ENODEV;
> nand_set_flash_node(chip, flash_np);
>
> - mtd->name = kasprintf(GFP_KERNEL, "%s.%s", dev_name(&ndfc->ofdev->dev),
> - flash_np->name);
> + mtd->name = kasprintf(GFP_KERNEL, "%s.%pOFn",
> dev_name(&ndfc->ofdev->dev),
> + flash_np);
> if (!mtd->name) {
> ret = -ENOMEM;
> goto err;
Re: [PATCH v2 1/2]: perf util: map data buffer for preserving collected data
Hi,
On 28.08.2018 11:45, Jiri Olsa wrote:
> On Mon, Aug 27, 2018 at 12:02:35PM +0300, Alexey Budankov wrote:
>> Hi,
>>
>> On 27.08.2018 11:33, Jiri Olsa wrote:
>>> On Thu, Aug 23, 2018 at 07:42:09PM +0300, Alexey Budankov wrote:
>>>
>>> SNIP
>>>
diff --git a/tools/perf/util/mmap.c b/tools/perf/util/mmap.c
index fc832676a798..e71d46cb01cc 100644
--- a/tools/perf/util/mmap.c
+++ b/tools/perf/util/mmap.c
@@ -155,6 +155,10 @@ void __weak auxtrace_mmap_params__set_idx(struct
auxtrace_mmap_params *mp __mayb
void perf_mmap__munmap(struct perf_mmap *map)
{
+ if (map->data != NULL) {
+ munmap(map->data, perf_mmap__mmap_len(map));
+ map->data = NULL;
+ }
if (map->base != NULL) {
munmap(map->base, perf_mmap__mmap_len(map));
map->base = NULL;
@@ -190,6 +194,14 @@ int perf_mmap__mmap(struct perf_mmap *map, struct
mmap_params *mp, int fd)
map->base = NULL;
return -1;
}
+ map->data = mmap(NULL, perf_mmap__mmap_len(map), PROT_READ | PROT_WRITE,
+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
>>>
>>> hum, why does map->data need to be mmap-ed?
>>
>> The same way as for kernel buffers. If you see better alternatives it could
>> be applied.
>
> I meant why not just allocate them with mmaloc?
Yep. Using malloc()/free() makes the implementation shorter. Included into
[PATCH v4 1/2].
>
> jirka
>
Re: [patch V2 7/7] scripts: Add SPDX checker script
On Mon, May 14, 2018 at 4:38 PM Philippe Ombredanne
wrote:
> On Wed, Apr 25, 2018 at 10:30 PM, Thomas Gleixner wrote:
> > The SPDX-License-Identifiers are growing in the kernel and so grow
> > expression failures and license IDs are used which have no corresponding
> > license text file in the LICENSES directory.
> >
> > Add a script which gathers information from the LICENSES directory,
> > i.e. the various tags in the licenses and exception files and then scans
> > either input from stdin, which it treats as a single file or if started
> > without arguments it scans the full kernel tree.
> >
> > It checks whether the license expression syntax is correct and also
> > validates whether the license identifiers used in the expressions are
> > available in the LICENSES files.
>
> Looking good to me! And the use of ply is sleek.
For the record (currently Google doesn't find this issue yet):
ImportError: No module named ply
$ sudo apt-get install python-ply
ImportError: No module named git
$ sudo apt-get install python-git
Works!
Apparently I didn't have any of these two packages installed on any of my
Ubuntu 18.04LTS and 16.04LTS machines...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] perf probe powerpc: Ignore SyS symbols irrespective of endianness
Sandipan Das wrote:
This makes sure that the SyS symbols are ignored for any powerpc
system, not just the big endian ones.
Fixes: fb6d59423115 ("perf probe ppc: Use the right prefix when ignoring SyS symbols
on ppc")
Reported-by: Naveen N. Rao
Signed-off-by: Sandipan Das
Reviewed-by: Kamalesh Babulal
---
tools/perf/arch/powerpc/util/sym-handling.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
LGTM. Thanks for the fix.
Acked-by: Naveen N. Rao
- Naveen
[PATCH v2] cpupower: remove stringop-truncation waring
The strncpy doesn't null terminate the string because the size is too
short by one byte.
parse.c: In function ‘prepare_default_config’:
parse.c:148:2: warning: ‘strncpy’ output truncated before terminating
nul copying 8 bytes from a string of the same length
[-Wstringop-truncation]
strncpy(config->governor, "ondemand", 8);
^~~~
The normal method of passing the length of the destination buffer works
correctly here.
Fixes: 7fe2f6399a84 ("cpupowerutils - cpufrequtils extended with quite some
features")
Signed-off-by: Anders Roxell
---
tools/power/cpupower/bench/parse.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/power/cpupower/bench/parse.c
b/tools/power/cpupower/bench/parse.c
index 9ba8a44ad2a7..84caee38418f 100644
--- a/tools/power/cpupower/bench/parse.c
+++ b/tools/power/cpupower/bench/parse.c
@@ -145,7 +145,7 @@ struct config *prepare_default_config()
config->cpu = 0;
config->prio = SCHED_HIGH;
config->verbose = 0;
- strncpy(config->governor, "ondemand", 8);
+ strncpy(config->governor, "ondemand", sizeof(config->governor));
config->output = stdout;
--
2.18.0
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
Hi,
On 28.08.2018 11:50, Jiri Olsa wrote:
> On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
>>
>> Trace file offset are linearly calculated by perf_mmap__push() code
>> for the next possible write operation, but file position is updated by
>> the kernel only in the second lseek() syscall after the loop.
>> The first lseek() syscall reads that file position for
>> the next loop iterations.
>>
>> record__mmap_read_sync implements sort of a barrier between spilling
>> ready profiling data to disk.
>>
>> Signed-off-by: Alexey Budankov
>> ---
>> Changes in v3:
>> - written comments about nanosleep(0.5ms) call prior aio_suspend()
>> to cope with intrusiveness of its implementation in glibc;
>> - written comments about rationale behind coping profiling data
>> into mmap->data buffer;
>> ---
>> tools/perf/builtin-record.c | 125
>> +---
>> tools/perf/util/mmap.c | 36 -
>> tools/perf/util/mmap.h | 2 +-
>> 3 files changed, 143 insertions(+), 20 deletions(-)
>>
>> diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
>> index 22ebeb92ac51..4ac61399a09a 100644
>> --- a/tools/perf/builtin-record.c
>> +++ b/tools/perf/builtin-record.c
>> @@ -53,6 +53,7 @@
>> #include
>> #include
>> #include
>> +#include
>>
>> struct switch_output {
>> bool enabled;
>> @@ -121,6 +122,23 @@ static int record__write(struct record *rec, void *bf,
>> size_t size)
>> return 0;
>> }
>>
>> +static int record__aio_write(int trace_fd, struct aiocb *cblock,
>> +void *buf, size_t size, off_t off)
>> +{
>> +cblock->aio_fildes = trace_fd;
>> +cblock->aio_buf= buf;
>> +cblock->aio_nbytes = size;
>> +cblock->aio_offset = off;
>> +cblock->aio_sigevent.sigev_notify = SIGEV_NONE;
>> +
>> +if (aio_write(cblock) == -1) {
>> +pr_err("failed to queue perf data, error: %m\n");
>> +return -1;
>> +}
>> +
>> +return 0;
>> +}
>> +
>> static int process_synthesized_event(struct perf_tool *tool,
>> union perf_event *event,
>> struct perf_sample *sample __maybe_unused,
>> @@ -130,12 +148,14 @@ static int process_synthesized_event(struct perf_tool
>> *tool,
>> return record__write(rec, event, event->header.size);
>> }
>>
>> -static int record__pushfn(void *to, void *bf, size_t size)
>> +static int record__pushfn(void *to, void *bf, size_t size, off_t off)
>> {
>> struct record *rec = to;
>> +struct perf_mmap *map = bf;
>
> the argument needs to change for record__pushfn,
> now with your changes, it's no longer 'void *bf',
> but 'struct perf_mmap *map'
Ok. Included into [PATCH v4 2/2].
>
> also I'm little confused why we have '*to' and cast
> it back to 'struct record', but so be it ;-)
Supported. :)
>
> thanks,
> jirka
>
Re: [PATCH v5 6/6] soc: qcom: Allow COMPILE_TEST of qcom SoC Kconfigs
Hi Niklas,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on agross/for-next]
[also build test WARNING on v4.19-rc1 next-20180828]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Niklas-Cassel/soc-qcom-Allow-COMPILE_TEST-of-qcom-SoC-Kconfigs/20180827-195255
base: https://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git
for-next
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 8.1.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=ia64
All warnings (new ones prefixed by >>):
drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel':
>> drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32
>> equals destination size [-Wstringop-truncation]
strncpy(chinfo.name, name, sizeof(chinfo.name));
^~~
--
In function 'apr_add_device',
inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7,
inlined from 'apr_probe' at drivers//soc/qcom/apr.c:290:2:
>> drivers//soc/qcom/apr.c:222:3: warning: 'strncpy' specified bound 32 equals
>> destination size [-Wstringop-truncation]
strncpy(adev->name, np->name, APR_NAME_SIZE);
^~~~
vim +/strncpy +284 drivers//soc/qcom/wcnss_ctrl.c
6be2b3d0 Bjorn Andersson 2016-06-06 272
6be2b3d0 Bjorn Andersson 2016-06-06 273 /**
6be2b3d0 Bjorn Andersson 2016-06-06 274 * qcom_wcnss_open_channel() - open
additional SMD channel to WCNSS
6be2b3d0 Bjorn Andersson 2016-06-06 275 * @wcnss:wcnss handle, retrieved
from drvdata
6be2b3d0 Bjorn Andersson 2016-06-06 276 * @name: SMD channel name
6be2b3d0 Bjorn Andersson 2016-06-06 277 * @cb: callback to
handle incoming data on the channel
6be2b3d0 Bjorn Andersson 2016-06-06 278 */
5052de8d Bjorn Andersson 2017-03-27 279 struct rpmsg_endpoint
*qcom_wcnss_open_channel(void *wcnss, const char *name, rpmsg_rx_cb_t cb, void
*priv)
6be2b3d0 Bjorn Andersson 2016-06-06 280 {
5052de8d Bjorn Andersson 2017-03-27 281struct rpmsg_channel_info
chinfo;
6be2b3d0 Bjorn Andersson 2016-06-06 282struct wcnss_ctrl *_wcnss =
wcnss;
6be2b3d0 Bjorn Andersson 2016-06-06 283
5052de8d Bjorn Andersson 2017-03-27 @284strncpy(chinfo.name, name,
sizeof(chinfo.name));
5052de8d Bjorn Andersson 2017-03-27 285chinfo.src = RPMSG_ADDR_ANY;
5052de8d Bjorn Andersson 2017-03-27 286chinfo.dst = RPMSG_ADDR_ANY;
5052de8d Bjorn Andersson 2017-03-27 287
5052de8d Bjorn Andersson 2017-03-27 288return
rpmsg_create_ept(_wcnss->channel->rpdev, cb, priv, chinfo);
6be2b3d0 Bjorn Andersson 2016-06-06 289 }
6be2b3d0 Bjorn Andersson 2016-06-06 290
EXPORT_SYMBOL(qcom_wcnss_open_channel);
6be2b3d0 Bjorn Andersson 2016-06-06 291
:: The code at line 284 was first introduced by commit
:: 5052de8deff5619a9b7071f00084fd0264b58e17 soc: qcom: smd: Transition
client drivers from smd to rpmsg
:: TO: Bjorn Andersson
:: CC: David S. Miller
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
[PATCH v2 0/4] devres: provide and use devm_kstrdup_const()
This series implements devm_kstrdup_const() together with some prerequisite changes and uses it in pmc-atom driver. v1 -> v2: - fixed the changelog in the patch implementing devm_kstrdup_const() - fixed the kernel doc - moved is_kernel_rodata() to asm-generic/sections.h - fixed constness Bartosz Golaszewski (4): devres: constify p in devm_kfree() mm: move is_kernel_rodata() to asm-generic/sections.h devres: provide devm_kstrdup_const() clk: pmc-atom: use devm_kstrdup_const() drivers/base/devres.c | 43 -- drivers/clk/x86/clk-pmc-atom.c | 19 --- include/asm-generic/sections.h | 14 +++ include/linux/device.h | 5 +++- mm/util.c | 7 -- 5 files changed, 63 insertions(+), 25 deletions(-) -- 2.18.0
[PATCH v2 3/4] devres: provide devm_kstrdup_const()
Provide a resource managed version of kstrdup_const(). This variant
internally calls devm_kstrdup() on pointers that are outside of
.rodata section and returns the string as is otherwise.
Also provide a corresponding version of devm_kfree().
Signed-off-by: Bartosz Golaszewski
---
drivers/base/devres.c | 38 ++
include/linux/device.h | 3 +++
2 files changed, 41 insertions(+)
diff --git a/drivers/base/devres.c b/drivers/base/devres.c
index 438c91a43508..48185d57bc5b 100644
--- a/drivers/base/devres.c
+++ b/drivers/base/devres.c
@@ -11,6 +11,8 @@
#include
#include
+#include
+
#include "base.h"
struct devres_node {
@@ -822,6 +824,28 @@ char *devm_kstrdup(struct device *dev, const char *s,
gfp_t gfp)
}
EXPORT_SYMBOL_GPL(devm_kstrdup);
+/**
+ * devm_kstrdup_const - resource managed conditional string duplication
+ * @dev: device for which to duplicate the string
+ * @s: the string to duplicate
+ * @gfp: the GFP mask used in the kmalloc() call when allocating memory
+ *
+ * Strings allocated by devm_kstrdup_const will be automatically freed when
+ * the associated device is detached.
+ *
+ * RETURNS:
+ * Source string if it is in .rodata section otherwise it falls back to
+ * devm_kstrdup.
+ */
+const char *devm_kstrdup_const(struct device *dev, const char *s, gfp_t gfp)
+{
+ if (is_kernel_rodata((unsigned long)s))
+ return s;
+
+ return devm_kstrdup(dev, s, gfp);
+}
+EXPORT_SYMBOL(devm_kstrdup_const);
+
/**
* devm_kvasprintf - Allocate resource managed space and format a string
* into that.
@@ -895,6 +919,20 @@ void devm_kfree(struct device *dev, const void *p)
}
EXPORT_SYMBOL_GPL(devm_kfree);
+/**
+ * devm_kfree_const - Resource managed conditional kfree
+ * @dev: device this memory belongs to
+ * @p: memory to free
+ *
+ * Function calls devm_kfree only if @p is not in .rodata section.
+ */
+void devm_kfree_const(struct device *dev, const void *p)
+{
+ if (!is_kernel_rodata((unsigned long)p))
+ devm_kfree(dev, p);
+}
+EXPORT_SYMBOL(devm_kfree_const);
+
/**
* devm_kmemdup - Resource-managed kmemdup
* @dev: Device this memory belongs to
diff --git a/include/linux/device.h b/include/linux/device.h
index 33f7cb271fbb..79ccc6eb0975 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -693,7 +693,10 @@ static inline void *devm_kcalloc(struct device *dev,
return devm_kmalloc_array(dev, n, size, flags | __GFP_ZERO);
}
extern void devm_kfree(struct device *dev, const void *p);
+extern void devm_kfree_const(struct device *dev, const void *p);
extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp)
__malloc;
+extern const char *devm_kstrdup_const(struct device *dev,
+ const char *s, gfp_t gfp);
extern void *devm_kmemdup(struct device *dev, const void *src, size_t len,
gfp_t gfp);
--
2.18.0
[PATCH v2 1/4] devres: constify p in devm_kfree()
Make devm_kfree() signature uniform with that of kfree(). To avoid
compiler warnings: cast p to (void *) when calling devres_destroy().
Signed-off-by: Bartosz Golaszewski
---
drivers/base/devres.c | 5 +++--
include/linux/device.h | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/base/devres.c b/drivers/base/devres.c
index f98a097e73f2..438c91a43508 100644
--- a/drivers/base/devres.c
+++ b/drivers/base/devres.c
@@ -885,11 +885,12 @@ EXPORT_SYMBOL_GPL(devm_kasprintf);
*
* Free memory allocated with devm_kmalloc().
*/
-void devm_kfree(struct device *dev, void *p)
+void devm_kfree(struct device *dev, const void *p)
{
int rc;
- rc = devres_destroy(dev, devm_kmalloc_release, devm_kmalloc_match, p);
+ rc = devres_destroy(dev, devm_kmalloc_release,
+ devm_kmalloc_match, (void *)p);
WARN_ON(rc);
}
EXPORT_SYMBOL_GPL(devm_kfree);
diff --git a/include/linux/device.h b/include/linux/device.h
index 8f882549edee..33f7cb271fbb 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -692,7 +692,7 @@ static inline void *devm_kcalloc(struct device *dev,
{
return devm_kmalloc_array(dev, n, size, flags | __GFP_ZERO);
}
-extern void devm_kfree(struct device *dev, void *p);
+extern void devm_kfree(struct device *dev, const void *p);
extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp)
__malloc;
extern void *devm_kmemdup(struct device *dev, const void *src, size_t len,
gfp_t gfp);
--
2.18.0
[PATCH v2 2/4] mm: move is_kernel_rodata() to asm-generic/sections.h
Export this routine so that we can use it later in devm_kstrdup_const()
and devm_kfree_const().
Signed-off-by: Bartosz Golaszewski
---
include/asm-generic/sections.h | 14 ++
mm/util.c | 7 ---
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 849cd8eb5ca0..d79abca81a52 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -141,4 +141,18 @@ static inline bool init_section_intersects(void *virt,
size_t size)
return memory_intersects(__init_begin, __init_end, virt, size);
}
+/**
+ * is_kernel_rodata - checks if the pointer address is located in the
+ *.rodata section
+ *
+ * @addr: address to check
+ *
+ * Returns: true if the address is located in .rodata, false otherwise.
+ */
+static inline bool is_kernel_rodata(unsigned long addr)
+{
+ return addr >= (unsigned long)__start_rodata &&
+ addr < (unsigned long)__end_rodata;
+}
+
#endif /* _ASM_GENERIC_SECTIONS_H_ */
diff --git a/mm/util.c b/mm/util.c
index d2890a407332..41e9892a50ce 100644
--- a/mm/util.c
+++ b/mm/util.c
@@ -15,17 +15,10 @@
#include
#include
-#include
#include
#include "internal.h"
-static inline int is_kernel_rodata(unsigned long addr)
-{
- return addr >= (unsigned long)__start_rodata &&
- addr < (unsigned long)__end_rodata;
-}
-
/**
* kfree_const - conditionally free memory
* @x: pointer to the memory
--
2.18.0
[PATCH v2 4/4] clk: pmc-atom: use devm_kstrdup_const()
Use devm_kstrdup_const() in the pmc-atom driver. This mostly serves as
an example of how to use this new routine to shrink driver code.
While we're at it: replace a call to kcalloc() with devm_kcalloc().
Signed-off-by: Bartosz Golaszewski
---
drivers/clk/x86/clk-pmc-atom.c | 19 ---
1 file changed, 4 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c
index 08ef69945ffb..daa2192e6568 100644
--- a/drivers/clk/x86/clk-pmc-atom.c
+++ b/drivers/clk/x86/clk-pmc-atom.c
@@ -253,14 +253,6 @@ static void plt_clk_unregister_fixed_rate_loop(struct
clk_plt_data *data,
plt_clk_unregister_fixed_rate(data->parents[i]);
}
-static void plt_clk_free_parent_names_loop(const char **parent_names,
- unsigned int i)
-{
- while (i--)
- kfree_const(parent_names[i]);
- kfree(parent_names);
-}
-
static void plt_clk_unregister_loop(struct clk_plt_data *data,
unsigned int i)
{
@@ -286,8 +278,8 @@ static const char **plt_clk_register_parents(struct
platform_device *pdev,
if (!data->parents)
return ERR_PTR(-ENOMEM);
- parent_names = kcalloc(nparents, sizeof(*parent_names),
- GFP_KERNEL);
+ parent_names = devm_kcalloc(&pdev->dev, nparents,
+ sizeof(*parent_names), GFP_KERNEL);
if (!parent_names)
return ERR_PTR(-ENOMEM);
@@ -300,7 +292,8 @@ static const char **plt_clk_register_parents(struct
platform_device *pdev,
err = PTR_ERR(data->parents[i]);
goto err_unreg;
}
- parent_names[i] = kstrdup_const(clks[i].name, GFP_KERNEL);
+ parent_names[i] = devm_kstrdup_const(&pdev->dev,
+clks[i].name, GFP_KERNEL);
}
data->nparents = nparents;
@@ -308,7 +301,6 @@ static const char **plt_clk_register_parents(struct
platform_device *pdev,
err_unreg:
plt_clk_unregister_fixed_rate_loop(data, i);
- plt_clk_free_parent_names_loop(parent_names, i);
return ERR_PTR(err);
}
@@ -351,15 +343,12 @@ static int plt_clk_probe(struct platform_device *pdev)
goto err_unreg_clk_plt;
}
- plt_clk_free_parent_names_loop(parent_names, data->nparents);
-
platform_set_drvdata(pdev, data);
return 0;
err_unreg_clk_plt:
plt_clk_unregister_loop(data, i);
plt_clk_unregister_parents(data);
- plt_clk_free_parent_names_loop(parent_names, data->nparents);
return err;
}
--
2.18.0
[PATCH v6 0/3] solve SDHCI DWC MSHC 128MB DMA boundary limitation
When using DMA, if the DMA addr spans 128MB boundary, we have to split the DMA transfer into two so that each one doesn't exceed the boundary. patch1 adds adma_table_cnt to struct sdhci_host so that driver can control the ADMA table count. patch2 introduces adma_write_desc() hook to struct sdhci_ops so that driver can override it. patch3 finally solves the 128MB boundary limitation. since v5: - use dma_get_required_mask() to calculate the extra adma_table_cnt since v4: - add Adrian's ack to patch 1 and patch 2 - address Adrian's comment -- if the boundary is fine, we have to return after writing dma desc once; adma_table_cnt updating could make use of the fact that it's already initialized by the common sdhci code, we just need to tune. since v3: - s/adma_table_num/adma_table_cnt - add comment to adma_table_cnt - make the exported function name without the _ - let sdhci_adma_write_desc() accept &desc param and set the new desc value since v2: - make use of "likely" to check (!len || BOUNDARY_OK(addr, len)) - explicitly include for SZ_128M since v1: - fix BOUNDARY_OK macro if addr+len is aligned to 128MB - use DIV_ROUND_UP to cal extra desc num - fix !len for dwcmshc_adma_write_desc() Jisheng Zhang (3): mmc: sdhci: add adma_table_cnt member to struct sdhci_host mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation drivers/mmc/host/sdhci-of-dwcmshc.c | 39 + drivers/mmc/host/sdhci.c| 54 + drivers/mmc/host/sdhci.h| 7 3 files changed, 78 insertions(+), 22 deletions(-) -- 2.18.0
[PATCH 4/5] ARM: dts: at91: nattis: move pinctrls for the lvds chip to the lvds node
The atmel hlcdc controller has nothing to do with these pins, so move
them to where they belong.
Signed-off-by: Peter Rosin
---
arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
index fbc796125c56..2eb0f947ab86 100644
--- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
+++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
@@ -34,7 +34,7 @@
AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
- pinctrl_lcd_prlud0: lcd_prlud0 {
+ pinctrl_lvds_prlud0: lvds_prlud0 {
atmel,pins =
;
};
- pinctrl_lcd_hipow0: lcd_hipow0 {
+ pinctrl_lvds_hipow0: lvds_hipow0 {
atmel,pins =
;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -197,10 +200,7 @@
hlcdc-display-controller {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lcd_base
-&pinctrl_lcd_rgb565
-&pinctrl_lcd_prlud0
-&pinctrl_lcd_hipow0>;
+ pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
port@0 {
hlcdc_output: endpoint {
--
2.11.0
[PATCH 0/5] ARM: dts: at91: nattis: some cleanup
Hi! Now that some other patches [1][2] have finally landed in -next, I feel that it is time for this cleanup series that I have been hoarding for a while waiting on those (weak) dependencies. Cheers, Peter [1] https://lkml.org/lkml/2018/8/24/187 [2] https://lkml.org/lkml/2018/8/25/64 Peter Rosin (5): ARM: dts: at91: nattis: set the PRLUD and HIPOW signals low ARM: dts: at91: nattis: make the SD-card slot work ARM: dts: at91: nattis: state the actual lvds-encoder chip ARM: dts: at91: nattis: move pinctrls for the lvds chip to the lvds node ARM: dts: at91: nattis: describe the lvds panel arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 43 ++--- 1 file changed, 33 insertions(+), 10 deletions(-) -- 2.11.0
[PATCH v6 1/3] mmc: sdhci: add adma_table_cnt member to struct sdhci_host
This patch adds adma_table_cnt member to struct sdhci_host to give more
flexibility to drivers to control the ADMA table count.
Default value of adma_table_cnt is set to (SDHCI_MAX_SEGS * 2 + 1).
Signed-off-by: Jisheng Zhang
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 17 +
drivers/mmc/host/sdhci.h | 3 +++
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 1b3fbd9bd5c5..52ccf4644384 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3322,6 +3322,13 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG;
+ /*
+* The DMA table descriptor count is calculated as the maximum
+* number of segments times 2, to allow for an alignment
+* descriptor for each segment, plus 1 for a nop end descriptor.
+*/
+ host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1;
+
return host;
}
@@ -3567,18 +3574,12 @@ int sdhci_setup_host(struct sdhci_host *host)
dma_addr_t dma;
void *buf;
- /*
-* The DMA descriptor table size is calculated as the maximum
-* number of segments times 2, to allow for an alignment
-* descriptor for each segment, plus 1 for a nop end descriptor,
-* all multipled by the descriptor size.
-*/
if (host->flags & SDHCI_USE_64_BIT_DMA) {
- host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+ host->adma_table_sz = host->adma_table_cnt *
SDHCI_ADMA2_64_DESC_SZ;
host->desc_sz = SDHCI_ADMA2_64_DESC_SZ;
} else {
- host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+ host->adma_table_sz = host->adma_table_cnt *
SDHCI_ADMA2_32_DESC_SZ;
host->desc_sz = SDHCI_ADMA2_32_DESC_SZ;
}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index f0bd36ce3817..25bddd21de31 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -563,6 +563,9 @@ struct sdhci_host {
/* Host SDMA buffer boundary. */
u32 sdma_boundary;
+ /* Host ADMA table count */
+ u32 adma_table_cnt;
+
u64 data_timeout;
unsigned long private[0] cacheline_aligned;
--
2.18.0
[PATCH 1/5] ARM: dts: at91: nattis: set the PRLUD and HIPOW signals low
AT91_PINCTRL_OUTPUT_VAL(0) without AT91_PINCTRL_OUTPUT is a no-op, so
make sure the pins really output a zero.
Fixes: 0e4323899973 ("ARM: dts: at91: add devicetree for the Axentia Nattis
with Natte power")
Signed-off-by: Peter Rosin
---
arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
index af9f38456d04..bfa5815a0721 100644
--- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
+++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
@@ -38,14 +38,16 @@
atmel,pins =
;
+(AT91_PINCTRL_OUTPUT |
+
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
pinctrl_lcd_hipow0: lcd_hipow0 {
atmel,pins =
;
+(AT91_PINCTRL_OUTPUT |
+
AT91_PINCTRL_OUTPUT_VAL(0))>;
};
};
};
--
2.11.0
[PATCH 2/5] ARM: dts: at91: nattis: make the SD-card slot work
The cd-gpios signal is assumed active-low by the driver, and the
cd-inverted property is needed if it is, in fact, active-high. Fix
this oversight.
Fixes: 0e4323899973 ("ARM: dts: at91: add devicetree for the Axentia Nattis
with Natte power")
Signed-off-by: Peter Rosin
---
arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
index bfa5815a0721..4308a07b792e 100644
--- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
+++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
@@ -221,6 +221,7 @@
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
};
};
--
2.11.0
[PATCH 5/5] ARM: dts: at91: nattis: describe the lvds panel
Make the DT usable with the panel-lvds driver.
Signed-off-by: Peter Rosin
---
arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
index 2eb0f947ab86..97e972aefac2 100644
--- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
+++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
@@ -105,10 +105,29 @@
};
panel: panel {
- compatible = "sharp,lq150x1lg11";
+ compatible = "sharp,lq150x1lg11", "panel-lvds";
+
backlight = <&panel_bl>;
power-supply = <&panel_reg>;
+ width-mm = <304>;
+ height-mm = <228>;
+
+ data-mapping = "jeida-18";
+
+ panel-timing {
+ // 1024x768 @ 60Hz (typical)
+ clock-frequency = <5000 6500 8000>;
+ hactive = <1024>;
+ vactive = <768>;
+ hfront-porch = <48 88 88>;
+ hback-porch = <96 168 168>;
+ hsync-len = <32 64 64>;
+ vsync-len = <3 13 74>;
+ vfront-porch = <3 13 74>;
+ vback-porch = <3 12 74>;
+ };
+
port {
panel_input: endpoint {
remote-endpoint = <&lvds_encoder_output>;
@@ -205,6 +224,7 @@
port@0 {
hlcdc_output: endpoint {
remote-endpoint = <&lvds_encoder_input>;
+ bus-width = <16>;
};
};
};
--
2.11.0
[PATCH 3/5] ARM: dts: at91: nattis: state the actual lvds-encoder chip
Just to be explicit.
Signed-off-by: Peter Rosin
---
arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
index 4308a07b792e..fbc796125c56 100644
--- a/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
+++ b/arch/arm/boot/dts/at91-nattis-2-natte-2.dts
@@ -117,7 +117,7 @@
};
lvds-encoder {
- compatible = "lvds-encoder";
+ compatible = "ti,ds90c185", "lvds-encoder";
ports {
#address-cells = <1>;
--
2.11.0
[PATCH v6 2/3] mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops
Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.
Signed-off-by: Jisheng Zhang
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 37 +++--
drivers/mmc/host/sdhci.h | 4
2 files changed, 27 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 52ccf4644384..eb21d2db7f05 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -554,10 +554,10 @@ static void sdhci_kunmap_atomic(void *buffer, unsigned
long *flags)
local_irq_restore(*flags);
}
-static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
- dma_addr_t addr, int len, unsigned cmd)
+void sdhci_adma_write_desc(struct sdhci_host *host, void **desc,
+ dma_addr_t addr, int len, unsigned int cmd)
{
- struct sdhci_adma2_64_desc *dma_desc = desc;
+ struct sdhci_adma2_64_desc *dma_desc = *desc;
/* 32-bit and 64-bit descriptors have these members in same position */
dma_desc->cmd = cpu_to_le16(cmd);
@@ -566,6 +566,19 @@ static void sdhci_adma_write_desc(struct sdhci_host *host,
void *desc,
if (host->flags & SDHCI_USE_64_BIT_DMA)
dma_desc->addr_hi = cpu_to_le32((u64)addr >> 32);
+
+ *desc += host->desc_sz;
+}
+EXPORT_SYMBOL_GPL(sdhci_adma_write_desc);
+
+static inline void __sdhci_adma_write_desc(struct sdhci_host *host,
+ void **desc, dma_addr_t addr,
+ int len, unsigned int cmd)
+{
+ if (host->ops->adma_write_desc)
+ host->ops->adma_write_desc(host, desc, addr, len, cmd);
+
+ sdhci_adma_write_desc(host, desc, addr, len, cmd);
}
static void sdhci_adma_mark_end(void *desc)
@@ -618,28 +631,24 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
}
/* tran, valid */
- sdhci_adma_write_desc(host, desc, align_addr, offset,
- ADMA2_TRAN_VALID);
+ __sdhci_adma_write_desc(host, &desc, align_addr,
+ offset, ADMA2_TRAN_VALID);
BUG_ON(offset > 65536);
align += SDHCI_ADMA2_ALIGN;
align_addr += SDHCI_ADMA2_ALIGN;
- desc += host->desc_sz;
-
addr += offset;
len -= offset;
}
BUG_ON(len > 65536);
- if (len) {
- /* tran, valid */
- sdhci_adma_write_desc(host, desc, addr, len,
- ADMA2_TRAN_VALID);
- desc += host->desc_sz;
- }
+ /* tran, valid */
+ if (len)
+ __sdhci_adma_write_desc(host, &desc, addr, len,
+ ADMA2_TRAN_VALID);
/*
* If this triggers then we have a calculation bug
@@ -656,7 +665,7 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
}
} else {
/* Add a terminating entry - nop, end, valid */
- sdhci_adma_write_desc(host, desc, 0, 0, ADMA2_NOP_END_VALID);
+ __sdhci_adma_write_desc(host, &desc, 0, 0, ADMA2_NOP_END_VALID);
}
}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 25bddd21de31..2115416f973a 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -606,6 +606,8 @@ struct sdhci_ops {
void(*adma_workaround)(struct sdhci_host *host, u32 intmask);
void(*card_event)(struct sdhci_host *host);
void(*voltage_switch)(struct sdhci_host *host);
+ void(*adma_write_desc)(struct sdhci_host *host, void **desc,
+ dma_addr_t addr, int len, unsigned int cmd);
};
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
@@ -736,6 +738,8 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios
*ios);
int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
struct mmc_ios *ios);
void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
+void sdhci_adma_write_desc(struct sdhci_host *host, void **desc,
+ dma_addr_t addr, int len, unsigned int cmd);
#ifdef CONFIG_PM
int sdhci_suspend_host(struct sdhci_host *host);
--
2.18.0
[PATCH v6 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 39 +
1 file changed, 39 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 1b7cd144fb01..a5137845a1c7 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -8,21 +8,51 @@
*/
#include
+#include
+#include
#include
#include
+#include
#include "sdhci-pltfm.h"
+#define BOUNDARY_OK(addr, len) \
+ ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+
struct dwcmshc_priv {
struct clk *bus_clk;
};
+/*
+ * If DMA addr spans 128MB boundary, we split the DMA transfer into two
+ * so that each DMA transfer doesn't exceed the boundary.
+ */
+static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
+ dma_addr_t addr, int len, unsigned int cmd)
+{
+ int tmplen, offset;
+
+ if (likely(!len || BOUNDARY_OK(addr, len))) {
+ sdhci_adma_write_desc(host, desc, addr, len, cmd);
+ return;
+ }
+
+ offset = addr & (SZ_128M - 1);
+ tmplen = SZ_128M - offset;
+ sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
+
+ addr += tmplen;
+ len -= tmplen;
+ sdhci_adma_write_desc(host, desc, addr, len, cmd);
+}
+
static const struct sdhci_ops sdhci_dwcmshc_ops = {
.set_clock = sdhci_set_clock,
.set_bus_width = sdhci_set_bus_width,
.set_uhs_signaling = sdhci_set_uhs_signaling,
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.reset = sdhci_reset,
+ .adma_write_desc= dwcmshc_adma_write_desc,
};
static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
@@ -36,12 +66,21 @@ static int dwcmshc_probe(struct platform_device *pdev)
struct sdhci_host *host;
struct dwcmshc_priv *priv;
int err;
+ u32 extra;
host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
sizeof(struct dwcmshc_priv));
if (IS_ERR(host))
return PTR_ERR(host);
+ /*
+* extra adma table cnt for cross 128M boundary handling.
+*/
+ extra = DIV_ROUND_UP_ULL(dma_get_required_mask(&pdev->dev), SZ_128M);
+ if (extra > SDHCI_MAX_SEGS)
+ extra = SDHCI_MAX_SEGS;
+ host->adma_table_cnt += extra;
+
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
--
2.18.0
Re: [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
On Tue, 28 Aug 2018 10:51:02 +0300 Adrian Hunter wrote:
> On 27/08/18 11:24, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.
> >
> > Signed-off-by: Jisheng Zhang
> > ---
> > drivers/mmc/host/sdhci-of-dwcmshc.c | 41 +
> > 1 file changed, 41 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 1b7cd144fb01..cfbdae8703a1 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -8,21 +8,50 @@
> > */
> >
> > #include
> > +#include
> > #include
> > #include
> > +#include
> >
> > #include "sdhci-pltfm.h"
> >
> > +#define BOUNDARY_OK(addr, len) \
> > + ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> > +
> > struct dwcmshc_priv {
> > struct clk *bus_clk;
> > };
> >
> > +/*
> > + * If DMA addr spans 128MB boundary, we split the DMA transfer into two
> > + * so that each DMA transfer doesn't exceed the boundary.
> > + */
> > +static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
> > + dma_addr_t addr, int len, unsigned int cmd)
> > +{
> > + int tmplen, offset;
> > +
> > + if (likely(!len || BOUNDARY_OK(addr, len))) {
> > + sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > + return;
> > + }
> > +
> > + offset = addr & (SZ_128M - 1);
> > + tmplen = SZ_128M - offset;
> > + sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> > +
> > + addr += tmplen;
> > + len -= tmplen;
> > + sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +}
> > +
> > static const struct sdhci_ops sdhci_dwcmshc_ops = {
> > .set_clock = sdhci_set_clock,
> > .set_bus_width = sdhci_set_bus_width,
> > .set_uhs_signaling = sdhci_set_uhs_signaling,
> > .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> > .reset = sdhci_reset,
> > + .adma_write_desc= dwcmshc_adma_write_desc,
> > };
> >
> > static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> > @@ -36,12 +65,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> > struct sdhci_host *host;
> > struct dwcmshc_priv *priv;
> > int err;
> > + u32 extra;
> >
> > host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> > sizeof(struct dwcmshc_priv));
> > if (IS_ERR(host))
> > return PTR_ERR(host);
> >
> > + /*
> > +* The DMA table descriptor count is calculated as the maximum
> > +* number of segments times 2, to allow for an alignment
> > +* descriptor for each segment, plus 1 for a nop end descriptor,
> > +* plus extra number for cross 128M boundary handling.
> > +*/
> > + extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
>
> The amount of RAM is not necessarily the same as the highest physical
> address. I think what you really want is max_pfn or max_possible_pfn
oh, yeah! But these two vars are not exported, I have two solutions:
1. use the dma_get_required_mask(), this is what I did in v6
2. always let extra = SDHCI_MAX_SEGS, although we may waste, but the
waste is small -- at most we waste 128*12 = 1536 Byte.
But it seems solution 1 could do its job ;)
Thanks,
Jisheng
>
> > + if (extra > SDHCI_MAX_SEGS)
> > + extra = SDHCI_MAX_SEGS;
> > + host->adma_table_cnt += extra;
> > +
> > pltfm_host = sdhci_priv(host);
> > priv = sdhci_pltfm_priv(pltfm_host);
> >
> >
>
Re: [RESEND] PCI: imx: Initial imx7d pm support
On Mon, Aug 27, 2018 at 02:28:37PM +0300, Leonard Crestez wrote:
> On imx7d the pcie-phy power domain is turned off in suspend and this can
> make the system hang after resume when attempting any read from PCI.
>
> Fix this by adding minimal suspend/resume code from the nxp internal
> tree. This will prepare for powering down on suspend and reset the block
> on resume.
>
> Code is only for imx7d but a very similar sequence can be used for
> other socs.
>
> The original author is mostly Richard Zhu , this
> patch adjusts the code to the upstream imx7d implemention using reset
> controls and power domains.
I will add a Suggested-by: replacing this paragraph, it is always better
to add proper tags rather than credit hidden in commit logs messages.
> Signed-off-by: Leonard Crestez
> Reviewed-by: Lucas Stach
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 97 +--
> 1 file changed, 92 insertions(+), 5 deletions(-)
>
> Resending after RC1 as suggested here: https://lkml.org/lkml/2018/8/8/496
>
> This was initially sent together with a dts fix, that was already
> accepted by Shawn: https://lkml.org/lkml/2018/8/21/529
>
> Some dependencies in this area are complicated but as far as I know
> including this patch without others should not break anything that was
> not already broken. Since this is a patch for something that has never
> worked before it should be treated as a feature not a bugfix.
Ok, so I consider this v4.20 material, please shout if it has to be
sent as a fix, I do not think so given what we discussed above.
Lorenzo
> I have a few other patches for imx pci but it's better to deal with them
> separately. This initial patch adding suspend support is useful by
> itself.
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> b/drivers/pci/controller/dwc/pci-imx6.c
> index 4a9a673b4777..65b6d1015723 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -540,10 +540,28 @@ static int imx6_pcie_wait_for_speed_change(struct
> imx6_pcie *imx6_pcie)
>
> dev_err(dev, "Speed change timeout\n");
> return -EINVAL;
> }
>
> +static void imx6_pcie_ltssm_enable(struct device *dev)
> +{
> + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
> +
> + switch (imx6_pcie->variant) {
> + case IMX6Q:
> + case IMX6SX:
> + case IMX6QP:
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> +IMX6Q_GPR12_PCIE_CTL_2,
> +IMX6Q_GPR12_PCIE_CTL_2);
> + break;
> + case IMX7D:
> + reset_control_deassert(imx6_pcie->apps_reset);
> + break;
> + }
> +}
> +
> static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
> {
> struct dw_pcie *pci = imx6_pcie->pci;
> struct device *dev = pci->dev;
> u32 tmp;
> @@ -558,15 +576,11 @@ static int imx6_pcie_establish_link(struct imx6_pcie
> *imx6_pcie)
> tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
> tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1;
> dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp);
>
> /* Start LTSSM. */
> - if (imx6_pcie->variant == IMX7D)
> - reset_control_deassert(imx6_pcie->apps_reset);
> - else
> - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> -IMX6Q_GPR12_PCIE_CTL_2, 1 << 10);
> + imx6_pcie_ltssm_enable(dev);
>
> ret = imx6_pcie_wait_for_link(imx6_pcie);
> if (ret)
> goto err_reset_phy;
>
> @@ -680,10 +694,82 @@ static int imx6_add_pcie_port(struct imx6_pcie
> *imx6_pcie,
>
> static const struct dw_pcie_ops dw_pcie_ops = {
> .link_up = imx6_pcie_link_up,
> };
>
> +#ifdef CONFIG_PM_SLEEP
> +static void imx6_pcie_ltssm_disable(struct device *dev)
> +{
> + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
> +
> + switch (imx6_pcie->variant) {
> + case IMX6SX:
> + case IMX6QP:
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> +IMX6Q_GPR12_PCIE_CTL_2, 0);
> + break;
> + case IMX7D:
> + reset_control_assert(imx6_pcie->apps_reset);
> + break;
> + default:
> + dev_err(dev, "ltssm_disable not supported\n");
> + }
> +}
> +
> +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
> +{
> + clk_disable_unprepare(imx6_pcie->pcie);
> + clk_disable_unprepare(imx6_pcie->pcie_phy);
> + clk_disable_unprepare(imx6_pcie->pcie_bus);
> +
> + if (imx6_pcie->variant == IMX7D) {
> + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
> +IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
> +IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
> + }
> +}
> +
> +static int imx6_pcie_suspend_noirq(struct device *dev)
> +{
> + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
> +
> + if (
Re: [PATCH v2] PCI: dwc: fix scheduling while atomic issues
On Tue, Aug 21, 2018 at 02:15:12PM +0800, Jisheng Zhang wrote:
> When programming inbound/outbound atu, we call usleep_range() after
> each checking PCIE_ATU_ENABLE bit. Unfortunately, the atu programming
> can be called in atomic context:
>
> inbound atu programming could be called through
> pci_epc_write_header()
> =>dw_pcie_ep_write_header()
> =>dw_pcie_prog_inbound_atu()
>
> outbound atu programming could be called through
> pci_bus_read_config_dword()
> =>dw_pcie_rd_conf()
> =>dw_pcie_prog_outbound_atu()
>
> Fix this issue by calling mdelay() instead.
>
> Signed-off-by: Jisheng Zhang
Mind adding a Fixes: tag please ?
Is:
commit f8aed6ec624f ("PCI: dwc: designware: Add EP mode support")
the commit you are fixing ?
Thanks,
Lorenzo
> ---
>
> Since v1
> - use mdelay() instead of udelay() to avoid __bad_udelay()
>
> drivers/pci/controller/dwc/pcie-designware.c | 8
> drivers/pci/controller/dwc/pcie-designware.h | 3 +--
> 2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c
> b/drivers/pci/controller/dwc/pcie-designware.c
> index 778c4f76a884..2153956a0b20 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct
> dw_pcie *pci, int index,
> if (val & PCIE_ATU_ENABLE)
> return;
>
> - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> + mdelay(LINK_WAIT_IATU);
> }
> dev_err(pci->dev, "Outbound iATU is not being enabled\n");
> }
> @@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int
> index, int type,
> if (val & PCIE_ATU_ENABLE)
> return;
>
> - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> + mdelay(LINK_WAIT_IATU);
> }
> dev_err(pci->dev, "Outbound iATU is not being enabled\n");
> }
> @@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie
> *pci, int index,
> if (val & PCIE_ATU_ENABLE)
> return 0;
>
> - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> + mdelay(LINK_WAIT_IATU);
> }
> dev_err(pci->dev, "Inbound iATU is not being enabled\n");
>
> @@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int
> index, int bar,
> if (val & PCIE_ATU_ENABLE)
> return 0;
>
> - usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> + mdelay(LINK_WAIT_IATU);
> }
> dev_err(pci->dev, "Inbound iATU is not being enabled\n");
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h
> b/drivers/pci/controller/dwc/pcie-designware.h
> index 96126fd8403c..9f1a5e399b70 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -26,8 +26,7 @@
>
> /* Parameters for the waiting for iATU enabled routine */
> #define LINK_WAIT_MAX_IATU_RETRIES 5
> -#define LINK_WAIT_IATU_MIN 9000
> -#define LINK_WAIT_IATU_MAX 1
> +#define LINK_WAIT_IATU 9
>
> /* Synopsys-specific PCIe configuration registers */
> #define PCIE_PORT_LINK_CONTROL 0x710
> --
> 2.18.0
>
Re: [PATCHv2] kmemleak: Add option to print warnings to dmesg
On Mon, Aug 27, 2018 at 03:16:41PM -0700, Andrew Morton wrote:
> On Mon, 27 Aug 2018 10:38:21 +0200 Vincent Whitchurch
> wrote:
>
> > Currently, kmemleak only prints the number of suspected leaks to dmesg
> > but requires the user to read a debugfs file to get the actual stack
> > traces of the objects' allocation points. Add an option to print the
> > full object information to dmesg too. This allows easier integration of
> > kmemleak into automated test systems since those kind of systems
> > presumably already save kernel logs.
>
> "presumably" is a bit rubbery. Are you sure this change is sufficienty
> useful to justify including it? Do you have use-cases for it?
We (like every one else) have automated test infrastructure which test
our Linux systems. With this option, running our tests with kmemleak is
as simple as enabling kmemleak and this option; the test infrastructure
knows how to save kernel logs, which will now include kmemleak reports.
Without this option, the test infrastructure needs to be specifically
taught to read out the kmemleak debugfs file. Removing this need for
special handling makes kmemleak more similar to other kernel debug
options (slab debugging, debug objects, etc).
>
> > --- a/lib/Kconfig.debug
> > +++ b/lib/Kconfig.debug
> > @@ -593,6 +593,15 @@ config DEBUG_KMEMLEAK_DEFAULT_OFF
> > Say Y here to disable kmemleak by default. It can then be enabled
> > on the command line via kmemleak=on.
> >
> > +config DEBUG_KMEMLEAK_WARN
> > + bool "Print kmemleak object warnings to log buffer"
> > + depends on DEBUG_KMEMLEAK
> > + help
> > + Say Y here to make kmemleak print information about unreferenced
> > + objects (including stacktraces) as warnings to the kernel log buffer.
> > + Otherwise this information is only available by reading the kmemleak
> > + debugfs file.
>
> Why add the config option? Why not simply make the change for all
> configs?
No particular reason other than preserving the current behaviour for
existing users. I can remove the config option if Catalin is fine with
it.
>
> > config DEBUG_STACK_USAGE
> > bool "Stack utilization instrumentation"
> > depends on DEBUG_KERNEL && !IA64
> > diff --git a/mm/kmemleak.c b/mm/kmemleak.c
> > index 9a085d525bbc..22662715a3dc 100644
> > --- a/mm/kmemleak.c
> > +++ b/mm/kmemleak.c
> > @@ -181,6 +181,7 @@ struct kmemleak_object {
> > /* flag set to not scan the object */
> > #define OBJECT_NO_SCAN (1 << 2)
> >
> > +#define HEX_PREFIX ""
> > /* number of bytes to print per line; must be 16 or 32 */
> > #define HEX_ROW_SIZE 16
> > /* number of bytes to print at a time (1, 2, 4, 8) */
> > @@ -299,6 +300,25 @@ static void kmemleak_disable(void);
> > kmemleak_disable(); \
> > } while (0)
> >
> > +#define warn_or_seq_printf(seq, fmt, ...) do {\
> > + if (seq)\
> > + seq_printf(seq, fmt, ##__VA_ARGS__);\
> > + else\
> > + pr_warn(fmt, ##__VA_ARGS__);\
> > +} while (0)
> > +
> > +static void warn_or_seq_hex_dump(struct seq_file *seq, int prefix_type,
> > +int rowsize, int groupsize, const void *buf,
> > +size_t len, bool ascii)
> > +{
> > + if (seq)
> > + seq_hex_dump(seq, HEX_PREFIX, prefix_type, rowsize, groupsize,
> > +buf, len, ascii);
> > + else
> > + print_hex_dump(KERN_WARNING, pr_fmt(HEX_PREFIX), prefix_type,
> > + rowsize, groupsize, buf, len, ascii);
> > +}
>
> This will print to the logs OR to the debugfs file, won't it?
No, the information is always available in the debugfs file, even after
this patch. The dmesg printing is in addition to that. The code is
called with and without seq == NULL in different code paths.
[PATCH v1] arm64: dts: ls1043a: Add configure-gfladj property to USB3 node
From: Rajesh Bhagat
Add "configure-gfladj" boolean property to USB3 node. This property
is used to determine whether frame length adjustent is required or
not
Signed-off-by: Rajesh Bhagat
Signed-off-by: Ran Wang
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index a830a2e..a3c5165 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -610,6 +610,7 @@
snps,dis-u1u2-when-u3-quirk;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
dma-coherent;
+ configure-gfladj;
};
usb1: usb3@300 {
@@ -623,6 +624,7 @@
snps,dis-u1u2-when-u3-quirk;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
dma-coherent;
+ configure-gfladj;
};
usb2: usb3@310 {
@@ -636,6 +638,7 @@
snps,dis-u1u2-when-u3-quirk;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
dma-coherent;
+ configure-gfladj;
};
sata: sata@320 {
--
1.7.1
Re: [PATCH 0/5] ARM: dts: at91: nattis: some cleanup
On 28/08/2018 11:48:39+0200, Peter Rosin wrote: > Hi! > > Now that some other patches [1][2] have finally landed in -next, I > feel that it is time for this cleanup series that I have been hoarding > for a while waiting on those (weak) dependencies. > > Cheers, > Peter > > [1] https://lkml.org/lkml/2018/8/24/187 > [2] https://lkml.org/lkml/2018/8/25/64 > > Peter Rosin (5): > ARM: dts: at91: nattis: set the PRLUD and HIPOW signals low > ARM: dts: at91: nattis: make the SD-card slot work > ARM: dts: at91: nattis: state the actual lvds-encoder chip > ARM: dts: at91: nattis: move pinctrls for the lvds chip to the lvds > node > ARM: dts: at91: nattis: describe the lvds panel > > arch/arm/boot/dts/at91-nattis-2-natte-2.dts | 43 > ++--- > 1 file changed, 33 insertions(+), 10 deletions(-) > All applied, thanks. -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Re: [PATCH v13 03/13] x86/cpufeatures: Add Intel-defined SGX leaf CPUID_12_EAX
On Mon, Aug 27, 2018 at 09:53:24PM +0300, Jarkko Sakkinen wrote: > diff --git a/arch/x86/include/asm/cpufeatures.h > b/arch/x86/include/asm/cpufeatures.h > index 7bb647f57d42..4af60a0fdb20 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -13,7 +13,7 @@ > /* > * Defines x86 CPU feature bits > */ > -#define NCAPINTS 19 /* N 32-bit words worth of > info */ > +#define NCAPINTS 20 /* N 32-bit words worth of > info */ > #define NBUGINTS 1 /* N 32-bit bug flags */ > > /* > @@ -349,6 +349,12 @@ > #define X86_FEATURE_ARCH_CAPABILITIES(18*32+29) /* > IA32_ARCH_CAPABILITIES MSR (Intel) */ > #define X86_FEATURE_SPEC_CTRL_SSBD (18*32+31) /* "" Speculative Store > Bypass Disable */ > > +/* Intel SGX CPU features, CPUID level 0x00012:0 (EAX), word 19 */ > +#define X86_FEATURE_SGX1 (19*32+ 0) /* SGX1 leaf functions */ > +#define X86_FEATURE_SGX2 (19*32+ 1) /* SGX2 leaf functions */ > +#define X86_FEATURE_SGX_ENCLV(19*32+ 5) /* SGX ENCLV > instruction, leafs E[INC|DEC]VIRTCHILD, ESETCONTEXT */ > +#define X86_FEATURE_SGX_ENCLS_C (19*32+ 6) /* SGX ENCLS leafs > ERDINFO, ETRACK, ELDBC and ELDUC */ No need to add a whole new ->x86_capability member for 4 bits - just add those bits to leaf 8 where the artificial virtualization flags are - there's some room there. Thx. -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --
Re: [PATCHv2] kmemleak: Add option to print warnings to dmesg
On Tue, Aug 28, 2018 at 12:14:12PM +0200, Vincent Whitchurch wrote: > On Mon, Aug 27, 2018 at 03:16:41PM -0700, Andrew Morton wrote: > > On Mon, 27 Aug 2018 10:38:21 +0200 Vincent Whitchurch > > wrote: > > > --- a/lib/Kconfig.debug > > > +++ b/lib/Kconfig.debug > > > @@ -593,6 +593,15 @@ config DEBUG_KMEMLEAK_DEFAULT_OFF > > > Say Y here to disable kmemleak by default. It can then be enabled > > > on the command line via kmemleak=on. > > > > > > +config DEBUG_KMEMLEAK_WARN > > > + bool "Print kmemleak object warnings to log buffer" > > > + depends on DEBUG_KMEMLEAK > > > + help > > > + Say Y here to make kmemleak print information about unreferenced > > > + objects (including stacktraces) as warnings to the kernel log buffer. > > > + Otherwise this information is only available by reading the kmemleak > > > + debugfs file. > > > > Why add the config option? Why not simply make the change for all > > configs? > > No particular reason other than preserving the current behaviour for > existing users. I can remove the config option if Catalin is fine with > it. IIRC, in the early kmemleak days, people complained about it being to noisy (the false positives rate was also much higher), so the default behaviour was changed to monitor (almost) quietly with the details available via debugfs. I'd like to keep this default behaviour but we could have a "verbose" command via both debugfs and kernel parameter (as we do with "off" and "on"). Would this work for you? -- Catalin
[PATCH] arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2
AM65 has two PCIe controllers and each PCIe controller has '2' address
spaces one within the 4GB address space of the SoC and the other above
the 4GB address space of the SoC in addition to the register space. The
size of the address space above the 4GB SoC address space is 4GB. These
address ranges will be used by CPU/DMA to access the PCIe address space.
In order to represent the address space above the 4GB SoC address space
and to represent the size of this address space as 4GB, change
address-cells and size-cells of interconnect to 2.
Signed-off-by: Kishon Vijay Abraham I
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 10 +++
arch/arm64/boot/dts/ti/k3-am65.dtsi | 38
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 569618b411f0..fbd6fab8dd5e 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -8,13 +8,13 @@
&cbass_main {
gic500: interrupt-controller@180 {
compatible = "arm,gic-v3";
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
#interrupt-cells = <3>;
interrupt-controller;
- reg = <0x0180 0x1>, /* GICD */
- <0x0188 0x9>; /* GICR */
+ reg = <0x00 0x0180 0x00 0x1>, /* GICD */
+ <0x00 0x0188 0x00 0x9>; /* GICR */
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
@@ -23,7 +23,7 @@
gic_its: gic-its@1820 {
compatible = "arm,gic-v3-its";
- reg = <0x0182 0x1>;
+ reg = <0x00 0x0182 0x00 0x1>;
msi-controller;
#msi-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi
b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 17a053552852..5d1eb877e128 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -54,31 +54,31 @@
cbass_main: interconnect@10 {
compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0010 0x00 0x0010 0x0002>, /* ctrl mmr */
-<0x0060 0x00 0x0060 0x1100>, /* GPIO */
-<0x0090 0x00 0x0090 0x00012000>, /* serdes */
-<0x0100 0x00 0x0100 0x0af02400>, /* Most
peripherals */
-<0x3080 0x00 0x3080 0x0bc0>, /* MAIN NAVSS
*/
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x0010 0x00 0x0010 0x00 0x0002>, /*
ctrl mmr */
+<0x00 0x0060 0x00 0x0060 0x00 0x1100>, /*
GPIO */
+<0x00 0x0090 0x00 0x0090 0x00 0x00012000>, /*
serdes */
+<0x00 0x0100 0x00 0x0100 0x00 0x0af02400>, /*
Most peripherals */
+<0x00 0x3080 0x00 0x3080 0x00 0x0bc0>, /*
MAIN NAVSS */
/* MCUSS Range */
-<0x2838 0x00 0x2838 0x0388>,
-<0x4020 0x00 0x4020 0x00900100>,
-<0x4204 0x00 0x4204 0x03ac2400>,
-<0x4510 0x00 0x4510 0x00c24000>,
-<0x4600 0x00 0x4600 0x0020>,
-<0x4700 0x00 0x4700 0x00068400>;
+<0x00 0x2838 0x00 0x2838 0x00 0x0388>,
+<0x00 0x4020 0x00 0x4020 0x00 0x00900100>,
+<0x00 0x4204 0x00 0x4204 0x00 0x03ac2400>,
+<0x00 0x4510 0x00 0x4510 0x00 0x00c24000>,
+<0x00 0x4600 0x00 0x4600 0x00 0x0020>,
+<0x00 0x4700 0x00 0x4700 0x00 0x00068400>;
cbass_mcu: interconnect@2838 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x2838 0x2838 0x0388>, /* MCU
NAVSS*/
-<0x4020 0x4020 0x00900100>, /* First
peripheral window */
-<0x4204 0x4204 0x03ac2400>, /* WKUP */
-<0x4510 0x4510 0x00c24000>, /* MMRs,
remaining NAVSS */
-<0x4600 0x4600 0x0020>, /* CPSW */
-<0x4700 0x4700 0
Re: [PATCH v3 2/2]: perf record: enable asynchronous trace writing
Hi,
On 28.08.2018 11:53, Jiri Olsa wrote:
> On Mon, Aug 27, 2018 at 09:16:55PM +0300, Alexey Budankov wrote:
>
> SNIP
>
>> if ((md->start & md->mask) + size != (md->end & md->mask)) {
>> buf = &data[md->start & md->mask];
>> -size = md->mask + 1 - (md->start & md->mask);
>> -md->start += size;
>> -
>> -if (push(to, buf, size) < 0) {
>> -rc = -1;
>> -goto out;
>> -}
>> +size0 = md->mask + 1 - (md->start & md->mask);
>> +md->start += size0;
>> +memcpy(md->data, buf, size0);
>> }
>>
>> buf = &data[md->start & md->mask];
>> size = md->end - md->start;
>> md->start += size;
>> +memcpy(md->data + size0, buf, size);
>>
>> -if (push(to, buf, size) < 0) {
>> -rc = -1;
>> +rc = push(to, md, size0 + size, *off) < 0 ? -1 : 1;
>> +if (rc == -1)
>> goto out;
>> -}
>> +
>> +perf_mmap__get(md);
>> +*off += size0 + size;
>
> this get is for the perf_mmap pointer storage in the mmap_aio array right?
Right. perf_mmap__get() here guards whole perf_mmap object and memory
referenced thru it from premature deallocation because mmap->base kernel
buffer can be released earlier than aio requests started on mmap->data
complete and the both buffers are referenced thru the same perf_mmap object.
>
> I see it's released in record__mmap_read_sync, which might also return
> without releasing it.. this needs to be fixed and explained in here,
> why we take the reference in the first place
So we increment after successful push() from map->base to map->data
with following aio_write() and decrement when aio_write() is fully
complete, because it may require restart if the kernel didn't write
whole chunk at once.
Probably we are still missing one more perf_mmap__put() after:
pr_err("failed to write perf data, error: %m\n");
prior nullifying the appropriate cblock.
Updated [PATCH v4 2/2]:
- Written comment in perf_mmap__push() just before perf_mmap__get();
- Written comment in record__mmap_read_sync() on possible restarting
of aio_write() operation and releasing perf_mmap object after all;
- added perf_mmap__put() for the cases of failed aio_write();
Thanks!
>
> thanks,
> jirka
>
Re: [PATCH v1] arm64: dts: ls1043a: Add configure-gfladj property to USB3 node
On Tue, Aug 28, 2018 at 7:12 AM, Yinbo Zhu wrote: > From: Rajesh Bhagat freescale.com addresses are no longer valid. The From and the first Signed-off-by lines should match, so use nxp.com here instead. > Add "configure-gfladj" boolean property to USB3 node. This property I don't find any dt-binding doc for this property. > is used to determine whether frame length adjustent is required or > not > > Signed-off-by: Rajesh Bhagat > Signed-off-by: Ran Wang You missed to add your Signed-off-by tag.
