[RFC PATCH] mm: trace filemap add and del
Use the events API to trace filemap loading and
unloading of file pieces into the page cache.
This patch aims at tracing the eviction reload
cycle of executable and shared libraries pages in
a memory constrained environment.
The typical usage is to spot a specific device and
inode (for example /lib/libc.so) to see the eviction
cycles, and find out if frequently used code is
rather spread across many pages (bad) or coallesced
(good).
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
include/trace/events/filemap.h | 79
mm/filemap.c |5 +++
2 files changed, 84 insertions(+)
create mode 100644 include/trace/events/filemap.h
diff --git a/include/trace/events/filemap.h b/include/trace/events/filemap.h
new file mode 100644
index 000..a8319e2
--- /dev/null
+++ b/include/trace/events/filemap.h
@@ -0,0 +1,79 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM filemap
+
+#if !defined(_TRACE_FILEMAP_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FILEMAP_H
+
+#include linux/types.h
+#include linux/tracepoint.h
+#include linux/mm.h
+#include linux/memcontrol.h
+#include linux/device.h
+#include linux/kdev_t.h
+
+TRACE_EVENT(mm_filemap_delete_from_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_no)
+ __field(unsigned long, pageofs)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_no = page-mapping-host-i_ino;
+ __entry-pageofs = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_no,
+ __entry-pageofs PAGE_SHIFT)
+);
+
+TRACE_EVENT(mm_filemap_add_to_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_no)
+ __field(unsigned long, pageofs)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_no = page-mapping-host-i_ino;
+ __entry-pageofs = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_no,
+ __entry-pageofs)
+);
+
+#endif /* _TRACE_FILEMAP_H */
+
+/* This part must be outside protection */
+#include trace/define_trace.h
diff --git a/mm/filemap.c b/mm/filemap.c
index 3843445..9753b7c 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -35,6 +35,9 @@
#include linux/cleancache.h
#include internal.h
+#define CREATE_TRACE_POINTS
+#include trace/events/filemap.h
+
/*
* FIXME: remove all knowledge of the buffer layer from the core VM
*/
@@ -113,6 +116,7 @@ void __delete_from_page_cache(struct page *page)
{
struct address_space *mapping = page-mapping;
+ trace_mm_filemap_delete_from_page_cache(page);
/*
* if we're uptodate, flush out into the cleancache, otherwise
* invalidate any existing cleancache entries. We can't leave
@@ -467,6 +471,7 @@ int add_to_page_cache_locked(struct page *page, struct
address_space *mapping,
} else {
page-mapping = NULL;
/* Leave page-index set: truncation relies upon it */
+ trace_mm_filemap_add_to_page_cache(page);
spin_unlock_irq(mapping-tree_lock);
mem_cgroup_uncharge_cache_page(page);
page_cache_release(page);
--
1.7.9.5
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Re: [PATCH 2/4] rtc: pxa: fix rtc caculation issue
Chao Xie chao@marvell.com writes: Hi Chao Xie, First of all, could you please send patches from rtc-pxa to me also, as I'm maintaining that driver ? Second point, the original design of the driver relies on the special case of writing zeroes to WOM and DOM, as mentionned in PXA27x Developers Guide, chapter 21.4.2.3.5 Writing Alarm Registers with Invalid (Zero) Data, which states : Day-Of-Week (DOW), or Week-Of-Month (WOM), Day of Month (DOM), Month or Year fields—Zero is not valid for these fields. If zero is written into any of these fields, it is ignored while generating the alarm. I'd like to know if your patch fixes something, or is an enhancement ? Cheers. -- Robert PS: I've not checked the patch yet, that's just a prelimary comment on the patch message. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 4/4] rtc: pxa: request rtc irqs when probe/remove the device
Chao Xie chao@marvell.com writes: The original pxa_rtc_open/pxa_rtc_release will be called when the /dev/rtc0 is opened or closed. In fact, these two functions will register/unregister the irqs. User application will use /dev/rtc0 to read the rtc time or set the alarm. The rtc should still run indepent of open/close the rtc device. So only register the irqs when probe the device, and disable clock and unregister the irqs when remove the device. No, as Russell I think that's not correct. This is not how RTC API should be used. And on top of RTC API considerations, consider this : today, rtc-pxa and rtc-sa1100 _can_ coexist on a PXA platform, and be used alternatively (I know, it's a bit borderline because of IO space, but anyway it does work). How will that be possible with your patch ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] mm: trace filemap add and del
Use the events API to trace filemap loading and
unloading of file pieces into the page cache.
This patch aims at tracing the eviction reload
cycle of executable and shared libraries pages in
a memory constrained environment.
The typical usage is to spot a specific device and
inode (for example /lib/libc.so) to see the eviction
cycles, and find out if frequently used code is
rather spread across many pages (bad) or coallesced
(good).
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
include/trace/events/filemap.h | 79
mm/filemap.c |5 +++
2 files changed, 84 insertions(+)
create mode 100644 include/trace/events/filemap.h
diff --git a/include/trace/events/filemap.h b/include/trace/events/filemap.h
new file mode 100644
index 000..a8319e2
--- /dev/null
+++ b/include/trace/events/filemap.h
@@ -0,0 +1,79 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM filemap
+
+#if !defined(_TRACE_FILEMAP_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FILEMAP_H
+
+#include linux/types.h
+#include linux/tracepoint.h
+#include linux/mm.h
+#include linux/memcontrol.h
+#include linux/device.h
+#include linux/kdev_t.h
+
+TRACE_EVENT(mm_filemap_delete_from_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_no)
+ __field(unsigned long, pageofs)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_no = page-mapping-host-i_ino;
+ __entry-pageofs = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_no,
+ __entry-pageofs PAGE_SHIFT)
+);
+
+TRACE_EVENT(mm_filemap_add_to_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_no)
+ __field(unsigned long, pageofs)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_no = page-mapping-host-i_ino;
+ __entry-pageofs = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_no,
+ __entry-pageofs)
+);
+
+#endif /* _TRACE_FILEMAP_H */
+
+/* This part must be outside protection */
+#include trace/define_trace.h
diff --git a/mm/filemap.c b/mm/filemap.c
index 3843445..9753b7c 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -35,6 +35,9 @@
#include linux/cleancache.h
#include internal.h
+#define CREATE_TRACE_POINTS
+#include trace/events/filemap.h
+
/*
* FIXME: remove all knowledge of the buffer layer from the core VM
*/
@@ -113,6 +116,7 @@ void __delete_from_page_cache(struct page *page)
{
struct address_space *mapping = page-mapping;
+ trace_mm_filemap_delete_from_page_cache(page);
/*
* if we're uptodate, flush out into the cleancache, otherwise
* invalidate any existing cleancache entries. We can't leave
@@ -467,6 +471,7 @@ int add_to_page_cache_locked(struct page *page, struct
address_space *mapping,
} else {
page-mapping = NULL;
/* Leave page-index set: truncation relies upon it */
+ trace_mm_filemap_add_to_page_cache(page);
spin_unlock_irq(mapping-tree_lock);
mem_cgroup_uncharge_cache_page(page);
page_cache_release(page);
--
1.7.9.5
--
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Re: [RFC PATCH] mm: trace filemap add and del
Andrew Morton a...@linux-foundation.org writes: +TP_STRUCT__entry( +__field(struct page *, page) +__field(unsigned long, i_no) May as well call this i_ino - there's little benefit in using a different identifier. Agreed for patch V2. +__field(unsigned long, pageofs) index. Agreed for patch V2. +__field(dev_t, s_dev) Perhaps use super_block.s_id here If you imply by that that dereferencing page-mapping-host-i_sb and looking for field s_dev, then I don't agree. Sometimes i_sb is NULL from what I recall, especially in cases where the read page is from a journaling partition. So unless I didn't understand you, I'll keep this part as well as the following, to cover : - a mapping of an actual file - a mapping of a partition block +), + +TP_fast_assign( +__entry-page = page; +__entry-i_no = page-mapping-host-i_ino; +__entry-pageofs = page-index; +if (page-mapping-host-i_sb) +__entry-s_dev = page-mapping-host-i_sb-s_dev; +else +__entry-s_dev = page-mapping-host-i_rdev; and hence avoid all this stuff. See above. +), + +TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu, +__entry-page, +page_to_pfn(__entry-page), +MAJOR(__entry-s_dev), MINOR(__entry-s_dev), +__entry-i_no, +__entry-pageofs PAGE_SHIFT) +); + +TRACE_EVENT(mm_filemap_add_to_page_cache, Agreed for patch V2. Thanks for the review. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH] mm: trace filemap add and del
Dave Chinner da...@fromorbit.com writes: We actually have an informal convention for formating filesystem trace events, and that is to use the device number + ), + + TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu, ... and to prefix messages like: TP_printk(dev %d:%d ino 0x%llx MAJOR(__entry-dev), MINOR(__entry-dev), Right, it's sensible. I'll include that for patch V2. XFS, ext3/4, jbd/jdb2 and gfs2 follow this convention, so we should keep propagating that pattern in the name of consistency, rather than having different trace formats for different parts of the VFS/FS layers... Very true. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [RFC PATCH] mm: trace filemap add and del
Hugh Dickins hu...@google.com writes:
On Thu, 8 Nov 2012, Robert Jarzmik wrote:
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -467,6 +471,7 @@ int add_to_page_cache_locked(struct page *page, struct
address_space *mapping,
} else {
page-mapping = NULL;
/* Leave page-index set: truncation relies upon it */
+trace_mm_filemap_add_to_page_cache(page);
spin_unlock_irq(mapping-tree_lock);
mem_cgroup_uncharge_cache_page(page);
page_cache_release(page);
I doubt if you really want your tracepoint sited just in this error path.
Urghh ... a git rebase mystified me.
In my original code, that tracepoint was 5 lines above, before the previous
spin_unlock_irq(), in the if branch, not the else branch.
Well spotted, I'll fix that for patch V2.
Cheers.
--
Robert
--
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Re: [RFC PATCH] mm: trace filemap add and del
Dave Chinner da...@fromorbit.com writes: We actually have an informal convention for formating filesystem trace events, and that is to use the device number + ), + + TP_printk(page=%p pfn=%lu blk=%d:%d inode+ofs=%lu+%lu, ... and to prefix messages like: TP_printk(dev %d:%d ino 0x%llx MAJOR(__entry-dev), MINOR(__entry-dev), i.e. the start of the event message has all the identifying information where it is easy to grep for and get all the events for a specific dev/inode combination without even having to think about it. I cross-checked your proposition. The ino 0x%llx looks wrong to me, because : - i_ino is unsigned long, not (unsigned) long long - triggers a printk where ino looks really awfull (on a 32bits LE arm) mm_filemap_add_to_page_cache: dev 0:2 ino 0xc05186e0 page=000a0737 pfn=0 ofs=3283861504 - why print the inode number in hexadecimal format ??? Doing a ls -i returns decimal format, debugfs returns decimal. What is the rational behind hexadecimal ? I'd rather have : dev %d:%d ino %lu page=0x%p pfn=%lu ofs=%lu. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] mm: trace filemap add and del
Use the events API to trace filemap loading and
unloading of file pieces into the page cache.
This patch aims at tracing the eviction reload
cycle of executable and shared libraries pages in
a memory constrained environment.
The typical usage is to spot a specific device and
inode (for example /lib/libc.so) to see the eviction
cycles, and find out if frequently used code is
rather spread across many pages (bad) or coallesced
(good).
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1:
- included Andrew's comments
- included Dave's comment
- fixed according to Hugh's comment
---
include/trace/events/filemap.h | 79
mm/filemap.c |5 +++
2 files changed, 84 insertions(+)
create mode 100644 include/trace/events/filemap.h
diff --git a/include/trace/events/filemap.h b/include/trace/events/filemap.h
new file mode 100644
index 000..529b80d
--- /dev/null
+++ b/include/trace/events/filemap.h
@@ -0,0 +1,79 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM filemap
+
+#if !defined(_TRACE_FILEMAP_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FILEMAP_H
+
+#include linux/types.h
+#include linux/tracepoint.h
+#include linux/mm.h
+#include linux/memcontrol.h
+#include linux/device.h
+#include linux/kdev_t.h
+
+TRACE_EVENT(mm_filemap_delete_from_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_ino)
+ __field(unsigned long, index)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_ino = page-mapping-host-i_ino;
+ __entry-index = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(dev %d:%d ino %lu page=%p pfn=%lu ofs=%lu,
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_ino,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ __entry-index PAGE_SHIFT)
+);
+
+TRACE_EVENT(mm_filemap_add_to_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_ino)
+ __field(unsigned long, index)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_ino = page-mapping-host-i_ino;
+ __entry-index = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(dev %d:%d ino %lu page=%p pfn=%lu ofs=%lu,
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_ino,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ __entry-index PAGE_SHIFT)
+);
+
+#endif /* _TRACE_FILEMAP_H */
+
+/* This part must be outside protection */
+#include trace/define_trace.h
diff --git a/mm/filemap.c b/mm/filemap.c
index 83efee7..1ee7cf6 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -35,6 +35,9 @@
#include linux/cleancache.h
#include internal.h
+#define CREATE_TRACE_POINTS
+#include trace/events/filemap.h
+
/*
* FIXME: remove all knowledge of the buffer layer from the core VM
*/
@@ -113,6 +116,7 @@ void __delete_from_page_cache(struct page *page)
{
struct address_space *mapping = page-mapping;
+ trace_mm_filemap_delete_from_page_cache(page);
/*
* if we're uptodate, flush out into the cleancache, otherwise
* invalidate any existing cleancache entries. We can't leave
@@ -463,6 +467,7 @@ int add_to_page_cache_locked(struct page *page, struct
address_space *mapping,
if (likely(!error)) {
mapping-nrpages++;
__inc_zone_page_state(page, NR_FILE_PAGES);
+ trace_mm_filemap_add_to_page_cache(page);
spin_unlock_irq(mapping-tree_lock);
} else {
page-mapping = NULL;
--
1.7.10.4
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3] mm: trace filemap add and del
Use the events API to trace filemap loading and
unloading of file pieces into the page cache.
This patch aims at tracing the eviction reload
cycle of executable and shared libraries pages in
a memory constrained environment.
The typical usage is to spot a specific device and
inode (for example /lib/libc.so) to see the eviction
cycles, and find out if frequently used code is
rather spread across many pages (bad) or coallesced
(good).
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1:
- included Andrew's comments
- included Dave's comment
- fixed according to Hugh's comment
Since V2:
- amended inode print to hexadecimal format
---
include/trace/events/filemap.h | 79
mm/filemap.c |5 +++
2 files changed, 84 insertions(+)
create mode 100644 include/trace/events/filemap.h
diff --git a/include/trace/events/filemap.h b/include/trace/events/filemap.h
new file mode 100644
index 000..2d36386
--- /dev/null
+++ b/include/trace/events/filemap.h
@@ -0,0 +1,79 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM filemap
+
+#if !defined(_TRACE_FILEMAP_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FILEMAP_H
+
+#include linux/types.h
+#include linux/tracepoint.h
+#include linux/mm.h
+#include linux/memcontrol.h
+#include linux/device.h
+#include linux/kdev_t.h
+
+TRACE_EVENT(mm_filemap_delete_from_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_ino)
+ __field(unsigned long, index)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_ino = page-mapping-host-i_ino;
+ __entry-index = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(dev %d:%d ino %lx page=%p pfn=%lu ofs=%lu,
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_ino,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ __entry-index PAGE_SHIFT)
+);
+
+TRACE_EVENT(mm_filemap_add_to_page_cache,
+
+ TP_PROTO(struct page *page),
+
+ TP_ARGS(page),
+
+ TP_STRUCT__entry(
+ __field(struct page *, page)
+ __field(unsigned long, i_ino)
+ __field(unsigned long, index)
+ __field(dev_t, s_dev)
+ ),
+
+ TP_fast_assign(
+ __entry-page = page;
+ __entry-i_ino = page-mapping-host-i_ino;
+ __entry-index = page-index;
+ if (page-mapping-host-i_sb)
+ __entry-s_dev = page-mapping-host-i_sb-s_dev;
+ else
+ __entry-s_dev = page-mapping-host-i_rdev;
+ ),
+
+ TP_printk(dev %d:%d ino %lx page=%p pfn=%lu ofs=%lu,
+ MAJOR(__entry-s_dev), MINOR(__entry-s_dev),
+ __entry-i_ino,
+ __entry-page,
+ page_to_pfn(__entry-page),
+ __entry-index PAGE_SHIFT)
+);
+
+#endif /* _TRACE_FILEMAP_H */
+
+/* This part must be outside protection */
+#include trace/define_trace.h
diff --git a/mm/filemap.c b/mm/filemap.c
index 83efee7..1ee7cf6 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -35,6 +35,9 @@
#include linux/cleancache.h
#include internal.h
+#define CREATE_TRACE_POINTS
+#include trace/events/filemap.h
+
/*
* FIXME: remove all knowledge of the buffer layer from the core VM
*/
@@ -113,6 +116,7 @@ void __delete_from_page_cache(struct page *page)
{
struct address_space *mapping = page-mapping;
+ trace_mm_filemap_delete_from_page_cache(page);
/*
* if we're uptodate, flush out into the cleancache, otherwise
* invalidate any existing cleancache entries. We can't leave
@@ -463,6 +467,7 @@ int add_to_page_cache_locked(struct page *page, struct
address_space *mapping,
if (likely(!error)) {
mapping-nrpages++;
__inc_zone_page_state(page, NR_FILE_PAGES);
+ trace_mm_filemap_add_to_page_cache(page);
spin_unlock_irq(mapping-tree_lock);
} else {
page-mapping = NULL;
--
1.7.10.4
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Re: [PATCH] ARM: pxa: pxa27x.c: add dummy SA1100 rtc clock
Andrea Adami andrea.ad...@gmail.com writes: * Using pxa27x you could now build both RTC_DRV_PXA and RTC_DRV_SA1100. * Make sure you don't use both together: link /dev/rtc0 or /dev/rtc1 * to /dev/rtc according to your requirement. Weird to have stars at the beginning of each line in the patch description. But anyway : Acked-by: Robert Jarzmik robert.jarz...@free.fr -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: linux-next: Tree for Jan 14 (mtd)
Randy Dunlap rdun...@infradead.org writes: ERROR: byte_rev_table [drivers/mtd/devices/docg3.ko] undefined! Thanks for the report. I have a trivial patch attached. Should it go through Artem's tree or do you want to take it directly ? Cheers. -- Robert ---8--- From 771d13b0094421b98310171d8794f2a793ec5d4d Mon Sep 17 00:00:00 2001 From: Robert Jarzmik robert.jarz...@free.fr Date: Mon, 9 Apr 2012 13:19:08 +0200 Subject: [PATCH] mtd: docg3 fix missing bitreverse lib Fix missing dependency which can cause a build error such as: ERROR: byte_rev_table [drivers/mtd/devices/docg3.ko] undefined! Reported-by: Randy Dunlap rdun...@infradead.org Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- drivers/mtd/devices/Kconfig |1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig index 27f80cd..46dcb54 100644 --- a/drivers/mtd/devices/Kconfig +++ b/drivers/mtd/devices/Kconfig @@ -272,6 +272,7 @@ config MTD_DOCG3 tristate M-Systems Disk-On-Chip G3 select BCH select BCH_CONST_PARAMS + select BITREVERSE ---help--- This provides an MTD device driver for the M-Systems DiskOnChip G3 devices. -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] drivers/media/platform/soc_camera/pxa_camera.c: reposition free_irq to avoid access to invalid data
Guennadi Liakhovetski g.liakhovet...@gmx.de writes: (adding Robert to CC) I don't think any data is freed by pxa_free_dma(), it only disables DMA on a certain channel. Theoretically there could be a different problem: pxa_free_dma() deactivates DMA, whereas pxa_dma_start_channels() activates it. But I think we're also protected against that: by the time pxa_camera_remove() is called, and operation on the interface has been stopped, client devices have been detached, pxa_camera_remove_device() has been called, which has also stopped the interface clock. And with clock stopped no interrupts can be generated. And the case of interrupt having been generated before clk_disabled() and only delivered to the driver so much later, that we're already unloading the module, seems really impossible to me. Robert, you agree? Agreed that pxa_free_dma() doesn't free anything, that one is easy :) And agreed too for the second part, with a slighly different explanation : - pxa_camera_remove_device() has been called as you said - inside this function, check comment /* disable capture, disable interrupts */ = this ensures no interrupt can be generated anymore So after pxa_camera_remove_device() has been called, no interrupts can be generated. Yet as you said, it leaves the almost impossible scenario : - a user begins a capture - the user closes the capture device and unloads pxa-camera.ko: soc_camera_close() pxa_camera_remove_device() the IRQ line is asserted but doesn't trigger yet the interrupt handler (yes I know, improbable) meanwhile, IRQs are disabled, DMA channels are stopped switch_to(rmmod) = yes I know, impossible, the interrupt handler must be run before, but let's continue for love of discussion ... rmmod pxa-camera pxa_camera_remove() pxa_free_dma() * 3 here the IRQ handler kicks in !!! = pxa_camera_irq() pxa_dma_start_channels() it hurts ! My call is that this is impossible because the switch_to() should run the IRQ handler before pxa_camera_remove() is called. So all this to say that I think we're safe, unless a heavy ion or a cosmic ray strikes the PXA :) Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] mtg: docg3: use free_bch() instead of kfree()
Wei Yongjun weiyj...@gmail.com writes: From: Wei Yongjun yongjun_...@trendmicro.com.cn Use free_bch() instead of kfree() to free init_bch() allocated data. Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn Acked-by: Robert Jarzmik robert.jarz...@free.fr -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: Stricter module param and sysfs permission checks
Dave Jones da...@redhat.com writes: On Thu, Mar 20, 2014 at 01:43:44PM +1030, Rusty Russell wrote: drivers/mtd/devices/docg3.c: __ATTR(f##id##_dps0_protection_key, S_IWUGO, NULL, dps0_insert_key), \ __ATTR(f##id##_dps1_protection_key, S_IWUGO, NULL, dps1_insert_key), \ drivers/scsi/pm8001/pm8001_ctl.c: static DEVICE_ATTR(update_fw, S_IRUGO|S_IWUGO, pm8001_show_update_fw, pm8001_store_update_fw); Why on earth are these world writable ? For docg3, this attributes are used to input a password into the flash chip, to unlock parts of the flash memory. By unlock I mean that a sector read will return the actual sector when unlocked, and only 0xff if not read unlocked. As to the why writable by others, the legacy reason is that when I wrote that code I had in mind that a casual user count : - input the code : echo secret dps0_protection_key - mount /usermount That's not a good reason, I know, and changing that to remove the other write permission is fine by me. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] Revert drivers/rtc/rtc-pxa.c: fix set time sync time issue
Chao Xie chao@marvell.com writes: This patch have something wrong. 1.The pxa_sync_time API is not needed. The RTC sync can be done by user space applications, so in kernel this API is not needed. 2.The pxa_rtc_open can not be deleted. This change has been declined during review at the mail list 3.Based on specification and talked with owner of driver, it does not matter to set WOM and DOW. Only need to keep PSBR control for pxa95x This reverts commit 57489fabb7f3fc02483df2125fdbfb8b1bb1fcd8. This commit doesn't exist in Linus's tree. Maybe in linux-next ? Anyway, as you are reverting, please consider this : the commit that exists is : c4243de70f7d536d95196b8a31539298bb15238c drivers/rtc/rtc-pxa.c: drivers/rtc/rtc-pxa.c: fix alarm not match issue. This commit should be reverted : - because it's wrong : tm-tm_wday = ((rycr RDxR_DOW_MASK) RDxR_DOW_S) - 1; See how RYCR is used with a RDCR mask ... - because as maintainer I have already nacked this kind of patch : https://patchwork.kernel.org/patch/1819851/ The reasons given here are still valid AFAIK. I'm pretty sure I didn't receive this patch in my mailbox. After I refused ChaoXie first patch, the second same approach patch from Liangs was sent in my back. I don't understand how that could happen ... Liangs, please make sure to add me to the reviewers next time ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] mtd: diskonchip: remove unused entries in Kconfig
Kees Cook keesc...@chromium.org writes: On Sun, Jul 7, 2013 at 9:39 PM, Michael Opdenacker michael.opdenac...@free-electrons.com wrote: This patch proposes to remove kernel configuration parameters defined in drivers/mtd/devices/Kconfig, but used nowhere in the makefiles and source code (except in comments). Signed-off-by: Michael Opdenacker michael.opdenac...@free-electrons.com This clean up looks good to me. Acked-by: Kees Cook keesc...@chromium.org Yes, a consequence of the beheading in the commit mtd: doc: remove support for DoC 2000/2001/2001+, excellent. Acked-by: Robert Jarzmik robert.jarz...@free.fr -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/2] regulator: max1586 add device-tree support
Add device-tree support to max1586.
The driver can still be used with the legacy platform data, or the new
device-tree way.
This work is heavily inspired by the device-tree support of its cousin
max8660 driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/regulator/max1586.c | 74 +--
include/linux/regulator/max1586.h | 2 +-
2 files changed, 73 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/max1586.c b/drivers/regulator/max1586.c
index d23d057..0b04602 100644
--- a/drivers/regulator/max1586.c
+++ b/drivers/regulator/max1586.c
@@ -24,6 +24,8 @@
#include linux/regulator/driver.h
#include linux/slab.h
#include linux/regulator/max1586.h
+#include linux/of_device.h
+#include linux/regulator/of_regulator.h
#define MAX1586_V3_MAX_VSEL 31
#define MAX1586_V6_MAX_VSEL 3
@@ -157,13 +159,80 @@ static struct regulator_desc max1586_reg[] = {
},
};
+int of_get_max1586_platform_data(struct device *dev,
+struct max1586_platform_data *pdata)
+{
+ struct max1586_subdev_data *sub;
+ struct of_regulator_match rmatch[ARRAY_SIZE(max1586_reg)];
+ struct device_node *np = dev-of_node;
+ int i, matched;
+
+ if (of_property_read_u32(np, v3-gain,
+pdata-v3_gain) 0) {
+ dev_err(dev, %s has no 'v3-gain' property\n, np-full_name);
+ return -EINVAL;
+ }
+
+ np = of_get_child_by_name(np, regulators);
+ if (!np) {
+ dev_err(dev, missing 'regulators' subnode in DT\n);
+ return -EINVAL;
+ }
+
+ for (i = 0; i ARRAY_SIZE(rmatch); i++)
+ rmatch[i].name = max1586_reg[i].name;
+
+ matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch));
+ of_node_put(np);
+ if (matched = 0)
+ return matched;
+
+ pdata-subdevs = devm_kzalloc(dev, sizeof(struct max1586_subdev_data) *
+ matched, GFP_KERNEL);
+ if (!pdata-subdevs)
+ return -ENOMEM;
+
+ pdata-num_subdevs = matched;
+ sub = pdata-subdevs;
+
+ for (i = 0; i matched; i++) {
+ sub-id = i;
+ sub-name = rmatch[i].of_node-name;
+ sub-platform_data = rmatch[i].init_data;
+ sub++;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id max1586_of_match[] = {
+ { .compatible = maxim,max1586, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, max1586_of_match);
+
static int max1586_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
- struct max1586_platform_data *pdata = dev_get_platdata(client-dev);
+ struct max1586_platform_data *pdata, pdata_of;
struct regulator_config config = { };
struct max1586_data *max1586;
- int i, id;
+ int i, id, ret;
+ const struct of_device_id *match;
+
+ pdata = dev_get_platdata(client-dev);
+ if (client-dev.of_node !pdata) {
+ match = of_match_device(of_match_ptr(max1586_of_match),
+ client-dev);
+ if (!match) {
+ dev_err(client-dev, Error: No device match found\n);
+ return -ENODEV;
+ }
+ ret = of_get_max1586_platform_data(client-dev, pdata_of);
+ if (ret 0)
+ return ret;
+ pdata = pdata_of;
+ }
max1586 = devm_kzalloc(client-dev, sizeof(struct max1586_data),
GFP_KERNEL);
@@ -229,6 +298,7 @@ static struct i2c_driver max1586_pmic_driver = {
.driver = {
.name = max1586,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(max1586_of_match),
},
.id_table = max1586_id,
};
diff --git a/include/linux/regulator/max1586.h
b/include/linux/regulator/max1586.h
index de9a7fa..cedd0fe 100644
--- a/include/linux/regulator/max1586.h
+++ b/include/linux/regulator/max1586.h
@@ -40,7 +40,7 @@
*/
struct max1586_subdev_data {
int id;
- char*name;
+ const char *name;
struct regulator_init_data *platform_data;
};
--
2.0.0.rc2
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[PATCH 2/2] regulator: max1586 add device-tree support
Add max1586 regulator device-tree bindings documentation.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
.../bindings/regulator/max1586-regulator.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/max1586-regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
new file mode 100644
index 000..c050c17
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
@@ -0,0 +1,28 @@
+Maxim MAX1586 voltage regulator
+
+Required properties:
+- compatible: must be maxim,max1586
+- reg: I2C slave address, usually 0x14
+- v3-gain: integer specifying the V3 gain as per datasheet
+ (1 + R24/R25 + R24/185.5kOhm)
+- any required generic properties defined in regulator.txt
+
+Example:
+
+ i2c_master {
+ max1586@14 {
+ compatible = maxim,max1586;
+ reg = 0x14;
+ v3-gain = 100;
+
+ regulators {
+ vcc_core: v3 {
+ regulator-name = vcc_core;
+ regulator-compatible = Output_V3;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 1705000;
+ regulator-always-on;
+ };
+ };
+ };
+ };
--
2.0.0.rc2
--
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Re: [PATCH 1/2] regulator: max1586 add device-tree support
Mark Brown broo...@kernel.org writes: On Sat, Jun 14, 2014 at 04:54:24PM +0200, Robert Jarzmik wrote: +matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch)); +of_node_put(np); +if (matched = 0) +return matched; Why is this treating zero as an error? We should be able to at least report the current state of regulators even if none are configured in the device tree. Euh how so an error ? If 0 is returned, this means no regulators are found in device-tree. It's not an error, it's a lack of regulators (ie. no Output_V3 and no Output_V6), and no more handling is necessary in this function, while returning ok, ie 0 ... As for the state report, this max1586 doesn't report anything, it cannot even be queried about the current voltage, sic ... If you want me to modify this bit I need a bit more of an explanation to understand. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 5/9] ARM: dts: provide DMA config to pxamci
Daniel Mack zon...@gmail.com writes:
In particular, the pxa camera driver is something Robert (cc) wanted to
have a look at. Robert, any updates on this?
Oh yes, sorry, it's been monthes, I've been very busy.
This is my last status :
- my current patch is in (1)
- this patch doesn't work yet
- if my memory serves me well, I have reached the conclusion that dmaengine
pxa-mpp driver doesn't allow pxa_camera to work properly in the current
state. This is a long time since I checked, so take the following with
caution until I have checked again.
This assertion is based on this required behaviour :
- video buffers are queued, let's say 5
= 5 dma are prepared
- video buffers are submitted
= 5 dma xfers are submitted
- the userspace polls for each finished frame (ie. dma xfer termination), and
on the third one, resubmits the 2 finished frames
= scatter-gathers should mot be recomputed, just xfer should be
resubmitted, with cache sync operations and first/last descriptors chaining
- the pxa_camera driver needs a way to know if a dma channel is still running,
for missed chaining transfers, because if a channel stopped, the dma xfers
should not be submitted until IRQ begin of frame is encoutered. I didn't
find a way for that.
Now, I will retry this weekend, but if I remember correctly the issues I had
were :
- a transfer cannot be resubmitted, it has to be freed and recreated
- if it is resubmitted, the completion is not signaled by the tasklet
Cheers.
--
Robert
(1)
commit 4741ba6 (pxa_camera_dmaengine, backup/pxa_camera_dmaengine)
Author: Robert Jarzmik robert.jarz...@free.fr
Date: Sat Aug 24 21:13:38 2013 +0200
WIP: pxa_camera dmaengine conversion
Only slightly tested, without much success.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
diff --git a/drivers/media/platform/soc_camera/pxa_camera.c
b/drivers/media/platform/soc_camera/pxa_camera.c
index d4df305..903ea03 100644
--- a/drivers/media/platform/soc_camera/pxa_camera.c
+++ b/drivers/media/platform/soc_camera/pxa_camera.c
@@ -9,7 +9,7 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-
+#define DEBUG 1
#include linux/init.h
#include linux/module.h
#include linux/io.h
@@ -28,6 +28,9 @@
#include linux/clk.h
#include linux/sched.h
#include linux/slab.h
+#include linux/dmaengine.h
+#include linux/dma-mapping.h
+#include linux/dma/mmp-pdma.h
#include media/v4l2-common.h
#include media/v4l2-dev.h
@@ -37,7 +40,6 @@
#include linux/videodev2.h
-#include mach/dma.h
#include linux/platform_data/camera-pxa.h
#define PXA_CAM_VERSION 0.0.6
@@ -174,21 +176,13 @@ enum pxa_camera_active_dma {
DMA_V = 0x4,
};
-/* descriptor needed for the PXA DMA engine */
-struct pxa_cam_dma {
- dma_addr_t sg_dma;
- struct pxa_dma_desc *sg_cpu;
- size_t sg_size;
- int sglen;
-};
-
/* buffer for one video frame */
struct pxa_buffer {
/* common v4l buffer stuff -- must be first */
struct videobuf_buffer vb;
enum v4l2_mbus_pixelcodecode;
/* our descriptor lists for Y, U and V channels */
- struct pxa_cam_dma dmas[3];
+ struct dma_async_tx_descriptor *descs[3];
int inwork;
enum pxa_camera_active_dma active_dma;
};
@@ -206,7 +200,7 @@ struct pxa_camera_dev {
void __iomem*base;
int channels;
- unsigned intdma_chans[3];
+ struct dma_chan *dma_chans[3];
struct pxacamera_platform_data *pdata;
struct resource *res;
@@ -221,7 +215,6 @@ struct pxa_camera_dev {
spinlock_t lock;
struct pxa_buffer *active;
- struct pxa_dma_desc *sg_tail[3];
u32 save_cicr[5];
};
@@ -273,40 +266,70 @@ static void free_buffer(struct videobuf_queue *vq, struct
pxa_buffer *buf)
videobuf_waiton(vq, buf-vb, 0, 0);
videobuf_dma_unmap(vq-dev, dma);
videobuf_dma_free(dma);
-
- for (i = 0; i ARRAY_SIZE(buf-dmas); i++) {
- if (buf-dmas[i].sg_cpu)
- dma_free_coherent(ici-v4l2_dev.dev,
- buf-dmas[i].sg_size,
- buf-dmas[i].sg_cpu,
- buf-dmas[i].sg_dma);
- buf-dmas[i].sg_cpu = NULL;
- }
+ /* FIXME: free buf-descs[0..2] */
buf-vb.state = VIDEOBUF_NEEDS_INIT;
+
+ dev_dbg(icd-parent, %s end (vb=0x%p) 0x%08lx %d\n, __func__,
+ buf-vb, buf-vb.baddr, buf-vb.bsize);
}
-static int calculate_dma_sglen(struct scatterlist *sglist, int sglen,
- int sg_first_ofs, int size)
+static struct scatterlist
Re: [PATCH 9/16] arch/arm/mach-pxa/mioa701.c: Avoid using ARRAY_AND_SIZE(e) as a function argument
Julia Lawall julia.law...@lip6.fr writes: From: Julia Lawall julia.law...@lip6.fr Replace ARRAY_AND_SIZE(e) in function argument position to avoid hiding the arity of the called function. Acked-by: Robert Jarzmik robert.jarz...@free.fr As a side I'm curious why this change didn't touch also : sound/soc/pxa/mioa701_wm9713.c If it does, this ack stands as well for the other file (with removal of the #define in mioa701_wm9713.c). Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/2] regulator: max1586 add device-tree support
Mark Brown broo...@kernel.org writes: On Tue, Jun 17, 2014 at 09:16:52PM +0200, Robert Jarzmik wrote: Mark Brown broo...@kernel.org writes: On Sat, Jun 14, 2014 at 04:54:24PM +0200, Robert Jarzmik wrote: + matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch)); + of_node_put(np); + if (matched = 0) + return matched; Why is this treating zero as an error? We should be able to at least report the current state of regulators even if none are configured in the device tree. Euh how so an error ? If 0 is returned, this means no regulators are found in device-tree. It's not an error, it's a lack of regulators (ie. no Output_V3 and no Output_V6), and no more handling is necessary in this function, while returning ok, ie 0 ... OK, so there's just nothing to do in that case. That's fine, but it's just not at all clear from the code. A comment would help. OK, no problem. As for the state report, this max1586 doesn't report anything, it cannot even be queried about the current voltage, sic ... It can't? That's unfortunate, though I was able to turn up a datasheet which appears to support that. Oh really ? Well, tell me where you read it. My personal reading from the Max1586 specs is (page 21, chapter Serial Interface) : The LSB of the address word is the read/write (R/W) bit. R/W indicates whether the master is writing or reading (RD/W 0 = write, RD/W 1 = read). The MAX1586/ MAX1587 only support the SEND BYTE format; there- fore, RD/W is required to be 0. I'm wondering if you have this sentence in your datasheet too. If you want me to modify this bit I need a bit more of an explanation to understand. Where the driver is doing unusual things if they are actually sensible then the change needs to be clearer about why. So would a comment like this address your comment ? /* Either matched 0 and return the error. Or matched is 0 which means * no init data was found, ie. no regulator is configured, and return 0 * to caller, stating neither error nor any matched regulator. */ if (matched = 0) return matched; Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] ARM: add CLKSRC_OF dependency for PXA
Select CLKSRC_OF for PXA architectures, as the clocksource driver can be also initialized from device-tree. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr Cc: Russell King li...@arm.linux.org.uk --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index db3c541..c300b68 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -646,6 +646,7 @@ config ARCH_PXA select AUTO_ZRELADDR select CLKDEV_LOOKUP select CLKSRC_MMIO + select CLKSRC_OF if OF select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_IDE -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 1/3] clocksource: move PXA timer to clocksource framework
Move time.c from arch/arm/mach-pxa/time.c to drivers/clocksource/pxa_timer.c. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Makefile | 2 +- drivers/clocksource/Makefile| 1 + arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c | 0 3 files changed, 2 insertions(+), 1 deletion(-) rename arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c (100%) diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 648867a..2fe1824 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -4,7 +4,7 @@ # Common support (must be linked before board specific support) obj-y += clock.o devices.o generic.o irq.o \ - time.o reset.o + reset.o obj-$(CONFIG_PM) += pm.o sleep.o standby.o # Generic drivers that other drivers may depend upon diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 98cb6c5..e224125 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835)+= bcm2835_timer.o obj-$(CONFIG_ARCH_MARCO) += timer-marco.o obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o obj-$(CONFIG_ARCH_MXS) += mxs_timer.o +obj-$(CONFIG_ARCH_PXA) += pxa_timer.o obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o obj-$(CONFIG_ARCH_U300)+= timer-u300.o obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o diff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c similarity index 100% rename from arch/arm/mach-pxa/time.c rename to drivers/clocksource/pxa_timer.c -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/3] clocksource: add device-tree support for PXA timer
Add device-tree support to PXA platforms.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/clocksource/pxa_timer.c | 131 ++--
1 file changed, 98 insertions(+), 33 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..67da3f5 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,41 @@
#include linux/kernel.h
#include linux/init.h
#include linux/interrupt.h
+#include linux/clk.h
#include linux/clockchips.h
+#include linux/of_address.h
+#include linux/of_irq.h
#include linux/sched_clock.h
#include asm/div64.h
#include asm/mach/irq.h
#include asm/mach/time.h
-#include mach/regs-ost.h
#include mach/irqs.h
+#include mach/hardware.h
+
+#define OSMR0 0x00/* */
+#define OSMR1 0x04/* */
+#define OSMR2 0x08/* */
+#define OSMR3 0x0C/* */
+#define OSMR4 0x80/* */
+#define OSCR 0x10/* OS Timer Counter Register */
+#define OSCR4 0x40/* OS Timer Counter Register */
+#define OMCR4 0xC0/* */
+#define OSSR 0x14/* OS Timer Status Register */
+#define OWER 0x18/* OS Timer Watchdog Enable Register */
+#define OIER 0x1C/* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3(1 3)/* Match status channel 3 */
+#define OSSR_M2(1 2)/* Match status channel 2 */
+#define OSSR_M1(1 1)/* Match status channel 1 */
+#define OSSR_M0(1 0)/* Match status channel 0 */
+
+#define OWER_WME (1 0)/* Watchdog Match Enable */
+
+#define OIER_E3(1 3)/* Interrupt enable channel 3 */
+#define OIER_E2(1 2)/* Interrupt enable channel 2 */
+#define OIER_E1(1 1)/* Interrupt enable channel 1 */
+#define OIER_E0(1 0)/* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +60,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +79,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c-event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +91,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct
clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) = MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +104,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct
clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +126,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev
Re: [PATCH v3 4/4] arm: pxa: add non device-tree timer link to clocksource
Daniel Lezcano daniel.lezc...@linaro.org writes: On 07/14/2014 06:52 PM, Robert Jarzmik wrote: As clocksource pxa_timer was moved to clocksource framework, the pxa_timer initialization needs to be a bit amended, to pass the necessary informations to clocksource, ie : - the timer interrupt (mach specific) - the timer registers base (ditto) - the timer clockrate Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- Since V2: Arnd's comment : moved extern declaration into .h file --- Shall I take the patches 4-5 also ? Mmm you mean patch 4 I think. Then I'd like you too, because it's linked in the serie, and without it the former non-DT platforms break, hence I'd like all the serie to go through 1 tree. Yet we'd need Haojian's ack here. Haojian, would you give your blessing on the serie and agree that Daniel carries all the patches including patch 4/4 ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 1/3] clocksource: move PXA timer to clocksource framework
Robert Jarzmik robert.jarz...@free.fr writes: Move time.c from arch/arm/mach-pxa/time.c to drivers/clocksource/pxa_timer.c. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr Ping ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 2/3] clocksource: add device-tree support for PXA timer
Daniel Lezcano daniel.lezc...@linaro.org writes: Good question. Maybe not, I followed the same rationale as in orion-timer, which is : - as this timer is the only possible timer for PXA boards, and because without it the kernel boot will stall (scheduling will be blocked), it's better to panic early that to remain stalled. There isn't the arm global timer ? Nope, it's for Cortex-A9 AFAIK, and my poor platform is an old ARMv5 SoC. Isn't this a good approach ? I suppose we can live with that. IMO, the right fix would be in clksrc-of to pr_crit a message when an initialization fails. But that means to change all the init functions for all drivers which is out of the scope of this patchset. OK, you convinced me. I'll trade the panic() for a pr_crit(). Good idea, maybe it will trigger a quest of a white knight for the other drivers :) Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 1/4] clocksource: move PXA timer to clocksource framework
Move time.c from arch/arm/mach-pxa/time.c to drivers/clocksource/pxa_timer.c. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Makefile | 2 +- drivers/clocksource/Makefile| 1 + arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c | 0 3 files changed, 2 insertions(+), 1 deletion(-) rename arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c (100%) diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 648867a..2fe1824 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -4,7 +4,7 @@ # Common support (must be linked before board specific support) obj-y += clock.o devices.o generic.o irq.o \ - time.o reset.o + reset.o obj-$(CONFIG_PM) += pm.o sleep.o standby.o # Generic drivers that other drivers may depend upon diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 800b130..fc61ef8 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835)+= bcm2835_timer.o obj-$(CONFIG_ARCH_MARCO) += timer-marco.o obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o obj-$(CONFIG_ARCH_MXS) += mxs_timer.o +obj-$(CONFIG_ARCH_PXA) += pxa_timer.o obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o obj-$(CONFIG_ARCH_U300)+= timer-u300.o obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o diff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c similarity index 100% rename from arch/arm/mach-pxa/time.c rename to drivers/clocksource/pxa_timer.c -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 4/4] arm: pxa: add non device-tree timer link to clocksource
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/generic.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4225417..2dcded5 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,7 @@
#include asm/mach/map.h
#include asm/mach-types.h
+#include mach/irqs.h
#include mach/reset.h
#include mach/smemc.h
#include mach/pxa3xx-regs.h
@@ -57,6 +58,17 @@ unsigned long get_clock_tick_rate(void)
EXPORT_SYMBOL(get_clock_tick_rate);
/*
+ * For non device-tree builds, keep legacy timer init
+ */
+extern void pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate);
+void pxa_timer_init(void)
+{
+ pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a0),
+ get_clock_tick_rate());
+}
+
+/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
* If info is not 0 we also display the current settings.
--
2.0.0.rc2
--
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Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 3/4] arm: pxa: add CLKSRC_OF dependency
Select CLKSRC_OF for PXA architectures. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 87b63fd..472dea1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -644,6 +644,7 @@ config ARCH_PXA select AUTO_ZRELADDR select CLKDEV_LOOKUP select CLKSRC_MMIO + select CLKSRC_OF select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_IDE -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2 2/4] clocksource: add device-tree support for PXA timer
Add device-tree support to PXA platforms.
The driver still needs to maintain backward non device-tree
compatibility as well, which implies :
- a non device-tree init function
- a static registers base address in the driver
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1: Daniel's review:
- comments for registers
- registers clean-up
- mach includes removed
- panic() removed
---
drivers/clocksource/pxa_timer.c | 129 +---
1 file changed, 93 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..5caedd3 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,30 @@
#include linux/kernel.h
#include linux/init.h
#include linux/interrupt.h
+#include linux/clk.h
#include linux/clockchips.h
+#include linux/of_address.h
+#include linux/of_irq.h
#include linux/sched_clock.h
#include asm/div64.h
-#include asm/mach/irq.h
-#include asm/mach/time.h
-#include mach/regs-ost.h
-#include mach/irqs.h
+
+#define OSMR0 0x00/* OS Timer 0 Match Register */
+#define OSMR1 0x04/* OS Timer 1 Match Register */
+#define OSMR2 0x08/* OS Timer 2 Match Register */
+#define OSMR3 0x0C/* OS Timer 3 Match Register */
+
+#define OSCR 0x10/* OS Timer Counter Register */
+#define OSSR 0x14/* OS Timer Status Register */
+#define OWER 0x18/* OS Timer Watchdog Enable Register */
+#define OIER 0x1C/* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3(1 3)/* Match status channel 3 */
+#define OSSR_M2(1 2)/* Match status channel 2 */
+#define OSSR_M1(1 1)/* Match status channel 1 */
+#define OSSR_M0(1 0)/* Match status channel 0 */
+
+#define OIER_E0(1 0)/* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +49,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +68,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c-event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +80,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct
clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) = MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +93,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct
clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +115,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev)
@@ -113,12 +134,12 @@ static void
[PATCH v3 1/4] clocksource: move PXA timer to clocksource framework
Move time.c from arch/arm/mach-pxa/time.c to drivers/clocksource/pxa_timer.c. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Makefile | 2 +- drivers/clocksource/Makefile| 1 + arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c | 0 3 files changed, 2 insertions(+), 1 deletion(-) rename arch/arm/mach-pxa/time.c = drivers/clocksource/pxa_timer.c (100%) diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 648867a..2fe1824 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -4,7 +4,7 @@ # Common support (must be linked before board specific support) obj-y += clock.o devices.o generic.o irq.o \ - time.o reset.o + reset.o obj-$(CONFIG_PM) += pm.o sleep.o standby.o # Generic drivers that other drivers may depend upon diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 800b130..fc61ef8 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835)+= bcm2835_timer.o obj-$(CONFIG_ARCH_MARCO) += timer-marco.o obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o obj-$(CONFIG_ARCH_MXS) += mxs_timer.o +obj-$(CONFIG_ARCH_PXA) += pxa_timer.o obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o obj-$(CONFIG_ARCH_U300)+= timer-u300.o obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o diff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c similarity index 100% rename from arch/arm/mach-pxa/time.c rename to drivers/clocksource/pxa_timer.c -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 4/4] arm: pxa: add non device-tree timer link to clocksource
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V2: Arnd's comment : moved extern declaration into .h file
---
arch/arm/mach-pxa/generic.c | 11 +++
include/clocksource/pxa.h | 18 ++
2 files changed, 29 insertions(+)
create mode 100644 include/clocksource/pxa.h
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4225417..6f38e1a 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,11 +25,13 @@
#include asm/mach/map.h
#include asm/mach-types.h
+#include mach/irqs.h
#include mach/reset.h
#include mach/smemc.h
#include mach/pxa3xx-regs.h
#include generic.h
+#include clocksource/pxa.h
void clear_reset_status(unsigned int mask)
{
@@ -57,6 +59,15 @@ unsigned long get_clock_tick_rate(void)
EXPORT_SYMBOL(get_clock_tick_rate);
/*
+ * For non device-tree builds, keep legacy timer init
+ */
+void pxa_timer_init(void)
+{
+ pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a0),
+ get_clock_tick_rate());
+}
+
+/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.
* If info is not 0 we also display the current settings.
diff --git a/include/clocksource/pxa.h b/include/clocksource/pxa.h
new file mode 100644
index 000..1efbe5a
--- /dev/null
+++ b/include/clocksource/pxa.h
@@ -0,0 +1,18 @@
+/*
+ * PXA clocksource, clockevents, and OST interrupt handlers.
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ */
+
+#ifndef _CLOCKSOURCE_PXA_H
+#define _CLOCKSOURCE_PXA_H
+
+extern void pxa_timer_nodt_init(int irq, void __iomem *base,
+ unsigned long clock_tick_rate);
+
+#endif
--
2.0.0.rc2
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[PATCH v3 3/4] arm: pxa: add CLKSRC_OF dependency
Select CLKSRC_OF for PXA architectures. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 87b63fd..472dea1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -644,6 +644,7 @@ config ARCH_PXA select AUTO_ZRELADDR select CLKDEV_LOOKUP select CLKSRC_MMIO + select CLKSRC_OF select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_IDE -- 2.0.0.rc2 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 2/4] clocksource: add device-tree support for PXA timer
Add device-tree support to PXA platforms.
The driver still needs to maintain backward non device-tree
compatibility as well, which implies :
- a non device-tree init function
- a static registers base address in the driver
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1: Daniel's review:
- comments for registers
- registers clean-up
- mach includes removed
- panic() removed
---
drivers/clocksource/pxa_timer.c | 137 +---
1 file changed, 101 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index fca174e..941f3f3 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -15,14 +15,30 @@
#include linux/kernel.h
#include linux/init.h
#include linux/interrupt.h
+#include linux/clk.h
#include linux/clockchips.h
+#include linux/of_address.h
+#include linux/of_irq.h
#include linux/sched_clock.h
#include asm/div64.h
-#include asm/mach/irq.h
-#include asm/mach/time.h
-#include mach/regs-ost.h
-#include mach/irqs.h
+
+#define OSMR0 0x00/* OS Timer 0 Match Register */
+#define OSMR1 0x04/* OS Timer 1 Match Register */
+#define OSMR2 0x08/* OS Timer 2 Match Register */
+#define OSMR3 0x0C/* OS Timer 3 Match Register */
+
+#define OSCR 0x10/* OS Timer Counter Register */
+#define OSSR 0x14/* OS Timer Status Register */
+#define OWER 0x18/* OS Timer Watchdog Enable Register */
+#define OIER 0x1C/* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3(1 3)/* Match status channel 3 */
+#define OSSR_M2(1 2)/* Match status channel 2 */
+#define OSSR_M1(1 1)/* Match status channel 1 */
+#define OSSR_M0(1 0)/* Match status channel 0 */
+
+#define OIER_E0(1 0)/* Interrupt enable channel 0 */
/*
* This is PXA's sched_clock implementation. This has a resolution
@@ -33,9 +49,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
- return readl_relaxed(OSCR);
+ return timer_readl(OSCR);
}
@@ -47,8 +68,8 @@ pxa_ost0_interrupt(int irq, void *dev_id)
struct clock_event_device *c = dev_id;
/* Disarm the compare/match, signal the event. */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
c-event_handler(c);
return IRQ_HANDLED;
@@ -59,10 +80,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct
clock_event_device *dev)
{
unsigned long next, oscr;
- writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER);
- next = readl_relaxed(OSCR) + delta;
- writel_relaxed(next, OSMR0);
- oscr = readl_relaxed(OSCR);
+ timer_writel(timer_readl(OIER) | OIER_E0, OIER);
+ next = timer_readl(OSCR) + delta;
+ timer_writel(next, OSMR0);
+ oscr = timer_readl(OSCR);
return (signed)(next - oscr) = MIN_OSCR_DELTA ? -ETIME : 0;
}
@@ -72,15 +93,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct
clock_event_device *dev)
{
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
/* initializing, released, or preparing for suspend */
- writel_relaxed(readl_relaxed(OIER) ~OIER_E0, OIER);
- writel_relaxed(OSSR_M0, OSSR);
+ timer_writel(timer_readl(OIER) ~OIER_E0, OIER);
+ timer_writel(OSSR_M0, OSSR);
break;
case CLOCK_EVT_MODE_RESUME:
@@ -94,12 +115,12 @@ static unsigned long osmr[4], oier, oscr;
static void pxa_timer_suspend(struct clock_event_device *cedev)
{
- osmr[0] = readl_relaxed(OSMR0);
- osmr[1] = readl_relaxed(OSMR1);
- osmr[2] = readl_relaxed(OSMR2);
- osmr[3] = readl_relaxed(OSMR3);
- oier = readl_relaxed(OIER);
- oscr = readl_relaxed(OSCR);
+ osmr[0] = timer_readl(OSMR0);
+ osmr[1] = timer_readl(OSMR1);
+ osmr[2] = timer_readl(OSMR2);
+ osmr[3] = timer_readl(OSMR3);
+ oier = timer_readl(OIER);
+ oscr = timer_readl(OSCR);
}
static void pxa_timer_resume(struct clock_event_device *cedev)
@@ -113,12 +134,12 @@ static void
Re: [PATCH 2/3] clocksource: add device-tree support for PXA timer
Daniel Lezcano daniel.lezc...@linaro.org writes:
-#include mach/regs-ost.h
#include mach/irqs.h
+#include mach/hardware.h
Now as the driver is in 'drivers', do not reference the headers files in
mach. Moving the driver to the drivers directory implies some cleanup with the
headers dependencies.
I don't see that very possible.
Or said another way, I don't see how the irq number, IRQ_OST0 (in mach/irqs.h)
can be guessed for non device-tree configuration.
+#define OSMR0 0x00/* */
+#define OSMR1 0x04/* */
+#define OSMR2 0x08/* */
+#define OSMR3 0x0C/* */
+#define OSMR4 0x80/* */
Can you please remove those unused empty comment or fill them with something
appropriate.
Sure.
+#define OSCR0x10/* OS Timer Counter Register */
+#define OSCR4 0x40/* OS Timer Counter Register */
+#define OMCR4 0xC0/* */
+#define OSSR0x14/* OS Timer Status Register */
+#define OWER0x18/* OS Timer Watchdog Enable Register */
+#define OIER0x1C/* OS Timer Interrupt Enable Register */
+
+#define OSSR_M3 (1 3)/* Match status channel 3 */
+#define OSSR_M2 (1 2)/* Match status channel 2 */
+#define OSSR_M1 (1 1)/* Match status channel 1 */
+#define OSSR_M0 (1 0)/* Match status channel 0 */
+
+#define OWER_WME(1 0)/* Watchdog Match Enable */
+
+#define OIER_E3 (1 3)/* Interrupt enable channel 3 */
+#define OIER_E2 (1 2)/* Interrupt enable channel 2 */
+#define OIER_E1 (1 1)/* Interrupt enable channel 1 */
+#define OIER_E0 (1 0)/* Interrupt enable channel 0 */
Is it possible to do some cleanups around regs-ost.h and here in order to
remove
the unused macros. Also, it seems some define will be duplicate as they are
shared with the watchdog. Any plan to fix that ?
For the cleanup, yes, will do.
For the watchdog I don't have any plan yet. This patch's purpose is only to
bring the PXA time source to drivers/clocksource, and make it compatible with
both device-tree and non device-tree builds.
@@ -33,9 +60,14 @@
* calls to sched_clock() which should always be the case in practice.
*/
+#define timer_readl(reg) readl_relaxed(timer_base + (reg))
+#define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
+
+static void __iomem *timer_base;
+
static u64 notrace pxa_read_sched_clock(void)
{
-return readl_relaxed(OSCR);
So here there is a change which is not explained in the changelog (timer_base
offset).
Even it is obvious for me because I am used to see this kind of code, that
would
deserve a better description in the changelog.
OK, I'll add the backward compatibility explanation with non device-tree builds,
and the necessary timer_base iomem hard encoded value. And the Janus double face
explanation of the driver (both DT and non-DT oriented).
Another question brought up by this : if I remove all 'mach/' includes, I loose
io_p2v() right ? How can I guess timer_base then ?
+/* we are only interested in OS-timer0 irq */
+irq = irq_of_parse_and_map(np, 0);
+if (irq = 0)
+panic(%s: unable to parse OS-timer0 irq\n, np-name);
Is the 'panic' desirable ? The clksrc-of is written in a way to use different
clocks, no ?
Good question.
Maybe not, I followed the same rationale as in orion-timer, which is :
- as this timer is the only possible timer for PXA boards, and because without
it the kernel boot will stall (scheduling will be blocked), it's better to
panic early that to remain stalled.
Isn't this a good approach ?
--
Robert
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Re: [PATCH 2/3] clocksource: add device-tree support for PXA timer
Robert Jarzmik robert.jarz...@free.fr writes: Daniel Lezcano daniel.lezc...@linaro.org writes: -#include mach/regs-ost.h #include mach/irqs.h +#include mach/hardware.h Now as the driver is in 'drivers', do not reference the headers files in mach. Moving the driver to the drivers directory implies some cleanup with the headers dependencies. I don't see that very possible. Or said another way, I don't see how the irq number, IRQ_OST0 (in mach/irqs.h) can be guessed for non device-tree configuration. Oh yeah, a simple parameter to pxa_init_timer() will do the trick ... Another question brought up by this : if I remove all 'mach/' includes, I loose io_p2v() right ? How can I guess timer_base then ? And same answer here, a simple parameter to pxa_init_timer() will solve this too. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH ] ARM: pxa: fix section mismatch warning for pxa_timer_nodt_init
Arnd Bergmann a...@arndb.de writes: commit a38b1f60b5245a3 (ARM: pxa: Add non device-tree timer link to clocksource) introduced a harmless section mismatch warning for all pxa platforms, by introducing a new pxa_timer_init() function that is not marked __init but that calls pxa_timer_nodt_init(), which is. The function is only called at init time, so it is safe to also annotate it this way. Signed-off-by: Arnd Bergmann a...@arndb.de Indeed. Acked-by: Robert Jarzmik robert.jarz...@free.fr Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re : Re: [PATCH ] ARM: pxa: fix section mismatch warning for pxa_timer_nodt_init
Yes please Arnd, I'm still out for 1.5 week, so it would be great if you take
that through your tree with my ack. Thanks.
Robert
PS: I know, top-posting is madness, but I'm really limited by technology right
now.
- Mail d'origine -
De: Arnd Bergmann a...@arndb.de
À: Robert Jarzmik robert.jarz...@free.fr
Cc: Haojian Zhuang haojian.zhu...@gmail.com, Daniel Lezcano
daniel.lezc...@linaro.org, linux-arm-ker...@lists.infradead.org,
linux-kernel@vger.kernel.org, devicet...@vger.kernel.org, Thomas Gleixner
t...@linutronix.de, a...@kernel.org
Envoyé: Sun, 07 Sep 2014 23:06:05 +0200 (CEST)
Objet: Re: [PATCH ] ARM: pxa: fix section mismatch warning for
pxa_timer_nodt_init
On Saturday 26 July 2014 20:50:36 Arnd Bergmann wrote:
commit a38b1f60b5245a3 (ARM: pxa: Add non device-tree timer link to
clocksource) introduced a harmless section mismatch warning for
all pxa platforms, by introducing a new pxa_timer_init() function
that is not marked __init but that calls pxa_timer_nodt_init(),
which is. The function is only called at init time, so it is safe
to also annotate it this way.
Signed-off-by: Arnd Bergmann a...@arndb.de
Apparently this is not merged yet, should we take it through arm-soc?
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 630fa916bbc6..04b013fbc98f 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -61,7 +61,7 @@ EXPORT_SYMBOL(get_clock_tick_rate);
/*
* For non device-tree builds, keep legacy timer init
*/
-void pxa_timer_init(void)
+void __init pxa_timer_init(void)
{
pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a0),
get_clock_tick_rate());
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[PATCH v2 1/2] regulator: max1586 add device-tree support
Add device-tree support to max1586.
The driver can still be used with the legacy platform data, or the new
device-tree way.
This work is heavily inspired by the device-tree support of its cousin
max8660 driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1: added the comment about regulator not being able to be
queried.
See https://lkml.org/lkml/2014/6/24/899
---
drivers/regulator/max1586.c | 81 ++-
include/linux/regulator/max1586.h | 2 +-
2 files changed, 80 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/max1586.c b/drivers/regulator/max1586.c
index d23d057..5c04a71 100644
--- a/drivers/regulator/max1586.c
+++ b/drivers/regulator/max1586.c
@@ -24,6 +24,8 @@
#include linux/regulator/driver.h
#include linux/slab.h
#include linux/regulator/max1586.h
+#include linux/of_device.h
+#include linux/regulator/of_regulator.h
#define MAX1586_V3_MAX_VSEL 31
#define MAX1586_V6_MAX_VSEL 3
@@ -157,13 +159,87 @@ static struct regulator_desc max1586_reg[] = {
},
};
+int of_get_max1586_platform_data(struct device *dev,
+struct max1586_platform_data *pdata)
+{
+ struct max1586_subdev_data *sub;
+ struct of_regulator_match rmatch[ARRAY_SIZE(max1586_reg)];
+ struct device_node *np = dev-of_node;
+ int i, matched;
+
+ if (of_property_read_u32(np, v3-gain,
+pdata-v3_gain) 0) {
+ dev_err(dev, %s has no 'v3-gain' property\n, np-full_name);
+ return -EINVAL;
+ }
+
+ np = of_get_child_by_name(np, regulators);
+ if (!np) {
+ dev_err(dev, missing 'regulators' subnode in DT\n);
+ return -EINVAL;
+ }
+
+ for (i = 0; i ARRAY_SIZE(rmatch); i++)
+ rmatch[i].name = max1586_reg[i].name;
+
+ matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch));
+ of_node_put(np);
+ /*
+* If matched is 0, ie. neither Output_V3 nor Output_V6 have been found,
+* return 0, which signals the normal situation where no subregulator is
+* available. This is normal because the max1586 doesn't provide any
+* readback support, so the subregulators can't report any status
+* anyway. If matched 0, return the error.
+*/
+ if (matched = 0)
+ return matched;
+
+ pdata-subdevs = devm_kzalloc(dev, sizeof(struct max1586_subdev_data) *
+ matched, GFP_KERNEL);
+ if (!pdata-subdevs)
+ return -ENOMEM;
+
+ pdata-num_subdevs = matched;
+ sub = pdata-subdevs;
+
+ for (i = 0; i matched; i++) {
+ sub-id = i;
+ sub-name = rmatch[i].of_node-name;
+ sub-platform_data = rmatch[i].init_data;
+ sub++;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id max1586_of_match[] = {
+ { .compatible = maxim,max1586, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, max1586_of_match);
+
static int max1586_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
- struct max1586_platform_data *pdata = dev_get_platdata(client-dev);
+ struct max1586_platform_data *pdata, pdata_of;
struct regulator_config config = { };
struct max1586_data *max1586;
- int i, id;
+ int i, id, ret;
+ const struct of_device_id *match;
+
+ pdata = dev_get_platdata(client-dev);
+ if (client-dev.of_node !pdata) {
+ match = of_match_device(of_match_ptr(max1586_of_match),
+ client-dev);
+ if (!match) {
+ dev_err(client-dev, Error: No device match found\n);
+ return -ENODEV;
+ }
+ ret = of_get_max1586_platform_data(client-dev, pdata_of);
+ if (ret 0)
+ return ret;
+ pdata = pdata_of;
+ }
max1586 = devm_kzalloc(client-dev, sizeof(struct max1586_data),
GFP_KERNEL);
@@ -229,6 +305,7 @@ static struct i2c_driver max1586_pmic_driver = {
.driver = {
.name = max1586,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(max1586_of_match),
},
.id_table = max1586_id,
};
diff --git a/include/linux/regulator/max1586.h
b/include/linux/regulator/max1586.h
index de9a7fa..cedd0fe 100644
--- a/include/linux/regulator/max1586.h
+++ b/include/linux/regulator/max1586.h
@@ -40,7 +40,7 @@
*/
struct max1586_subdev_data {
int id;
- char*name;
+ const char *name;
struct regulator_init_data *platform_data;
};
--
2.0.0.rc2
--
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[PATCH v2 2/2] regulator: max1586 add device-tree support
Add max1586 regulator device-tree bindings documentation.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
.../bindings/regulator/max1586-regulator.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/max1586-regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
new file mode 100644
index 000..c050c17
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
@@ -0,0 +1,28 @@
+Maxim MAX1586 voltage regulator
+
+Required properties:
+- compatible: must be maxim,max1586
+- reg: I2C slave address, usually 0x14
+- v3-gain: integer specifying the V3 gain as per datasheet
+ (1 + R24/R25 + R24/185.5kOhm)
+- any required generic properties defined in regulator.txt
+
+Example:
+
+ i2c_master {
+ max1586@14 {
+ compatible = maxim,max1586;
+ reg = 0x14;
+ v3-gain = 100;
+
+ regulators {
+ vcc_core: v3 {
+ regulator-name = vcc_core;
+ regulator-compatible = Output_V3;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 1705000;
+ regulator-always-on;
+ };
+ };
+ };
+ };
--
2.0.0.rc2
--
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[PATCH v2 RESEND 2/2] regulator: max1586 add device-tree support
Add max1586 regulator device-tree bindings documentation.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
.../bindings/regulator/max1586-regulator.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/max1586-regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
new file mode 100644
index 000..c050c17
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/max1586-regulator.txt
@@ -0,0 +1,28 @@
+Maxim MAX1586 voltage regulator
+
+Required properties:
+- compatible: must be maxim,max1586
+- reg: I2C slave address, usually 0x14
+- v3-gain: integer specifying the V3 gain as per datasheet
+ (1 + R24/R25 + R24/185.5kOhm)
+- any required generic properties defined in regulator.txt
+
+Example:
+
+ i2c_master {
+ max1586@14 {
+ compatible = maxim,max1586;
+ reg = 0x14;
+ v3-gain = 100;
+
+ regulators {
+ vcc_core: v3 {
+ regulator-name = vcc_core;
+ regulator-compatible = Output_V3;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 1705000;
+ regulator-always-on;
+ };
+ };
+ };
+ };
--
2.0.0.rc2
--
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[PATCH v2 RESEND 1/2] regulator: max1586 add device-tree support
Add device-tree support to max1586.
The driver can still be used with the legacy platform data, or the new
device-tree way.
This work is heavily inspired by the device-tree support of its cousin
max8660 driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since V1: added the comment about regulator not being able to be
queried.
See https://lkml.org/lkml/2014/6/24/899
---
drivers/regulator/max1586.c | 81 ++-
include/linux/regulator/max1586.h | 2 +-
2 files changed, 80 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/max1586.c b/drivers/regulator/max1586.c
index d23d057..5c04a71 100644
--- a/drivers/regulator/max1586.c
+++ b/drivers/regulator/max1586.c
@@ -24,6 +24,8 @@
#include linux/regulator/driver.h
#include linux/slab.h
#include linux/regulator/max1586.h
+#include linux/of_device.h
+#include linux/regulator/of_regulator.h
#define MAX1586_V3_MAX_VSEL 31
#define MAX1586_V6_MAX_VSEL 3
@@ -157,13 +159,87 @@ static struct regulator_desc max1586_reg[] = {
},
};
+int of_get_max1586_platform_data(struct device *dev,
+struct max1586_platform_data *pdata)
+{
+ struct max1586_subdev_data *sub;
+ struct of_regulator_match rmatch[ARRAY_SIZE(max1586_reg)];
+ struct device_node *np = dev-of_node;
+ int i, matched;
+
+ if (of_property_read_u32(np, v3-gain,
+pdata-v3_gain) 0) {
+ dev_err(dev, %s has no 'v3-gain' property\n, np-full_name);
+ return -EINVAL;
+ }
+
+ np = of_get_child_by_name(np, regulators);
+ if (!np) {
+ dev_err(dev, missing 'regulators' subnode in DT\n);
+ return -EINVAL;
+ }
+
+ for (i = 0; i ARRAY_SIZE(rmatch); i++)
+ rmatch[i].name = max1586_reg[i].name;
+
+ matched = of_regulator_match(dev, np, rmatch, ARRAY_SIZE(rmatch));
+ of_node_put(np);
+ /*
+* If matched is 0, ie. neither Output_V3 nor Output_V6 have been found,
+* return 0, which signals the normal situation where no subregulator is
+* available. This is normal because the max1586 doesn't provide any
+* readback support, so the subregulators can't report any status
+* anyway. If matched 0, return the error.
+*/
+ if (matched = 0)
+ return matched;
+
+ pdata-subdevs = devm_kzalloc(dev, sizeof(struct max1586_subdev_data) *
+ matched, GFP_KERNEL);
+ if (!pdata-subdevs)
+ return -ENOMEM;
+
+ pdata-num_subdevs = matched;
+ sub = pdata-subdevs;
+
+ for (i = 0; i matched; i++) {
+ sub-id = i;
+ sub-name = rmatch[i].of_node-name;
+ sub-platform_data = rmatch[i].init_data;
+ sub++;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id max1586_of_match[] = {
+ { .compatible = maxim,max1586, },
+ {},
+};
+MODULE_DEVICE_TABLE(of, max1586_of_match);
+
static int max1586_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
- struct max1586_platform_data *pdata = dev_get_platdata(client-dev);
+ struct max1586_platform_data *pdata, pdata_of;
struct regulator_config config = { };
struct max1586_data *max1586;
- int i, id;
+ int i, id, ret;
+ const struct of_device_id *match;
+
+ pdata = dev_get_platdata(client-dev);
+ if (client-dev.of_node !pdata) {
+ match = of_match_device(of_match_ptr(max1586_of_match),
+ client-dev);
+ if (!match) {
+ dev_err(client-dev, Error: No device match found\n);
+ return -ENODEV;
+ }
+ ret = of_get_max1586_platform_data(client-dev, pdata_of);
+ if (ret 0)
+ return ret;
+ pdata = pdata_of;
+ }
max1586 = devm_kzalloc(client-dev, sizeof(struct max1586_data),
GFP_KERNEL);
@@ -229,6 +305,7 @@ static struct i2c_driver max1586_pmic_driver = {
.driver = {
.name = max1586,
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(max1586_of_match),
},
.id_table = max1586_id,
};
diff --git a/include/linux/regulator/max1586.h
b/include/linux/regulator/max1586.h
index de9a7fa..cedd0fe 100644
--- a/include/linux/regulator/max1586.h
+++ b/include/linux/regulator/max1586.h
@@ -40,7 +40,7 @@
*/
struct max1586_subdev_data {
int id;
- char*name;
+ const char *name;
struct regulator_init_data *platform_data;
};
--
2.0.0.rc2
--
To unsubscribe
Re: [PATCH 7/8] arm: mach-pxa: Convert pr_warning to pr_warn
Joe Perches j...@perches.com writes: Use the more common pr_warn. Other miscellanea: o Coalesce formats o Realign arguments Signed-off-by: Joe Perches j...@perches.com Applied to pxa/cleanup branch, thanks. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: N900 modem support in 3.18-rc1
Pavel Machek pa...@ucw.cz writes: Thanks for the info. I added +Mainline has support for Mitac Mio A701, but that having only 64MiB +RAM, QTopia is the software to use there. Thanks Pavel, that looks good. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: arm: pxa: CPU_PXA27x?
Paul Bolle pebo...@tiscali.nl writes: Robert, Your commit 03ec7fe70c5c (arm: pxa: add pxa27x device-tree support) is included in today's linux-next (ie, next-20141121). It adds a select statement for CPU_PXA27x. But there's no Kconfig symbol CPU_PXA27x. Ah yes, you're perfectly right, CPU_PXA27x was not the one, it was PXA27x, sic .. Why is that select needed? For what it's worth: __cpu_is_pxa27x() compiles to something interesting if CONFIG_PXA27x is defined. You mean is not defined, right ? That (CONFIG_PXA27x) select is needed because without it the arm cpu architecture is not selected, ie. CONFIG_CPU_XSCALE is not set. And this in turn is needed to choose the basic arm operations like TLB handling, cache handling, etc ... You cannot compile a single platform kernel without this. As a poor excuse, I hadn't seen this because this resulted from a poor merge resolution which brought in both select PXA27x and select CPU_PXA27x. In https://lkml.org/lkml/2014/9/30/578 I proposed a patch that emits a warning in cases like this. Like _all_ Kconfig related patches I've seen flying by lately it appears to be dropped in /dev/null. What's going on? For that one I don't know. Ah, and yes I'll send an update patch to remove the select CPU_PXA27x, thanks for noticing this. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: pxa: arbitrarily set first interrupt number
As IRQ0, the legacy timer interrupt should not be used as an interrupt number, shift the interrupts by a fixed number. As we had in a special case a shift of 16 when ISA bus was used on a PXA, use that value as the first interrupt number, regardless of ISA or not. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Kconfig | 5 - arch/arm/mach-pxa/include/mach/irqs.h | 9 ++--- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index e6690a4..bfca4ead 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -73,14 +73,12 @@ config ARCH_VIPER select I2C_GPIO if I2C=y select ISA select PXA25x - select PXA_HAVE_ISA_IRQS config MACH_ARCOM_ZEUS bool Arcom/Eurotech ZEUS SBC select ARCOM_PCMCIA select ISA select PXA27x - select PXA_HAVE_ISA_IRQS config MACH_BALLOON3 bool Balloon 3 board @@ -680,9 +678,6 @@ config SHARPSL_PM_MAX select SPI select SPI_MASTER -config PXA_HAVE_ISA_IRQS - bool - config PXA310_ULPI bool diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 48c2fd8..83e04d4 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -12,14 +12,9 @@ #ifndef __ASM_MACH_IRQS_H #define __ASM_MACH_IRQS_H -#ifdef CONFIG_PXA_HAVE_ISA_IRQS -#define PXA_ISA_IRQ(x) (x) -#define PXA_ISA_IRQ_NUM(16) -#else -#define PXA_ISA_IRQ_NUM(0) -#endif +#include asm/irq.h -#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) +#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x)) #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ #define IRQ_MSLPXA_IRQ(1) /* MSL Interface interrupt */ -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v3 4/4] arm: pxa: add non device-tree timer link to clocksource
Daniel Lezcano daniel.lezc...@linaro.org writes: On 07/21/2014 08:15 PM, Robert Jarzmik wrote: Daniel Lezcano daniel.lezc...@linaro.org writes: On 07/14/2014 06:52 PM, Robert Jarzmik wrote: As clocksource pxa_timer was moved to clocksource framework, the pxa_timer initialization needs to be a bit amended, to pass the necessary informations to clocksource, ie : - the timer interrupt (mach specific) - the timer registers base (ditto) - the timer clockrate Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- Since V2: Arnd's comment : moved extern declaration into .h file --- Hi, May be I missed it but I don't see the Haojian's ack. Thanks -- Daniel You're right, I scanned through my mail and didn't find the ack. Haojian, would you review this one please ? It's here : http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/272311.html Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v1 0/3] Transition pxa25x clock to common clocks
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes: 2014-11-09 0:01 GMT+03:00 Robert Jarzmik robert.jarz...@free.fr: clock enable_cnt prepare_cntrate accuracy phase clk_dummy00 0 0 0 osc_32_768khz3332768000 Here the clock rate should be 1000 times slower, for v3. ppll_147_46mhz24 147456000 0 0 AC97 1112288000 This is not the same value as before, but given that the manual states this value and that AC97 clock's rate is not used by its driver (probably because the clock is driven by the codec if I remember correctly), that will stay this way. 0 0 I2S00 147456000 Here to clock rate is 10 times too quick, for v3. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3] clk: add pxa25x clock drivers
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Tested-by: Dmitry Eremin-Solenikov dbarysh...@gmail.com
---
Since v1: fix clocks after Dmitry tests.
Since v2: fix clock rates of I2S and 32kHz oscillator
---
drivers/clk/pxa/Makefile | 1 +
drivers/clk/pxa/clk-pxa25x.c | 273 +++
2 files changed, 274 insertions(+)
create mode 100644 drivers/clk/pxa/clk-pxa25x.c
diff --git a/drivers/clk/pxa/Makefile b/drivers/clk/pxa/Makefile
index 4ff2abc..38e9153 100644
--- a/drivers/clk/pxa/Makefile
+++ b/drivers/clk/pxa/Makefile
@@ -1,2 +1,3 @@
obj-y += clk-pxa.o
+obj-$(CONFIG_PXA25x) += clk-pxa25x.o
obj-$(CONFIG_PXA27x) += clk-pxa27x.o
diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
new file mode 100644
index 000..6cd88d9
--- /dev/null
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -0,0 +1,273 @@
+/*
+ * Marvell PXA25x family clocks
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * Heavily inspired from former arch/arm/mach-pxa/pxa25x.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * For non-devicetree platforms. Once pxa is fully converted to devicetree,
this
+ * should go away.
+ */
+#include linux/clk-provider.h
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/of.h
+#include mach/pxa25x.h
+#include mach/pxa2xx-regs.h
+
+#include dt-bindings/clock/pxa-clock.h
+#include clk-pxa.h
+
+#define KHz 1000
+#define MHz (1000 * 1000)
+
+enum {
+ PXA_CORE_RUN = 0,
+ PXA_CORE_TURBO,
+};
+
+/*
+ * Various clock factors driven by the CCCR register.
+ */
+
+/* Crystal Frequency to Memory Frequency Multiplier (L) */
+static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
+
+/* Memory Frequency to Run Mode Frequency Multiplier (M) */
+static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
+
+/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
+/* Note: we store the value N * 2 here. */
+static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
+
+static const char * const get_freq_khz[] = {
+ core, run, cpll, memory
+};
+
+/*
+ * Get the clock frequency as reflected by CCCR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
+ */
+unsigned int pxa25x_get_clk_frequency_khz(int info)
+{
+ struct clk *clk;
+ unsigned long clks[5];
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(get_freq_khz); i++) {
+ clk = clk_get(NULL, get_freq_khz[i]);
+ if (IS_ERR(clk)) {
+ clks[i] = 0;
+ } else {
+ clks[i] = clk_get_rate(clk);
+ clk_put(clk);
+ }
+ }
+
+ if (info) {
+ pr_info(Run Mode clock: %ld.%02ldMHz\n,
+ clks[1] / 100, (clks[1] % 100) / 1);
+ pr_info(Turbo Mode clock: %ld.%02ldMHz\n,
+ clks[2] / 100, (clks[2] % 100) / 1);
+ pr_info(Memory clock: %ld.%02ldMHz\n,
+ clks[3] / 100, (clks[3] % 100) / 1);
+ }
+
+ return (unsigned int)clks[0];
+}
+
+static unsigned long clk_pxa25x_memory_get_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ unsigned long cccr = CCCR;
+ unsigned int m = M_clk_mult[(cccr 5) 0x03];
+
+ return parent_rate / m;
+}
+PARENTS(clk_pxa25x_memory) = { run };
+RATE_RO_OPS(clk_pxa25x_memory, memory);
+
+PARENTS(pxa25x_pbus95) = { ppll_95_85mhz, ppll_95_85mhz };
+PARENTS(pxa25x_pbus147) = { ppll_147_46mhz, ppll_147_46mhz };
+PARENTS(pxa25x_osc3) = { osc_3_6864mhz, osc_3_6864mhz };
+
+#define PXA25X_CKEN(dev_id, con_id, parents, mult, div,
\
+ bit, is_lp, flags) \
+ PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div,\
+is_lp, CKEN, CKEN_ ## bit, flags)
+#define PXA25X_PBUS95_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)
\
+ PXA25X_CKEN(dev_id, con_id, pxa25x_pbus95_parents, mult_hp, \
+ div_hp, bit, NULL, 0)
+#define PXA25X_PBUS147_CKEN(dev_id, con_id, bit, mult_hp, div_hp
[PATCH 1/4] arm: pxa: change clocks init sequence
Since pxa clocks were ported to the clock framework, an ordering issue
appears between clocks and clocksource initialization. As a consequence,
the pxa timer clock cannot be acquired in pxa_timer, and is disabled by
clock framework because it is unused.
The ordering issue is that in the kernel boot sequence :
start_kernel()
...
time_init()
- pxa_timer()
- here the clocksource is initialized
...
rest_init()
kernel_init()
initcalls
- here the clocks are initialized
In the current sequence, the clocks are initialized way after pxa_timer,
which cannot acquire the OSTIMER0 clock.
To solve this issue, the clocks initialization is moved to pxa_timer(),
so that clocks are initialized before clocksource for non device-tree.
For device-tree, the standard arm time_init() will take care of the
ordering.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/generic.c | 4
arch/arm/mach-pxa/generic.h | 2 ++
drivers/clk/pxa/clk-pxa27x.c | 3 +--
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 04b013f..d988c53 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -63,6 +63,10 @@ EXPORT_SYMBOL(get_clock_tick_rate);
*/
void __init pxa_timer_init(void)
{
+ if (cpu_is_pxa25x())
+ pxa25x_clocks_init();
+ if (cpu_is_pxa27x())
+ pxa27x_clocks_init();
pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a0),
get_clock_tick_rate());
}
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 7a9fa1a..149087c 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -26,11 +26,13 @@ extern void pxa_timer_init(void);
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
#define pxa25x_handle_irq icip_handle_irq
+extern int __init pxa25x_clocks_init(void);
extern void __init pxa25x_init_irq(void);
extern void __init pxa25x_map_io(void);
extern void __init pxa26x_init_irq(void);
#define pxa27x_handle_irq ichp_handle_irq
+extern int __init pxa27x_clocks_init(void);
extern void __init pxa27x_dt_init_irq(void);
extern unsignedpxa27x_get_clk_frequency_khz(int);
extern void __init pxa27x_init_irq(void);
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index 5f9b54b..2b8343a 100644
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -362,12 +362,11 @@ static void __init pxa27x_base_clocks_init(void)
clk_register_clk_pxa27x_lcd_base();
}
-static int __init pxa27x_clocks_init(void)
+int __init pxa27x_clocks_init(void)
{
pxa27x_base_clocks_init();
return clk_pxa_cken_init(pxa27x_clocks, ARRAY_SIZE(pxa27x_clocks));
}
-postcore_initcall(pxa27x_clocks_init);
static void __init pxa27x_dt_clocks_init(struct device_node *np)
{
--
2.1.0
--
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[PATCH 4/4] clk: pxa: add missing pxa27x clocks for Irda and sa1100-rtc
Add 2 clocks which were erronously forgotten by the clock framework
port, namely :
- sa1100-rtc
- irda for pxa2xx-ir:UARTCLK
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/clk/pxa/clk-pxa27x.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index 2b8343a..9a31b77 100644
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -353,6 +353,34 @@ static u8 clk_pxa27x_memory_get_parent(struct clk_hw *hw)
PARENTS(clk_pxa27x_memory) = { osc_13mhz, system_bus, run };
MUX_RO_RATE_RO_OPS(clk_pxa27x_memory, memory);
+#define DUMMY_CLK(_con_id, _dev_id, _parent) \
+ { .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
+struct dummy_clk {
+ const char *con_id;
+ const char *dev_id;
+ const char *parent;
+};
+static struct dummy_clk dummy_clks[] __initdata = {
+ DUMMY_CLK(NULL, pxa27x-gpio, osc_32_768khz),
+ DUMMY_CLK(NULL, sa1100-rtc, osc_32_768khz),
+ DUMMY_CLK(UARTCLK, pxa2xx-ir, STUART),
+};
+
+static void __init pxa27x_dummy_clocks_init(void)
+{
+ struct clk *clk;
+ struct dummy_clk *d;
+ const char *name;
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(dummy_clks); i++) {
+ d = dummy_clks[i];
+ name = d-dev_id ? d-dev_id : d-con_id;
+ clk = clk_register_fixed_factor(NULL, name, d-parent, 0, 1, 1);
+ clk_register_clkdev(clk, d-con_id, d-dev_id);
+ }
+}
+
static void __init pxa27x_base_clocks_init(void)
{
pxa27x_register_plls();
@@ -365,6 +393,7 @@ static void __init pxa27x_base_clocks_init(void)
int __init pxa27x_clocks_init(void)
{
pxa27x_base_clocks_init();
+ pxa27x_dummy_clocks_init();
return clk_pxa_cken_init(pxa27x_clocks, ARRAY_SIZE(pxa27x_clocks));
}
--
2.1.0
--
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[PATCH 3/4] arm: pxa: move gpio11 clock to board files
The pxa25x gpio11 clock output was previously selected on its pin by the
clock enabling, toggling the pin function.
As we transition to common clock framework, the pin function is moved to
board file for the 2 users, ie. lubbock and eseries.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/eseries.c | 5 -
arch/arm/mach-pxa/lubbock.c | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index cfb8641..d8fc9a3 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -683,7 +683,7 @@ static unsigned long e750_pin_config[] __initdata = {
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
- GPIO11_GPIO, /* IRQ0 */
+ /* GPIO11_GPIO, IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
@@ -778,6 +778,9 @@ static unsigned long e800_pin_config[] __initdata = {
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
+
+ /* tc6393xb */
+ GPIO11_3_6MHz,
};
static struct w100_gen_regs e800_lcd_regs = {
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index d8a1be6..b742708 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -101,6 +101,9 @@ static unsigned long lubbock_pin_config[] __initdata = {
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
+ /* SA chip */
+ GPIO11_3_6MHz,
+
/* wakeup */
GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
};
--
2.1.0
--
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[PATCH 0/4] Transition of pxa25x and pxa27x to clock framework
This series makes the transition from old clock code to the clock framework for the pxa25x and pxa27x. That will only leave pxa3xx to be converted. As there is no defconfig using both pxa3xx and any other pxa2xx variant, the previous mess should be avoided. This change can be very disruptive for pxa25x and pxa27x platforms. So far only Dmitry and me had tested it, and covered tosa (pxa25x), lubbock (pxa25x), mioa701(pxa27x) boards. Once reviewed, I'd like this serie to go through the pxa tree. Therefore an ack from Mike is necesary for the last patch (add missing pxa27x clocks). This is targeted at 3.20 window. Cheers. -- Robert Robert Jarzmik (4): arm: pxa: change clocks init sequence arm: pxa: Transition pxa25x and pxa27x to clk framework arm: pxa: move gpio11 clock to board files clk: pxa: add missing pxa27x clocks for Irda and sa1100-rtc arch/arm/Kconfig | 1 + arch/arm/mach-pxa/Makefile | 9 +-- arch/arm/mach-pxa/eseries.c | 5 +- arch/arm/mach-pxa/generic.c | 4 + arch/arm/mach-pxa/generic.h | 2 + arch/arm/mach-pxa/lubbock.c | 3 + arch/arm/mach-pxa/pxa25x.c | 182 --- arch/arm/mach-pxa/pxa27x.c | 174 + drivers/clk/pxa/clk-pxa27x.c | 32 +++- 9 files changed, 50 insertions(+), 362 deletions(-) -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH 2/4] arm: pxa: Transition pxa25x and pxa27x to clk framework
Transition the PXA25x and PXA27x CPUs to the clock framework.
This transition still enables legacy platforms to run without device
tree as before, ie relying on platform data encoded in board specific
files.
The transition breaks the previous clocks activation of pin
control (gpio11 and gpio12). Machine files should be amended to take
that into account.
This is the last step of clock framework transition for pxa25x and
pxa27x, leaving only pxa3xx for further work.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/Kconfig | 1 +
arch/arm/mach-pxa/Makefile | 9 +--
arch/arm/mach-pxa/pxa25x.c | 182 -
arch/arm/mach-pxa/pxa27x.c | 174 +--
4 files changed, 7 insertions(+), 359 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97d07ed..466ebc2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -611,6 +611,7 @@ config ARCH_PXA
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
select AUTO_ZRELADDR
+ select COMMON_CLK if PXA27x || PXA25x
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_OF
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index eb0bf76..1566a27 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -3,16 +3,15 @@
#
# Common support (must be linked before board specific support)
-obj-y += clock.o devices.o generic.o irq.o \
- reset.o
+obj-y += devices.o generic.o irq.o reset.o
obj-$(CONFIG_PM) += pm.o sleep.o standby.o
# Generic drivers that other drivers may depend upon
# SoC-specific code
-obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
-obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
-obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o
pxa3xx-ulpi.o
+obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
+obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock.o clock-pxa3xx.o pxa3xx.o
smemc.o pxa3xx-ulpi.o
obj-$(CONFIG_CPU_PXA300) += pxa300.o
obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 66e4a2b..70e6d0e 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -44,181 +44,6 @@
* Various clock factors driven by the CCCR register.
*/
-/* Crystal Frequency to Memory Frequency Multiplier (L) */
-static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
-
-/* Memory Frequency to Run Mode Frequency Multiplier (M) */
-static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
-
-/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
-/* Note: we store the value N * 2 here. */
-static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
-
-/* Crystal clock */
-#define BASE_CLK 3686400
-
-/*
- * Get the clock frequency as reflected by CCCR and the turbo flag.
- * We assume these values have been applied via a fcs.
- * If info is not 0 we also display the current settings.
- */
-unsigned int pxa25x_get_clk_frequency_khz(int info)
-{
- unsigned long cccr, turbo;
- unsigned int l, L, m, M, n2, N;
-
- cccr = CCCR;
- asm( mrc\tp14, 0, %0, c6, c0, 0 : =r (turbo) );
-
- l = L_clk_mult[(cccr 0) 0x1f];
- m = M_clk_mult[(cccr 5) 0x03];
- n2 = N2_clk_mult[(cccr 7) 0x07];
-
- L = l * BASE_CLK;
- M = m * L;
- N = n2 * M / 2;
-
- if(info)
- {
- L += 5000;
- printk( KERN_INFO Memory clock: %d.%02dMHz (*%d)\n,
- L / 100, (L % 100) / 1, l );
- M += 5000;
- printk( KERN_INFO Run Mode clock: %d.%02dMHz (*%d)\n,
- M / 100, (M % 100) / 1, m );
- N += 5000;
- printk( KERN_INFO Turbo Mode clock: %d.%02dMHz (*%d.%d,
%sactive)\n,
- N / 100, (N % 100) / 1, n2 / 2, (n2 % 2) *
5,
- (turbo 1) ? : in );
- }
-
- return (turbo 1) ? (N/1000) : (M/1000);
-}
-
-static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
-{
- return L_clk_mult[(CCCR 0) 0x1f] * BASE_CLK;
-}
-
-static const struct clkops clk_pxa25x_mem_ops = {
- .enable = clk_dummy_enable,
- .disable= clk_dummy_disable,
- .getrate= clk_pxa25x_mem_getrate,
-};
-
-static const struct clkops clk_pxa25x_lcd_ops = {
- .enable = clk_pxa2xx_cken_enable,
- .disable= clk_pxa2xx_cken_disable,
- .getrate= clk_pxa25x_mem_getrate,
-};
-
-static unsigned long gpio12_config_32k[] = {
- GPIO12_32KHz
[PATCH v1 0/3] Transition pxa25x clock to common clocks
Hello pxa25x board maintainers, This patchset will move the clock code out of pxa subarchitecture into the common clock framework. As this change can bring a lot of regression, I'd like to test it on your boards. I prepared for you a git tree based on v3.18-rc : - git fetch https://github.com:rjarzmik/linux.git work/clocks-pxa:try - git checkout try - it contains all the common clock fixes for pxa and this pathset - it builds and runs on lubbock (thanks Russell for the board) - make your defconfig, kernel, boot - test - if it does run normally, tell me - if it doesn't boot, retry once with the kernel command line argument clk_ignore_unused and tell me if it fixed or not the problem - be aware of the GPIO11 clock change = this is especially true for Ian as my change doesn't look good If you could give me feedback if it works for you there will be less breakage. And if you want to give a review, even better. Cheers. -- Robert Robert Jarzmik (3): clk: add pxa25x clock drivers arm: pxa: Transition pxa25x to clk framework ARM: pxa: move gpio11 clock to board files arch/arm/Kconfig | 1 + arch/arm/mach-pxa/Makefile | 9 +- arch/arm/mach-pxa/eseries.c | 5 +- arch/arm/mach-pxa/generic.c | 2 + arch/arm/mach-pxa/generic.h | 1 + arch/arm/mach-pxa/lubbock.c | 3 + arch/arm/mach-pxa/pxa25x.c | 182 drivers/clk/pxa/Makefile | 1 + drivers/clk/pxa/clk-pxa25x.c | 274 +++ 9 files changed, 290 insertions(+), 188 deletions(-) create mode 100644 drivers/clk/pxa/clk-pxa25x.c -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v1 2/3] arm: pxa: Transition pxa25x to clk framework
Transition the PXA25x CPUs to the clock framework.
This transition still enables legacy platforms to run without device
tree as before, ie relying on platform data encoded in board specific
files.
The transition breaks the previous clocks activation of pin
control (gpio11 and gpio12). Machine files should be amended to take
that into account.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/Kconfig| 1 +
arch/arm/mach-pxa/Makefile | 9 +--
arch/arm/mach-pxa/generic.c | 2 +
arch/arm/mach-pxa/generic.h | 1 +
arch/arm/mach-pxa/pxa25x.c | 182
5 files changed, 8 insertions(+), 187 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 89c4b5c..2bae231 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -625,6 +625,7 @@ config ARCH_PXA
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
select AUTO_ZRELADDR
+ select COMMON_CLK if PXA27x || PXA25x
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_OF
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 2fe1824..f05b36d 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -3,16 +3,15 @@
#
# Common support (must be linked before board specific support)
-obj-y += clock.o devices.o generic.o irq.o \
- reset.o
+obj-y += devices.o generic.o irq.o reset.o
obj-$(CONFIG_PM) += pm.o sleep.o standby.o
# Generic drivers that other drivers may depend upon
# SoC-specific code
-obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
-obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
-obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o
pxa3xx-ulpi.o
+obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
+obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock.o clock-pxa3xx.o pxa3xx.o
smemc.o pxa3xx-ulpi.o
obj-$(CONFIG_CPU_PXA300) += pxa300.o
obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 4ca801b..d988c53 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -63,6 +63,8 @@ EXPORT_SYMBOL(get_clock_tick_rate);
*/
void __init pxa_timer_init(void)
{
+ if (cpu_is_pxa25x())
+ pxa25x_clocks_init();
if (cpu_is_pxa27x())
pxa27x_clocks_init();
pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a0),
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 7fda082..c66fe38 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -14,6 +14,7 @@
struct irq_data;
extern void pxa_timer_init(void);
+extern int pxa25x_clocks_init(void);
extern int pxa27x_clocks_init(void);
extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 66e4a2b..70e6d0e 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -44,181 +44,6 @@
* Various clock factors driven by the CCCR register.
*/
-/* Crystal Frequency to Memory Frequency Multiplier (L) */
-static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
-
-/* Memory Frequency to Run Mode Frequency Multiplier (M) */
-static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
-
-/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
-/* Note: we store the value N * 2 here. */
-static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
-
-/* Crystal clock */
-#define BASE_CLK 3686400
-
-/*
- * Get the clock frequency as reflected by CCCR and the turbo flag.
- * We assume these values have been applied via a fcs.
- * If info is not 0 we also display the current settings.
- */
-unsigned int pxa25x_get_clk_frequency_khz(int info)
-{
- unsigned long cccr, turbo;
- unsigned int l, L, m, M, n2, N;
-
- cccr = CCCR;
- asm( mrc\tp14, 0, %0, c6, c0, 0 : =r (turbo) );
-
- l = L_clk_mult[(cccr 0) 0x1f];
- m = M_clk_mult[(cccr 5) 0x03];
- n2 = N2_clk_mult[(cccr 7) 0x07];
-
- L = l * BASE_CLK;
- M = m * L;
- N = n2 * M / 2;
-
- if(info)
- {
- L += 5000;
- printk( KERN_INFO Memory clock: %d.%02dMHz (*%d)\n,
- L / 100, (L % 100) / 1, l );
- M += 5000;
- printk( KERN_INFO Run Mode clock: %d.%02dMHz (*%d)\n,
- M / 100, (M % 100) / 1, m );
- N += 5000;
- printk( KERN_INFO Turbo Mode clock: %d.%02dMHz (*%d.%d,
%sactive)\n,
- N / 100, (N % 100) / 1, n2 / 2, (n2 % 2) *
5
[PATCH v1 1/3] clk: add pxa25x clock drivers
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/clk/pxa/Makefile | 1 +
drivers/clk/pxa/clk-pxa25x.c | 274 +++
2 files changed, 275 insertions(+)
create mode 100644 drivers/clk/pxa/clk-pxa25x.c
diff --git a/drivers/clk/pxa/Makefile b/drivers/clk/pxa/Makefile
index 4ff2abc..38e9153 100644
--- a/drivers/clk/pxa/Makefile
+++ b/drivers/clk/pxa/Makefile
@@ -1,2 +1,3 @@
obj-y += clk-pxa.o
+obj-$(CONFIG_PXA25x) += clk-pxa25x.o
obj-$(CONFIG_PXA27x) += clk-pxa27x.o
diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
new file mode 100644
index 000..db07d4b
--- /dev/null
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -0,0 +1,274 @@
+/*
+ * Marvell PXA25x family clocks
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * Heavily inspired from former arch/arm/mach-pxa/pxa25x.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * For non-devicetree platforms. Once pxa is fully converted to devicetree,
this
+ * should go away.
+ */
+#include linux/clk-provider.h
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/of.h
+#include mach/pxa25x.h
+#include mach/pxa2xx-regs.h
+
+#include dt-bindings/clock/pxa-clock.h
+#include clk-pxa.h
+
+#define KHz 1000
+#define MHz (1000 * 1000)
+
+enum {
+ PXA_CORE_RUN = 0,
+ PXA_CORE_TURBO,
+};
+
+/*
+ * Various clock factors driven by the CCCR register.
+ */
+
+/* Crystal Frequency to Memory Frequency Multiplier (L) */
+static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
+
+/* Memory Frequency to Run Mode Frequency Multiplier (M) */
+static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
+
+/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
+/* Note: we store the value N * 2 here. */
+static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
+
+static const char * const get_freq_khz[] = {
+ core, run, cpll, memory
+};
+
+/*
+ * Get the clock frequency as reflected by CCCR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
+ */
+unsigned int pxa25x_get_clk_frequency_khz(int info)
+{
+ struct clk *clk;
+ unsigned long clks[5];
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(get_freq_khz); i++) {
+ clk = clk_get(NULL, get_freq_khz[i]);
+ if (IS_ERR(clk)) {
+ clks[i] = 0;
+ } else {
+ clks[i] = clk_get_rate(clk);
+ clk_put(clk);
+ }
+ }
+
+ if (info) {
+ pr_info(Run Mode clock: %ld.%02ldMHz\n,
+ clks[1] / 100, (clks[1] % 100) / 1);
+ pr_info(Turbo Mode clock: %ld.%02ldMHz\n,
+ clks[2] / 100, (clks[2] % 100) / 1);
+ pr_info(Memory clock: %ld.%02ldMHz\n,
+ clks[3] / 100, (clks[3] % 100) / 1);
+ }
+
+ return (unsigned int)clks[0];
+}
+
+static unsigned long clk_pxa25x_memory_get_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ unsigned long cccr = CCCR;
+ unsigned int m = M_clk_mult[(cccr 5) 0x03];
+
+ return parent_rate / m;
+}
+PARENTS(clk_pxa25x_memory) = { run };
+RATE_RO_OPS(clk_pxa25x_memory, memory);
+
+PARENTS(pxa25x_pbus95) = { ppll_95_85mhz, ppll_95_85mhz };
+PARENTS(pxa25x_pbus147) = { ppll_147_46mhz, ppll_147_46mhz };
+PARENTS(pxa25x_osc3) = { osc_3_6864mhz, osc_3_6864mhz };
+
+#define PXA25X_CKEN(dev_id, con_id, parents, mult, div,
\
+ bit, is_lp, flags) \
+ PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div,\
+is_lp, CKEN, CKEN_ ## bit, flags)
+#define PXA25X_PBUS95_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)
\
+ PXA25X_CKEN(dev_id, con_id, pxa25x_pbus95_parents, mult_hp, \
+ div_hp, bit, NULL, 0)
+#define PXA25X_PBUS147_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)\
+ PXA25X_CKEN(dev_id, con_id, pxa25x_pbus147_parents, mult_hp,\
+ div_hp, bit, NULL, 0)
+#define PXA25X_OSC3_CKEN(dev_id
[PATCH v1 3/3] ARM: pxa: move gpio11 clock to board files
The pxa25x gpio11 clock output was previously selected on its pin by the
clock enabling, toggling the pin function.
As we transition to common clock framework, the pin function is moved to
board file for the 2 users, ie. lubbock and eseries.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/eseries.c | 5 -
arch/arm/mach-pxa/lubbock.c | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index cfb8641..d8fc9a3 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -683,7 +683,7 @@ static unsigned long e750_pin_config[] __initdata = {
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
- GPIO11_GPIO, /* IRQ0 */
+ /* GPIO11_GPIO, IRQ0 */
GPIO6_GPIO, /* IRQ1 */
GPIO27_GPIO, /* RST0 */
GPIO24_GPIO, /* RST1 */
@@ -778,6 +778,9 @@ static unsigned long e800_pin_config[] __initdata = {
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
+
+ /* tc6393xb */
+ GPIO11_3_6MHz,
};
static struct w100_gen_regs e800_lcd_regs = {
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index d8a1be6..b742708 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -101,6 +101,9 @@ static unsigned long lubbock_pin_config[] __initdata = {
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
+ /* SA chip */
+ GPIO11_3_6MHz,
+
/* wakeup */
GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
};
--
2.1.0
--
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[PATCH] mfd: cottula: add cottula board
Cottula board is the IO motherboard of the Intel PXA25x Development
Platform, which supports the Lubbock pxa25x soc board.
Historically, this support was in arch/arm/mach-pxa/lubbock.c. When
gpio-pxa was moved to drivers/pxa, it became a driver, and its
initialization and probing happened at postcore initcall. The lubbock
code used to install the chained lubbock interrupt handler at init_irq()
time.
The consequence of the gpio-pxa change is that the installed chained irq
handler lubbock_irq_handler() was overwritten in pxa_gpio_probe(_dt)(),
removing :
- the handler
- the falling edge detection setting of GPIO0, which revealed the
interrupt request from the lubbock IO board.
As a fix, move the gpio0 chained handler setup to a place where we have
the guarantee that pxa_gpio_probe() was called before, so that lubbock
handler becomes the true IRQ chained handler of GPIO0, demuxing the
lubbock IO board interrupts.
This patch moves all that handling to a mfd driver. It's only purpose
for the time being is the interrupt handling, but in the future it
should encompass all the motherboard CPLDs handling :
- leds
- switches
- hexleds
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/mfd/Kconfig | 10 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/cottula.c | 184 ++
3 files changed, 195 insertions(+)
create mode 100644 drivers/mfd/cottula.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1456ea7..051bd6d 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -79,6 +79,16 @@ config MFD_AXP20X
components like regulators or the PEK (Power Enable Key) under the
corresponding menus.
+config MFD_COTTULA
+ bool Cottula Motherboard
+ def_bool ARCH_LUBBOCK
+ select MFD_CORE
+ help
+ This driver supports the Cottula multifunction chip found on the
+ lubbock development platform system (named Cottula). This IO board
+ supports the interrupts handling, ethernet controller, flash chips,
+ etc ...
+
config MFD_CROS_EC
tristate ChromeOS Embedded Controller
select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 8bd54b1..48cc65b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
obj-$(CONFIG_MFD_SM501)+= sm501.o
obj-$(CONFIG_MFD_ASIC3)+= asic3.o tmio_core.o
obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o
+obj-$(CONFIG_MFD_COTTULA) += cottula.o
obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o
obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
diff --git a/drivers/mfd/cottula.c b/drivers/mfd/cottula.c
new file mode 100644
index 000..0345dbd
--- /dev/null
+++ b/drivers/mfd/cottula.c
@@ -0,0 +1,184 @@
+/*
+ * Intel Cotulla MFD - lubbock motherboard
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Cottula motherboard driver, supporting lubbock (aka. pxa25x) soc board.
+ *
+ */
+
+#include linux/bitops.h
+#include linux/gpio.h
+#include linux/gpio/consumer.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/irq.h
+#include linux/irqdomain.h
+#include linux/mfd/core.h
+#include linux/module.h
+#include linux/of_platform.h
+
+#define COT_IRQ_MASK_EN 0xc0
+#define COT_IRQ_SET_CLR 0xd0
+
+#define COTTULA_NB_IRQ 8
+
+struct cottula {
+ void __iomem*base;
+ int irq;
+ unsigned int irq_mask;
+ struct gpio_desc *gpio0;
+ struct irq_domain *irqdomain;
+};
+
+static void cottula_irq_handler(unsigned int in_irq, struct irq_desc *desc)
+{
+ struct cottula *cot = irq_desc_get_handler_data(desc);
+ unsigned long pending;
+ unsigned int bit;
+
+ pending = readl(cot-base + COT_IRQ_SET_CLR) cot-irq_mask;
+ for_each_set_bit(bit, pending, COTTULA_NB_IRQ)
+ generic_handle_irq(irq_find_mapping(cot-irqdomain, bit));
+}
+
+static void cottula_irq_mask_ack(struct irq_data *d)
+{
+ struct cottula *cot = irq_data_get_irq_chip_data(d);
+ unsigned int cottula_irq = irqd_to_hwirq(d);
+ unsigned int set, bit = BIT(cottula_irq);
+
+ cot-irq_mask = ~bit;
+ writel(cot-irq_mask, cot-base + COT_IRQ_MASK_EN);
+ set = readl(cot-base + COT_IRQ_SET_CLR);
+ writel(set ~bit, cot-base + COT_IRQ_SET_CLR);
+}
+
+static void cottula_irq_unmask(struct irq_data *d)
+{
+ struct cottula *cot = irq_data_get_irq_chip_data(d);
+ unsigned int cottula_irq = irqd_to_hwirq(d);
+ unsigned int bit = BIT(cottula_irq);
+
+ cot-irq_mask |= bit;
+ writel(cot-irq_mask, cot-base + COT_IRQ_MASK_EN
[PATCH] ARM: pxa: lubbock: use new cottula driver
As the interrupt handling was transferred to the cottula driver, make
the switch in lubbock platform code.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/include/mach/lubbock.h | 7 +-
arch/arm/mach-pxa/lubbock.c | 112 +--
2 files changed, 37 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h
b/arch/arm/mach-pxa/include/mach/lubbock.h
index 958cd6af..f602e6a 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -37,7 +37,9 @@
#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
/* Board specific IRQs */
-#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x))
+#define LUBBOCK_NR_IRQSIRQ_BOARD_START
+
+#define LUBBOCK_IRQ(x) (LUBBOCK_NR_IRQS + (x))
#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0)
#define LUBBOCK_SA_IRQ LUBBOCK_IRQ(1)
#define LUBBOCK_USB_IRQLUBBOCK_IRQ(2) /* usb connect */
@@ -47,8 +49,7 @@
#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
-#define LUBBOCK_SA_IRQ_BASE(IRQ_BOARD_START + 16)
-#define LUBBOCK_NR_IRQS(IRQ_BOARD_START + 16 + 55)
+#define LUBBOCK_SA_IRQ_BASE(LUBBOCK_NR_IRQS + 16)
#ifndef __ASSEMBLY__
extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index d8a1be6..44e35b7 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -12,6 +12,7 @@
* published by the Free Software Foundation.
*/
#include linux/gpio.h
+#include linux/gpio/machine.h
#include linux/module.h
#include linux/kernel.h
#include linux/init.h
@@ -123,84 +124,6 @@ void lubbock_set_misc_wr(unsigned int mask, unsigned int
set)
}
EXPORT_SYMBOL(lubbock_set_misc_wr);
-static unsigned long lubbock_irq_enabled;
-
-static void lubbock_mask_irq(struct irq_data *d)
-{
- int lubbock_irq = (d-irq - LUBBOCK_IRQ(0));
- LUB_IRQ_MASK_EN = (lubbock_irq_enabled = ~(1 lubbock_irq));
-}
-
-static void lubbock_unmask_irq(struct irq_data *d)
-{
- int lubbock_irq = (d-irq - LUBBOCK_IRQ(0));
- /* the irq can be acknowledged only if deasserted, so it's done here */
- LUB_IRQ_SET_CLR = ~(1 lubbock_irq);
- LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 lubbock_irq));
-}
-
-static struct irq_chip lubbock_irq_chip = {
- .name = FPGA,
- .irq_ack= lubbock_mask_irq,
- .irq_mask = lubbock_mask_irq,
- .irq_unmask = lubbock_unmask_irq,
-};
-
-static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
- unsigned long pending = LUB_IRQ_SET_CLR lubbock_irq_enabled;
- do {
- /* clear our parent irq */
- desc-irq_data.chip-irq_ack(desc-irq_data);
- if (likely(pending)) {
- irq = LUBBOCK_IRQ(0) + __ffs(pending);
- generic_handle_irq(irq);
- }
- pending = LUB_IRQ_SET_CLR lubbock_irq_enabled;
- } while (pending);
-}
-
-static void __init lubbock_init_irq(void)
-{
- int irq;
-
- pxa25x_init_irq();
-
- /* setup extra lubbock irqs */
- for (irq = LUBBOCK_IRQ(0); irq = LUBBOCK_LAST_IRQ; irq++) {
- irq_set_chip_and_handler(irq, lubbock_irq_chip,
-handle_level_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
-
- irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
- irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
-}
-
-#ifdef CONFIG_PM
-
-static void lubbock_irq_resume(void)
-{
- LUB_IRQ_MASK_EN = lubbock_irq_enabled;
-}
-
-static struct syscore_ops lubbock_irq_syscore_ops = {
- .resume = lubbock_irq_resume,
-};
-
-static int __init lubbock_irq_device_init(void)
-{
- if (machine_is_lubbock()) {
- register_syscore_ops(lubbock_irq_syscore_ops);
- return 0;
- }
- return -ENODEV;
-}
-
-device_initcall(lubbock_irq_device_init);
-
-#endif
-
static int lubbock_udc_is_connected(void)
{
return (LUB_MISC_RD (1 9)) == 0;
@@ -383,11 +306,33 @@ static struct platform_device lubbock_flash_device[2] = {
},
};
+static struct resource cottula_resources[] = {
+ [0] = {
+ .start = LUBBOCK_FPGA_PHYS,
+ .end= LUBBOCK_FPGA_PHYS + 256 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = LUBBOCK_IRQ(0),
+ .end= LUBBOCK_IRQ(0),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cottula_device = {
+ .name = cottula,
+ .id = -1,
+ .resource = cottula_resources[0],
+ .num_resources
Re: [PATCH v1 0/3] Transition pxa25x clock to common clocks
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes: Hello, Tested in qemu (pxa25x target). Excellent. 0) Had to revert 23c4a3a5212701ad34bd30591fa33d7bacef9c5f to get kernel to build for pxa25x + pxa27x. Yes, good move. 1) I got the following backtrace early in the boot: Division by zero in kernel. CPU: 0 PID: 0 Comm: swapper Not tainted 3.18.0-rc2-00011-g7805b78 #97 [c000e028] (unwind_backtrace) from [c000c0b4] (show_stack+0x10/0x14) [c000c0b4] (show_stack) from [c01a3af0] (Ldiv0+0x8/0x10) [c01a3af0] (Ldiv0) from [c029bb9c] (clk_pxa25x_memory_get_rate+0x28/0x30) [c029bb9c] (clk_pxa25x_memory_get_rate) from [c029b114] (clk_composite_recalc_rate+0x20/0x24) [c029b114] (clk_composite_recalc_rate) from [c0299888] (__clk_init+0x1d0/0x4e8) [c0299888] (__clk_init) from [c0299d24] (clk_register+0x100/0x1c4) [c0299d24] (clk_register) from [c029b518] (clk_register_composite+0x17c/0x250) [c029b518] (clk_register_composite) from [c04cecd4] (pxa25x_clocks_init+0x194/0x240) [c04cecd4] (pxa25x_clocks_init) from [c04c048c] (pxa_timer_init+0x18/0x64) [c04c048c] (pxa_timer_init) from [c04bde88] (time_init+0x1c/0x2c) [c04bde88] (time_init) from [c04bbb14] (start_kernel+0x268/0x3e8) [c04bbb14] (start_kernel) from [a0008040] (0xa0008040) It might be due to something being not emulated properly, but I'd suggest to add a check anyway. You're right about that part. According to the specification, the M multiplier in CCCR can only be 1, 2, or 3. 0 is a reserved value which should never happen, and if it happens, hardware is already lost. I don't want to be that defensive in this code unless it blocks something for good. 2) sa1100-rtc could not find a clock and thus failed to be probed. Ha I'll check that, thanks. 3) Had to patch tc6393xb driver to call clk_prepare_enable/clk_disable_unprepare - will submit a patch shortly. Good catch. 4) Got an issue with IrDA driver - it gets -ENODEV for UARTCLK clock I'll check that too. It's probable I either forgot a clock or mispelled a clock. Thanks for the test Dmitry. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v1 0/3] Transition pxa25x clock to common clocks
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes:
Hello,
Tested in qemu (pxa25x target).
2) sa1100-rtc could not find a clock and thus failed to be probed.
4) Got an issue with IrDA driver - it gets -ENODEV for UARTCLK clock
Hi Dmitry,
Would you mind retesting with the patch in [1] applied to see if points 2 and 4
are fixed ? Alternatively you can refetch from the github tree, I included that
incremental patch there too.
If it works correctly for you, could I have your Tested-by ? If not, tell me and
I'll try to figure out what's wrong.
Cheers.
--
Robert
[1]
From 7f43d2f9c9d415b8bc1ed7e2f3e422de349d6957 Mon Sep 17 00:00:00 2001
From: Robert Jarzmik robert.jarz...@free.fr
Date: Sat, 8 Nov 2014 18:20:18 +0100
Subject: [PATCH] fixup! clk: add pxa25x clock drivers
---
drivers/clk/pxa/clk-pxa25x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
index db07d4b..fb73e58 100644
--- a/drivers/clk/pxa/clk-pxa25x.c
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -127,7 +127,6 @@ static struct desc_clk_cken pxa25x_clocks[] __initdata = {
PXA25X_PBUS147_CKEN(pxa2xx-uart.1, NULL, BTUART, 1, 10, 1),
PXA25X_PBUS147_CKEN(pxa2xx-uart.2, NULL, STUART, 1, 10, 1),
PXA25X_PBUS147_CKEN(pxa2xx-uart.3, NULL, HWUART, 1, 10, 1),
- PXA25X_PBUS147_CKEN(pxa2xx-ir, UARTCLK, STUART, 1, 10, 1),
PXA25X_PBUS147_CKEN(pxa2xx-i2s, NULL, I2S, 1, 1, 0),
PXA25X_PBUS147_CKEN(NULL, AC97CLK, AC97, 1, 12, 0),
PXA25X_OSC3_CKEN(pxa25x-ssp.0, NULL, SSP, 1, 1, 0),
@@ -233,8 +232,9 @@ static struct dummy_clk dummy_clks[] __initdata = {
DUMMY_CLK(NULL, pxa26x-gpio, osc_32_768khz),
DUMMY_CLK(GPIO11_CLK, NULL, osc_3_6864mhz),
DUMMY_CLK(GPIO12_CLK, NULL, osc_32_768khz),
- DUMMY_CLK(sa1100-rtc, NULL, osc_32_768khz),
+ DUMMY_CLK(NULL, sa1100-rtc, osc_32_768khz),
DUMMY_CLK(OSTIMER0, NULL, osc_32_768khz),
+ DUMMY_CLK(UARTCLK, pxa2xx-ir, STUART),
};
static void __init pxa25x_dummy_clocks_init(void)
--
2.1.0
Re: [PATCH v1 0/3] Transition pxa25x clock to common clocks
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes:
2014-11-08 20:26 GMT+03:00 Robert Jarzmik robert.jarz...@free.fr:
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes:
Hello,
Tested in qemu (pxa25x target).
2) sa1100-rtc could not find a clock and thus failed to be probed.
4) Got an issue with IrDA driver - it gets -ENODEV for UARTCLK clock
Hi Dmitry,
Would you mind retesting with the patch in [1] applied to see if points 2
and 4
are fixed ? Alternatively you can refetch from the github tree, I included
that
incremental patch there too.
If it works correctly for you, could I have your Tested-by ? If not, tell me
and
I'll try to figure out what's wrong.
Tested in qemu, everything works fine. I will test on the real hardware
tomorow.
Aha, the test.
Would you at that time do a cat /sys/kernel/debug/clk/clk_summary and send it
to me please ?
BTW: It looks like pxa27x also shows the same behaviour wrt. sa1100-rtc and
pxa2xx-ir (after reverting a revert).
Ah yes, you're very right about that.
Same as before, github updated and patch included in this mail.
Cheers.
--
Robert
From c36803b312621c1a69d2d6aed000ae7ee11da588 Mon Sep 17 00:00:00 2001
From: Robert Jarzmik robert.jarz...@free.fr
Date: Sat, 8 Nov 2014 21:46:51 +0100
Subject: [PATCH] clk: pxa: add missing clocks for Irda and sa1100-rtc
Add 2 clocks which were erronously forgotten by the clock framework
port, namely :
- sa1100-rtc
- irda for pxa2xx-ir:UARTCLK
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/clk/pxa/clk-pxa27x.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index 2b8343a..611879b 100644
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -353,6 +353,33 @@ static u8 clk_pxa27x_memory_get_parent(struct clk_hw *hw)
PARENTS(clk_pxa27x_memory) = { osc_13mhz, system_bus, run };
MUX_RO_RATE_RO_OPS(clk_pxa27x_memory, memory);
+#define DUMMY_CLK(_con_id, _dev_id, _parent) \
+ { .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
+struct dummy_clk {
+ const char *con_id;
+ const char *dev_id;
+ const char *parent;
+};
+static struct dummy_clk dummy_clks[] __initdata = {
+ DUMMY_CLK(NULL, sa1100-rtc, osc_32_768khz),
+ DUMMY_CLK(UARTCLK, pxa2xx-ir, STUART),
+};
+
+static void __init pxa27x_dummy_clocks_init(void)
+{
+ struct clk *clk;
+ struct dummy_clk *d;
+ const char *name;
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(dummy_clks); i++) {
+ d = dummy_clks[i];
+ name = d-dev_id ? d-dev_id : d-con_id;
+ clk = clk_register_fixed_factor(NULL, name, d-parent, 0, 1, 1);
+ clk_register_clkdev(clk, d-con_id, d-dev_id);
+ }
+}
+
static void __init pxa27x_base_clocks_init(void)
{
pxa27x_register_plls();
@@ -365,6 +392,7 @@ static void __init pxa27x_base_clocks_init(void)
int __init pxa27x_clocks_init(void)
{
pxa27x_base_clocks_init();
+ pxa27x_dummy_clocks_init();
return clk_pxa_cken_init(pxa27x_clocks, ARRAY_SIZE(pxa27x_clocks));
}
--
2.1.0
Re: [PATCH v1 0/3] Transition pxa25x clock to common clocks
Dmitry Eremin-Solenikov dbarysh...@gmail.com writes: 2014-11-09 0:01 GMT+03:00 Robert Jarzmik robert.jarz...@free.fr: Tested-by: Dmitry Eremin-Solenikov dbarysh...@gmail.com OK, that's really great, thanks for your testing effort. I'll digest the clk_summary output next week to cross-check everything is in order. Could you please also include a revert of 23c4a3a5212701ad34bd30591fa33d7bacef9c5f into your branch? Otherwise pxa27x is broken in your tree. Done. I will release v2 of this serie very soon now as the fixes for at least 2 pxa25x platforms are identified and done. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] clk: add pxa25x clock drivers
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Tested-by: Dmitry Eremin-Solenikov dbarysh...@gmail.com
---
Since v1: fix clocks after Dmitry tests.
---
drivers/clk/pxa/Makefile | 1 +
drivers/clk/pxa/clk-pxa25x.c | 273 +++
2 files changed, 274 insertions(+)
create mode 100644 drivers/clk/pxa/clk-pxa25x.c
diff --git a/drivers/clk/pxa/Makefile b/drivers/clk/pxa/Makefile
index 4ff2abc..38e9153 100644
--- a/drivers/clk/pxa/Makefile
+++ b/drivers/clk/pxa/Makefile
@@ -1,2 +1,3 @@
obj-y += clk-pxa.o
+obj-$(CONFIG_PXA25x) += clk-pxa25x.o
obj-$(CONFIG_PXA27x) += clk-pxa27x.o
diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
new file mode 100644
index 000..0611a6b
--- /dev/null
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -0,0 +1,273 @@
+/*
+ * Marvell PXA25x family clocks
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * Heavily inspired from former arch/arm/mach-pxa/pxa25x.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * For non-devicetree platforms. Once pxa is fully converted to devicetree,
this
+ * should go away.
+ */
+#include linux/clk-provider.h
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/of.h
+#include mach/pxa25x.h
+#include mach/pxa2xx-regs.h
+
+#include dt-bindings/clock/pxa-clock.h
+#include clk-pxa.h
+
+#define KHz 1000
+#define MHz (1000 * 1000)
+
+enum {
+ PXA_CORE_RUN = 0,
+ PXA_CORE_TURBO,
+};
+
+/*
+ * Various clock factors driven by the CCCR register.
+ */
+
+/* Crystal Frequency to Memory Frequency Multiplier (L) */
+static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
+
+/* Memory Frequency to Run Mode Frequency Multiplier (M) */
+static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
+
+/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
+/* Note: we store the value N * 2 here. */
+static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
+
+static const char * const get_freq_khz[] = {
+ core, run, cpll, memory
+};
+
+/*
+ * Get the clock frequency as reflected by CCCR and the turbo flag.
+ * We assume these values have been applied via a fcs.
+ * If info is not 0 we also display the current settings.
+ */
+unsigned int pxa25x_get_clk_frequency_khz(int info)
+{
+ struct clk *clk;
+ unsigned long clks[5];
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(get_freq_khz); i++) {
+ clk = clk_get(NULL, get_freq_khz[i]);
+ if (IS_ERR(clk)) {
+ clks[i] = 0;
+ } else {
+ clks[i] = clk_get_rate(clk);
+ clk_put(clk);
+ }
+ }
+
+ if (info) {
+ pr_info(Run Mode clock: %ld.%02ldMHz\n,
+ clks[1] / 100, (clks[1] % 100) / 1);
+ pr_info(Turbo Mode clock: %ld.%02ldMHz\n,
+ clks[2] / 100, (clks[2] % 100) / 1);
+ pr_info(Memory clock: %ld.%02ldMHz\n,
+ clks[3] / 100, (clks[3] % 100) / 1);
+ }
+
+ return (unsigned int)clks[0];
+}
+
+static unsigned long clk_pxa25x_memory_get_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ unsigned long cccr = CCCR;
+ unsigned int m = M_clk_mult[(cccr 5) 0x03];
+
+ return parent_rate / m;
+}
+PARENTS(clk_pxa25x_memory) = { run };
+RATE_RO_OPS(clk_pxa25x_memory, memory);
+
+PARENTS(pxa25x_pbus95) = { ppll_95_85mhz, ppll_95_85mhz };
+PARENTS(pxa25x_pbus147) = { ppll_147_46mhz, ppll_147_46mhz };
+PARENTS(pxa25x_osc3) = { osc_3_6864mhz, osc_3_6864mhz };
+
+#define PXA25X_CKEN(dev_id, con_id, parents, mult, div,
\
+ bit, is_lp, flags) \
+ PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div,\
+is_lp, CKEN, CKEN_ ## bit, flags)
+#define PXA25X_PBUS95_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)
\
+ PXA25X_CKEN(dev_id, con_id, pxa25x_pbus95_parents, mult_hp, \
+ div_hp, bit, NULL, 0)
+#define PXA25X_PBUS147_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)\
+ PXA25X_CKEN(dev_id, con_id
Re: N900 modem support in 3.18-rc1
Pavel Machek pa...@ucw.cz writes: On Thu 2014-11-13 20:18:04, Aaro Koskinen wrote: Hi, On Thu, Nov 13, 2014 at 09:45:36AM -0800, Tony Lindgren wrote: * Pavel Machek pa...@ucw.cz [141113 08:23]: OTOH ofono seems pretty reasonable. So I played a bit, and result is python/pygtk gui which can receive an sms, initiate a call, and report missed call. If someone wants to play, source is at https://gitorious.org/tui/tui/source/b6141107e9341a1412720aed4b0d09143dfa2f4e:ofone Pavel, care to fill in the the following type patch with some instructions in the description now that you got it working? Could we even have some permanent instructions under Documentation/? Something like this? commit 375d8d9f17433ade6afae91d4f34e170f0af04c4 Author: Pavel pa...@ucw.cz Date: Sun Nov 16 11:10:59 2014 +0100 Add basic documentation for n900 testing. Signed-off-by: Pavel Machek pa...@ucw.cz diff --git a/Documentation/cellphones.txt b/Documentation/cellphones.txt new file mode 100644 index 000..d7e8e7a --- /dev/null +++ b/Documentation/cellphones.txt @@ -0,0 +1,90 @@ +Running Linux on Cellphones +=== + +At this moment (2014), there are no cellphones completely supported by +mainline kernel. Another problem is lack of hackable userspace to run +on cellphone, even when kernel support is available. Hi Pavel, There is the Mitac Mio A701. Very old but still it is there, with the kernel part maintained. Userspace was based on QTopia in 2008. I don't maintain that part anymore though. The GSM part relies on a simple ttyS device (modem has its internal flash), no real data at that time, or rather 2G only, but the 07.10 mux support was never included in Qtopia ... Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] optimize ktime_divns for constant divisors
Nicolas Pitre nicolas.pi...@linaro.org writes: Let ktime_divns() use do_div() inline whenever the divisor is constant and small enough. This will make things like ktime_to_us() and ktime_to_ms() much faster. Hi Nicolas, I suppose the small enough is linked to the !(div 32) in your patch. Can I have the rationale which brought up this value, and if that value is universal across architectures (ie. x86/ppc/arm/...) ? And when you say much faster, do you have figures to add to your commit message ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] ARM: pxa: fix lubbock interrupts handling
Haojian Zhuang haojian.zhu...@gmail.com writes: I think that it's a kind of irq muxing, just like lots of PMIC (power management IC). We should move the lubbock board irqs to a mfd driver, and register them as threaded irqs. I will have a look. I didn't consider mfd for motherboard gates, I'll think of it, thanks for the idea. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] mfd: cottula: add cottula board
Robert Jarzmik robert.jarz...@free.fr writes:
Arnd Bergmann a...@arndb.de writes:
On Monday 15 December 2014 00:10:06 Robert Jarzmik wrote:
+
+ platform_set_drvdata(pdev, cot);
+ cot-gpio0 = gpiod_get(pdev-dev, lubbock_irq, 0);
+ if (IS_ERR(cot-gpio0)) {
+ dev_err(pdev-dev, Couldn't request GPIO : ret = %d\n,
ret);
+ return PTR_ERR(cot-gpio0);
+ }
+ cot-irq = gpiod_to_irq(cot-gpio0);
+ if (cot-irq 0)
+ return cot-irq;
+
+ cot-irqdomain =
+ irq_domain_add_linear(pdev-dev.of_node, COTTULA_NB_IRQ,
+ cottula_irq_domain_ops, cot);
+ if (!cot-irqdomain)
+ return -ENODEV;
+
+ ret = 0;
+ if (base_irq)
+ ret = irq_create_strict_mappings(cot-irqdomain, base_irq,
0,
+COTTULA_NB_IRQ);
This looks a bit ambiguous: You get a GPIO line for the purpose of the
IRQ nesting but don't use the GPIO otherwise, and you pass the device's
own irq domain start as an IORESOURCE_IRQ resource.
For consistency between DT and ATAGS based uses, and with similar DT
based drivers, I would instead recommend passing the parent irq (from
the GPIO) as an IORESOURCE_IRQ resource instead of a gpio lookup,
and passing the base_irq as platform_data for the ATAGS case.
Hi Arnd,
I thought again about the GPIO.
I put in the gpiod_get() call to ensure proper ordering between the gpio
probing and this driver probing. It ensured that this driver's probe will be
defered until the gpio driver is probed, which is the main purpose of this
patch (commit message).
If I pass an irq from the machine code, I loose this guarantee, don't I ?
Cheers.
--
Robert
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Re: [PATCH] mfd: cottula: add cottula board
Arnd Bergmann a...@arndb.de writes:
On Monday 15 December 2014 00:10:06 Robert Jarzmik wrote:
+
+ platform_set_drvdata(pdev, cot);
+ cot-gpio0 = gpiod_get(pdev-dev, lubbock_irq, 0);
+ if (IS_ERR(cot-gpio0)) {
+ dev_err(pdev-dev, Couldn't request GPIO : ret = %d\n,
ret);
+ return PTR_ERR(cot-gpio0);
+ }
+ cot-irq = gpiod_to_irq(cot-gpio0);
+ if (cot-irq 0)
+ return cot-irq;
+
+ cot-irqdomain =
+ irq_domain_add_linear(pdev-dev.of_node, COTTULA_NB_IRQ,
+ cottula_irq_domain_ops, cot);
+ if (!cot-irqdomain)
+ return -ENODEV;
+
+ ret = 0;
+ if (base_irq)
+ ret = irq_create_strict_mappings(cot-irqdomain, base_irq, 0,
+COTTULA_NB_IRQ);
This looks a bit ambiguous: You get a GPIO line for the purpose of the
IRQ nesting but don't use the GPIO otherwise, and you pass the device's
own irq domain start as an IORESOURCE_IRQ resource.
For consistency between DT and ATAGS based uses, and with similar DT
based drivers, I would instead recommend passing the parent irq (from
the GPIO) as an IORESOURCE_IRQ resource instead of a gpio lookup,
and passing the base_irq as platform_data for the ATAGS case.
I understand Arnd, yet I wanted to avoid any platform data if possible, as this
is a motherboard, it will not be plugged anywhere else with different
parameters.
What would you say if I did this :
- remove the gpio
- use IORESOURCE_IRQ(0) as the parent irq (as you suggested)
- use IORESOURCE_IRQ(1) as the base_irq
= this resource would be optional
- if exists, use it as base_irq
- if doesn't exist, let base_irq = 0
Will that look correct ?
Cheers.
--
Robert
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Re: [PATCH] mfd: cottula: add cottula board
Arnd Bergmann a...@arndb.de writes: Will that look correct ? I'd still prefer the platform data, but this seems good enough and I see no serious problems with it. OK, so I'll try with the 2 resources. If I'm bitten afterwards and am forced to have a platform data, you'll tell me I had warned you ;) I'll let a couple of days before patch v2 to gather more reviews. Thanks. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] ARM: pxa: fix lubbock interrupts handling
When gpio-pxa was moved to drivers/pxa, it became a driver, and its
initialization and probing happen at postcore initcall. The lubbock code
used to install the chained lubbock interrupt handler at init_irq()
time.
The consequence of the gpio-pxa change is that the installed chained irq
handler lubbock_irq_handler() was overwritten in pxa_gpio_probe(_dt)(),
removing :
- the handler
- the falling edge detection setting of GPIO0, which revealed the
interrupt request from the lubbock IO board.
As a fix, move the gpio0 chained handler setup to a place where we have
the guarantee that pxa_gpio_probe() was called before, so that lubbock
handler becomes the true IRQ chained handler of GPIO0, demuxing the
lubbock IO board interrupts.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
For Thomas: as a side note, I'm not very happy with this patch. What
makes me unhappy is that I don't know how to express the
dependency between gpio-pxa probe time and
irq_set_chained_handler(irq, lubbock_irq_handler).
At the moment I rely on the fact that
lubbock_irq_device_init() is called as device initcall while
pxa_gpio_probe() is called as postcore initcall.
If you have a better idea I'm all ears.
---
arch/arm/mach-pxa/lubbock.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index d8a1be6..1f138f9 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -172,9 +172,6 @@ static void __init lubbock_init_irq(void)
handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
-
- irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
- irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
}
#ifdef CONFIG_PM
@@ -190,7 +187,13 @@ static struct syscore_ops lubbock_irq_syscore_ops = {
static int __init lubbock_irq_device_init(void)
{
+ int irq;
+
if (machine_is_lubbock()) {
+ irq = PXA_GPIO_TO_IRQ(0);
+ irq_set_chained_handler(irq, lubbock_irq_handler);
+ irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+
register_syscore_ops(lubbock_irq_syscore_ops);
return 0;
}
--
2.1.0
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Re: [PATCH] ARM: pxa: fix lubbock interrupts handling
Thomas Gleixner t...@linutronix.de writes: So what is the relationship between installing that chained handler and that gpio-pxa probe stuff? The relation is in gpio-pxa probe, look at the extract of pxa_gpio_probe() : pxa_gpio_probe() irq = gpio_to_irq(0); irq_set_chip_and_handler(irq, pxa_muxed_gpio_chip, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); Now look at the extract from the former lubbock_init_irq() : lubbock_init_irq() irq = PXA_GPIO_TO_IRQ(0); irq_set_chained_handler(irq, lubbock_irq_handler); irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING); Given that gpio_to_irq(0) = PXA_GPIO_TO_IRQ(0), see how these 2 are fighting to install the handler, and how the resulting installed handler depends on the order of execution of pxa_gpio_to_irq() wrt lubbock_init_irq(). And why is the GPIO0 interrupt handled from arch code rather than from a regular driver setup, which depends on the availablity of the GPIO driver? Ah that's a good question. Maybe the answer is that there is no driver in this case. When I say no driver, it's because this interrupt is a consequence of the IO-Board (or motherboard) wiring topology. I think I need to add a bit of context, so pardon my crude ascii-art style, and see in the lubbock case, we have this wiring (list of IPs not exhaustive, and gates to mask each XXX irq not added) : IPs on Motherboard Gates on motherboard SoC +-+ +---+ | SMC Lan| --lan irq--- | Latch | - +-+ | | \ +--PXA-+ | | \ | | +-+ | | |+--+ | | UDC Vbus | --vbus irq-- | Latch | -- NOR gate -- GPIO0 -- ||GPIO block| | +-+ | |line |+--+ | | | / | | +-+ | | / +--+ | SA| --sa11x irq--| Latch | - +-+ +---+ The gates on motherboard is what lubbock.c is describing, ie. the interconnection on the motherboard. I don't see the device/driver model fitting to describe these gates, do you ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH] arm: pxa: fix pxa27x device-tree support kconfig
Remove the useless CPU_PXA27x non existing kconfig option. The true options is PXA27x, which is already selected. Reported-by: Paul Bolle pebo...@tiscali.nl Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 83efe91..5f71c06 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -6,7 +6,6 @@ comment Intel/Marvell Dev Platforms (sorted by hardware release time) config MACH_PXA27X_DT bool Support PXA27x platforms from device tree - select CPU_PXA27x select POWER_SUPPLY select PXA27x select USE_OF -- 2.1.0 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] spi/pxa2xx: Clear cur_chip pointer before starting next message
Mika Westerberg mika.westerb...@linux.intel.com writes: Once the current message is finished, the driver notifies SPI core about this by calling spi_finalize_current_message(). This function queues next message to be transferred. If there are more messages in the queue, it is possible that the driver is asked to transfer the next message at this point. When spi_finalize_current_message() returns the driver clears the drv_data-cur_chip pointer to NULL. The problem is that if the driver already started the next message clearing drv_data-cur_chip will cause NULL pointer dereference which crashes the kernel like: ..zip.. Fix this by clearing drv_data-cur_chip before we call spi_finalize_current_message(). So with your change, we have : drv_data-cur_chip = NULL; spi_finalize_current_message(drv_data-master); In that case, if spi_finalize_current_message() queues another message, upon this next message completion, won't giveback() be called, and dereference cur_chip as well ? Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] arm: pxa: fix pxa27x device-tree support kconfig
Robert Jarzmik robert.jarz...@free.fr writes: Remove the useless CPU_PXA27x non existing kconfig option. The true options is PXA27x, which is already selected. Reported-by: Paul Bolle pebo...@tiscali.nl Signed-off-by: Robert Jarzmik robert.jarz...@free.fr Queued to pxa/for-next. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] ARM: pxa: arbitrarily set first interrupt number
Robert Jarzmik robert.jarz...@free.fr writes: As IRQ0, the legacy timer interrupt should not be used as an interrupt number, shift the interrupts by a fixed number. As we had in a special case a shift of 16 when ISA bus was used on a PXA, use that value as the first interrupt number, regardless of ISA or not. Signed-off-by: Robert Jarzmik robert.jarz...@free.fr --- arch/arm/mach-pxa/Kconfig | 5 - arch/arm/mach-pxa/include/mach/irqs.h | 9 ++--- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index e6690a4..bfca4ead 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -73,14 +73,12 @@ config ARCH_VIPER select I2C_GPIO if I2C=y select ISA select PXA25x - select PXA_HAVE_ISA_IRQS config MACH_ARCOM_ZEUS bool Arcom/Eurotech ZEUS SBC select ARCOM_PCMCIA select ISA select PXA27x - select PXA_HAVE_ISA_IRQS config MACH_BALLOON3 bool Balloon 3 board @@ -680,9 +678,6 @@ config SHARPSL_PM_MAX select SPI select SPI_MASTER -config PXA_HAVE_ISA_IRQS - bool - config PXA310_ULPI bool diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 48c2fd8..83e04d4 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -12,14 +12,9 @@ #ifndef __ASM_MACH_IRQS_H #define __ASM_MACH_IRQS_H -#ifdef CONFIG_PXA_HAVE_ISA_IRQS -#define PXA_ISA_IRQ(x) (x) -#define PXA_ISA_IRQ_NUM (16) -#else -#define PXA_ISA_IRQ_NUM (0) -#endif +#include asm/irq.h -#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x)) +#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x)) #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ OK, nobody objected nor acked. I'll queue that up in pxa/for-next then. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH] spi/pxa2xx: Clear cur_chip pointer before starting next message
Mika Westerberg mika.westerb...@linux.intel.com writes: On Thu, Dec 04, 2014 at 10:01:06PM +0100, Robert Jarzmik wrote: So with your change, we have : drv_data-cur_chip = NULL; spi_finalize_current_message(drv_data-master); In that case, if spi_finalize_current_message() queues another message, upon this next message completion, won't giveback() be called, and dereference cur_chip as well ? When the next message is started pxa2xx_spi_transfer_one_message() gets called and that will set cur_chip again. Acked-by: Robert Jarzmik robert.jarz...@free.fr Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] [LBR] Dump LBRs on Exception
Andy Lutomirski l...@amacapital.net writes: I don't really care about the number of instructions. Right, a couple of test/jz/jnz is negligible in the exception path, that's what I also think. But there are still all the nasty cases: - Context switch during exception processing (both in the C handler and in the retint code). - PMI during exception processing. - Exception while perf is poking at LBR msrs. Yes. Wasn't that what Thomas's suggestion on the per-cpu variable was solving ? Ie: DEFINE_PER_CPU(unsigned long, lbr_dump_state) = LBR_OOPS_DISABLED; ... We would have a LBR resource variable to track who owns the LBR : - nobody : LBR_UNCLAIMED - the exception handler : LBR_EXCEPTION_DEBUG_USAGE - activated with a runtime variable or config - impossible to activate if perf has hold of it - the perf code : LBR_PERF_USAGE - activated through perf infrastructure - impossible to activated if exception handler has hold of it Now this solves the perf/exception concurrency on the LBR registers. If there is a rescheduling during the exception, or a PMI, can that have an impact ? - case 1: nobody is handling LBR = no impact, expception handlers won't touch LBR - case 2: perf is handling LBR = no imppact, exception handler won't touch LBR - case 3: exception handlers are handling LBR - case 3a: simple user exception - exception entry - is kernel exception == false = bypass LBR handling - exception handling - case 3b: simple kernel exception - exception entry - test lbr_dump_state == EXCEPTION_OWNED = true = STOP LBR - no reschedule, no PMI - exception handling - test lbr_dump_state == EXCEPTION_OWNED = true = START LBR - case 3c: kernel exception with PMI - exception entry - test lbr_dump_state == EXCEPTION_OWNED = true = STOP LBR - PMI can't touch LBR, as lbr_dump_state == EXCEPTION_OWNED - exception handling - test lbr_dump_state == EXCEPTION_OWNED = true = START LBR - case 3d: kernel exception with a reschedule inside - exception entry - test lbr_dump_state == EXCEPTION_OWNED = true = STOP LBR - exception handling - context_switch() - perf cannot touch LBR, nobody can - test lbr_dump_state == EXCEPTION_OWNED = true = START LBR I might be very wrong in the description as I'm not that sharp on x86, but is there a flaw in the above cases ? If not, a couple of tests and Thomas's per-cpu variable can solve the issue, while keeping the exception handler code simple as Emmanual has proposed (given the additionnal test inclusion - which will be designed to not pollute the LBR), and having a small impact on perf to solve the resource acquire issue. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] [LBR] Dump LBRs on Exception
Hi Andy, Andy Lutomirski l...@amacapital.net writes: On Dec 6, 2014 2:31 AM, Robert Jarzmik robert.jarz...@intel.com wrote: We would have a LBR resource variable to track who owns the LBR : - nobody : LBR_UNCLAIMED - the exception handler : LBR_EXCEPTION_DEBUG_USAGE Which exception handler? There can be several on the stack. All of them, ie. LBR is used by exception handlers, ie. perf cannot use it, just as what Emmanuel's patch is doing I think. Or said differently LBR are reserved for expeption handlers only, whichever have the implementation to use them. - case 3d: kernel exception with a reschedule inside - exception entry - test lbr_dump_state == EXCEPTION_OWNED = true = STOP LBR - exception handling - context_switch() - perf cannot touch LBR, nobody can - test lbr_dump_state == EXCEPTION_OWNED = true = START LBR Careful. This is still the nested exception, and it just did the wrong thing. Can you be more explicit about the wrong thing ? And would that wrong thing be solved by a per-cpu reference counter ? I might be very wrong in the description as I'm not that sharp on x86, but is there a flaw in the above cases ? If not, a couple of tests and Thomas's per-cpu variable can solve the issue, while keeping the exception handler code simple as Emmanual has proposed (given the additionnal test inclusion - which will be designed to not pollute the LBR), and having a small impact on perf to solve the resource acquire issue. On current kernels, percpu memory is vmalloced, so accessing it can fault, so you can't touch percpu memory at all from page_fault until the vmalloc fixup runs. Sorry :( What about INIT_PER_CPU_VAR (as in gdt_page) ? Won't that be mapped all the time without need for faulting in pages ? This is a problem with rdmsr, too. You mean rdmsr can fault in a non-hypervisor environment ? Because that definetely opens a new range of corner cases. It may be worth fixing that. In fact, it may be worth getting rid of lazy vmap entirely. Your battle ? ;) Anyway, would a static per-cpu variable (or variables, one about resources usage, one reference counter) solve our cases (ie. 3d) ? -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v2] mfd: lubbock_io: add lubbock_io board
Lubbock () board is the IO motherboard of the Intel PXA25x Development
Platform, which supports the Lubbock pxa25x soc board.
Historically, this support was in arch/arm/mach-pxa/lubbock.c. When
gpio-pxa was moved to drivers/pxa, it became a driver, and its
initialization and probing happened at postcore initcall. The lubbock
code used to install the chained lubbock interrupt handler at init_irq()
time.
The consequence of the gpio-pxa change is that the installed chained irq
handler lubbock_irq_handler() was overwritten in pxa_gpio_probe(_dt)(),
removing :
- the handler
- the falling edge detection setting of GPIO0, which revealed the
interrupt request from the lubbock IO board.
As a fix, move the gpio0 chained handler setup to a place where we have
the guarantee that pxa_gpio_probe() was called before, so that lubbock
handler becomes the true IRQ chained handler of GPIO0, demuxing the
lubbock IO board interrupts.
This patch moves all that handling to a mfd driver. It's only purpose
for the time being is the interrupt handling, but in the future it
should encompass all the motherboard CPLDs handling :
- leds
- switches
- hexleds
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since v1: change the name from cottula to lubbock_io
Dmitry pointed out the Cottula was the pxa25x family name,
lubbock was the pxa25x development board name. Therefore the
name was changed to lubbock_io (lubbock IO board)
change the resources to bi-irq ioresource
Discussion between Arnd and Robert to change the gpio
request by a irq request.
---
drivers/mfd/Kconfig | 10 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/lubbock.c | 193 ++
3 files changed, 204 insertions(+)
create mode 100644 drivers/mfd/lubbock.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 2e6b731..4d8939f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -91,6 +91,16 @@ config MFD_AXP20X
components like regulators or the PEK (Power Enable Key) under the
corresponding menus.
+config MFD_LUBBOCK
+ bool Lubbock Motherboard
+ def_bool ARCH_LUBBOCK
+ select MFD_CORE
+ help
+ This driver supports the Lubbock multifunction chip found on the
+ pxa25x development platform system (named Lubbock). This IO board
+ supports the interrupts handling, ethernet controller, flash chips,
+ etc ...
+
config MFD_CROS_EC
tristate ChromeOS Embedded Controller
select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 53467e2..aff1f4f 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
obj-$(CONFIG_MFD_SM501)+= sm501.o
obj-$(CONFIG_MFD_ASIC3)+= asic3.o tmio_core.o
obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o
+obj-$(CONFIG_MFD_LUBBOCK) += lubbock.o
obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o
obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
diff --git a/drivers/mfd/lubbock.c b/drivers/mfd/lubbock.c
new file mode 100644
index 000..c6ce82c
--- /dev/null
+++ b/drivers/mfd/lubbock.c
@@ -0,0 +1,193 @@
+/*
+ * Intel Cotulla MFD - lubbock motherboard
+ *
+ * Copyright (C) 2014 Robert Jarzmik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Lubbock motherboard driver, supporting lubbock (aka. pxa25x) soc board.
+ *
+ */
+
+#include linux/bitops.h
+#include linux/gpio.h
+#include linux/gpio/consumer.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/irq.h
+#include linux/irqdomain.h
+#include linux/mfd/core.h
+#include linux/module.h
+#include linux/of_platform.h
+
+#define COT_IRQ_MASK_EN 0xc0
+#define COT_IRQ_SET_CLR 0xd0
+
+#define LUBBOCK_NB_IRQ 8
+
+struct lubbock {
+ void __iomem*base;
+ int irq;
+ unsigned int irq_mask;
+ struct gpio_desc *gpio0;
+ struct irq_domain *irqdomain;
+};
+
+static irqreturn_t lubbock_irq_handler(int in_irq, void *d)
+{
+ struct lubbock *cot = d;
+ unsigned long pending;
+ unsigned int bit;
+
+ pending = readl(cot-base + COT_IRQ_SET_CLR) cot-irq_mask;
+ for_each_set_bit(bit, pending, LUBBOCK_NB_IRQ)
+ generic_handle_irq(irq_find_mapping(cot-irqdomain, bit));
+ return IRQ_HANDLED;
+}
+
+static void lubbock_irq_mask_ack(struct irq_data *d)
+{
+ struct lubbock *cot = irq_data_get_irq_chip_data(d);
+ unsigned int lubbock_irq = irqd_to_hwirq(d);
+ unsigned int set, bit = BIT(lubbock_irq);
+
+ cot-irq_mask = ~bit;
+ writel(cot-irq_mask, cot-base + COT_IRQ_MASK_EN);
+ set
Re: [PATCH v2] ARM: pxa: fix pxa interrupts handling in DT
Robert Jarzmik robert.jarz...@free.fr writes:
@@ -66,18 +67,20 @@ static inline void __iomem *irq_base(int i)
void pxa_mask_irq(struct irq_data *d)
{
void __iomem *base = irq_data_get_irq_chip_data(d);
+ irq_hw_number_t irq = irqd_to_hwirq(d);
uint32_t icmr = __raw_readl(base + ICMR);
- icmr = ~(1 IRQ_BIT(d-irq));
+ icmr = ~BIT(irq);
This should be : icmr = ~BIT(irq 0x1f);
__raw_writel(icmr, base + ICMR);
}
void pxa_unmask_irq(struct irq_data *d)
{
void __iomem *base = irq_data_get_irq_chip_data(d);
+ irq_hw_number_t irq = irqd_to_hwirq(d);
uint32_t icmr = __raw_readl(base + ICMR);
- icmr |= 1 IRQ_BIT(d-irq);
+ icmr |= BIT(irq);
Ditto.
+void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned
int))
+{
+ BUG_ON(irq_nr MAX_INTERNAL_IRQS);
+
+ pxa_irq_base = io_p2v(0x40d0);
+ cpu_has_ipr = !cpu_is_pxa25x();
+ pxa_init_irq_common(NULL, irq_nr, fn);
+}
This requires select IRQ_DOMAIN in arch/arm/Kconfig in ARCH_PXA.
--
Robert
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Re: [PATCH] clk: pxa: fix pxa27x_clocks_init scope
Stephen Boyd sb...@codeaurora.org writes: On 01/31/15 14:37, Robert Jarzmik wrote: As pxa27x_clocks_init() is called from early boot stage, it has to be reachable from pxa architecture code, as are pxa25x_clocks_init() and pxa2xx_clock_init(). Remove the static declaration, which was introduced before the order issue between clocks and the timer was discovered (ie. the clocks have to be available before the timer, all of this before initcalls are called). Signed-off-by: Robert Jarzmik robert.jarz...@free.fr Is this supposed to go through the clk tree? Ah you've got a point, it's a bit embarrassing, see below ... $ git grep pxa27x_clocks_init drivers/clk/pxa/clk-pxa27x.c:static int __init pxa27x_clocks_init(void) drivers/clk/pxa/clk-pxa27x.c:postcore_initcall(pxa27x_clocks_init); drivers/clk/pxa/clk-pxa27x.c: pxa27x_clocks_init(); Where's the early boot stage architecture calling code? It's there : - https://lkml.org/lkml/2015/1/12/1057 - which ended up here in pxa/for-next tree: https://github.com/rjarzmik/linux/commit/a494a74dc52532ed0cef4633db007a08f847a0a8 Which happens to be my tree ... Please forget about this patch, I don't know how I ended up doing this patch ... lack of coffee probably. Cheers. -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 5/5] ARM: dts: pxa: add pxa-timer to pxa27x
Sergei Shtylyov sergei.shtyl...@cogentembedded.com writes:
+clocksources {
+#address-cells = 1;
+#size-cells = 1;
+ranges;
+
+pxa-timer@40a0 {
Just timer@40a0, please.
Hi Sergei,
I forgot that in the v2, sorry. I'll put it in v3.
Cheers.
--
Robert
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[PATCH v2 2/5] ARM: dts: pxa: add clocks
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 36
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 80fc5d7..7cbf36f 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -1,6 +1,6 @@
/* The pxa3xx skeleton simply augments the 2xx version */
#include pxa2xx.dtsi
-#include dt-bindings/clock/pxa2xx-clock.h
+#include dt-bindings/clock/pxa-clock.h
/ {
model = Marvell PXA27x familiy SoC;
@@ -12,30 +12,58 @@
marvell,intc-nr-irqs = 34;
};
+ gpio: gpio@40e0 {
+ compatible = intel,pxa27x-gpio;
+ clocks = pxa2xx_clks CLK_NONE;
+ };
+
+ ffuart: uart@4010 {
+ clocks = pxa2xx_clks CLK_FFUART;
+ };
+
+ btuart: uart@4020 {
+ clocks = pxa2xx_clks CLK_BTUART;
+ };
+
+ stuart: uart@4070 {
+ clocks = pxa2xx_clks CLK_STUART;
+ };
+
pwm0: pwm@40b0 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40b0 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM0;
};
pwm1: pwm@40b00010 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40b00010 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM1;
};
pwm2: pwm@40c0 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40c0 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM0;
};
pwm3: pwm@40c00010 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40c00010 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM1;
+ };
+
+ pwri2c: i2c@40f000180 {
+ clocks = pxa2xx_clks CLK_PWRI2C;
+ };
+
+ pxai2c1: i2c@40301680 {
+ clocks = pxa2xx_clks CLK_I2C;
};
- };
clocks {
/*
@@ -47,10 +75,10 @@
ranges;
pxa2xx_clks: pxa2xx_clks@4134 {
- compatible = marvell,pxa-clocks;
+ compatible = marvell,pxa270-clocks;
#clock-cells = 1;
status = okay;
};
};
-
+ };
};
--
2.1.0
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[PATCH v2 1/5] ARM: dts: pxa: add pwri2c to pxa device-tree
Each pxa variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa2xx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/pxa2xx.dtsi b/arch/arm/boot/dts/pxa2xx.dtsi
index c08f846..2371d9b 100644
--- a/arch/arm/boot/dts/pxa2xx.dtsi
+++ b/arch/arm/boot/dts/pxa2xx.dtsi
@@ -103,6 +103,15 @@
status = disabled;
};
+ pwri2c: i2c@40f000180 {
+ compatible = mrvl,pxa-i2c;
+ reg = 0x40f00180 0x24;
+ interrupts = 6;
+ #address-cells = 0x1;
+ #size-cells = 0;
+ status = disabled;
+ };
+
pxai2c1: i2c@40301680 {
compatible = mrvl,pxa-i2c;
reg = 0x40301680 0x30;
--
2.1.0
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[PATCH v2 5/5] ARM: dts: pxa: add pxa-timer to pxa27x
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since v1: removed clocksource node, pxa-timer being directly under
pxabus (Rob's comment).
---
arch/arm/boot/dts/pxa27x.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 7f93828..473f9d8 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -97,5 +97,12 @@
status = okay;
};
};
+
+ pxa-timer@40a0 {
+ compatible = marvell,pxa-timer;
+ reg = 0x40a0 0x20;
+ interrupts = 26;
+ clocks = pxa2xx_clks CLK_OSTIMER;
+ status = okay;
};
};
--
2.1.0
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[PATCH v2 4/5] ARM: dts: pxa: add pxa27x-keypad to pxa27x
Each pxa27x has an embedded keypad controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 979560c..7f93828 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -73,6 +73,15 @@
status = disabled;
};
+ keypad: keypad@4150 {
+ compatible = marvell,pxa27x-keypad;
+ reg = 0x4150 0x4c;
+ interrupts = 4;
+ clocks = pxa2xx_clks CLK_KEYPAD;
+ status = disabled;
+ };
+ };
+
clocks {
/*
* The muxing of external clocks/internal dividers for osc* clock
--
2.1.0
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[PATCH v2 3/5] ARM: dts: pxa: add pxa27x-udc to pxa27x
Each pxa27x has an embedded usb udc controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 7cbf36f..979560c 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -65,6 +65,14 @@
clocks = pxa2xx_clks CLK_I2C;
};
+ pxa27x_udc: udc@4060 {
+ compatible = marvell,pxa270-udc;
+ reg = 0x4060 0x1;
+ interrupts = 11;
+ clocks = pxa2xx_clks CLK_USB;
+ status = disabled;
+ };
+
clocks {
/*
* The muxing of external clocks/internal dividers for osc* clock
--
2.1.0
--
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Re: [PATCH v3 20/20] arm: mach-pxa: Decrement the power supply's device reference counter
Krzysztof Kozlowski k.kozlow...@samsung.com writes: Use power_supply_put() to decrement the power supply's device reference counter. Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com Reviewed-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com Reviewed-by: Sebastian Reichel s...@kernel.org Acked-by: Robert Jarzmik robert.jarz...@free.fr -- Robert -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v3 4/5] ARM: dts: pxa: add pxa27x-keypad to pxa27x
Each pxa27x has an embedded keypad controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index ddb6982..6ecf1a6 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -76,6 +76,14 @@
clocks = pxa2xx_clks CLK_USB;
status = disabled;
};
+
+ keypad: keypad@4150 {
+ compatible = marvell,pxa27x-keypad;
+ reg = 0x4150 0x4c;
+ interrupts = 4;
+ clocks = pxa2xx_clks CLK_KEYPAD;
+ status = disabled;
+ };
};
clocks {
--
2.1.0
--
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[PATCH v3 5/5] ARM: dts: pxa: add pxa-timer to pxa27x
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since v1: removed clocksource node, pxa-timer being directly under
pxabus (Rob's comment).
Since v2: renamed pxa-timer to timer (Sergei's comment)
---
arch/arm/boot/dts/pxa27x.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 6ecf1a6..fb0abad 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -101,4 +101,12 @@
status = okay;
};
};
+
+ timer@40a0 {
+ compatible = marvell,pxa-timer;
+ reg = 0x40a0 0x20;
+ interrupts = 26;
+ clocks = pxa2xx_clks CLK_OSTIMER;
+ status = okay;
+ };
};
--
2.1.0
--
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[PATCH v3 3/5] ARM: dts: pxa: add pxa27x-udc to pxa27x
Each pxa27x has an embedded usb udc controller. Add it in the pxa27x
device-tree description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index e8d5097..ddb6982 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -68,6 +68,14 @@
pxai2c1: i2c@40301680 {
clocks = pxa2xx_clks CLK_I2C;
};
+
+ pxa27x_udc: udc@4060 {
+ compatible = marvell,pxa270-udc;
+ reg = 0x4060 0x1;
+ interrupts = 11;
+ clocks = pxa2xx_clks CLK_USB;
+ status = disabled;
+ };
};
clocks {
--
2.1.0
--
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[PATCH v3 2/5] ARM: dts: pxa: add clocks
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/boot/dts/pxa27x.dtsi | 31 ---
1 file changed, 28 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 98b560e..e8d5097 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -1,6 +1,6 @@
/* The pxa3xx skeleton simply augments the 2xx version */
#include pxa2xx.dtsi
-#include dt-bindings/clock/pxa2xx-clock.h
+#include dt-bindings/clock/pxa-clock.h
/ {
model = Marvell PXA27x familiy SoC;
@@ -12,36 +12,62 @@
marvell,intc-nr-irqs = 34;
};
+ gpio: gpio@40e0 {
+ compatible = intel,pxa27x-gpio;
+ clocks = pxa2xx_clks CLK_NONE;
+ };
+
+ ffuart: uart@4010 {
+ clocks = pxa2xx_clks CLK_FFUART;
+ };
+
+ btuart: uart@4020 {
+ clocks = pxa2xx_clks CLK_BTUART;
+ };
+
+ stuart: uart@4070 {
+ clocks = pxa2xx_clks CLK_STUART;
+ };
+
pwm0: pwm@40b0 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40b0 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM0;
};
pwm1: pwm@40b00010 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40b00010 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM1;
};
pwm2: pwm@40c0 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40c0 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM0;
};
pwm3: pwm@40c00010 {
compatible = marvell,pxa270-pwm, marvell,pxa250-pwm;
reg = 0x40c00010 0x10;
#pwm-cells = 1;
+ clocks = pxa2xx_clks CLK_PWM1;
};
pwri2c: i2c@40f000180 {
compatible = mrvl,pxa-i2c;
reg = 0x40f00180 0x24;
interrupts = 6;
+ clocks = pxa2xx_clks CLK_PWRI2C;
status = disabled;
};
+
+ pxai2c1: i2c@40301680 {
+ clocks = pxa2xx_clks CLK_I2C;
+ };
};
clocks {
@@ -54,10 +80,9 @@
ranges;
pxa2xx_clks: pxa2xx_clks@4134 {
- compatible = marvell,pxa-clocks;
+ compatible = marvell,pxa270-clocks;
#clock-cells = 1;
status = okay;
};
};
-
};
--
2.1.0
--
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[PATCH v3 1/5] ARM: dts: pxa: add pwri2c to pxa device-tree
pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
Since v2: as Dmitry pointed out, no pwri2c on pxa25x, only pxa27x
---
arch/arm/boot/dts/pxa27x.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 80fc5d7..98b560e 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -35,6 +35,13 @@
reg = 0x40c00010 0x10;
#pwm-cells = 1;
};
+
+ pwri2c: i2c@40f000180 {
+ compatible = mrvl,pxa-i2c;
+ reg = 0x40f00180 0x24;
+ interrupts = 6;
+ status = disabled;
+ };
};
clocks {
--
2.1.0
--
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Re: [PATCH v3 2/5] ARM: dts: pxa: add clocks
Sergei Shtylyov sergei.shtyl...@cogentembedded.com writes:
Hello.
On 2/7/2015 3:39 PM, Robert Jarzmik wrote:
+stuart: uart@4070 {
+clocks = pxa2xx_clks CLK_STUART;
+};
+
The ePAPR standard tells to call such nodes serial, not uart.
Good to know, but not for this patch.
The naming is coming from pxa2xx.dtsi. And you're very welcome to post a patch
to fix that ;)
Cheers.
--
Robert
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[PATCH] ARM: pxa: pxa27x skip default device initialization with DT
When booting via DT, the default PXA devices must not have been probed
before, otherwise the augmented information from the device tree is
ignored.
This is the twin commit of commit 82ce44d104dc (ARM: pxa3xx: skip
default device initialization when booting via DT).
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
arch/arm/mach-pxa/pxa27x.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 0485248..b5abdeb 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -307,8 +307,12 @@ static int __init pxa27x_init(void)
register_syscore_ops(pxa_irq_syscore_ops);
register_syscore_ops(pxa2xx_mfp_syscore_ops);
- pxa_register_device(pxa27x_device_gpio, pxa27x_gpio_info);
- ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+ if (!of_have_populated_dt()) {
+ pxa_register_device(pxa27x_device_gpio,
+ pxa27x_gpio_info);
+ ret = platform_add_devices(devices,
+ ARRAY_SIZE(devices));
+ }
}
return ret;
--
2.1.0
--
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