[PATCH 25/28] ARM: dts: imx6qdl: Flesh out MIPI CSI2 receiver node

[Steve Longerbeam]

Add to the MIPI CSI2 receiver node: compatible string, interrupt sources,
clocks.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ed613eb..50499eb 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1119,7 +1119,14 @@
};
 
mipi_csi: mipi@021dc000 {
+   compatible = "fsl,imx-mipi-csi2";
reg = <0x021dc000 0x4000>;
+   interrupts = <0 100 0x04>, <0 101 0x04>;
+   clocks = < IMX6QDL_CLK_HSI_TX>,
+< IMX6QDL_CLK_VIDEO_27M>,
+< IMX6QDL_CLK_EIM_SEL>;
+   clock-names = "dphy_clk", "cfg_clk", "pix_clk";
+   status = "disabled";
};
 
mipi_dsi: mipi@021e {
-- 
1.9.1

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[PATCH 26/28] ARM: dts: imx6qdl: Add mipi_ipu1/2 video muxes, mipi_csi, and their connections

[Steve Longerbeam]

From: Philipp Zabel <p.za...@pengutronix.de>

This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6.

On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2 CSI1
allow to select between CSI0/1 parallel input pads and the MIPI CSI-2 virtual
channels 0/3.

On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1 CSI1
allow to select between CSI0/1 parallel input pads and any of the four MIPI
CSI-2 virtual channels.

Signed-off-by: Philipp Zabel <p.za...@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6dl.dtsi  | 183 +
 arch/arm/boot/dts/imx6q.dtsi   | 120 +++
 arch/arm/boot/dts/imx6qdl.dtsi |   6 ++
 3 files changed, 309 insertions(+)

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 9a4c22c..41ef065 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -109,6 +109,118 @@
compatible = "fsl,imx-gpu-subsystem";
cores = <_2d>, <_3d>;
};
+
+   ipu1_csi0_mux: ipu1_csi0_mux@34 {
+   compatible = "imx-video-mux";
+   reg = <0x34 0x07>;
+   gpr = <>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   port@0 {
+   reg = <0>;
+
+   ipu1_csi0_mux_from_mipi_vc0: endpoint {
+   remote-endpoint = <_vc0_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   ipu1_csi0_mux_from_mipi_vc1: endpoint {
+   remote-endpoint = <_vc1_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   ipu1_csi0_mux_from_mipi_vc2: endpoint {
+   remote-endpoint = <_vc2_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+
+   ipu1_csi0_mux_from_mipi_vc3: endpoint {
+   remote-endpoint = <_vc3_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@4 {
+   reg = <4>;
+
+   ipu1_csi0_mux_from_parallel_sensor: endpoint {
+   };
+   };
+
+   port@5 {
+   reg = <5>;
+
+   ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+   remote-endpoint = 
<_csi0_from_ipu1_csi0_mux>;
+   };
+   };
+   };
+
+   ipu1_csi1_mux: ipu1_csi1_mux@34 {
+   compatible = "imx-video-mux";
+   reg = <0x34 0x38>;
+   gpr = <>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   port@0 {
+   reg = <0>;
+
+   ipu1_csi1_mux_from_mipi_vc0: endpoint {
+   remote-endpoint = <_vc0_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   ipu1_csi1_mux_from_mipi_vc1: endpoint {
+   remote-endpoint = <_vc1_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   ipu1_csi1_mux_from_mipi_vc2: endpoint {
+   remote-endpoint = <_vc2_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+
+   ipu1_csi1_mux_from_mipi_vc3: endpoint {
+   remote-endpoint = <_vc3_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@4 {
+   reg = <4>;
+
+   ipu1_csi1_mux_from_parallel_sensor: endpoint {
+   };
+   };
+
+   port@5 {
+   reg = <5>;
+
+   ipu1_csi1_mux_to_ipu1_csi1: endpoint {
+   remote-endpoint = 
<_csi1_from_ipu1_csi1_mux>;
+   };
+   };
+   };
 };
 
  {
@@ -131,3 +243,74 @@
  {
compatible = "fsl,imx6dl-vpu", "cnm,coda960";
 };
+
+_csi1 {
+   ipu1_csi1_from_ipu1

[PATCH 11/28] gpu: ipu-v3: Fix CSI data format for 16-bit media bus formats

[Steve Longerbeam]

The CSI data format was being programmed incorrectly for the
1x16 media bus formats. The CSI data format for 16-bit must
be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER).

Suggested-by: Carsten Resch <carsten.re...@de.bosch.com>
Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 07c7091..0eac28c 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -258,12 +258,8 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config 
*cfg, u32 mbus_code)
cfg->data_width = IPU_CSI_DATA_WIDTH_8;
break;
case MEDIA_BUS_FMT_UYVY8_1X16:
-   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY;
-   cfg->mipi_dt = MIPI_DT_YUV422;
-   cfg->data_width = IPU_CSI_DATA_WIDTH_16;
-   break;
case MEDIA_BUS_FMT_YUYV8_1X16:
-   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV;
+   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER;
cfg->mipi_dt = MIPI_DT_YUV422;
cfg->data_width = IPU_CSI_DATA_WIDTH_16;
break;
-- 
1.9.1

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[PATCH 14/28] gpu: ipu-ic: Add complete image conversion support with tiling

[Steve Longerbeam]

This patch implements complete image conversion support to ipu-ic,
with tiling to support scaling to and from images up to 4096x4096.
Image rotation is also supported.

The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).

Callers prepare for image conversion by calling
ipu_image_convert_prepare(), which initializes the parameters of
the conversion. The caller passes in the ipu_ic task to use for
the conversion, the input and output image formats, a rotation mode,
and a completion callback and completion context pointer:

struct image_converter_ctx *
ipu_image_convert_prepare(struct ipu_ic *ic,
  struct ipu_image *in, struct ipu_image *out,
  enum ipu_rotate_mode rot_mode,
  image_converter_cb_t complete,
  void *complete_context);

The caller is given a new conversion context that must be passed to
the further APIs:

struct image_converter_run *
ipu_image_convert_run(struct image_converter_ctx *ctx,
  dma_addr_t in_phys, dma_addr_t out_phys);

This queues a new image conversion request to a run queue, and
starts the conversion immediately if the run queue is empty. Only
the physaddr's of the input and output image buffers are needed,
since the conversion context was created previously with
ipu_image_convert_prepare(). Returns a new run object pointer. When
the conversion completes, the run pointer is returned to the
completion callback.

void image_convert_abort(struct image_converter_ctx *ctx);

This will abort any active or pending conversions for this context.
Any currently active or pending runs belonging to this context are
returned via the completion callback with an error status.

void ipu_image_convert_unprepare(struct image_converter_ctx *ctx);

Unprepares the conversion context. Any active or pending runs will
be aborted by calling image_convert_abort().
---
 drivers/gpu/ipu-v3/ipu-ic.c | 1691 ++-
 include/video/imx-ipu-v3.h  |   57 +-
 2 files changed, 1736 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index 5329bfe..f6a1125 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -17,6 +17,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include "ipu-prv.h"
 
 /* IC Register Offsets */
@@ -82,6 +84,40 @@
 #define IC_IDMAC_3_PP_WIDTH_MASK(0x3ff << 20)
 #define IC_IDMAC_3_PP_WIDTH_OFFSET  20
 
+/*
+ * The IC Resizer has a restriction that the output frame from the
+ * resizer must be 1024 or less in both width (pixels) and height
+ * (lines).
+ *
+ * The image conversion support attempts to split up a conversion when
+ * the desired output (converted) frame resolution exceeds the IC resizer
+ * limit of 1024 in either dimension.
+ *
+ * If either dimension of the output frame exceeds the limit, the
+ * dimension is split into 1, 2, or 4 equal stripes, for a maximum
+ * of 4*4 or 16 tiles. A conversion is then carried out for each
+ * tile (but taking care to pass the full frame stride length to
+ * the DMA channel's parameter memory!). IDMA double-buffering is used
+ * to convert each tile back-to-back when possible (see note below
+ * when double_buffering boolean is set).
+ *
+ * Note that the input frame must be split up into the same number
+ * of tiles as the output frame.
+ */
+#define MAX_STRIPES_W4
+#define MAX_STRIPES_H4
+#define MAX_TILES (MAX_STRIPES_W * MAX_STRIPES_H)
+
+#define MIN_W 128
+#define MIN_H 128
+#define MAX_W 4096
+#define MAX_H 4096
+
+enum image_convert_type {
+   IMAGE_CONVERT_IN = 0,
+   IMAGE_CONVERT_OUT,
+};
+
 struct ic_task_regoffs {
u32 rsc;
u32 tpmem_csc[2];
@@ -96,6 +132,16 @@ struct ic_task_bitfields {
u32 ic_cmb_galpha_bit;
 };
 
+struct ic_task_channels {
+   int in;
+   int out;
+   int rot_in;
+   int rot_out;
+   int vdi_in_p;
+   int vdi_in;
+   int vdi_in_n;
+};
+
 static const struct ic_task_regoffs ic_task_reg[IC_NUM_TASKS] = {
[IC_TASK_ENCODER] = {
.rsc = IC_PRP_ENC_RSC,
@@ -138,12 +184,159 @@ static const struct ic_task_bitfields 
ic_task_bit[IC_NUM_TASKS] = {
},
 };
 
+static const struct ic_task_channels ic_task_ch[IC_NUM_TASKS] = {
+   [IC_TASK_ENCODER] = {
+   .out = IPUV3_CHANNEL_IC_PRP_ENC_MEM,
+   .rot_in = IPUV3_CHANNEL_MEM_ROT_ENC,
+   .rot_out = IPUV3_CHANNEL_ROT_ENC_MEM,
+   },
+   [IC_TASK_VIEWFINDER] = {
+   .in = IPUV3_CHANNEL_MEM_IC_PRP_VF,
+   .out = IPUV3_CHANNEL_IC_PRP_VF_MEM,
+   .rot_in = IPUV3_CHANNEL_MEM_ROT_VF,
+   .rot_out = IPUV3_CHANNEL_ROT_VF_MEM,
+   .vdi_in_p = IPUV3_CHANNEL_MEM_VDI_P,
+   .vdi_in = IPUV3_CHANNEL_MEM_VDI,
+   .vdi_in_n = IPUV3_CHANNEL_MEM_VDI_N,
+

[PATCH 06/28] gpu: ipu-v3: Add ipu_set_vdi_src_mux()

[Steve Longerbeam]

Adds ipu_set_vdi_src_mux() that selects the VDIC input
(from CSI or memory).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 20 
 include/video/imx-ipu-v3.h  |  1 +
 2 files changed, 21 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 6d1676e..374100e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -730,6 +730,26 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, 
bool vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
 
+/*
+ * Set the source for the VDIC. Selects either from CSI[01] or memory.
+ */
+void ipu_set_vdi_src_mux(struct ipu_soc *ipu, bool csi)
+{
+   unsigned long flags;
+   u32 val;
+
+   spin_lock_irqsave(>lock, flags);
+
+   val = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   val &= ~(0x3 << 28);
+   if (csi)
+   val |= (0x01 << 28);
+   ipu_cm_write(ipu, val, IPU_FS_PROC_FLOW1);
+
+   spin_unlock_irqrestore(>lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_vdi_src_mux);
+
 
 /* IDMAC Channel Linking */
 
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 0a39c64..586979e 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -152,6 +152,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
 int ipu_get_num(struct ipu_soc *ipu);
 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
+void ipu_set_vdi_src_mux(struct ipu_soc *ipu, bool csi);
 void ipu_dump(struct ipu_soc *ipu);
 
 /*
-- 
1.9.1

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[PATCH 07/28] gpu: ipu-v3: Add VDI input IDMAC channels

[Steve Longerbeam]

Adds the VDIC field input IDMAC channels. These channels
transfer fields F(n-1), F(n), and F(N+1) from memory to
the VDIC (channels 8, 9, 10 respectively).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 include/video/imx-ipu-v3.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 586979e..2302fc5 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -107,6 +107,9 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_CSI2  2
 #define IPUV3_CHANNEL_CSI3  3
 #define IPUV3_CHANNEL_VDI_MEM_IC_VF 5
+#define IPUV3_CHANNEL_MEM_VDI_P 8
+#define IPUV3_CHANNEL_MEM_VDI   9
+#define IPUV3_CHANNEL_MEM_VDI_N10
 #define IPUV3_CHANNEL_MEM_IC_PP11
 #define IPUV3_CHANNEL_MEM_IC_PRP_VF12
 #define IPUV3_CHANNEL_G_MEM_IC_PRP_VF  14
-- 
1.9.1

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[PATCH 17/28] gpio: pca953x: Add optional reset gpio control

[Steve Longerbeam]

Add optional reset-gpios pin control. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpio/gpio-pca953x.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 5e3be32..8698815 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define PCA953X_INPUT  0
 #define PCA953X_OUTPUT 1
@@ -111,6 +112,8 @@ struct pca953x_chip {
const char *const *names;
int chip_type;
unsigned long driver_data;
+
+   struct gpio_desc *reset_gpio;
 };
 
 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
@@ -759,6 +762,21 @@ static int pca953x_probe(struct i2c_client *client,
} else {
chip->gpio_start = -1;
irq_base = 0;
+
+   /* see if we need to de-assert a reset pin */
+   chip->reset_gpio = devm_gpiod_get_optional(>dev,
+  "reset",
+  GPIOD_OUT_LOW);
+   if (IS_ERR(chip->reset_gpio)) {
+   dev_err(>dev, "request for reset pin failed\n");
+   return PTR_ERR(chip->reset_gpio);
+   }
+
+   if (chip->reset_gpio) {
+   /* bring chip out of reset */
+   dev_info(>dev, "releasing reset\n");
+   gpiod_set_value(chip->reset_gpio, 0);
+   }
}
 
chip->client = client;
-- 
1.9.1

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[PATCH 16/28] gpu: ipu-v3: rename CSI client device

[Steve Longerbeam]

Rename the CSI client device in the client_reg[] table to
"imx-ipuv3-csi".

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 374100e..bd6771b 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1153,14 +1153,14 @@ static struct ipu_platform_reg client_reg[] = {
.dma[0] = IPUV3_CHANNEL_CSI0,
.dma[1] = -EINVAL,
},
-   .name = "imx-ipuv3-camera",
+   .name = "imx-ipuv3-csi",
}, {
.pdata = {
.csi = 1,
.dma[0] = IPUV3_CHANNEL_CSI1,
.dma[1] = -EINVAL,
},
-   .name = "imx-ipuv3-camera",
+   .name = "imx-ipuv3-csi",
}, {
.pdata = {
.di = 0,
-- 
1.9.1

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[PATCH 13/28] gpu: ipu-v3: Fix IRT usage

[Steve Longerbeam]

There can be multiple IC tasks using the IRT, so the IRT needs
a separate use counter. Create a private ipu_irt_enable() to
enable the IRT module when any IC task requires rotation, and
ipu_irt_disable() when a task no longer needs the IRT.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-ic.c | 43 ++-
 1 file changed, 34 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index f306a9c..5329bfe 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -160,6 +160,7 @@ struct ipu_ic_priv {
spinlock_t lock;
struct ipu_soc *ipu;
int use_count;
+   int irt_use_count;
struct ipu_ic task[IC_NUM_TASKS];
 };
 
@@ -379,8 +380,6 @@ void ipu_ic_task_disable(struct ipu_ic *ic)
 
ipu_ic_write(ic, ic_conf, IC_CONF);
 
-   ic->rotation = ic->graphics = false;
-
spin_unlock_irqrestore(>lock, flags);
 }
 EXPORT_SYMBOL_GPL(ipu_ic_task_disable);
@@ -639,22 +638,44 @@ int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool 
vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_ic_set_src);
 
+static void ipu_irt_enable(struct ipu_ic *ic)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   if (!priv->irt_use_count)
+   ipu_module_enable(priv->ipu, IPU_CONF_ROT_EN);
+
+   priv->irt_use_count++;
+}
+
+static void ipu_irt_disable(struct ipu_ic *ic)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   priv->irt_use_count--;
+
+   if (!priv->irt_use_count)
+   ipu_module_disable(priv->ipu, IPU_CONF_ROT_EN);
+
+   if (priv->irt_use_count < 0)
+   priv->irt_use_count = 0;
+}
+
 int ipu_ic_enable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
unsigned long flags;
-   u32 module = IPU_CONF_IC_EN;
 
spin_lock_irqsave(>lock, flags);
 
-   if (ic->rotation)
-   module |= IPU_CONF_ROT_EN;
-
if (!priv->use_count)
-   ipu_module_enable(priv->ipu, module);
+   ipu_module_enable(priv->ipu, IPU_CONF_IC_EN);
 
priv->use_count++;
 
+   if (ic->rotation)
+   ipu_irt_enable(ic);
+
spin_unlock_irqrestore(>lock, flags);
 
return 0;
@@ -665,18 +686,22 @@ int ipu_ic_disable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
unsigned long flags;
-   u32 module = IPU_CONF_IC_EN | IPU_CONF_ROT_EN;
 
spin_lock_irqsave(>lock, flags);
 
priv->use_count--;
 
if (!priv->use_count)
-   ipu_module_disable(priv->ipu, module);
+   ipu_module_disable(priv->ipu, IPU_CONF_IC_EN);
 
if (priv->use_count < 0)
priv->use_count = 0;
 
+   if (ic->rotation)
+   ipu_irt_disable(ic);
+
+   ic->rotation = ic->graphics = false;
+
spin_unlock_irqrestore(>lock, flags);
 
return 0;
-- 
1.9.1

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[PATCH 12/28] gpu: ipu-v3: Fix CSI0 blur in NTSC format

[Steve Longerbeam]

From: Suresh Dhandapani 

This patch will change the register IPU_CSI0_CCIR_CODE_2 value from
0x40596 to 0x405A6. The change is related to the Start of field 1
first blanking line command bit[5-3] for NTSC format only. This
change is dependent with ADV chip where the NEWAVMODE is set to 0
in register 0x31. Setting NEWAVMODE to "0" in ADV means "EAV/SAV
codes generated to suit analog devices encoders".

Signed-off-by: Suresh Dhandapani 
---
 drivers/gpu/ipu-v3/ipu-csi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 0eac28c..ec81958 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -422,7 +422,7 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 
ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
-   ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2);
+   ipu_csi_write(csi, 0x405A6, CSI_CCIR_CODE_2);
ipu_csi_write(csi, 0xFF, CSI_CCIR_CODE_3);
} else {
dev_err(csi->ipu->dev,
-- 
1.9.1

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[PATCH 05/28] gpu: ipu-v3: Add IDMA channel linking support

[Steve Longerbeam]

Adds functions to link and unlink IDMAC source channels to sink
channels.

So far the following links are supported:

IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC
PUV3_CHANNEL_IC_PRP_VF_MEM   -> IPUV3_CHANNEL_MEM_ROT_VF
IPUV3_CHANNEL_IC_PP_MEM  -> IPUV3_CHANNEL_MEM_ROT_PP

More links can be added to the idmac_link_info[] array.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 112 
 include/video/imx-ipu-v3.h  |   3 ++
 2 files changed, 115 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 49af121..6d1676e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -730,6 +730,118 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, 
bool vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
 
+
+/* IDMAC Channel Linking */
+
+struct idmac_link_reg_info {
+   int chno;
+   u32 reg;
+   int shift;
+   int bits;
+   u32 sel;
+};
+
+struct idmac_link_info {
+   struct idmac_link_reg_info src;
+   struct idmac_link_reg_info sink;
+};
+
+static const struct idmac_link_info idmac_link_info[] = {
+   {
+   .src  = { 20, IPU_FS_PROC_FLOW1,  0, 4, 7 },
+   .sink = { 45, IPU_FS_PROC_FLOW2,  0, 4, 1 },
+   }, {
+   .src =  { 21, IPU_FS_PROC_FLOW1,  8, 4, 8 },
+   .sink = { 46, IPU_FS_PROC_FLOW2,  4, 4, 1 },
+   }, {
+   .src =  { 22, IPU_FS_PROC_FLOW1, 16, 4, 5 },
+   .sink = { 47, IPU_FS_PROC_FLOW2, 12, 4, 3 },
+   },
+};
+
+static const struct idmac_link_info *find_idmac_link_info(
+   struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(idmac_link_info); i++) {
+   if (src->num == idmac_link_info[i].src.chno &&
+   sink->num == idmac_link_info[i].sink.chno)
+   return _link_info[i];
+   }
+
+   return NULL;
+}
+
+/*
+ * Links an IDMAC source channel to a sink channel.
+ */
+int ipu_idmac_link(struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   struct ipu_soc *ipu = src->ipu;
+   const struct idmac_link_info *link;
+   u32 src_reg, sink_reg, src_mask, sink_mask;
+   unsigned long flags;
+
+   link = find_idmac_link_info(src, sink);
+   if (!link)
+   return -EINVAL;
+
+   src_mask = ((1 << link->src.bits) - 1) << link->src.shift;
+   sink_mask = ((1 << link->sink.bits) - 1) << link->sink.shift;
+
+   spin_lock_irqsave(>lock, flags);
+
+   src_reg = ipu_cm_read(ipu, link->src.reg);
+   sink_reg = ipu_cm_read(ipu, link->sink.reg);
+
+   src_reg &= ~src_mask;
+   src_reg |= (link->src.sel << link->src.shift);
+
+   sink_reg &= ~sink_mask;
+   sink_reg |= (link->sink.sel << link->sink.shift);
+
+   ipu_cm_write(ipu, src_reg, link->src.reg);
+   ipu_cm_write(ipu, sink_reg, link->sink.reg);
+
+   spin_unlock_irqrestore(>lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_link);
+
+/*
+ * Unlinks IDMAC source and sink channels.
+ */
+int ipu_idmac_unlink(struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   struct ipu_soc *ipu = src->ipu;
+   const struct idmac_link_info *link;
+   u32 src_reg, sink_reg, src_mask, sink_mask;
+   unsigned long flags;
+
+   link = find_idmac_link_info(src, sink);
+   if (!link)
+   return -EINVAL;
+
+   src_mask = ((1 << link->src.bits) - 1) << link->src.shift;
+   sink_mask = ((1 << link->sink.bits) - 1) << link->sink.shift;
+
+   spin_lock_irqsave(>lock, flags);
+
+   src_reg = ipu_cm_read(ipu, link->src.reg);
+   sink_reg = ipu_cm_read(ipu, link->sink.reg);
+
+   src_reg &= ~src_mask;
+   sink_reg &= ~sink_mask;
+
+   ipu_cm_write(ipu, src_reg, link->src.reg);
+   ipu_cm_write(ipu, sink_reg, link->sink.reg);
+
+   spin_unlock_irqrestore(>lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_unlink);
+
 struct ipu_devtype {
const char *name;
unsigned long cm_ofs;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index b174f8a..0a39c64 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -128,6 +128,7 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_ROT_VF_MEM   49
 #define IPUV3_CHANNEL_ROT_PP_MEM   50
 #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA51
+#define IPUV3_NUM_CHANNELS 64
 
 int ipu_map_irq(struct ipu_soc *ipu, int irq);
 int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
@@ -171,6 +172,8 @@ int ipu_idmac_get_current_buffer(stru

[PATCH 08/28] gpu: ipu-v3: Add ipu_csi_set_src()

[Steve Longerbeam]

Adds ipu_csi_set_src() which is just a wrapper around
ipu_set_csi_src_mux().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 8 
 include/video/imx-ipu-v3.h   | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 06631ac..336dc06 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -609,6 +609,14 @@ int ipu_csi_set_skip_smfc(struct ipu_csi *csi, u32 skip,
 }
 EXPORT_SYMBOL_GPL(ipu_csi_set_skip_smfc);
 
+int ipu_csi_set_src(struct ipu_csi *csi, u32 vc, bool select_mipi_csi2)
+{
+   ipu_set_csi_src_mux(csi->ipu, csi->id, select_mipi_csi2);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_csi_set_src);
+
 int ipu_csi_set_dest(struct ipu_csi *csi, enum ipu_csi_dest csi_dest)
 {
unsigned long flags;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 2302fc5..57b487d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -301,6 +301,7 @@ int ipu_csi_set_mipi_datatype(struct ipu_csi *csi, u32 vc,
  struct v4l2_mbus_framefmt *mbus_fmt);
 int ipu_csi_set_skip_smfc(struct ipu_csi *csi, u32 skip,
  u32 max_ratio, u32 id);
+int ipu_csi_set_src(struct ipu_csi *csi, u32 vc, bool select_mipi_csi2);
 int ipu_csi_set_dest(struct ipu_csi *csi, enum ipu_csi_dest csi_dest);
 int ipu_csi_enable(struct ipu_csi *csi);
 int ipu_csi_disable(struct ipu_csi *csi);
-- 
1.9.1

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[PATCH 09/28] gpu: ipu-v3: Add ipu_ic_set_src()

[Steve Longerbeam]

Adds ipu_ic_set_src() which is just aa wrapper around
ipu_set_ic_src_mux().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-ic.c | 10 ++
 include/video/imx-ipu-v3.h  |  1 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index 1dcb96c..f306a9c 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -629,6 +629,16 @@ unlock:
 }
 EXPORT_SYMBOL_GPL(ipu_ic_task_idma_init);
 
+int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool vdi)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   ipu_set_ic_src_mux(priv->ipu, csi_id, vdi);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_ic_set_src);
+
 int ipu_ic_enable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 57b487d..8f77ddb 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -334,6 +334,7 @@ void ipu_ic_task_disable(struct ipu_ic *ic);
 int ipu_ic_task_idma_init(struct ipu_ic *ic, struct ipuv3_channel *channel,
  u32 width, u32 height, int burst_size,
  enum ipu_rotate_mode rot);
+int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool vdi);
 int ipu_ic_enable(struct ipu_ic *ic);
 int ipu_ic_disable(struct ipu_ic *ic);
 struct ipu_ic *ipu_ic_get(struct ipu_soc *ipu, enum ipu_ic_task task);
-- 
1.9.1

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[PATCH 04/28] gpu: ipu-v3: Add ipu_get_num()

[Steve Longerbeam]

Adds of-alias id to ipu_soc and retrieve with ipu_get_num().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 8 
 drivers/gpu/ipu-v3/ipu-prv.h| 1 +
 include/video/imx-ipu-v3.h  | 1 +
 3 files changed, 10 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 30dc115..49af121 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -45,6 +45,12 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32 
value, unsigned offset)
writel(value, ipu->cm_reg + offset);
 }
 
+int ipu_get_num(struct ipu_soc *ipu)
+{
+   return ipu->id;
+}
+EXPORT_SYMBOL_GPL(ipu_get_num);
+
 void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
 {
u32 val;
@@ -1220,6 +1226,7 @@ static int ipu_probe(struct platform_device *pdev)
 {
const struct of_device_id *of_id =
of_match_device(imx_ipu_dt_ids, >dev);
+   struct device_node *np = pdev->dev.of_node;
struct ipu_soc *ipu;
struct resource *res;
unsigned long ipu_base;
@@ -1248,6 +1255,7 @@ static int ipu_probe(struct platform_device *pdev)
ipu->channel[i].ipu = ipu;
ipu->devtype = devtype;
ipu->ipu_type = devtype->type;
+   ipu->id = of_alias_get_id(np, "ipu");
 
spin_lock_init(>lock);
mutex_init(>channel_lock);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 845f64c..02057d8 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -153,6 +153,7 @@ struct ipu_soc {
void __iomem*cm_reg;
void __iomem*idmac_reg;
 
+   int id;
int usecount;
 
struct clk  *clk;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 60540ead..b174f8a 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -148,6 +148,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
 /*
  * IPU Common functions
  */
+int ipu_get_num(struct ipu_soc *ipu);
 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
 void ipu_dump(struct ipu_soc *ipu);
-- 
1.9.1

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[PATCH 10/28] gpu: ipu-v3: set correct full sensor frame for PAL/NTSC

[Steve Longerbeam]

Set the sensor full frame based on whether the passed in mbus_fmt
is 720x480 (NTSC) or 720x576 (PAL).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 20 +---
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 336dc06..07c7091 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -365,10 +365,14 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 {
struct ipu_csi_bus_config cfg;
unsigned long flags;
-   u32 data = 0;
+   u32 width, height, data = 0;
 
fill_csi_bus_cfg(, mbus_cfg, mbus_fmt);
 
+   /* set default sensor frame width and height */
+   width = mbus_fmt->width;
+   height = mbus_fmt->height;
+
/* Set the CSI_SENS_CONF register remaining fields */
data |= cfg.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT |
cfg.data_fmt << CSI_SENS_CONF_DATA_FMT_SHIFT |
@@ -386,11 +390,6 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 
ipu_csi_write(csi, data, CSI_SENS_CONF);
 
-   /* Setup sensor frame size */
-   ipu_csi_write(csi,
- (mbus_fmt->width - 1) | ((mbus_fmt->height - 1) << 16),
- CSI_SENS_FRM_SIZE);
-
/* Set CCIR registers */
 
switch (cfg.clk_mode) {
@@ -408,11 +407,12 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 * Field1BlankEnd = 0x7, Field1BlankStart = 0x3,
 * Field1ActiveEnd = 0x5, Field1ActiveStart = 0x1
 */
+   height = 625; /* framelines for PAL */
+
ipu_csi_write(csi, 0x40596 | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
ipu_csi_write(csi, 0xD07DF, CSI_CCIR_CODE_2);
ipu_csi_write(csi, 0xFF, CSI_CCIR_CODE_3);
-
} else if (mbus_fmt->width == 720 && mbus_fmt->height == 480) {
/*
 * NTSC case
@@ -422,6 +422,8 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
 * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
 */
+   height = 525; /* framelines for NTSC */
+
ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2);
@@ -447,6 +449,10 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
break;
}
 
+   /* Setup sensor frame size */
+   ipu_csi_write(csi, (width - 1) | ((height - 1) << 16),
+ CSI_SENS_FRM_SIZE);
+
dev_dbg(csi->ipu->dev, "CSI_SENS_CONF = 0x%08X\n",
ipu_csi_read(csi, CSI_SENS_CONF));
dev_dbg(csi->ipu->dev, "CSI_ACT_FRM_SIZE = 0x%08X\n",
-- 
1.9.1

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[PATCH 01/28] gpu: ipu-v3: Add Video Deinterlacer unit

[Steve Longerbeam]

Adds the Video Deinterlacer (VDIC) unit.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/Makefile |   2 +-
 drivers/gpu/ipu-v3/ipu-common.c |  11 ++
 drivers/gpu/ipu-v3/ipu-prv.h|   6 +
 drivers/gpu/ipu-v3/ipu-vdi.c| 266 
 include/video/imx-ipu-v3.h  |  27 
 5 files changed, 311 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/ipu-v3/ipu-vdi.c

diff --git a/drivers/gpu/ipu-v3/Makefile b/drivers/gpu/ipu-v3/Makefile
index 107ec23..aeba9dc 100644
--- a/drivers/gpu/ipu-v3/Makefile
+++ b/drivers/gpu/ipu-v3/Makefile
@@ -1,4 +1,4 @@
 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
 
 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
-   ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o
+   ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o ipu-vdi.o
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 99dcacf..30dc115 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -833,6 +833,14 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
goto err_ic;
}
 
+   ret = ipu_vdi_init(ipu, dev, ipu_base + devtype->vdi_ofs,
+  IPU_CONF_VDI_EN | IPU_CONF_ISP_EN |
+  IPU_CONF_IC_INPUT);
+   if (ret) {
+   unit = "vdi";
+   goto err_vdi;
+   }
+
ret = ipu_di_init(ipu, dev, 0, ipu_base + devtype->disp0_ofs,
  IPU_CONF_DI0_EN, ipu_clk);
if (ret) {
@@ -887,6 +895,8 @@ err_dc:
 err_di_1:
ipu_di_exit(ipu, 0);
 err_di_0:
+   ipu_vdi_exit(ipu);
+err_vdi:
ipu_ic_exit(ipu);
 err_ic:
ipu_csi_exit(ipu, 1);
@@ -971,6 +981,7 @@ static void ipu_submodules_exit(struct ipu_soc *ipu)
ipu_dc_exit(ipu);
ipu_di_exit(ipu, 1);
ipu_di_exit(ipu, 0);
+   ipu_vdi_exit(ipu);
ipu_ic_exit(ipu);
ipu_csi_exit(ipu, 1);
ipu_csi_exit(ipu, 0);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index bfb1e8a..845f64c 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -138,6 +138,7 @@ struct ipu_dc_priv;
 struct ipu_dmfc_priv;
 struct ipu_di;
 struct ipu_ic_priv;
+struct ipu_vdi;
 struct ipu_smfc_priv;
 
 struct ipu_devtype;
@@ -169,6 +170,7 @@ struct ipu_soc {
struct ipu_di   *di_priv[2];
struct ipu_csi  *csi_priv[2];
struct ipu_ic_priv  *ic_priv;
+   struct ipu_vdi  *vdi_priv;
struct ipu_smfc_priv*smfc_priv;
 };
 
@@ -199,6 +201,10 @@ int ipu_ic_init(struct ipu_soc *ipu, struct device *dev,
unsigned long base, unsigned long tpmem_base);
 void ipu_ic_exit(struct ipu_soc *ipu);
 
+int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev,
+unsigned long base, u32 module);
+void ipu_vdi_exit(struct ipu_soc *ipu);
+
 int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id,
unsigned long base, u32 module, struct clk *ipu_clk);
 void ipu_di_exit(struct ipu_soc *ipu, int id);
diff --git a/drivers/gpu/ipu-v3/ipu-vdi.c b/drivers/gpu/ipu-v3/ipu-vdi.c
new file mode 100644
index 000..1303bcc
--- /dev/null
+++ b/drivers/gpu/ipu-v3/ipu-vdi.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2012 Mentor Graphics Inc.
+ * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ipu-prv.h"
+
+struct ipu_vdi {
+   void __iomem *base;
+   u32 module;
+   spinlock_t lock;
+   int use_count;
+   struct ipu_soc *ipu;
+};
+
+
+/* VDI Register Offsets */
+#define VDI_FSIZE 0x
+#define VDI_C 0x0004
+
+/* VDI Register Fields */
+#define VDI_C_CH_420 (0 << 1)
+#define VDI_C_CH_422 (1 << 1)
+#define VDI_C_MOT_SEL_MASK   (0x3 << 2)
+#define VDI_C_MOT_SEL_FULL   (2 << 2)
+#define VDI_C_MOT_SEL_LOW(1 << 2)
+#define VDI_C_MOT_SEL_MED(0 << 2)
+#define VDI_C_BURST_SIZE1_4  (3 << 4)
+#define VDI_C_BURST_SIZE2_4  (3 << 8)
+#define VDI_C_BURST_SIZE3_4  (3 << 12)
+#define VDI_C_BURST_SIZE_MASK0xF
+#define VDI_C_BURST_SIZE1_OFFSET 4
+#define VDI_C_BURST_SIZE2_OFFSET 8
+#define VDI_C_BURST

[PATCH 00/28] i.MX5/6 Video Capture, v2

[Steve Longerbeam]

Philipp Zabel (2):
  media: imx: Add video switch
  ARM: dts: imx6qdl: Add mipi_ipu1/2 video muxes, mipi_csi, and their
connections

Steve Longerbeam (25):
  gpu: ipu-v3: Add Video Deinterlacer unit
  gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()
  gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()
  gpu: ipu-v3: Add ipu_get_num()
  gpu: ipu-v3: Add IDMA channel linking support
  gpu: ipu-v3: Add ipu_set_vdi_src_mux()
  gpu: ipu-v3: Add VDI input IDMAC channels
  gpu: ipu-v3: Add ipu_csi_set_src()
  gpu: ipu-v3: Add ipu_ic_set_src()
  gpu: ipu-v3: set correct full sensor frame for PAL/NTSC
  gpu: ipu-v3: Fix CSI data format for 16-bit media bus formats
  gpu: ipu-v3: Fix IRT usage
  gpu: ipu-ic: Add complete image conversion support with tiling
  gpu: ipu-ic: allow multiple handles to ic
  gpu: ipu-v3: rename CSI client device
  gpio: pca953x: Add optional reset gpio control
  clocksource/drivers/imx: add input capture support
  media: Add i.MX5/6 camera interface driver
  media: imx: Add MIPI CSI-2 Receiver driver
  media: imx: Add support for MIPI CSI-2 OV5640
  media: imx: Add support for Parallel OV5642
  media: Add i.MX5/6 mem2mem driver
  ARM: dts: imx6qdl: Flesh out MIPI CSI2 receiver node
  ARM: dts: imx6qdl: add mem2mem devices
  ARM: imx_v6_v7_defconfig: Enable staging video4linux drivers

Suresh Dhandapani (1):
  gpu: ipu-v3: Fix CSI0 blur in NTSC format

 Documentation/devicetree/bindings/media/imx.txt|  449 ++
 Documentation/video4linux/imx_camera.txt   |  243 ++
 arch/arm/boot/dts/imx6dl.dtsi  |  183 +
 arch/arm/boot/dts/imx6q.dtsi   |  127 +
 arch/arm/boot/dts/imx6qdl.dtsi |   19 +
 arch/arm/configs/imx_v6_v7_defconfig   |2 +
 drivers/clocksource/timer-imx-gpt.c|  463 ++-
 drivers/gpio/gpio-pca953x.c|   18 +
 drivers/gpu/ipu-v3/Makefile|2 +-
 drivers/gpu/ipu-v3/ipu-common.c|  155 +-
 drivers/gpu/ipu-v3/ipu-cpmem.c |   13 +
 drivers/gpu/ipu-v3/ipu-csi.c   |   36 +-
 drivers/gpu/ipu-v3/ipu-ic.c| 1769 +++-
 drivers/gpu/ipu-v3/ipu-prv.h   |7 +
 drivers/gpu/ipu-v3/ipu-vdi.c   |  266 ++
 drivers/staging/media/Kconfig  |2 +
 drivers/staging/media/Makefile |1 +
 drivers/staging/media/imx/Kconfig  |   35 +
 drivers/staging/media/imx/Makefile |2 +
 drivers/staging/media/imx/capture/Kconfig  |   35 +
 drivers/staging/media/imx/capture/Makefile |9 +
 drivers/staging/media/imx/capture/imx-camif.c  | 2326 +++
 drivers/staging/media/imx/capture/imx-camif.h  |  270 ++
 drivers/staging/media/imx/capture/imx-csi.c|  195 +
 drivers/staging/media/imx/capture/imx-ic-prpenc.c  |  661 +++
 drivers/staging/media/imx/capture/imx-of.c |  354 ++
 drivers/staging/media/imx/capture/imx-of.h |   18 +
 drivers/staging/media/imx/capture/imx-smfc.c   |  506 +++
 drivers/staging/media/imx/capture/imx-vdic.c   |  995 +
 .../staging/media/imx/capture/imx-video-switch.c   |  347 ++
 drivers/staging/media/imx/capture/mipi-csi2.c  |  373 ++
 drivers/staging/media/imx/capture/ov5640-mipi.c| 2303 +++
 drivers/staging/media/imx/capture/ov5642.c | 4309 
 drivers/staging/media/imx/m2m/Makefile |1 +
 drivers/staging/media/imx/m2m/imx-m2m.c| 1049 +
 include/linux/mxc_icap.h   |   20 +
 include/media/imx.h|   15 +
 include/uapi/Kbuild|1 +
 include/uapi/linux/v4l2-controls.h |4 +
 include/uapi/media/Kbuild  |2 +
 include/uapi/media/imx.h   |   22 +
 include/video/imx-ipu-v3.h |   96 +-
 42 files changed, 17596 insertions(+), 107 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/imx.txt
 create mode 100644 Documentation/video4linux/imx_camera.txt
 create mode 100644 drivers/gpu/ipu-v3/ipu-vdi.c
 create mode 100644 drivers/staging/media/imx/Kconfig
 create mode 100644 drivers/staging/media/imx/Makefile
 create mode 100644 drivers/staging/media/imx/capture/Kconfig
 create mode 100644 drivers/staging/media/imx/capture/Makefile
 create mode 100644 drivers/staging/media/imx/capture/imx-camif.c
 create mode 100644 drivers/staging/media/imx/capture/imx-camif.h
 create mode 100644 drivers/staging/media/imx/capture/imx-csi.c
 create mode 100644 drivers/staging/media/imx/capture/imx-ic-prpenc.c
 create mode 100644 drivers/staging/media/imx/capture/imx-of.c
 create mode 100644 drivers/staging/media/imx/capture/imx-of.h
 create mode 100644 drivers/staging/media/imx/capture/imx-smfc.c
 create mode 100644 drivers/staging/media/imx

Re: [PATCH 28/38] v4l: Add signal lock status to source change events

[Steve Longerbeam]

On 07/01/2016 12:24 AM, Hans Verkuil wrote:

On 06/15/2016 12:49 AM, Steve Longerbeam wrote:

Add a signal lock status change to the source changes bitmask.
This indicates there was a signal lock or unlock event detected
at the input of a video decoder.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
  Documentation/DocBook/media/v4l/vidioc-dqevent.xml | 12 ++--
  include/uapi/linux/videodev2.h |  1 +
  2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml 
b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
index c9c3c77..7758ad7 100644
--- a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
@@ -233,8 +233,9 @@

  This event is triggered when a source parameter change is
   detected during runtime by the video device. It can be a
-  runtime resolution change triggered by a video decoder or the
-  format change happening on an input connector.
+  runtime resolution change or signal lock status change
+  triggered by a video decoder, or the format change happening
+  on an input connector.
   This event requires that the id
   matches the input index (when used with a video device node)
   or the pad index (when used with a subdevice node) from which
@@ -461,6 +462,13 @@
from a video decoder.

  
+ 
+   V4L2_EVENT_SRC_CH_LOCK_STATUS
+   0x0002
+   This event gets triggered when there is a signal lock or
+   unlock detected at the input of a video decoder.
+   
+ 

I'm not entirely sure I like this. Typically losing lock means that this event
is triggered with the V4L2_EVENT_SRC_CH_RESOLUTION flag set, and userspace has
to check the new timings etc., which will fail if there is no lock anymore.

This information is also available through ENUMINPUT.

I would need to know more about why you think this is needed, because I don't
see what this adds.


Hi Hans,

At least on the ADV718x, a source resolution change (from an 
autodetected video
standard change) and a signal lock status change are distinct events. 
For example
there can be a temporary loss of input signal lock without a change in 
detected

input video standard/resolution.

Steve

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Re: [PATCH 00/38] i.MX5/6 Video Capture

[Steve Longerbeam]

Hi Tim,

Pardon late reply, I'm on vacation. See below...


On 06/28/2016 11:54 AM, Tim Harvey wrote:

On Tue, Jun 14, 2016 at 3:48 PM, Steve Longerbeam <slongerb...@gmail.com> wrote:

Tested on imx6q SabreAuto with ADV7180, and imx6q SabreSD with
mipi-csi2 OV5640. There is device-tree support also for imx6qdl
SabreLite, but that is not tested. Also, this driver should
theoretically work on i.MX5 targets, but that is also untested.

Not run through v4l2-compliance yet, but that is in my queue.



Steve,

I've tested this series successfully with a Gateworks Ventana GW5300
which has an IMX6Q and an adv7180 attached to IPU2_CSI1.

First of all, a big 'thank you' for taking the time to rebase and
re-submit this series!

However based on the lack of feedback of the individual patches as
well as the fact they touch varied subsystems I think we are going to
have better luck getting this functionality accepted if you broke it
into separate series.

Here are my thoughts:


   gpu: ipu-v3: Add Video Deinterlacer unit
   gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()
   gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()
   gpu: ipu-v3: Add ipu_get_num()
   gpu: ipu-v3: Add IDMA channel linking support
   gpu: ipu-v3: Add ipu_set_vdi_src_mux()
   gpu: ipu-v3: Add VDI input IDMAC channels
   gpu: ipu-v3: Add ipu_csi_set_src()
   gpu: ipu-v3: Add ipu_ic_set_src()
   gpu: ipu-v3: set correct full sensor frame for PAL/NTSC
   gpu: ipu-v3: Fix CSI data format for 16-bit media bus formats
   gpu: ipu-v3: Fix IRT usage
   gpu: ipu-v3: Fix CSI0 blur in NTSC format
   gpu: ipu-ic: Add complete image conversion support with tiling
   gpu: ipu-ic: allow multiple handles to ic
   gpu: ipu-v3: rename CSI client device

These are all enhancements to the ipu-v3 driver shared by DRM and
maintained by Philipp Zabel and there is no way to 'stage' them.


Just a note here, all these patches to ipu-v3 driver are to the
capture units, and should have no effect on DRM.


Philipp, these have bee submitted previously with little to no changes
or feedback - can we get sign-off or comment on these from you?

Next I would submit the set of drivers that depend on the above into
staging as Hans has said he would accept those (assuming the deps are
accepted). Also, you should submit the drivers first in your series,
then the imx6q.dtsi/imx6qdl.dtsi patches following such as:


   media: imx: Add MIPI CSI-2 Receiver driver
   media: Add camera interface driver for i.MX5/6
   media: Add i.MX5/6 mem2mem driver
   media: imx: Add video switch
   ARM: imx_v6_v7_defconfig: Enable staging video4linux drivers
   ARM: dts: imx6qdl: Add mipi_ipu1/2 video muxes, mipi_csi, and their 
connections
   ARM: dts: imx6qdl: Flesh out MIPI CSI2 receiver node
   ARM: dts: imx6qdl: add mem2mem device for sabre* boards


Ok I will reorder the patches.


I think this last one should add the mem2mem nodes to imx6q.dtsi and
imx6dl.dtsi to be useable by all boards with IPUs right?


Yeah, I'll move the mem2mem nodes to imx6qdl.dtsi and imx6q.dtsi.



After this we have a platform that many imx6 boards with capture
devices can build on.

In parallel, you have a couple of other dependencies before saber*
boards have full capture support that need to through other trees:


   gpio: pca953x: Add reset-gpios property

This should be submitted through the linux-gpio list/subsystem.


I've really got a lot on my plate, I'd appreciate if someone else
could help me out with that.




   clocksource/drivers/imx: add input capture support

Not sure what path this one goes through but it looks to me this patch
adds a feature that only some boards may require (input-capture).


Well, the input-capture support should be usable by any imx6 based
target, and not just for v4l2 subsystem.




   media: imx: Add support for MIPI CSI-2 OV5640
   media: imx: Add support for Parallel OV5642

shouldn't these be subdev drivers?


Well, they _are_ subdev drivers. I guess you mean they should be
moved to drivers/media/i2c? Agreed, at some point they need some
cleaning up and probably consolidated into a single subdev and moved
there.


  Perhaps the can make it into
staging at least in the form you have them now.


   v4l: Add signal lock status to source change events
   media: imx: Add support for ADV7180 Video Decoder

These should be dropped (the 1st is a dependency of the 2nd) and
instead we should be using the subdev driver. I believe you have this
working, and I have been somewhat successful with some of your patches
as well although I still have a 'rolling image' and do not appear to
be getting signal detect interrupts after the first one (which is
likely causing the rolling).


Tim, I've started a new branch 'adv718x' in my mediatree github fork
and moved all the patches to drivers/media/i2c/adv7180.c there. Note
the first commit in that branch!

As I'm currently on vacation and away from the h/w I won't be able to test
this branch with imx6 backend until I return on 7/6. Once the 

Re: [19/38] ARM: dts: imx6-sabrelite: add video capture ports and connections

[Steve Longerbeam]

On 06/20/2016 03:44 AM, Jack Mitchell wrote:
>
>
> On 20/06/16 11:16, Gary Bisson wrote:
>> Jack, All,
>>
>> On Mon, Jun 20, 2016 at 10:44:44AM +0100, Jack Mitchell wrote:
>>> 
 I've tried that patch have a some comments:
 - When applied, no capture shows up any more, instead I have two m2m
   v4l2 devices [1].
 - OV5640 Mipi is assigned the same address as OV5642, therefore both
>>>
>>> Yes, I only have one device attached in my scenario.
>>
>> Thanks for confirming.
>>
   can't work at the same time right now. There's a register in the
   camera that allows to modify its I2C address, see this patch [2].
 - How is the mclk working in this patch? It should be using the PWM3
>>>
>>> As mentioned I have an eCon sensor board [1] which generates it's own clock
>>> on the board and as such I don't need the PWM signal, just the two GPIOs.
>>
>> Oh ok, thanks I didn't this sensor board was different than ours [1].
>>
>> But in your patch, you specifically disable pwm3, what's the reason for
>> it?
>
> Yes, it uses the GPIO on the PWM3 pin (beats me why...) so I had to 
> specifically disable it to stop the pin muxing clash.
>

Hi Jack, in your patch, the PWM3 pin (which is SD1_DAT1 operating as GPIO1_IO17)
is being used as the power-down pin for your OV5640 board.

Anyway, I didn't realize this was a different camera from the boundary-devices
module (https://boundarydevices.com/product/nit6x_5mp_mipi/).

I would like to add support in the DT for the BD module, but I am unable to 
test/debug
as I don't have one. I'm wondering if someone could lend me one, along with the
schematics. I have the OV5642 parallel interface module for the SabreLite, so 
I'd love
to get my hands on the OV5640 mipi module as that would allow testing of 
multiple
camera capture which I've never been able to do before.

In the meantime I am going to omit support for this module in the sabrelite DT 
(there's
also the problem of the i2c bus address conflict on the same i2c2 bus with the 
ov5642).

Or if someone can add support for the BD module later that would be great.


Steve

>>
   output to generate a ~22MHz clock. I would expect the use of a
   pwm-clock node [3].

 Also another remark on both OV5642 and OV5640 patches, is it recommended
 to use 0x8000 pin muxing value? This leaves it to the bootloader to
>>>
>>> I also wondered about this, but didn't know if the pinmux driver did this
>>> based on the define name? I tried it both ways and it worked so I just left
>>> it as it was.
>>
>> Actually my phrasing is wrong, the muxing is ok. Yes depending on the
>> name a pin will be muxed to one function or another. The problem is the
>> pad configuration (pull-up, pull-down etc..). I am not surprised that it
>> works, because the bootloader should properly set those. But it would be
>> safer IMO not to rely on it.
>
> Ah ok, makes sense.
>
>>
>> Regards,
>> Gary
>>
>> [1] https://boundarydevices.com/product/nit6x_5mp_mipi/
>>

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Re: [PATCH 34/38] media: imx: Add support for ADV7180 Video Decoder

[Steve Longerbeam]

On 06/16/2016 04:33 AM, Lars-Peter Clausen wrote:

On 06/15/2016 12:49 AM, Steve Longerbeam wrote:

This driver is based on adv7180.c from Freescale imx_3.10.17_1.0.0_beta
branch, modified heavily for code cleanup and converted from int-device
to subdev.

We already have a driver for the adv7180 upstream, also using the subdev
API. Is there anything that can be done with this new driver that can't be
done with the other one. And if it is are there any blockers that would
prevent us from adding the missing features to the upstream adv7180?

I know that the driver in the Freescale tree used to have bits that made it
specially tailored to the iMX6. But these bits seem to be mostly gone in
this version of the driver.

I'm slightly concerned about the conflicting nature of these drivers. Both
attach to the same device ID/DT compatible string and register slightly
different userspace ABIs. I'd like to avoid ending up in a situation where
we have dependencies on both ABIs and can no longer converge.


Hi Lars,

Yes, it's been my plan all along to bring the upstream adv7180 subdev
up to speed, and then remove the one included in this patch set.
The issues I see so far with the upstream driver:

- It is not auto-detecting changes to the analog input signal, such as
  loss/regain of signal lock and video standard changes. This probably
  is because interrupts are not working. I haven't debugged that further.

- The media bus format code is not right, it should be UYVY, not YUYV. But
  I'm reluctant to make that mbus code change because there are other
  users of this driver and that will likely corrupt images on the other
  targets. But I believe UYVY is the correct order according to bt.656
  standard, someone correct me if I am wrong.

- The field type should be either V4L2_FIELD_SEQ_BT or V4L2_FIELD_SEQ_TB,
  since the adv7180 transmits one complete field followed by the other.

There could be other issues. There are also the ov564x subdevs that 
really need
to be cleaned-up and moved to drivers/media/i2c (they are also based on 
old FSL
intdev drivers but with more stuff in there that probably doesn't make 
sense, such
as those really big register tables that are likely filled with reset 
default values and

were generated by doing an i2c dump at reset).

This work will take some time, so the question is, should we delay that 
work to

after an initial merge.

Steve

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Re: [PATCH 31/38] media: imx: Add video switch

[Steve Longerbeam]

On 06/16/2016 09:13 AM, Ian Arkver wrote:
For me this fails when I try to enable both video muxes (mx6dl, though 
mx6q should be the same).


I get a sysfs duplicate name failure for 34.videomux. I realise 
passing the GPR13 register offset and a bitfield mask as a tuple in 
the reg value of the of_node is handy, but how should we account for 
multiple devices with the same name and address?


A quick and dirty hack would be to have of_get_reg_field do something 
like


field->reg = reg_bit_mask[0] & 0xff;

and then use values in the DT that differ in the bits masked off, but 
there must be a nicer way.


Trace below, fyi. This is from the v2 patches posted here, not your 
v2.1 tree.




Hi Ian,

Thanks for catching this. I found a simple and clean solution to this
problem: just rename the video-mux node from "videomux" to
"ipu[12]_csi[01]_mux". It makes the subdev names more descriptive
anyway. I've applied that change to my mx6-media-staging-v2.1
branch.

Steve

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Re: [19/38] ARM: dts: imx6-sabrelite: add video capture ports and connections

[Steve Longerbeam]

On 06/17/2016 08:18 AM, Gary Bisson wrote:

Steve, All,

On Thu, Jun 16, 2016 at 10:32:31AM +0200, Gary Bisson wrote:

Steve, All,

On Tue, Jun 14, 2016 at 03:49:15PM -0700, Steve Longerbeam wrote:

Defines the host video capture device node and an OV5642 camera sensor
node on i2c2. The host capture device connects to the OV5642 via the
parallel-bus mux input on the ipu1_csi0_mux.

Note there is a pin conflict with GPIO6. This pin functions as a power
input pin to the OV5642, but ENET requires it to wake-up the ARM cores
on normal RX and TX packet done events (see 6261c4c8). So by default,
capture is disabled, enable by uncommenting __OV5642_CAPTURE__ macro.
Ethernet will still work just not quite as well.

Actually the following patch fixes this issue and has already been
applied on Shawn's tree:
https://patchwork.kernel.org/patch/9153523/

Also, this follow-up patch declared the HW workaround for SabreLite:
https://patchwork.kernel.org/patch/9153525/

So ideally, once those two patches land on your base tree, you could get
rid of the #define and remove the HW workaround declaration.

Finally, I'll test the series on Sabre-Lite this week.

I've applied this series on top of Shawn tree (for-next branch) in order
not to worry about the GPIO6 workaround.

Although the camera seems to get enumerated properly, I can't seem to
get anything from it. See log:
http://pastebin.com/xnw1ujUq


Hi Gary, the driver does not implement vidioc_cropcap, it has
switched to the new selection APIs and v4l2src should be using
vidioc_g_selection instead of vidioc_cropcap.



In your cover letter, you said that you have not run through
v4l2-compliance. How have you tested the capture?


I use v4l2-ctl, and have used v4l2src in the past, but that was before
switching to the selection APIs. Try the attached hack that adds
vidioc_cropcap back in, and see how far you get on SabreLite with
v4l2src. I tried  the following on SabreAuto:

gst-launch-1.0 v4l2src io_mode=4 ! 
"video/x-raw,format=RGB16,width=640,height=480" ! fbdevsink




Also, why isn't the OV5640 MIPI camera declared on the SabreLite device
tree?


See Jack Mitchell's patch at http://ix.io/TTg. Thanks Jack! I will work on
incorporating it.


Steve



diff --git a/drivers/staging/media/imx/capture/imx-camif.c b/drivers/staging/media/imx/capture/imx-camif.c
index 9c247e0..2c51bc7 100644
--- a/drivers/staging/media/imx/capture/imx-camif.c
+++ b/drivers/staging/media/imx/capture/imx-camif.c
@@ -1561,6 +1561,23 @@ static int vidioc_s_parm(struct file *file, void *fh,
 	return v4l2_subdev_call(dev->sensor->sd, video, s_parm, a);
 }
 
+static int vidioc_cropcap(struct file *file, void *priv,
+			  struct v4l2_cropcap *cropcap)
+{
+	struct imxcam_ctx *ctx = file2ctx(file);
+	struct imxcam_dev *dev = ctx->dev;
+
+	if (cropcap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
+	cropcap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY)
+		return -EINVAL;
+
+	cropcap->bounds = dev->crop_bounds;
+	cropcap->defrect = dev->crop_defrect;
+	cropcap->pixelaspect.numerator = 1;
+	cropcap->pixelaspect.denominator = 1;
+	return 0;
+}
+
 static int vidioc_g_selection(struct file *file, void *priv,
 			  struct v4l2_selection *sel)
 {
@@ -1794,6 +1811,7 @@ static const struct v4l2_ioctl_ops imxcam_ioctl_ops = {
 	.vidioc_g_parm  = vidioc_g_parm,
 	.vidioc_s_parm  = vidioc_s_parm,
 
+	.vidioc_cropcap		= vidioc_cropcap,
 	.vidioc_g_selection = vidioc_g_selection,
 	.vidioc_s_selection = vidioc_s_selection,
 

tchellRe: [19/38] ARM: dts: imx6-sabrelite: add video capture ports and connections

[Steve Longerbeam]

On 06/17/2016 08:18 AM, Gary Bisson wrote:

Steve, All,

On Thu, Jun 16, 2016 at 10:32:31AM +0200, Gary Bisson wrote:

Steve, All,

On Tue, Jun 14, 2016 at 03:49:15PM -0700, Steve Longerbeam wrote:

Defines the host video capture device node and an OV5642 camera sensor
node on i2c2. The host capture device connects to the OV5642 via the
parallel-bus mux input on the ipu1_csi0_mux.

Note there is a pin conflict with GPIO6. This pin functions as a power
input pin to the OV5642, but ENET requires it to wake-up the ARM cores
on normal RX and TX packet done events (see 6261c4c8). So by default,
capture is disabled, enable by uncommenting __OV5642_CAPTURE__ macro.
Ethernet will still work just not quite as well.

Actually the following patch fixes this issue and has already been
applied on Shawn's tree:
https://patchwork.kernel.org/patch/9153523/

Also, this follow-up patch declared the HW workaround for SabreLite:
https://patchwork.kernel.org/patch/9153525/

So ideally, once those two patches land on your base tree, you could get
rid of the #define and remove the HW workaround declaration.

Finally, I'll test the series on Sabre-Lite this week.

I've applied this series on top of Shawn tree (for-next branch) in order
not to worry about the GPIO6 workaround.

Although the camera seems to get enumerated properly, I can't seem to
get anything from it. See log:
http://pastebin.com/xnw1ujUq


Hi Gary, the driver does not implement vidioc_cropcap, it has
switched to the new selection APIs and v4l2src should be using
vidioc_g_selection instead of vidioc_cropcap.



In your cover letter, you said that you have not run through
v4l2-compliance. How have you tested the capture?


I use v4l2-ctl, and have used v4l2src in the past, but that was before
switching to the selection APIs. Try the attached hack that adds
vidioc_cropcap back in, and see how far you get on SabreLite with
v4l2src. I tried  the following on SabreAuto:

gst-launch-1.0 v4l2src io_mode=4 ! 
"video/x-raw,format=RGB16,width=640,height=480" ! fbdevsink




Also, why isn't the OV5640 MIPI camera declared on the SabreLite device
tree?


See Jack Mitchell's patch at http://ix.io/TTg. Thanks Jack! I will work on
incorporating it.


Steve


diff --git a/drivers/staging/media/imx/capture/imx-camif.c b/drivers/staging/media/imx/capture/imx-camif.c
index 9c247e0..2c51bc7 100644
--- a/drivers/staging/media/imx/capture/imx-camif.c
+++ b/drivers/staging/media/imx/capture/imx-camif.c
@@ -1561,6 +1561,23 @@ static int vidioc_s_parm(struct file *file, void *fh,
 	return v4l2_subdev_call(dev->sensor->sd, video, s_parm, a);
 }
 
+static int vidioc_cropcap(struct file *file, void *priv,
+			  struct v4l2_cropcap *cropcap)
+{
+	struct imxcam_ctx *ctx = file2ctx(file);
+	struct imxcam_dev *dev = ctx->dev;
+
+	if (cropcap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
+	cropcap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY)
+		return -EINVAL;
+
+	cropcap->bounds = dev->crop_bounds;
+	cropcap->defrect = dev->crop_defrect;
+	cropcap->pixelaspect.numerator = 1;
+	cropcap->pixelaspect.denominator = 1;
+	return 0;
+}
+
 static int vidioc_g_selection(struct file *file, void *priv,
 			  struct v4l2_selection *sel)
 {
@@ -1794,6 +1811,7 @@ static const struct v4l2_ioctl_ops imxcam_ioctl_ops = {
 	.vidioc_g_parm  = vidioc_g_parm,
 	.vidioc_s_parm  = vidioc_s_parm,
 
+	.vidioc_cropcap		= vidioc_cropcap,
 	.vidioc_g_selection = vidioc_g_selection,
 	.vidioc_s_selection = vidioc_s_selection,
 

Re: [PATCH 00/38] i.MX5/6 Video Capture

[Steve Longerbeam]

On 06/17/2016 12:10 AM, Hans Verkuil wrote:

On 06/16/2016 07:02 PM, Steve Longerbeam wrote:

On 06/16/2016 02:49 AM, Jack Mitchell wrote:

On 16/06/16 02:37, Steve Longerbeam wrote:

Hi Jack,

On 06/15/2016 03:43 AM, Jack Mitchell wrote:


Trying to use a user pointer rather than mmap also fails and causes a kernel 
splat.


Hmm, I've tested userptr with the mem2mem driver, but maybe never
with video capture. I tried "v4l2-ctl -d/dev/video0 --stream-user=8" but
that returns "VIDIOC_QBUF: failed: Invalid argument", haven't tracked
down why (could be a bug in v4l2-ctl). Can you share the splat?


On re-checking the splat was the same v4l_cropcap that was mentioned before so 
I don't think it's related. The error I get back is:

VIDIOC_QBUF error 22, Invalid argument

I'm using the example program the the v4l2 docs [1].

I found the cause at least in my case. After enabling dynamic debug in
videobuf2-dma-contig.c, "v4l2-ctl -d/dev/video0 --stream-user=8" gives
me

[  468.826046] user data must be aligned to 64 bytes



But even getting past that alignment issue, I've only tested userptr (in mem2mem
driver) by giving the driver a user address of a mmap'ed kernel contiguous
buffer. A true discontiguous user buffer may not work, the IPU DMA does not
support scatter-gather.

I don't think VB2_USERPTR should be enabled in this case due to the DMA 
limitations.
It won't allow you to use malloc()ed memory and the hack that allows you to pass
contiguous memory is superseded by the DMABUF mode.


Hi Hans, yes, I was going to suggest that. I will remove USERPTR
from both capture and mem2mem io_modes flags. Although I can
see where userptr support is still useful, that is for legacy middleware
that are still using mmap'ed userptrs and have not yet converted to
passing around dmabuf fd's.

But I've been perplexed for while on this, why vb2_dc_get_userptr() 
resorts to
scatter-gather (when the given user buffer is found not to have valid 
pfn's).

Shouldn't it be assumed that driver users of the vb2 dma-contig allocator
only support contiguous dma as the name implies? Maybe the issue is that
users that set VB2_USERPTR are implying they support scatter/gather, but
users of vb2-dma-contig could also be implying they do not, and would be
using vb2-dma-sg if that were the case.

Steve

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Re: [PATCH 00/38] i.MX5/6 Video Capture

[Steve Longerbeam]

On 06/16/2016 02:49 AM, Jack Mitchell wrote:
>
> On 16/06/16 02:37, Steve Longerbeam wrote:
>> Hi Jack,
>>
>> On 06/15/2016 03:43 AM, Jack Mitchell wrote:
>>> 
>>> Trying to use a user pointer rather than mmap also fails and causes a 
>>> kernel splat.
>>>
>>
>> Hmm, I've tested userptr with the mem2mem driver, but maybe never
>> with video capture. I tried "v4l2-ctl -d/dev/video0 --stream-user=8" but
>> that returns "VIDIOC_QBUF: failed: Invalid argument", haven't tracked
>> down why (could be a bug in v4l2-ctl). Can you share the splat?
>>
>
> On re-checking the splat was the same v4l_cropcap that was mentioned before 
> so I don't think it's related. The error I get back is:
>
> VIDIOC_QBUF error 22, Invalid argument
>
> I'm using the example program the the v4l2 docs [1].

I found the cause at least in my case. After enabling dynamic debug in
videobuf2-dma-contig.c, "v4l2-ctl -d/dev/video0 --stream-user=8" gives
me

[  468.826046] user data must be aligned to 64 bytes



But even getting past that alignment issue, I've only tested userptr (in mem2mem
driver) by giving the driver a user address of a mmap'ed kernel contiguous
buffer. A true discontiguous user buffer may not work, the IPU DMA does not
support scatter-gather.

Steve

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Re: [PATCH 00/38] i.MX5/6 Video Capture

[Steve Longerbeam]

Hi Jack,

On 06/15/2016 03:43 AM, Jack Mitchell wrote:
> 
> Trying to use a user pointer rather than mmap also fails and causes a kernel 
> splat.
>

Hmm, I've tested userptr with the mem2mem driver, but maybe never
with video capture. I tried "v4l2-ctl -d/dev/video0 --stream-user=8" but
that returns "VIDIOC_QBUF: failed: Invalid argument", haven't tracked
down why (could be a bug in v4l2-ctl). Can you share the splat?


> Apart from that and a few v4l2-compliance tests failing which you already 
> mentioned, it seems to work OK. I'll try and do some more testing and see if 
> I can come back with some more feedback.

Thanks!


Steve

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Re: [PATCH 35/38] media: adv7180: add power pin control

[Steve Longerbeam]

Hi Lars,

On 06/15/2016 09:05 AM, Lars-Peter Clausen wrote:
> On 06/15/2016 12:49 AM, Steve Longerbeam wrote:
>> +usleep_range(5000, 5001);
> That's kind of not how usleep_range() (the emphasis is on range) is supposed
> to be used. You typically dont care too much about the upper limit here so
> something like maybe 1 is more appropriate.

Good point, I fixed this as well as all other instances of
usleep_range() in the patch set.

>
>> +static int adv7180_of_parse(struct adv7180_state *state)
>> +{
>> +struct i2c_client *client = state->client;
>> +struct device_node *np = client->dev.of_node;
>> +int ret;
>> +
>> +ret = of_get_named_gpio(np, "pwdn-gpio", 0);
>> +
>> +if (gpio_is_valid(ret)) {
>> +state->pwdn_gpio = ret;
>> +ret = devm_gpio_request_one(>dev,
>> +state->pwdn_gpio,
>> +GPIOF_OUT_INIT_HIGH,
>> +"adv7180_pwdn");
>
> This should use the new GPIO descriptor API. That will also make the code
> devicetree independent. Otherwise patch looks OK.

Thanks for the heads-up. I converted to gpiod here, and in all other
patches in the set that were using the deprecated API. Also took the
time to review the active low/high flags in the device tree, and made
sure they are correct and are using the explicit flags GPIO_ACTIVE_*.

The changes are in a new branch mx6-media-staging-v2.1 in my fork
on github (g...@github.com:slongerbeam/mediatree.git).

Retested on SabreSD and SabreAuto, still working as before.

Steve

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[PATCH 12/38] gpu: ipu-v3: Fix CSI0 blur in NTSC format

[Steve Longerbeam]

From: Suresh Dhandapani 

This patch will change the register IPU_CSI0_CCIR_CODE_2 value from
0x40596 to 0x405A6. The change is related to the Start of field 1
first blanking line command bit[5-3] for NTSC format only. This
change is dependent with ADV chip where the NEWAVMODE is set to 0
in register 0x31. Setting NEWAVMODE to "0" in ADV means "EAV/SAV
codes generated to suit analog devices encoders".

Signed-off-by: Suresh Dhandapani 
---
 drivers/gpu/ipu-v3/ipu-csi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 0eac28c..ec81958 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -422,7 +422,7 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 
ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
-   ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2);
+   ipu_csi_write(csi, 0x405A6, CSI_CCIR_CODE_2);
ipu_csi_write(csi, 0xFF, CSI_CCIR_CODE_3);
} else {
dev_err(csi->ipu->dev,
-- 
1.9.1

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[PATCH 06/38] gpu: ipu-v3: Add ipu_set_vdi_src_mux()

[Steve Longerbeam]

Adds ipu_set_vdi_src_mux() that selects the VDIC input
(from CSI or memory).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 20 
 include/video/imx-ipu-v3.h  |  1 +
 2 files changed, 21 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 6d1676e..374100e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -730,6 +730,26 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, 
bool vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
 
+/*
+ * Set the source for the VDIC. Selects either from CSI[01] or memory.
+ */
+void ipu_set_vdi_src_mux(struct ipu_soc *ipu, bool csi)
+{
+   unsigned long flags;
+   u32 val;
+
+   spin_lock_irqsave(>lock, flags);
+
+   val = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   val &= ~(0x3 << 28);
+   if (csi)
+   val |= (0x01 << 28);
+   ipu_cm_write(ipu, val, IPU_FS_PROC_FLOW1);
+
+   spin_unlock_irqrestore(>lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_vdi_src_mux);
+
 
 /* IDMAC Channel Linking */
 
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 0a39c64..586979e 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -152,6 +152,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
 int ipu_get_num(struct ipu_soc *ipu);
 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
+void ipu_set_vdi_src_mux(struct ipu_soc *ipu, bool csi);
 void ipu_dump(struct ipu_soc *ipu);
 
 /*
-- 
1.9.1

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[PATCH 07/38] gpu: ipu-v3: Add VDI input IDMAC channels

[Steve Longerbeam]

Adds the VDIC field input IDMAC channels. These channels
transfer fields F(n-1), F(n), and F(N+1) from memory to
the VDIC (channels 8, 9, 10 respectively).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 include/video/imx-ipu-v3.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 586979e..2302fc5 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -107,6 +107,9 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_CSI2  2
 #define IPUV3_CHANNEL_CSI3  3
 #define IPUV3_CHANNEL_VDI_MEM_IC_VF 5
+#define IPUV3_CHANNEL_MEM_VDI_P 8
+#define IPUV3_CHANNEL_MEM_VDI   9
+#define IPUV3_CHANNEL_MEM_VDI_N10
 #define IPUV3_CHANNEL_MEM_IC_PP11
 #define IPUV3_CHANNEL_MEM_IC_PRP_VF12
 #define IPUV3_CHANNEL_G_MEM_IC_PRP_VF  14
-- 
1.9.1

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[PATCH 11/38] gpu: ipu-v3: Fix CSI data format for 16-bit media bus formats

[Steve Longerbeam]

The CSI data format was being programmed incorrectly for the
1x16 media bus formats. The CSI data format for 16-bit must
be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER).

Suggested-by: Carsten Resch <carsten.re...@de.bosch.com>
Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 07c7091..0eac28c 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -258,12 +258,8 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config 
*cfg, u32 mbus_code)
cfg->data_width = IPU_CSI_DATA_WIDTH_8;
break;
case MEDIA_BUS_FMT_UYVY8_1X16:
-   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY;
-   cfg->mipi_dt = MIPI_DT_YUV422;
-   cfg->data_width = IPU_CSI_DATA_WIDTH_16;
-   break;
case MEDIA_BUS_FMT_YUYV8_1X16:
-   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV;
+   cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER;
cfg->mipi_dt = MIPI_DT_YUV422;
cfg->data_width = IPU_CSI_DATA_WIDTH_16;
break;
-- 
1.9.1

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[PATCH 09/38] gpu: ipu-v3: Add ipu_ic_set_src()

[Steve Longerbeam]

Adds ipu_ic_set_src() which is just aa wrapper around
ipu_set_ic_src_mux().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-ic.c | 10 ++
 include/video/imx-ipu-v3.h  |  1 +
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index 1dcb96c..f306a9c 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -629,6 +629,16 @@ unlock:
 }
 EXPORT_SYMBOL_GPL(ipu_ic_task_idma_init);
 
+int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool vdi)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   ipu_set_ic_src_mux(priv->ipu, csi_id, vdi);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_ic_set_src);
+
 int ipu_ic_enable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 57b487d..8f77ddb 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -334,6 +334,7 @@ void ipu_ic_task_disable(struct ipu_ic *ic);
 int ipu_ic_task_idma_init(struct ipu_ic *ic, struct ipuv3_channel *channel,
  u32 width, u32 height, int burst_size,
  enum ipu_rotate_mode rot);
+int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool vdi);
 int ipu_ic_enable(struct ipu_ic *ic);
 int ipu_ic_disable(struct ipu_ic *ic);
 struct ipu_ic *ipu_ic_get(struct ipu_soc *ipu, enum ipu_ic_task task);
-- 
1.9.1

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[PATCH 10/38] gpu: ipu-v3: set correct full sensor frame for PAL/NTSC

[Steve Longerbeam]

Set the sensor full frame based on whether the passed in mbus_fmt
is 720x480 (NTSC) or 720x576 (PAL).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 20 +---
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 336dc06..07c7091 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -365,10 +365,14 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 {
struct ipu_csi_bus_config cfg;
unsigned long flags;
-   u32 data = 0;
+   u32 width, height, data = 0;
 
fill_csi_bus_cfg(, mbus_cfg, mbus_fmt);
 
+   /* set default sensor frame width and height */
+   width = mbus_fmt->width;
+   height = mbus_fmt->height;
+
/* Set the CSI_SENS_CONF register remaining fields */
data |= cfg.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT |
cfg.data_fmt << CSI_SENS_CONF_DATA_FMT_SHIFT |
@@ -386,11 +390,6 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 
ipu_csi_write(csi, data, CSI_SENS_CONF);
 
-   /* Setup sensor frame size */
-   ipu_csi_write(csi,
- (mbus_fmt->width - 1) | ((mbus_fmt->height - 1) << 16),
- CSI_SENS_FRM_SIZE);
-
/* Set CCIR registers */
 
switch (cfg.clk_mode) {
@@ -408,11 +407,12 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 * Field1BlankEnd = 0x7, Field1BlankStart = 0x3,
 * Field1ActiveEnd = 0x5, Field1ActiveStart = 0x1
 */
+   height = 625; /* framelines for PAL */
+
ipu_csi_write(csi, 0x40596 | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
ipu_csi_write(csi, 0xD07DF, CSI_CCIR_CODE_2);
ipu_csi_write(csi, 0xFF, CSI_CCIR_CODE_3);
-
} else if (mbus_fmt->width == 720 && mbus_fmt->height == 480) {
/*
 * NTSC case
@@ -422,6 +422,8 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
 * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
 * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
 */
+   height = 525; /* framelines for NTSC */
+
ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN,
  CSI_CCIR_CODE_1);
ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2);
@@ -447,6 +449,10 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
break;
}
 
+   /* Setup sensor frame size */
+   ipu_csi_write(csi, (width - 1) | ((height - 1) << 16),
+ CSI_SENS_FRM_SIZE);
+
dev_dbg(csi->ipu->dev, "CSI_SENS_CONF = 0x%08X\n",
ipu_csi_read(csi, CSI_SENS_CONF));
dev_dbg(csi->ipu->dev, "CSI_ACT_FRM_SIZE = 0x%08X\n",
-- 
1.9.1

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[PATCH 13/38] gpu: ipu-v3: Fix IRT usage

[Steve Longerbeam]

There can be multiple IC tasks using the IRT, so the IRT needs
a separate use counter. Create a private ipu_irt_enable() to
enable the IRT module when any IC task requires rotation, and
ipu_irt_disable() when a task no longer needs the IRT.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-ic.c | 43 ++-
 1 file changed, 34 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index f306a9c..5329bfe 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -160,6 +160,7 @@ struct ipu_ic_priv {
spinlock_t lock;
struct ipu_soc *ipu;
int use_count;
+   int irt_use_count;
struct ipu_ic task[IC_NUM_TASKS];
 };
 
@@ -379,8 +380,6 @@ void ipu_ic_task_disable(struct ipu_ic *ic)
 
ipu_ic_write(ic, ic_conf, IC_CONF);
 
-   ic->rotation = ic->graphics = false;
-
spin_unlock_irqrestore(>lock, flags);
 }
 EXPORT_SYMBOL_GPL(ipu_ic_task_disable);
@@ -639,22 +638,44 @@ int ipu_ic_set_src(struct ipu_ic *ic, int csi_id, bool 
vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_ic_set_src);
 
+static void ipu_irt_enable(struct ipu_ic *ic)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   if (!priv->irt_use_count)
+   ipu_module_enable(priv->ipu, IPU_CONF_ROT_EN);
+
+   priv->irt_use_count++;
+}
+
+static void ipu_irt_disable(struct ipu_ic *ic)
+{
+   struct ipu_ic_priv *priv = ic->priv;
+
+   priv->irt_use_count--;
+
+   if (!priv->irt_use_count)
+   ipu_module_disable(priv->ipu, IPU_CONF_ROT_EN);
+
+   if (priv->irt_use_count < 0)
+   priv->irt_use_count = 0;
+}
+
 int ipu_ic_enable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
unsigned long flags;
-   u32 module = IPU_CONF_IC_EN;
 
spin_lock_irqsave(>lock, flags);
 
-   if (ic->rotation)
-   module |= IPU_CONF_ROT_EN;
-
if (!priv->use_count)
-   ipu_module_enable(priv->ipu, module);
+   ipu_module_enable(priv->ipu, IPU_CONF_IC_EN);
 
priv->use_count++;
 
+   if (ic->rotation)
+   ipu_irt_enable(ic);
+
spin_unlock_irqrestore(>lock, flags);
 
return 0;
@@ -665,18 +686,22 @@ int ipu_ic_disable(struct ipu_ic *ic)
 {
struct ipu_ic_priv *priv = ic->priv;
unsigned long flags;
-   u32 module = IPU_CONF_IC_EN | IPU_CONF_ROT_EN;
 
spin_lock_irqsave(>lock, flags);
 
priv->use_count--;
 
if (!priv->use_count)
-   ipu_module_disable(priv->ipu, module);
+   ipu_module_disable(priv->ipu, IPU_CONF_IC_EN);
 
if (priv->use_count < 0)
priv->use_count = 0;
 
+   if (ic->rotation)
+   ipu_irt_disable(ic);
+
+   ic->rotation = ic->graphics = false;
+
spin_unlock_irqrestore(>lock, flags);
 
return 0;
-- 
1.9.1

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[PATCH 20/38] ARM: dts: imx6-sabresd: add video capture ports and connections

[Steve Longerbeam]

Defines the host ipu-capture device node and two camera sensors:
parallel-bus OV5642 and MIPI CSI-2 OV5640.

The host capture device connects to the OV5642 via the parallel-bus
mux input on the ipu1_csi0_mux.

The host capture device connects to the OV5640 via the MIPI CSI-2
receiver (directly on virtual channel 1 to ipu1_csi1 on imx6q, and
indirectly via the ipu1_csi1_mux on imx6dl).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6dl-sabresd.dts   |  44 +++
 arch/arm/boot/dts/imx6q-sabresd.dts|  16 
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 139 -
 3 files changed, 198 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts 
b/arch/arm/boot/dts/imx6dl-sabresd.dts
index 1e45f2f..0a4bfc2 100644
--- a/arch/arm/boot/dts/imx6dl-sabresd.dts
+++ b/arch/arm/boot/dts/imx6dl-sabresd.dts
@@ -15,3 +15,47 @@
model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
 };
+
+_csi1_from_ipu1_csi1_mux {
+   data-lanes = <0 1>;
+   clock-lanes = <2>;
+};
+
+_csi1_mux {
+   status = "okay";
+};
+
+/*
+ * if the OV5642 sensor is enabled, the ipu1_csi0_mux is also enabled,
+ * but we don't want to find the OV5640 through ipu1_csi0_mux path to the
+ * mipi-csi2 receiver, so shutdown the link to the mipi-csi2 receiver at
+ * all virtual channels.
+*/
+#ifdef __ENABLE_OV5642__
+_csi0_mux_from_mipi_vc0 {
+   remote-endpoint = <>;
+};
+_csi0_mux_from_mipi_vc1 {
+   remote-endpoint = <>;
+};
+_csi0_mux_from_mipi_vc2 {
+   remote-endpoint = <>;
+};
+_csi0_mux_from_mipi_vc3 {
+   remote-endpoint = <>;
+};
+#endif
+
+/*
+ * shutdown links to mipi-csi2 channels 0,2,3 through ipu1_csi1_mux. The
+ * OV5640 is on VC1, so it must be found only on that ipu1_csi1_mux input.
+ */
+_csi1_mux_from_mipi_vc0 {
+   remote-endpoint = <>;
+};
+_csi1_mux_from_mipi_vc2 {
+   remote-endpoint = <>;
+};
+_csi1_mux_from_mipi_vc3 {
+   remote-endpoint = <>;
+};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts 
b/arch/arm/boot/dts/imx6q-sabresd.dts
index 9cbdfe7..ade6305 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -23,3 +23,19 @@
  {
status = "okay";
 };
+
+_csi1_from_mipi_vc1 {
+   data-lanes = <0 1>;
+   clock-lanes = <2>;
+};
+
+/*
+ * if the OV5642 sensor is enabled, the ipu1_csi0_mux is also enabled,
+ * but we don't want to find the OV5640 through ipu1_csi0_mux path, so
+ * shutdown the link to the mipi-csi2 receiver.
+*/
+#ifdef __ENABLE_OV5642__
+_csi0_mux_from_mipi_vc0 {
+   remote-endpoint = <>;
+};
+#endif
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 5248e7b..ce575e6 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -10,6 +10,10 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+/* Uncomment to enable parallel interface OV5642 on i2c1 and port csi0 */
+/* #define __ENABLE_OV5642__ */
+
+#include 
 #include 
 #include 
 
@@ -144,6 +148,54 @@
};
};
};
+
+#ifdef __ENABLE_OV5642__
+   ipucap0: ipucap@0 {
+   compatible = "fsl,imx-video-capture";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_ipu1_csi0>;
+   ports = <_csi0>;
+   status = "okay";
+   };
+#endif
+
+   ipucap1: ipucap@1 {
+   compatible = "fsl,imx-video-capture";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   ports = <_csi1>;
+   status = "okay";
+   };
+};
+
+#ifdef __ENABLE_OV5642__
+_csi0_from_ipu1_csi0_mux {
+   bus-width = <8>;
+   data-shift = <12>; /* Lines 19:12 used */
+   hsync-active = <1>;
+   vsync-active = <1>;
+};
+
+_csi0_mux_from_parallel_sensor {
+   remote-endpoint = <_to_ipu1_csi0_mux>;
+};
+
+_csi0_mux {
+   status = "okay";
+};
+#endif
+
+_csi {
+   status = "okay";
+};
+
+/* Incoming port from sensor */
+_csi_from_mipi_sensor {
+   remote-endpoint = <_to_mipi_csi>;
+   data-lanes = <0 1>;
+   clock-lanes = <2>;
 };
 
  {
@@ -214,7 +266,34 @@
0x8014 /* 4:FN_DMICCDAT */
0x /* 5:Default */
>;
-   };
+   };
+
+#ifdef __ENABLE_OV5642__
+   camera: ov5642@3c {
+   compatible = "ovti,ov5642";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ov5642>;
+

[PATCH 17/38] ARM: dts: imx6qdl: Flesh out MIPI CSI2 receiver node

[Steve Longerbeam]

Add to the MIPI CSI2 receiver node: compatible string, interrupt sources,
clocks.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ed613eb..50499eb 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1119,7 +1119,14 @@
};
 
mipi_csi: mipi@021dc000 {
+   compatible = "fsl,imx-mipi-csi2";
reg = <0x021dc000 0x4000>;
+   interrupts = <0 100 0x04>, <0 101 0x04>;
+   clocks = < IMX6QDL_CLK_HSI_TX>,
+< IMX6QDL_CLK_VIDEO_27M>,
+< IMX6QDL_CLK_EIM_SEL>;
+   clock-names = "dphy_clk", "cfg_clk", "pix_clk";
+   status = "disabled";
};
 
mipi_dsi: mipi@021e {
-- 
1.9.1

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[PATCH 14/38] gpu: ipu-ic: Add complete image conversion support with tiling

[Steve Longerbeam]

This patch implements complete image conversion support to ipu-ic,
with tiling to support scaling to and from images up to 4096x4096.
Image rotation is also supported.

The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).

Callers prepare for image conversion by calling
ipu_image_convert_prepare(), which initializes the parameters of
the conversion. The caller passes in the ipu_ic task to use for
the conversion, the input and output image formats, a rotation mode,
and a completion callback and completion context pointer:

struct image_converter_ctx *
ipu_image_convert_prepare(struct ipu_ic *ic,
  struct ipu_image *in, struct ipu_image *out,
  enum ipu_rotate_mode rot_mode,
  image_converter_cb_t complete,
  void *complete_context);

The caller is given a new conversion context that must be passed to
the further APIs:

struct image_converter_run *
ipu_image_convert_run(struct image_converter_ctx *ctx,
  dma_addr_t in_phys, dma_addr_t out_phys);

This queues a new image conversion request to a run queue, and
starts the conversion immediately if the run queue is empty. Only
the physaddr's of the input and output image buffers are needed,
since the conversion context was created previously with
ipu_image_convert_prepare(). Returns a new run object pointer. When
the conversion completes, the run pointer is returned to the
completion callback.

void image_convert_abort(struct image_converter_ctx *ctx);

This will abort any active or pending conversions for this context.
Any currently active or pending runs belonging to this context are
returned via the completion callback with an error status.

void ipu_image_convert_unprepare(struct image_converter_ctx *ctx);

Unprepares the conversion context. Any active or pending runs will
be aborted by calling image_convert_abort().
---
 drivers/gpu/ipu-v3/ipu-ic.c | 1691 ++-
 include/video/imx-ipu-v3.h  |   57 +-
 2 files changed, 1736 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index 5329bfe..f6a1125 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -17,6 +17,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include "ipu-prv.h"
 
 /* IC Register Offsets */
@@ -82,6 +84,40 @@
 #define IC_IDMAC_3_PP_WIDTH_MASK(0x3ff << 20)
 #define IC_IDMAC_3_PP_WIDTH_OFFSET  20
 
+/*
+ * The IC Resizer has a restriction that the output frame from the
+ * resizer must be 1024 or less in both width (pixels) and height
+ * (lines).
+ *
+ * The image conversion support attempts to split up a conversion when
+ * the desired output (converted) frame resolution exceeds the IC resizer
+ * limit of 1024 in either dimension.
+ *
+ * If either dimension of the output frame exceeds the limit, the
+ * dimension is split into 1, 2, or 4 equal stripes, for a maximum
+ * of 4*4 or 16 tiles. A conversion is then carried out for each
+ * tile (but taking care to pass the full frame stride length to
+ * the DMA channel's parameter memory!). IDMA double-buffering is used
+ * to convert each tile back-to-back when possible (see note below
+ * when double_buffering boolean is set).
+ *
+ * Note that the input frame must be split up into the same number
+ * of tiles as the output frame.
+ */
+#define MAX_STRIPES_W4
+#define MAX_STRIPES_H4
+#define MAX_TILES (MAX_STRIPES_W * MAX_STRIPES_H)
+
+#define MIN_W 128
+#define MIN_H 128
+#define MAX_W 4096
+#define MAX_H 4096
+
+enum image_convert_type {
+   IMAGE_CONVERT_IN = 0,
+   IMAGE_CONVERT_OUT,
+};
+
 struct ic_task_regoffs {
u32 rsc;
u32 tpmem_csc[2];
@@ -96,6 +132,16 @@ struct ic_task_bitfields {
u32 ic_cmb_galpha_bit;
 };
 
+struct ic_task_channels {
+   int in;
+   int out;
+   int rot_in;
+   int rot_out;
+   int vdi_in_p;
+   int vdi_in;
+   int vdi_in_n;
+};
+
 static const struct ic_task_regoffs ic_task_reg[IC_NUM_TASKS] = {
[IC_TASK_ENCODER] = {
.rsc = IC_PRP_ENC_RSC,
@@ -138,12 +184,159 @@ static const struct ic_task_bitfields 
ic_task_bit[IC_NUM_TASKS] = {
},
 };
 
+static const struct ic_task_channels ic_task_ch[IC_NUM_TASKS] = {
+   [IC_TASK_ENCODER] = {
+   .out = IPUV3_CHANNEL_IC_PRP_ENC_MEM,
+   .rot_in = IPUV3_CHANNEL_MEM_ROT_ENC,
+   .rot_out = IPUV3_CHANNEL_ROT_ENC_MEM,
+   },
+   [IC_TASK_VIEWFINDER] = {
+   .in = IPUV3_CHANNEL_MEM_IC_PRP_VF,
+   .out = IPUV3_CHANNEL_IC_PRP_VF_MEM,
+   .rot_in = IPUV3_CHANNEL_MEM_ROT_VF,
+   .rot_out = IPUV3_CHANNEL_ROT_VF_MEM,
+   .vdi_in_p = IPUV3_CHANNEL_MEM_VDI_P,
+   .vdi_in = IPUV3_CHANNEL_MEM_VDI,
+   .vdi_in_n = IPUV3_CHANNEL_MEM_VDI_N,
+

[PATCH 16/38] gpu: ipu-v3: rename CSI client device

[Steve Longerbeam]

Rename the CSI client device in the client_reg[] table to
"imx-ipuv3-csi".

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 374100e..bd6771b 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1153,14 +1153,14 @@ static struct ipu_platform_reg client_reg[] = {
.dma[0] = IPUV3_CHANNEL_CSI0,
.dma[1] = -EINVAL,
},
-   .name = "imx-ipuv3-camera",
+   .name = "imx-ipuv3-csi",
}, {
.pdata = {
.csi = 1,
.dma[0] = IPUV3_CHANNEL_CSI1,
.dma[1] = -EINVAL,
},
-   .name = "imx-ipuv3-camera",
+   .name = "imx-ipuv3-csi",
}, {
.pdata = {
.di = 0,
-- 
1.9.1

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[PATCH 35/38] media: adv7180: add power pin control

[Steve Longerbeam]

Some targets control the ADV7180 power pin via a gpio, so add
support for "pwdn-gpio" device node and pin control.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/media/i2c/adv7180.c | 51 +
 1 file changed, 51 insertions(+)

diff --git a/drivers/media/i2c/adv7180.c b/drivers/media/i2c/adv7180.c
index b77b0a4..b3bb19f 100644
--- a/drivers/media/i2c/adv7180.c
+++ b/drivers/media/i2c/adv7180.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -192,6 +193,7 @@ struct adv7180_state {
struct media_padpad;
struct mutexmutex; /* mutual excl. when accessing chip */
int irq;
+   int pwdn_gpio;
v4l2_std_id curr_norm;
boolpowered;
boolstreaming;
@@ -442,6 +444,19 @@ static int adv7180_g_std(struct v4l2_subdev *sd, 
v4l2_std_id *norm)
return 0;
 }
 
+static void adv7180_set_power_pin(struct adv7180_state *state, bool on)
+{
+   if (!gpio_is_valid(state->pwdn_gpio))
+   return;
+
+   if (on) {
+   gpio_set_value_cansleep(state->pwdn_gpio, 1);
+   usleep_range(5000, 5001);
+   } else {
+   gpio_set_value_cansleep(state->pwdn_gpio, 0);
+   }
+}
+
 static int adv7180_set_power(struct adv7180_state *state, bool on)
 {
u8 val;
@@ -1185,6 +1200,8 @@ static int init_device(struct adv7180_state *state)
 
mutex_lock(>mutex);
 
+   adv7180_set_power_pin(state, true);
+
adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
usleep_range(5000, 1);
 
@@ -1232,6 +1249,34 @@ out_unlock:
return ret;
 }
 
+static int adv7180_of_parse(struct adv7180_state *state)
+{
+   struct i2c_client *client = state->client;
+   struct device_node *np = client->dev.of_node;
+   int ret;
+
+   ret = of_get_named_gpio(np, "pwdn-gpio", 0);
+
+   if (gpio_is_valid(ret)) {
+   state->pwdn_gpio = ret;
+   ret = devm_gpio_request_one(>dev,
+   state->pwdn_gpio,
+   GPIOF_OUT_INIT_HIGH,
+   "adv7180_pwdn");
+   if (ret < 0) {
+   v4l_err(client, "request for power pin failed\n");
+   return ret;
+   }
+   } else {
+   if (ret == -EPROBE_DEFER)
+   return ret;
+   /* assume a power-down gpio is not required */
+   state->pwdn_gpio = -1;
+   }
+
+   return 0;
+}
+
 static int adv7180_probe(struct i2c_client *client,
 const struct i2c_device_id *id)
 {
@@ -1254,6 +1299,10 @@ static int adv7180_probe(struct i2c_client *client,
state->field = V4L2_FIELD_INTERLACED;
state->chip_info = (struct adv7180_chip_info *)id->driver_data;
 
+   ret = adv7180_of_parse(state);
+   if (ret)
+   return ret;
+
if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
state->csi_client = i2c_new_dummy(client->adapter,
ADV7180_DEFAULT_CSI_I2C_ADDR);
@@ -1345,6 +1394,8 @@ static int adv7180_remove(struct i2c_client *client)
if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
i2c_unregister_device(state->csi_client);
 
+   adv7180_set_power_pin(state, false);
+
mutex_destroy(>mutex);
 
return 0;
-- 
1.9.1

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[PATCH 37/38] media: Add i.MX5/6 mem2mem driver

[Steve Longerbeam]

Adds a V4L2 mem2mem driver for i.MX5/6 SoC. Uses the IPU IC image
converter (post-processor task) to perform scaling, rotation, and
color space conversion.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 Documentation/devicetree/bindings/media/imx.txt |   25 +-
 drivers/staging/media/imx/Kconfig   |   12 +
 drivers/staging/media/imx/Makefile  |1 +
 drivers/staging/media/imx/m2m/Makefile  |1 +
 drivers/staging/media/imx/m2m/imx-m2m.c | 1049 +++
 5 files changed, 1087 insertions(+), 1 deletion(-)
 create mode 100644 drivers/staging/media/imx/m2m/Makefile
 create mode 100644 drivers/staging/media/imx/m2m/imx-m2m.c

diff --git a/Documentation/devicetree/bindings/media/imx.txt 
b/Documentation/devicetree/bindings/media/imx.txt
index 1f2ca4b..12ef06c 100644
--- a/Documentation/devicetree/bindings/media/imx.txt
+++ b/Documentation/devicetree/bindings/media/imx.txt
@@ -1,4 +1,27 @@
-Freescale i.MX Video Capture
+Freescale i.MX Video Capture, Mem2Mem
+
+Video Mem2Mem node
+--
+
+This is the imx video mem2mem device node. The mem2mem node is an IPU
+client and uses the register-level primitives of the IPU, so it does
+not require reg or interrupt properties. Only a compatible property
+and the ipu phandle is required.
+
+Required properties:
+- compatible   : "fsl,imx-video-mem2mem";
+- ipu   : the ipu phandle;
+
+Example:
+
+/ {
+   ipum2m0: ipum2m@ipu1 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
+};
+
 
 Video Capture node
 --
diff --git a/drivers/staging/media/imx/Kconfig 
b/drivers/staging/media/imx/Kconfig
index 65e1645..3305daa 100644
--- a/drivers/staging/media/imx/Kconfig
+++ b/drivers/staging/media/imx/Kconfig
@@ -21,3 +21,15 @@ config VIDEO_IMX_CAMERA
 if VIDEO_IMX_CAMERA
 source "drivers/staging/media/imx/capture/Kconfig"
 endif
+
+config VIDEO_IMX_M2M
+   tristate "i.MX5/6 Mem2Mem driver"
+   depends on VIDEO_IMX && VIDEO_DEV
+   select VIDEOBUF2_DMA_CONTIG
+   select V4L2_MEM2MEM_DEV
+   default y
+   ---help---
+ Use the IPU IC Post-processor on the i.MX5/6 SoC for mem2mem
+ processing of buffers. Operations include scaling, rotation,
+ and color space conversion. The driver implements tiling to
+ support scaling up to 4096x4096.
diff --git a/drivers/staging/media/imx/Makefile 
b/drivers/staging/media/imx/Makefile
index 7c97629..b9e31d8 100644
--- a/drivers/staging/media/imx/Makefile
+++ b/drivers/staging/media/imx/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += capture/
+obj-$(CONFIG_VIDEO_IMX_M2M) += m2m/
diff --git a/drivers/staging/media/imx/m2m/Makefile 
b/drivers/staging/media/imx/m2m/Makefile
new file mode 100644
index 000..287d258
--- /dev/null
+++ b/drivers/staging/media/imx/m2m/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_VIDEO_IMX_M2M) += imx-m2m.o
diff --git a/drivers/staging/media/imx/m2m/imx-m2m.c 
b/drivers/staging/media/imx/m2m/imx-m2m.c
new file mode 100644
index 000..599f20e
--- /dev/null
+++ b/drivers/staging/media/imx/m2m/imx-m2m.c
@@ -0,0 +1,1049 @@
+/*
+ * This is a mem2mem driver for the Freescale i.MX5/6 SOC. It carries out
+ * color-space conversion, downsizing, resizing, and rotation transformations
+ * on input buffers using the IPU Image Converter's Post-Processing task.
+ *
+ * Based on mem2mem_testdev.c by Pawel Osciak.
+ *
+ * Copyright (c) 2012-2013 Mentor Graphics Inc.
+ * Steve Longerbeam <steve_longerb...@mentor.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+MODULE_DESCRIPTION("i.MX5/6 Post-Processing mem2mem device");
+MODULE_AUTHOR("Steve Longerbeam <steve_longerb...@mentor.com>");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("0.1");
+
+static int instrument;
+module_param(instrument, int, 0);
+MODULE_PARM_DESC(instrument, "1 = enable conversion time measurement");
+
+/* Flags that indicate a format can be used for capture/output */
+#define MEM2MEM_CAPTURE BIT(0)
+#define MEM2MEM_OUTPUT  BIT(1)
+
+#define MEM2MEM_NAME   "imx-m2m"
+
+/* Per queue */
+#define MEM2MEM_DEF_NUM_BUFS   VIDEO_MAX_FRAME
+/* In bytes, per queue */
+#define MEM2MEM_VID_MEM_LIMIT  SZ_256M
+
+#define dprintk(dev, fmt, arg...) \
+   v4l2_dbg(1, 1, >v4l2_dev, "%s: " fmt, __func__, ## arg)
+
+struct m2mx_ctx;
+
+struct m2mx_dev {
+   struct v4l2_device 

[PATCH 36/38] media: adv7180: implement g_parm

[Steve Longerbeam]

Implement g_parm to return the current standard's frame period.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/media/i2c/adv7180.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/media/i2c/adv7180.c b/drivers/media/i2c/adv7180.c
index b3bb19f..9e40632 100644
--- a/drivers/media/i2c/adv7180.c
+++ b/drivers/media/i2c/adv7180.c
@@ -740,6 +740,27 @@ static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
return 0;
 }
 
+static int adv7180_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *a)
+{
+   struct adv7180_state *state = to_state(sd);
+   struct v4l2_captureparm *cparm = >parm.capture;
+
+   if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+   return -EINVAL;
+
+   memset(a, 0, sizeof(*a));
+   a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+   if (state->curr_norm & V4L2_STD_525_60) {
+   cparm->timeperframe.numerator = 1001;
+   cparm->timeperframe.denominator = 3;
+   } else {
+   cparm->timeperframe.numerator = 1;
+   cparm->timeperframe.denominator = 25;
+   }
+
+   return 0;
+}
+
 static int adv7180_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap 
*cropcap)
 {
struct adv7180_state *state = to_state(sd);
@@ -798,6 +819,7 @@ static int adv7180_subscribe_event(struct v4l2_subdev *sd,
 static const struct v4l2_subdev_video_ops adv7180_video_ops = {
.s_std = adv7180_s_std,
.g_std = adv7180_g_std,
+   .g_parm = adv7180_g_parm,
.querystd = adv7180_querystd,
.g_input_status = adv7180_g_input_status,
.s_routing = adv7180_s_routing,
-- 
1.9.1

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[PATCH 19/38] ARM: dts: imx6-sabrelite: add video capture ports and connections

[Steve Longerbeam]

Defines the host video capture device node and an OV5642 camera sensor
node on i2c2. The host capture device connects to the OV5642 via the
parallel-bus mux input on the ipu1_csi0_mux.

Note there is a pin conflict with GPIO6. This pin functions as a power
input pin to the OV5642, but ENET requires it to wake-up the ARM cores
on normal RX and TX packet done events (see 6261c4c8). So by default,
capture is disabled, enable by uncommenting __OV5642_CAPTURE__ macro.
Ethernet will still work just not quite as well.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 95 
 1 file changed, 95 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index c47fe6c..9709183 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -39,9 +39,20 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
  */
+
+#include 
 #include 
 #include 
 
+/*
+ * Uncomment the following macro to enable OV5642 video capture
+ * support. There is a pin conflict for GPIO6 between ENET wake-up
+ * interrupt function and power-down pin function for the OV5642.
+ * ENET will still work when enabling OV5642 capture, just not
+ * quite as well.
+ */
+/* #define __OV5642_CAPTURE__ */
+
 / {
chosen {
stdout-path = 
@@ -218,8 +229,37 @@
};
};
};
+
+#ifdef __OV5642_CAPTURE__
+   ipucap0: ipucap@0 {
+   compatible = "fsl,imx-video-capture";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_ipu1_csi0>;
+   ports = <_csi0>;
+   status = "okay";
+   };
+#endif
+};
+
+#ifdef __OV5642_CAPTURE__
+_csi0_from_ipu1_csi0_mux {
+   bus-width = <8>;
+   data-shift = <12>; /* Lines 19:12 used */
+   hsync-active = <1>;
+   vync-active = <1>;
 };
 
+_csi0_mux_from_parallel_sensor {
+   remote-endpoint = <_to_ipu1_csi0_mux>;
+};
+
+_csi0_mux {
+   status = "okay";
+};
+#endif
+   
  {
pinctrl-names = "default";
pinctrl-0 = <_audmux>;
@@ -271,8 +311,11 @@
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
+#ifndef __OV5642_CAPTURE__
interrupts-extended = < 6 IRQ_TYPE_LEVEL_HIGH>,
  < 0 119 IRQ_TYPE_LEVEL_HIGH>;
+
+#endif
status = "okay";
 };
 
@@ -301,6 +344,30 @@
pinctrl-names = "default";
pinctrl-0 = <_i2c2>;
status = "okay";
+
+#ifdef __OV5642_CAPTURE__
+   camera: ov5642@3c {
+   compatible = "ovti,ov5642";
+   pinctrl-names = "default";
+   pinctrl-0 = <_ov5642>;
+   clocks = < IMX6QDL_CLK_CKO2>;
+   clock-names = "xclk";
+   reg = <0x3c>;
+   xclk = <2400>;
+   reset-gpios = < 8 0>;
+   pwdn-gpios = < 6 0>;
+   gp-gpios = < 16 0>;
+
+   port {
+   ov5642_to_ipu1_csi0_mux: endpoint {
+   remote-endpoint = 
<_csi0_mux_from_parallel_sensor>;
+   bus-width = <8>;
+   hsync-active = <1>;
+   vsync-active = <1>;
+   };
+   };
+   };
+#endif
 };
 
  {
@@ -373,7 +440,9 @@
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
/* Phy reset */
MX6QDL_PAD_EIM_D23__GPIO3_IO23  0x000b0
+#ifndef __OV5642_CAPTURE__
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
+#endif
>;
};
 
@@ -448,6 +517,32 @@
>;
};
 
+   pinctrl_ipu1_csi0: ipu1grp-csi0 {
+   fsl,pins = <
+   MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12
0x8000
+   MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13
0x8000
+   MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14
0x8000
+   MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15
0x8000
+   MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16
0x8000
+   MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17
0x8000
+   MX6QDL_PAD_CSI0_DAT18__IPU1_

[PATCH 28/38] v4l: Add signal lock status to source change events

[Steve Longerbeam]

Add a signal lock status change to the source changes bitmask.
This indicates there was a signal lock or unlock event detected
at the input of a video decoder.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 Documentation/DocBook/media/v4l/vidioc-dqevent.xml | 12 ++--
 include/uapi/linux/videodev2.h |  1 +
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml 
b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
index c9c3c77..7758ad7 100644
--- a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
@@ -233,8 +233,9 @@

  This event is triggered when a source parameter change is
   detected during runtime by the video device. It can be a
-  runtime resolution change triggered by a video decoder or the
-  format change happening on an input connector.
+  runtime resolution change or signal lock status change
+  triggered by a video decoder, or the format change happening
+  on an input connector.
   This event requires that the id
   matches the input index (when used with a video device node)
   or the pad index (when used with a subdevice node) from which
@@ -461,6 +462,13 @@
from a video decoder.

  
+ 
+   V4L2_EVENT_SRC_CH_LOCK_STATUS
+   0x0002
+   This event gets triggered when there is a signal lock or
+   unlock detected at the input of a video decoder.
+   
+ 

   
 
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 8f95191..2eba5da 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -2076,6 +2076,7 @@ struct v4l2_event_frame_sync {
 };
 
 #define V4L2_EVENT_SRC_CH_RESOLUTION   (1 << 0)
+#define V4L2_EVENT_SRC_CH_LOCK_STATUS  (1 << 1)
 
 struct v4l2_event_src_change {
__u32 changes;
-- 
1.9.1

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[PATCH 03/38] gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()

[Steve Longerbeam]

Adds ipu_cpmem_get_burstsize().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-cpmem.c | 6 ++
 include/video/imx-ipu-v3.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index a36c35e..fcb7dc8 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -275,6 +275,12 @@ void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id)
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_axi_id);
 
+int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch)
+{
+   return ipu_ch_param_read_field(ch, IPU_FIELD_NPB) + 1;
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_get_burstsize);
+
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize)
 {
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 904fd12..60540ead 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -197,6 +197,7 @@ void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int 
bufnum, dma_addr_t buf);
 void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off);
 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
 void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
+int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch);
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
 void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
 void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
-- 
1.9.1

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[PATCH 22/38] ARM: dts: imx6-sabreauto: add reset-gpios property for max7310

[Steve Longerbeam]

The reset pin to the port expander chip (MAX7310) is controlled by a gpio,
so define a reset-gpios property to control it.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 13f50e8..81e3ab7 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -129,6 +129,9 @@
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
+   pinctrl-names = "default";  
+   pinctrl-0 = <_max7310>;
+   reset-gpios = < 15 1>;
};
 
max7310_b: gpio@32 {
@@ -136,6 +139,9 @@
reg = <0x32>;
gpio-controller;
#gpio-cells = <2>;
+   pinctrl-names = "default";  
+   pinctrl-0 = <_max7310>;
+   reset-gpios = < 15 1>;
};
 
max7310_c: gpio@34 {
@@ -143,6 +149,9 @@
reg = <0x34>;
gpio-controller;
#gpio-cells = <2>;
+   pinctrl-names = "default";  
+   pinctrl-0 = <_max7310>;
+   reset-gpios = < 15 1>;
};
};
};
@@ -441,6 +450,12 @@
>;
};
 
+   pinctrl_max7310: max7310grp {
+   fsl,pins = <
+   MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x8000
+   >;
+   };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT   0x1b0b1
-- 
1.9.1

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[PATCH 38/38] ARM: imx_v6_v7_defconfig: Enable staging video4linux drivers

[Steve Longerbeam]

Enable imx v4l2 staging drivers. For video capture on
the SabreAuto, the ADV7180 video decoder also requires the
i2c-mux-gpio and the max7310 port expander.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/imx_v6_v7_defconfig 
b/arch/arm/configs/imx_v6_v7_defconfig
index 21339ce..8b1590a 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -327,6 +327,8 @@ CONFIG_FSL_EDMA=y
 CONFIG_IMX_SDMA=y
 CONFIG_MXS_DMA=y
 CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_IMX=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_IIO=y
 CONFIG_VF610_ADC=y
-- 
1.9.1

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[PATCH 21/38] ARM: dts: imx6-sabreauto: create i2cmux for i2c3

[Steve Longerbeam]

The sabreauto uses a steering pin to select between the SDA signal on
i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control
this steering pin. Idle state of the i2cmux selects SPI NOR. This is not
a classic way to use i2cmux, since one side of the mux selects something
other than an i2c bus, but it works and is probably the cleanest
solution. Note that if one thread is attempting to access SPI NOR while
another thread is accessing i2c3, the SPI NOR access will fail since the
i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't
be avoided in any case, the board is not designed to allow concurrent
i2c3 and SPI NOR functions (and the default device-tree does not enable
SPI NOR anyway).

Devices hanging off i2c3 should now be defined under i2cmux, so
that the steering pin can be properly controlled to access those
devices. The port expanders (MAX7310) are thus moved into i2cmux.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 65 +---
 1 file changed, 44 insertions(+), 21 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d354d40..13f50e8 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -108,6 +108,44 @@
default-brightness-level = <7>;
status = "okay";
};
+
+   i2cmux {
+   compatible = "i2c-mux-gpio";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_i2c3mux>;
+   mux-gpios = < 4 0>;
+   i2c-parent = <>;
+   idle-state = <0>;
+
+   i2c@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   max7310_a: gpio@30 {
+   compatible = "maxim,max7310";
+   reg = <0x30>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
+
+   max7310_b: gpio@32 {
+   compatible = "maxim,max7310";
+   reg = <0x32>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
+
+   max7310_c: gpio@34 {
+   compatible = "maxim,max7310";
+   reg = <0x34>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
+   };
+   };
 };
 
  {
@@ -290,27 +328,6 @@
pinctrl-names = "default";
pinctrl-0 = <_i2c3>;
status = "okay";
-
-   max7310_a: gpio@30 {
-   compatible = "maxim,max7310";
-   reg = <0x30>;
-   gpio-controller;
-   #gpio-cells = <2>;
-   };
-
-   max7310_b: gpio@32 {
-   compatible = "maxim,max7310";
-   reg = <0x32>;
-   gpio-controller;
-   #gpio-cells = <2>;
-   };
-
-   max7310_c: gpio@34 {
-   compatible = "maxim,max7310";
-   reg = <0x34>;
-   gpio-controller;
-   #gpio-cells = <2>;
-   };
 };
 
  {
@@ -418,6 +435,12 @@
>;
};
 
+   pinctrl_i2c3mux: i2c3muxgrp {
+   fsl,pins = <
+   MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x8000
+   >;
+   };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT   0x1b0b1
-- 
1.9.1

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[PATCH 24/38] ARM: dts: imx6-sabreauto: add video capture ports and connections

[Steve Longerbeam]

Defines the host video capture device node and the ADV7180 decoder
sensor. The host capture device connects to the ADV7180 via the
parallel-bus mux input on the ipu1_csi0_mux.

On the sabreauto, two analog video inputs are routed to the ADV7180,
composite on Ain1, and composite on Ain3. Those inputs are defined
via inputs and input-names under the endpoint node
ipu1_csi0_from_ipu1_csi0_mux. The ADV7180 power pin is via max7310_b
port expander.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 68 
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 21af432..f962f51 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -153,10 +153,54 @@
pinctrl-0 = <_max7310>;
reset-gpios = < 15 1>;
};
+
+   camera: adv7180@21 {
+   compatible = "adi,adv7180";
+   reg = <0x21>;
+   pwdn-gpio = <_b 2 0>;
+   interrupt-parent = <>;
+   interrupts = <27 0x8>;
+
+   port {
+   adv7180_to_ipu1_csi0_mux: endpoint {
+   remote-endpoint = 
<_csi0_mux_from_parallel_sensor>;
+   bus-width = <8>;
+   };
+   };
+   };
+   };
+   };
+
+   ipucap0: ipucap0 {
+   compatible = "fsl,imx-video-capture";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_ipu1_csi0>;
+   ports = <_csi0>;
+   status = "okay";
+
+   fim {
+   enable = <1>;
};
};
 };
 
+_csi0_from_ipu1_csi0_mux {
+   bus-width = <8>;
+};
+
+_csi0_mux_from_parallel_sensor {
+   remote-endpoint = <_to_ipu1_csi0_mux>;
+   inputs = <0x00 0x02>;
+   input-names = "ADV7180 Composite on Ain1",
+   "ADV7180 Composite on Ain3";
+};
+
+_csi0_mux {
+   status = "okay";
+};
+
  {
assigned-clocks = < IMX6QDL_PLL4_BYPASS_SRC>,
  < IMX6QDL_PLL4_BYPASS>,
@@ -456,6 +500,30 @@
>;
};
 
+   pinctrl_ipu1_csi0: ipu1grp-csi0 {
+   fsl,pins = <
+   MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04   
0x8000
+   MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05   
0x8000
+   MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06   
0x8000
+   MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07   
0x8000
+   MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08   
0x8000
+   MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09   
0x8000
+   MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10  
0x8000
+   MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11  
0x8000
+   MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12  
0x8000
+   MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13  
0x8000
+   MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14  
0x8000
+   MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15  
0x8000
+   MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16  
0x8000
+   MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17  
0x8000
+   MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18  
0x8000
+   MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19  
0x8000
+   MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 
0x8000
+   MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
0x8000
+   MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC   
0x8000
+   >;
+   };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT   0x1b0b1
-- 
1.9.1

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[PATCH 25/38] ARM: dts: imx6qdl: add mem2mem device for sabre* boards

[Steve Longerbeam]

Enables ipu-mem2mem device on SabreAuto, SabreSD, and SabreLite
(also on ipu2 for quad).

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6q-sabreauto.dts| 7 +++
 arch/arm/boot/dts/imx6q-sabrelite.dts| 6 ++
 arch/arm/boot/dts/imx6q-sabresd.dts  | 6 ++
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 6 ++
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi   | 6 ++
 5 files changed, 31 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts 
b/arch/arm/boot/dts/imx6q-sabreauto.dts
index 334b924..6e79396 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -18,8 +18,15 @@
 / {
model = "Freescale i.MX6 Quad SABRE Automotive Board";
compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+
+   ipum2m1: ipum2m@ipu2 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
 };
 
+
  {
status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts 
b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 66d10d8..95fe618 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -47,6 +47,12 @@
 / {
model = "Freescale i.MX6 Quad SABRE Lite Board";
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+   ipum2m1: ipum2m@ipu2 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
 };
 
  {
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts 
b/arch/arm/boot/dts/imx6q-sabresd.dts
index ade6305..1156919 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -18,6 +18,12 @@
 / {
model = "Freescale i.MX6 Quad SABRE Smart Device Board";
compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+
+   ipum2m1: ipum2m@ipu2 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
 };
 
  {
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index f962f51..811059f 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -184,6 +184,12 @@
enable = <1>;
};
};
+
+   ipum2m0: ipum2m@ipu1 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
 };
 
 _csi0_from_ipu1_csi0_mux {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index ce575e6..a67ad02 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -168,6 +168,12 @@
ports = <_csi1>;
status = "okay";
};
+
+   ipum2m0: ipum2m@ipu1 {
+   compatible = "fsl,imx-video-mem2mem";
+   ipu = <>;
+   status = "okay";
+   };
 };
 
 #ifdef __ENABLE_OV5642__
-- 
1.9.1

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[PATCH 34/38] media: imx: Add support for ADV7180 Video Decoder

[Steve Longerbeam]

This driver is based on adv7180.c from Freescale imx_3.10.17_1.0.0_beta
branch, modified heavily for code cleanup and converted from int-device
to subdev.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/staging/media/imx/capture/Kconfig   |7 +
 drivers/staging/media/imx/capture/Makefile  |1 +
 drivers/staging/media/imx/capture/adv7180.c | 1533 +++
 include/uapi/linux/v4l2-controls.h  |4 +
 include/uapi/media/Kbuild   |1 +
 include/uapi/media/adv718x.h|   42 +
 6 files changed, 1588 insertions(+)
 create mode 100644 drivers/staging/media/imx/capture/adv7180.c
 create mode 100644 include/uapi/media/adv718x.h

diff --git a/drivers/staging/media/imx/capture/Kconfig 
b/drivers/staging/media/imx/capture/Kconfig
index 42d87db..6897192 100644
--- a/drivers/staging/media/imx/capture/Kconfig
+++ b/drivers/staging/media/imx/capture/Kconfig
@@ -32,4 +32,11 @@ config IMX_CAMERA_OV5640_MIPI
---help---
  MIPI CSI-2 OV5640 Camera support.
 
+config IMX_CAMERA_ADV7180
+   tristate "Analog Devices ADV7180 Video Decoder support"
+   depends on VIDEO_IMX_CAMERA
+   default y
+   ---help---
+ Analog Devices ADV7180 Video Decoder support.
+
 endmenu
diff --git a/drivers/staging/media/imx/capture/Makefile 
b/drivers/staging/media/imx/capture/Makefile
index 07633be..c8f891a 100644
--- a/drivers/staging/media/imx/capture/Makefile
+++ b/drivers/staging/media/imx/capture/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_MIPI_CSI2) += mipi-csi2.o
 obj-$(CONFIG_IMX_VIDEO_SWITCH) += imx-video-switch.o
 obj-$(CONFIG_IMX_CAMERA_OV5640_MIPI) += ov5640-mipi.o
 obj-$(CONFIG_IMX_CAMERA_OV5642) += ov5642.o
+obj-$(CONFIG_IMX_CAMERA_ADV7180) += adv7180.o
diff --git a/drivers/staging/media/imx/capture/adv7180.c 
b/drivers/staging/media/imx/capture/adv7180.c
new file mode 100644
index 000..297c543
--- /dev/null
+++ b/drivers/staging/media/imx/capture/adv7180.c
@@ -0,0 +1,1533 @@
+/*
+ * Analog Device ADV7180 video decoder driver
+ *
+ * Copyright (c) 2012-2014 Mentor Graphics Inc.
+ * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct adv7180_dev {
+   struct i2c_client *i2c_client;
+   struct device *dev;
+   struct v4l2_subdev sd;
+   struct v4l2_of_endpoint ep; /* the parsed DT endpoint info */
+   struct v4l2_ctrl_handler ctrl_hdl;
+   struct v4l2_mbus_framefmt fmt;
+   struct v4l2_captureparm streamcap;
+   int rev_id;
+   bool on;
+
+   bool locked; /* locked to signal */
+
+   struct regulator *dvddio;
+   struct regulator *dvdd;
+   struct regulator *avdd;
+   struct regulator *pvdd;
+   int pwdn_gpio;
+
+   v4l2_std_id std_id;
+
+   /* Standard index of ADV7180. */
+   int video_idx;
+
+   /* Current analog input mux */
+   int current_input;
+
+   struct mutex mutex;
+};
+
+static inline struct adv7180_dev *to_adv7180_dev(struct v4l2_subdev *sd)
+{
+   return container_of(sd, struct adv7180_dev, sd);
+}
+
+static inline struct adv7180_dev *ctrl_to_adv7180_dev(struct v4l2_ctrl *ctrl)
+{
+   return container_of(ctrl->handler, struct adv7180_dev, ctrl_hdl);
+}
+
+/*! List of input video formats supported. The video formats is corresponding
+ * with v4l2 id in video_fmt_t
+ */
+enum {
+   ADV7180_NTSC = 0,   /*!< Locked on (M) NTSC video signal. */
+   ADV7180_PAL,/*!< (B, G, H, I, N)PAL video signal. */
+};
+
+/*! Number of video standards supported (including 'not locked' signal). */
+#define ADV7180_STD_MAX(ADV7180_PAL + 1)
+
+/* video standard info */
+struct adv7180_std_info {
+   unsigned long width;
+   unsigned long height;
+   struct v4l2_standard std;
+};
+
+static struct adv7180_std_info adv7180_std[] = {
+   [ADV7180_NTSC] = {
+   .width = 720,
+   .height = 480,
+   .std = {
+   .id = V4L2_STD_NTSC,
+   .name = "NTSC",
+   .framelines = 525,
+   .frameperiod = {
+   .numerator = 1001,
+   .denominator = 3,
+   },
+   },
+   },
+   [ADV7180_PAL] = {
+   .width = 720,
+   

[PATCH 30/38] media: imx: Add MIPI CSI-2 Receiver driver

[Steve Longerbeam]

Adds MIPI CSI-2 Receiver subdev driver. This subdev is required
for sensors with a MIPI CSI2 interface.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/staging/media/imx/capture/Kconfig |   8 +
 drivers/staging/media/imx/capture/Makefile|   1 +
 drivers/staging/media/imx/capture/mipi-csi2.c | 373 ++
 3 files changed, 382 insertions(+)
 create mode 100644 drivers/staging/media/imx/capture/mipi-csi2.c

diff --git a/drivers/staging/media/imx/capture/Kconfig 
b/drivers/staging/media/imx/capture/Kconfig
index ee2cbab..ac6fce0 100644
--- a/drivers/staging/media/imx/capture/Kconfig
+++ b/drivers/staging/media/imx/capture/Kconfig
@@ -1,3 +1,11 @@
 menu "i.MX5/6 Camera Sub devices"
 
+config IMX_MIPI_CSI2
+   tristate "MIPI CSI2 Receiver Driver"
+   depends on VIDEO_IMX_CAMERA
+   default y
+   ---help---
+ MIPI CSI-2 Receiver driver support. This driver is required
+for sensor drivers with a MIPI CSI2 interface.
+
 endmenu
diff --git a/drivers/staging/media/imx/capture/Makefile 
b/drivers/staging/media/imx/capture/Makefile
index 5c965f9..8961a4f 100644
--- a/drivers/staging/media/imx/capture/Makefile
+++ b/drivers/staging/media/imx/capture/Makefile
@@ -3,3 +3,4 @@ imx-camera-objs := imx-camif.o imx-ic-prpenc.o imx-of.o \
 
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-camera.o
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-csi.o
+obj-$(CONFIG_IMX_MIPI_CSI2) += mipi-csi2.o
diff --git a/drivers/staging/media/imx/capture/mipi-csi2.c 
b/drivers/staging/media/imx/capture/mipi-csi2.c
new file mode 100644
index 000..d0a8c10
--- /dev/null
+++ b/drivers/staging/media/imx/capture/mipi-csi2.c
@@ -0,0 +1,373 @@
+/*
+ * MIPI CSI-2 Receiver Subdev for Freescale i.MX5/6 SOC.
+ *
+ * Copyright (c) 2012-2014 Mentor Graphics Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct imxcsi2_dev {
+   struct device  *dev;
+   struct v4l2_subdev  sd;
+   struct clk *dphy_clk;
+   struct clk *cfg_clk;
+   struct clk *pix_clk; /* what is this? */
+   void __iomem   *base;
+   int intr1;
+   int intr2;
+   struct v4l2_of_bus_mipi_csi2 bus;
+   spinlock_t  lock;
+   boolon;
+};
+
+#define DEVICE_NAME "imx-mipi-csi2"
+
+/* Register offsets */
+#define CSI2_VERSION0x000
+#define CSI2_N_LANES0x004
+#define CSI2_PHY_SHUTDOWNZ  0x008
+#define CSI2_DPHY_RSTZ  0x00c
+#define CSI2_RESETN 0x010
+#define CSI2_PHY_STATE  0x014
+#define CSI2_DATA_IDS_1 0x018
+#define CSI2_DATA_IDS_2 0x01c
+#define CSI2_ERR1   0x020
+#define CSI2_ERR2   0x024
+#define CSI2_MSK1   0x028
+#define CSI2_MSK2   0x02c
+#define CSI2_PHY_TST_CTRL0  0x030
+#define CSI2_PHY_TST_CTRL1  0x034
+#define CSI2_SFT_RESET  0xf00
+
+static inline struct imxcsi2_dev *sd_to_dev(struct v4l2_subdev *sdev)
+{
+   return container_of(sdev, struct imxcsi2_dev, sd);
+}
+
+static inline u32 imxcsi2_read(struct imxcsi2_dev *csi2, unsigned int regoff)
+{
+   return readl(csi2->base + regoff);
+}
+
+static inline void imxcsi2_write(struct imxcsi2_dev *csi2, u32 val,
+unsigned int regoff)
+{
+   writel(val, csi2->base + regoff);
+}
+
+static void imxcsi2_set_lanes(struct imxcsi2_dev *csi2)
+{
+   int lanes = csi2->bus.num_data_lanes;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+
+   imxcsi2_write(csi2, lanes - 1, CSI2_N_LANES);
+
+   spin_unlock_irqrestore(>lock, flags);
+}
+
+static void __imxcsi2_enable(struct imxcsi2_dev *csi2, bool enable)
+{
+   if (enable) {
+   imxcsi2_write(csi2, 0x, CSI2_PHY_SHUTDOWNZ);
+   imxcsi2_write(csi2, 0x, CSI2_DPHY_RSTZ);
+   imxcsi2_write(csi2, 0x, CSI2_RESETN);
+   } else {
+   imxcsi2_write(csi2, 0x0, CSI2_PHY_SHUTDOWNZ);
+   imxcsi2_write(csi2, 0x0, CSI2_DPHY_RSTZ);
+   imxcsi2_write(csi2, 0x0, CSI2_RESETN);
+   }
+}
+
+static void imxcsi2_enable(struct imxcsi2_dev *csi2, bool enable)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   __imxcsi2_enable(csi2, enable);
+   spin_unlock_irqrestore(>lock, flags);
+}
+
+static void imxcsi2_reset

[PATCH 05/38] gpu: ipu-v3: Add IDMA channel linking support

[Steve Longerbeam]

Adds functions to link and unlink IDMAC source channels to sink
channels.

So far the following links are supported:

IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC
PUV3_CHANNEL_IC_PRP_VF_MEM   -> IPUV3_CHANNEL_MEM_ROT_VF
IPUV3_CHANNEL_IC_PP_MEM  -> IPUV3_CHANNEL_MEM_ROT_PP

More links can be added to the idmac_link_info[] array.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 112 
 include/video/imx-ipu-v3.h  |   3 ++
 2 files changed, 115 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 49af121..6d1676e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -730,6 +730,118 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, 
bool vdi)
 }
 EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
 
+
+/* IDMAC Channel Linking */
+
+struct idmac_link_reg_info {
+   int chno;
+   u32 reg;
+   int shift;
+   int bits;
+   u32 sel;
+};
+
+struct idmac_link_info {
+   struct idmac_link_reg_info src;
+   struct idmac_link_reg_info sink;
+};
+
+static const struct idmac_link_info idmac_link_info[] = {
+   {
+   .src  = { 20, IPU_FS_PROC_FLOW1,  0, 4, 7 },
+   .sink = { 45, IPU_FS_PROC_FLOW2,  0, 4, 1 },
+   }, {
+   .src =  { 21, IPU_FS_PROC_FLOW1,  8, 4, 8 },
+   .sink = { 46, IPU_FS_PROC_FLOW2,  4, 4, 1 },
+   }, {
+   .src =  { 22, IPU_FS_PROC_FLOW1, 16, 4, 5 },
+   .sink = { 47, IPU_FS_PROC_FLOW2, 12, 4, 3 },
+   },
+};
+
+static const struct idmac_link_info *find_idmac_link_info(
+   struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(idmac_link_info); i++) {
+   if (src->num == idmac_link_info[i].src.chno &&
+   sink->num == idmac_link_info[i].sink.chno)
+   return _link_info[i];
+   }
+
+   return NULL;
+}
+
+/*
+ * Links an IDMAC source channel to a sink channel.
+ */
+int ipu_idmac_link(struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   struct ipu_soc *ipu = src->ipu;
+   const struct idmac_link_info *link;
+   u32 src_reg, sink_reg, src_mask, sink_mask;
+   unsigned long flags;
+
+   link = find_idmac_link_info(src, sink);
+   if (!link)
+   return -EINVAL;
+
+   src_mask = ((1 << link->src.bits) - 1) << link->src.shift;
+   sink_mask = ((1 << link->sink.bits) - 1) << link->sink.shift;
+
+   spin_lock_irqsave(>lock, flags);
+
+   src_reg = ipu_cm_read(ipu, link->src.reg);
+   sink_reg = ipu_cm_read(ipu, link->sink.reg);
+
+   src_reg &= ~src_mask;
+   src_reg |= (link->src.sel << link->src.shift);
+
+   sink_reg &= ~sink_mask;
+   sink_reg |= (link->sink.sel << link->sink.shift);
+
+   ipu_cm_write(ipu, src_reg, link->src.reg);
+   ipu_cm_write(ipu, sink_reg, link->sink.reg);
+
+   spin_unlock_irqrestore(>lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_link);
+
+/*
+ * Unlinks IDMAC source and sink channels.
+ */
+int ipu_idmac_unlink(struct ipuv3_channel *src, struct ipuv3_channel *sink)
+{
+   struct ipu_soc *ipu = src->ipu;
+   const struct idmac_link_info *link;
+   u32 src_reg, sink_reg, src_mask, sink_mask;
+   unsigned long flags;
+
+   link = find_idmac_link_info(src, sink);
+   if (!link)
+   return -EINVAL;
+
+   src_mask = ((1 << link->src.bits) - 1) << link->src.shift;
+   sink_mask = ((1 << link->sink.bits) - 1) << link->sink.shift;
+
+   spin_lock_irqsave(>lock, flags);
+
+   src_reg = ipu_cm_read(ipu, link->src.reg);
+   sink_reg = ipu_cm_read(ipu, link->sink.reg);
+
+   src_reg &= ~src_mask;
+   sink_reg &= ~sink_mask;
+
+   ipu_cm_write(ipu, src_reg, link->src.reg);
+   ipu_cm_write(ipu, sink_reg, link->sink.reg);
+
+   spin_unlock_irqrestore(>lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_unlink);
+
 struct ipu_devtype {
const char *name;
unsigned long cm_ofs;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index b174f8a..0a39c64 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -128,6 +128,7 @@ enum ipu_channel_irq {
 #define IPUV3_CHANNEL_ROT_VF_MEM   49
 #define IPUV3_CHANNEL_ROT_PP_MEM   50
 #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA51
+#define IPUV3_NUM_CHANNELS 64
 
 int ipu_map_irq(struct ipu_soc *ipu, int irq);
 int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
@@ -171,6 +172,8 @@ int ipu_idmac_get_current_buffer(stru

[PATCH 23/38] ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture

[Steve Longerbeam]

Add pinctrl groups for both GPT input capture channels.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 
b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 81e3ab7..21af432 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -462,6 +462,18 @@
>;
};
 
+   pinctrl_gpt_input_capture0: gptinputcapture0grp {
+   fsl,pins = <
+   MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1   
0x8000
+   >;
+   };
+
+   pinctrl_gpt_input_capture1: gptinputcapture1grp {
+   fsl,pins = <
+   MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2   
0x8000
+   >;
+   };
+
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
-- 
1.9.1

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[PATCH 32/38] media: imx: Add support for MIPI CSI-2 OV5640

[Steve Longerbeam]

This driver is based on ov5640_mipi.c from Freescale imx_3.10.17_1.0.0_beta
branch, modified heavily for code cleanup and converted from int-device
to subdev.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/staging/media/imx/capture/Kconfig   |8 +
 drivers/staging/media/imx/capture/Makefile  |1 +
 drivers/staging/media/imx/capture/ov5640-mipi.c | 2318 +++
 3 files changed, 2327 insertions(+)
 create mode 100644 drivers/staging/media/imx/capture/ov5640-mipi.c

diff --git a/drivers/staging/media/imx/capture/Kconfig 
b/drivers/staging/media/imx/capture/Kconfig
index ecd09abe..d4389d1 100644
--- a/drivers/staging/media/imx/capture/Kconfig
+++ b/drivers/staging/media/imx/capture/Kconfig
@@ -17,4 +17,12 @@ config IMX_VIDEO_SWITCH
  multiplexer controlled by register bitfields as well as
  external multiplexers controller by a GPIO.
 
+config IMX_CAMERA_OV5640_MIPI
+   tristate "OmniVision OV5640 MIPI CSI-2 camera support"
+   depends on VIDEO_IMX_CAMERA
+   select IMX_MIPI_CSI2
+   default y
+   ---help---
+ MIPI CSI-2 OV5640 Camera support.
+
 endmenu
diff --git a/drivers/staging/media/imx/capture/Makefile 
b/drivers/staging/media/imx/capture/Makefile
index f17b199..1ad4fd2 100644
--- a/drivers/staging/media/imx/capture/Makefile
+++ b/drivers/staging/media/imx/capture/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-camera.o
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-csi.o
 obj-$(CONFIG_IMX_MIPI_CSI2) += mipi-csi2.o
 obj-$(CONFIG_IMX_VIDEO_SWITCH) += imx-video-switch.o
+obj-$(CONFIG_IMX_CAMERA_OV5640_MIPI) += ov5640-mipi.o
diff --git a/drivers/staging/media/imx/capture/ov5640-mipi.c 
b/drivers/staging/media/imx/capture/ov5640-mipi.c
new file mode 100644
index 000..3c02b3b
--- /dev/null
+++ b/drivers/staging/media/imx/capture/ov5640-mipi.c
@@ -0,0 +1,2318 @@
+/*
+ * Copyright (c) 2014 Mentor Graphics Inc.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define OV5640_VOLTAGE_ANALOG   280
+#define OV5640_VOLTAGE_DIGITAL_CORE 150
+#define OV5640_VOLTAGE_DIGITAL_IO   180
+
+#define MIN_FPS 15
+#define MAX_FPS 30
+#define DEFAULT_FPS 30
+
+/* min/typical/max system clock (xclk) frequencies */
+#define OV5640_XCLK_MIN  600
+#define OV5640_XCLK_TYP 2400
+#define OV5640_XCLK_MAX 5400
+
+/* min/typical/max pixel clock (mclk) frequencies */
+#define OV5640_MCLK_MIN 4800
+#define OV5640_MCLK_TYP 4800
+#define OV5640_MCLK_MAX 9600
+
+#define OV5640_CHIP_ID  0x300A
+
+#define OV5640_MAX_CONTROLS 64
+
+enum ov5640_mode {
+   ov5640_mode_MIN = 0,
+   ov5640_mode_QCIF_176_144 = 0,
+   ov5640_mode_QVGA_320_240,
+   ov5640_mode_VGA_640_480,
+   ov5640_mode_NTSC_720_480,
+   ov5640_mode_PAL_720_576,
+   ov5640_mode_XGA_1024_768,
+   ov5640_mode_720P_1280_720,
+   ov5640_mode_1080P_1920_1080,
+   ov5640_mode_QSXGA_2592_1944,
+   ov5640_num_modes,
+   ov5640_mode_INIT = 0xff, /*only for sensor init*/
+};
+
+enum ov5640_frame_rate {
+   ov5640_15_fps,
+   ov5640_30_fps
+};
+
+static int ov5640_framerates[] = {
+   [ov5640_15_fps] = 15,
+   [ov5640_30_fps] = 30,
+};
+#define ov5640_num_framerates ARRAY_SIZE(ov5640_framerates)
+
+/* image size under 1280 * 960 are SUBSAMPLING
+ * image size upper 1280 * 960 are SCALING
+ */
+enum ov5640_downsize_mode {
+   SUBSAMPLING,
+   SCALING,
+};
+
+struct reg_value {
+   u16 reg_addr;
+   u8 val;
+   u8 mask;
+   u32 delay_ms;
+};
+
+struct ov5640_mode_info {
+   enum ov5640_mode mode;
+   enum ov5640_downsize_mode dn_mode;
+   u32 width;
+   u32 height;
+   struct reg_value *init_data_ptr;
+   u32 init_data_size;
+};
+
+struct ov5640_dev {
+   struct i2c_client *i2c_client;
+   struct device *dev;
+   struct v4l2_subdev sd;
+   struct v4l2_ctrl_handler ctrl_hdl;
+   struct v4l2_of_endpoint ep; /* the parsed DT endpoint info */
+   struct v4l2_mbus_framefmt fmt;
+   struct v4l2_captureparm streamcap;
+   struct clk *xclk; /* system clock to OV5640 */
+   int xclk_freq;/* requested xclk freq from devicetree */
+
+   enum ov5640_mode current_mode;
+   enum ov5640_frame_rate current_fr;
+
+   bool on;
+   bool awb_on;
+   bool agc_on;
+
+   /* cached control settings */
+   int ctrl_cache[OV5640_MAX_CONTROLS

[PATCH 26/38] gpio: pca953x: Add reset-gpios property

[Steve Longerbeam]

Add optional reset-gpios property. If present, de-assert the
specified reset gpio pin to bring the chip out of reset.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpio/gpio-pca953x.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 5e3be32..475fa56 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define PCA953X_INPUT  0
 #define PCA953X_OUTPUT 1
@@ -111,6 +112,11 @@ struct pca953x_chip {
const char *const *names;
int chip_type;
unsigned long driver_data;
+
+#ifdef CONFIG_OF_GPIO
+   enum of_gpio_flags reset_gpio_flags;
+   int reset_gpio;
+#endif
 };
 
 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
@@ -759,6 +765,28 @@ static int pca953x_probe(struct i2c_client *client,
} else {
chip->gpio_start = -1;
irq_base = 0;
+
+#ifdef CONFIG_OF_GPIO
+   /* see if we need to de-assert a reset pin */
+   ret = of_get_named_gpio_flags(client->dev.of_node,
+ "reset-gpios", 0,
+ >reset_gpio_flags);
+   if (gpio_is_valid(ret)) {
+   chip->reset_gpio = ret;
+   ret = devm_gpio_request_one(>dev,
+   chip->reset_gpio,
+   GPIOF_DIR_OUT,
+   "pca953x_reset");
+   if (ret == 0) {
+   /* bring chip out of reset */
+   dev_info(>dev, "releasing reset\n");
+   gpio_set_value(chip->reset_gpio,
+  (chip->reset_gpio_flags ==
+   OF_GPIO_ACTIVE_LOW) ? 1 : 0);
+   }
+   } else if (ret == -EPROBE_DEFER)
+   return ret;
+#endif
}
 
chip->client = client;
-- 
1.9.1

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[PATCH 27/38] clocksource/drivers/imx: add input capture support

[Steve Longerbeam]

This patch adds support for the input capture function in the
i.MX GPT. Output compare and input capture functions are mixed
in the same register block, so we need to modify the irq ack/enable/
disable primitives to not stomp on the other function.

The input capture API is modelled after request/free irq:

typedef void (*mxc_icap_handler_t)(int, void *, struct timespec *);

int mxc_request_input_capture(unsigned int chan,
  mxc_icap_handler_t handler,
  unsigned long capflags, void *dev_id);

- chan: the channel number being requested (0 or 1).

- handler: a callback when there is an input capture event. The
  handler is given the channel number, the dev_id, and a timespec
  marking the input capture event. The timespec is always reset at
  request time, that is, the first event after request will always
  have a timespec of 0, and will increase thereafter.

- capflags: IRQF_TRIGGER_RISING and/or IRQF_TRIGGER_FALLING. If
  both are specified, events will be triggered on both rising and
  falling edges of the input capture signal.

- dev_id: a context pointer given back to the handler.

void mxc_free_input_capture(unsigned int chan, void *dev_id);

This disables the given input capture channel in the GPT.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/clocksource/timer-imx-gpt.c | 463 
 include/linux/mxc_icap.h|  20 ++
 2 files changed, 437 insertions(+), 46 deletions(-)
 create mode 100644 include/linux/mxc_icap.h

diff --git a/drivers/clocksource/timer-imx-gpt.c 
b/drivers/clocksource/timer-imx-gpt.c
index 99ec967..1f7f871 100644
--- a/drivers/clocksource/timer-imx-gpt.c
+++ b/drivers/clocksource/timer-imx-gpt.c
@@ -21,6 +21,7 @@
  * MA 02110-1301, USA.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -32,6 +33,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 /*
@@ -65,16 +68,53 @@
 #define V2_TCTL_CLK_PER(2 << 6)
 #define V2_TCTL_CLK_OSC_DIV8   (5 << 6)
 #define V2_TCTL_FRR(1 << 9)
+#define V2_TCTL_IM1_BIT16
+#define V2_TCTL_IM2_BIT18
+#define V2_IM_DISABLE  0
+#define V2_IM_RISING   1
+#define V2_IM_FALLING  2
+#define V2_IM_BOTH 3
 #define V2_TCTL_24MEN  (1 << 10)
 #define V2_TPRER_PRE24M12
 #define V2_IR  0x0c
+#define V2_IR_OF1  (1 << 0)
+#define V2_IR_IF1  (1 << 3)
+#define V2_IR_IF2  (1 << 4)
 #define V2_TSTAT   0x08
 #define V2_TSTAT_OF1   (1 << 0)
+#define V2_TSTAT_IF1   (1 << 3)
+#define V2_TSTAT_IF2   (1 << 4)
 #define V2_TCN 0x24
 #define V2_TCMP0x10
+#define V2_TCAP1   0x1c
+#define V2_TCAP2   0x20
 
 #define V2_TIMER_RATE_OSC_DIV8 300
 
+struct imx_timer;
+
+struct icap_channel {
+   struct imx_timer *imxtm;
+
+   int chan;
+
+   u32 cnt_reg;
+   u32 irqen_bit;
+   u32 status_bit;
+   u32 mode_bit;
+
+   mxc_icap_handler_t handler;
+   void *dev_id;
+
+   struct timespec ts;
+   cycles_t last_cycles;
+   bool first_event;
+};
+
+/* FIXME, for now can't find icap unless it's statically allocated */
+static struct icap_channel icap_channel[2];
+static DEFINE_SPINLOCK(icap_lock);
+
 struct imx_timer {
enum imx_gpt_type type;
void __iomem *base;
@@ -90,12 +130,20 @@ struct imx_gpt_data {
int reg_tstat;
int reg_tcn;
int reg_tcmp;
-   void (*gpt_setup_tctl)(struct imx_timer *imxtm);
-   void (*gpt_irq_enable)(struct imx_timer *imxtm);
-   void (*gpt_irq_disable)(struct imx_timer *imxtm);
-   void (*gpt_irq_acknowledge)(struct imx_timer *imxtm);
+   void (*gpt_oc_setup_tctl)(struct imx_timer *imxtm);
+   void (*gpt_oc_irq_enable)(struct imx_timer *imxtm);
+   void (*gpt_oc_irq_disable)(struct imx_timer *imxtm);
+   void (*gpt_oc_irq_acknowledge)(struct imx_timer *imxtm);
+   bool (*gpt_is_oc_irq)(unsigned int tstat);
int (*set_next_event)(unsigned long evt,
  struct clock_event_device *ced);
+
+   void (*gpt_ic_irq_enable)(struct icap_channel *ic);
+   void (*gpt_ic_irq_disable)(struct icap_channel *ic);
+   void (*gpt_ic_irq_acknowledge)(struct icap_channel *ic);
+   bool (*gpt_is_ic_irq)(unsigned int tstat);
+   void (*gpt_ic_enable)(struct icap_channel *ic, unsigned int mode);
+   void (*gpt_ic_disable)(struct icap_channel *ic);
 };
 
 static inline struct imx_timer *to_imx_timer(struct clock_event_device *ced)
@@ -103,52 +151,144 @@ static inline struct imx_timer *to_imx_timer(struct 
clock_event_device *ced)
return container_of(ced, struct imx_timer, ced);
 }
 
-stat

[PATCH 15/38] gpu: ipu-ic: allow multiple handles to ic

[Steve Longerbeam]

The image converter kernel API supports conversion contexts and
job queues, so we should allow more than one handle to the IC, so
that multiple users can add jobs to the queue.

Note however that users that control the IC manually (that do not
use the image converter APIs but setup the IC task by hand via calls
to ipu_ic_task_enable(), ipu_ic_enable(), etc.) must still be careful not
to share the IC handle with other threads. At this point, the only user
that still controls the IC manually is the i.mx capture driver. In that
case the capture driver only allows one open context to get a handle
to the IC at a time, so we should be ok there.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-ic.c | 25 +
 1 file changed, 1 insertion(+), 24 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
index f6a1125..51e34a1 100644
--- a/drivers/gpu/ipu-v3/ipu-ic.c
+++ b/drivers/gpu/ipu-v3/ipu-ic.c
@@ -342,7 +342,6 @@ struct ipu_ic {
enum ipu_color_space out_cs;
bool graphics;
bool rotation;
-   bool in_use;
 
struct image_converter cvt;
 
@@ -2380,38 +2379,16 @@ EXPORT_SYMBOL_GPL(ipu_ic_disable);
 struct ipu_ic *ipu_ic_get(struct ipu_soc *ipu, enum ipu_ic_task task)
 {
struct ipu_ic_priv *priv = ipu->ic_priv;
-   unsigned long flags;
-   struct ipu_ic *ic, *ret;
 
if (task >= IC_NUM_TASKS)
return ERR_PTR(-EINVAL);
 
-   ic = >task[task];
-
-   spin_lock_irqsave(>lock, flags);
-
-   if (ic->in_use) {
-   ret = ERR_PTR(-EBUSY);
-   goto unlock;
-   }
-
-   ic->in_use = true;
-   ret = ic;
-
-unlock:
-   spin_unlock_irqrestore(>lock, flags);
-   return ret;
+   return >task[task];
 }
 EXPORT_SYMBOL_GPL(ipu_ic_get);
 
 void ipu_ic_put(struct ipu_ic *ic)
 {
-   struct ipu_ic_priv *priv = ic->priv;
-   unsigned long flags;
-
-   spin_lock_irqsave(>lock, flags);
-   ic->in_use = false;
-   spin_unlock_irqrestore(>lock, flags);
 }
 EXPORT_SYMBOL_GPL(ipu_ic_put);
 
-- 
1.9.1

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[PATCH 08/38] gpu: ipu-v3: Add ipu_csi_set_src()

[Steve Longerbeam]

Adds ipu_csi_set_src() which is just a wrapper around
ipu_set_csi_src_mux().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-csi.c | 8 
 include/video/imx-ipu-v3.h   | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index 06631ac..336dc06 100644
--- a/drivers/gpu/ipu-v3/ipu-csi.c
+++ b/drivers/gpu/ipu-v3/ipu-csi.c
@@ -609,6 +609,14 @@ int ipu_csi_set_skip_smfc(struct ipu_csi *csi, u32 skip,
 }
 EXPORT_SYMBOL_GPL(ipu_csi_set_skip_smfc);
 
+int ipu_csi_set_src(struct ipu_csi *csi, u32 vc, bool select_mipi_csi2)
+{
+   ipu_set_csi_src_mux(csi->ipu, csi->id, select_mipi_csi2);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_csi_set_src);
+
 int ipu_csi_set_dest(struct ipu_csi *csi, enum ipu_csi_dest csi_dest)
 {
unsigned long flags;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 2302fc5..57b487d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -301,6 +301,7 @@ int ipu_csi_set_mipi_datatype(struct ipu_csi *csi, u32 vc,
  struct v4l2_mbus_framefmt *mbus_fmt);
 int ipu_csi_set_skip_smfc(struct ipu_csi *csi, u32 skip,
  u32 max_ratio, u32 id);
+int ipu_csi_set_src(struct ipu_csi *csi, u32 vc, bool select_mipi_csi2);
 int ipu_csi_set_dest(struct ipu_csi *csi, enum ipu_csi_dest csi_dest);
 int ipu_csi_enable(struct ipu_csi *csi);
 int ipu_csi_disable(struct ipu_csi *csi);
-- 
1.9.1

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[PATCH 18/38] ARM: dts: imx6qdl: Add mipi_ipu1/2 video muxes, mipi_csi, and their connections

[Steve Longerbeam]

From: Philipp Zabel <p.za...@pengutronix.de>

This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6.

On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2 CSI1
allow to select between CSI0/1 parallel input pads and the MIPI CSI-2 virtual
channels 0/3.

On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1 CSI1
allow to select between CSI0/1 parallel input pads and any of the four MIPI
CSI-2 virtual channels.

Signed-off-by: Philipp Zabel <p.za...@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 arch/arm/boot/dts/imx6dl.dtsi  | 183 +
 arch/arm/boot/dts/imx6q.dtsi   | 120 +++
 arch/arm/boot/dts/imx6qdl.dtsi |   6 ++
 3 files changed, 309 insertions(+)

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 9a4c22c..8813df3 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -109,6 +109,118 @@
compatible = "fsl,imx-gpu-subsystem";
cores = <_2d>, <_3d>;
};
+
+   ipu1_csi0_mux: videomux@0 {
+   compatible = "imx-video-mux";
+   reg = <0x34 0x07>;
+   gpr = <>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   port@0 {
+   reg = <0>;
+
+   ipu1_csi0_mux_from_mipi_vc0: endpoint {
+   remote-endpoint = <_vc0_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   ipu1_csi0_mux_from_mipi_vc1: endpoint {
+   remote-endpoint = <_vc1_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   ipu1_csi0_mux_from_mipi_vc2: endpoint {
+   remote-endpoint = <_vc2_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+
+   ipu1_csi0_mux_from_mipi_vc3: endpoint {
+   remote-endpoint = <_vc3_to_ipu1_csi0_mux>;
+   };
+   };
+
+   port@4 {
+   reg = <4>;
+
+   ipu1_csi0_mux_from_parallel_sensor: endpoint {
+   };
+   };
+
+   port@5 {
+   reg = <5>;
+
+   ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+   remote-endpoint = 
<_csi0_from_ipu1_csi0_mux>;
+   };
+   };
+   };
+
+   ipu1_csi1_mux: videomux@1 {
+   compatible = "imx-video-mux";
+   reg = <0x34 0x38>;
+   gpr = <>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   port@0 {
+   reg = <0>;
+
+   ipu1_csi1_mux_from_mipi_vc0: endpoint {
+   remote-endpoint = <_vc0_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+
+   ipu1_csi1_mux_from_mipi_vc1: endpoint {
+   remote-endpoint = <_vc1_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+
+   ipu1_csi1_mux_from_mipi_vc2: endpoint {
+   remote-endpoint = <_vc2_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+
+   ipu1_csi1_mux_from_mipi_vc3: endpoint {
+   remote-endpoint = <_vc3_to_ipu1_csi1_mux>;
+   };
+   };
+
+   port@4 {
+   reg = <4>;
+
+   ipu1_csi1_mux_from_parallel_sensor: endpoint {
+   };
+   };
+
+   port@5 {
+   reg = <5>;
+
+   ipu1_csi1_mux_to_ipu1_csi1: endpoint {
+   remote-endpoint = 
<_csi1_from_ipu1_csi1_mux>;
+   };
+   };
+   };
 };
 
  {
@@ -131,3 +243,74 @@
  {
compatible = "fsl,imx6dl-vpu", "cnm,coda960";
 };
+
+_csi1 {
+   ipu1_csi1_from_ipu1_csi1_mux: endpoint {
+  

[PATCH 31/38] media: imx: Add video switch

[Steve Longerbeam]

From: Philipp Zabel <p.za...@pengutronix.de>

This driver can handle SoC internal and extern video bus multiplexers,
controlled either by register bit fields or by GPIO.

Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
Signed-off-by: Philipp Zabel <p.za...@pengutronix.de>
Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/staging/media/imx/capture/Kconfig  |   9 +
 drivers/staging/media/imx/capture/Makefile |   1 +
 .../staging/media/imx/capture/imx-video-switch.c   | 348 +
 3 files changed, 358 insertions(+)
 create mode 100644 drivers/staging/media/imx/capture/imx-video-switch.c

diff --git a/drivers/staging/media/imx/capture/Kconfig 
b/drivers/staging/media/imx/capture/Kconfig
index ac6fce0..ecd09abe 100644
--- a/drivers/staging/media/imx/capture/Kconfig
+++ b/drivers/staging/media/imx/capture/Kconfig
@@ -8,4 +8,13 @@ config IMX_MIPI_CSI2
  MIPI CSI-2 Receiver driver support. This driver is required
 for sensor drivers with a MIPI CSI2 interface.
 
+config IMX_VIDEO_SWITCH
+   tristate "i.MX5/6 Video Bus Multiplexer"
+   depends on VIDEO_IMX_CAMERA
+   default y
+   ---help---
+ This driver provides support for the i.MX5/6 internal video bus
+ multiplexer controlled by register bitfields as well as
+ external multiplexers controller by a GPIO.
+
 endmenu
diff --git a/drivers/staging/media/imx/capture/Makefile 
b/drivers/staging/media/imx/capture/Makefile
index 8961a4f..f17b199 100644
--- a/drivers/staging/media/imx/capture/Makefile
+++ b/drivers/staging/media/imx/capture/Makefile
@@ -4,3 +4,4 @@ imx-camera-objs := imx-camif.o imx-ic-prpenc.o imx-of.o \
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-camera.o
 obj-$(CONFIG_VIDEO_IMX_CAMERA) += imx-csi.o
 obj-$(CONFIG_IMX_MIPI_CSI2) += mipi-csi2.o
+obj-$(CONFIG_IMX_VIDEO_SWITCH) += imx-video-switch.o
diff --git a/drivers/staging/media/imx/capture/imx-video-switch.c 
b/drivers/staging/media/imx/capture/imx-video-switch.c
new file mode 100644
index 000..0c86679
--- /dev/null
+++ b/drivers/staging/media/imx/capture/imx-video-switch.c
@@ -0,0 +1,348 @@
+/*
+ * devicetree probed mediacontrol video multiplexer.
+ *
+ * Copyright (C) 2013 Sascha Hauer, Pengutronix
+ * Copyright (c) 2014-2016 Mentor Graphics Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct vidsw {
+   struct device *dev;
+   struct v4l2_subdev subdev;
+#ifdef CONFIG_MEDIA_CONTROLLER
+   struct media_pad *pads;
+#endif
+   struct v4l2_mbus_framefmt *format_mbus;
+   struct v4l2_of_endpoint *endpoint;
+   struct regmap_field *field;
+   unsigned int gpio;
+   int output_pad;
+   int numpads;
+   int active;
+};
+
+#define to_vidsw(sd) container_of(sd, struct vidsw, subdev)
+
+static int vidsw_set_mux(struct vidsw *vidsw, int input_index)
+{
+   if (vidsw->active >= 0) {
+   if (vidsw->active == input_index)
+   return 0;
+   else
+   return -EBUSY;
+   }
+
+   vidsw->active = input_index;
+
+   dev_dbg(vidsw->dev, "setting %d active\n", vidsw->active);
+
+   if (vidsw->field)
+   regmap_field_write(vidsw->field, vidsw->active);
+   else if (gpio_is_valid(vidsw->gpio))
+   gpio_set_value(vidsw->gpio, vidsw->active);
+
+   return 0;
+}
+
+#ifdef CONFIG_MEDIA_CONTROLLER
+static int vidsw_link_setup(struct media_entity *entity,
+   const struct media_pad *local,
+   const struct media_pad *remote, u32 flags)
+{
+   struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
+   struct vidsw *vidsw = to_vidsw(sd);
+
+   dev_dbg(vidsw->dev, "link setup %s -> %s", remote->entity->name,
+   local->entity->name);
+
+   if (!(flags & MEDIA_LNK_FL_ENABLED)) {
+   if (local->index == vidsw->active) {
+   dev_dbg(vidsw->dev, "going inactive\n");
+   vidsw->active = -1;
+   }
+   return 0;
+   }
+
+   return vidsw_set_mux(vidsw, local->index);
+}
+
+static struct media_entity_operations vidsw_ops = {
+   .link_setup = vidsw_link_setup,
+};
+#endif
+
+static int vidsw_s_routi

[PATCH 00/38] i.MX5/6 Video Capture

[Steve Longerbeam]

Tested on imx6q SabreAuto with ADV7180, and imx6q SabreSD with
mipi-csi2 OV5640. There is device-tree support also for imx6qdl
SabreLite, but that is not tested. Also, this driver should
theoretically work on i.MX5 targets, but that is also untested.

Not run through v4l2-compliance yet, but that is in my queue.


Philipp Zabel (2):
  ARM: dts: imx6qdl: Add mipi_ipu1/2 video muxes, mipi_csi, and their
connections
  media: imx: Add video switch

Steve Longerbeam (35):
  gpu: ipu-v3: Add Video Deinterlacer unit
  gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()
  gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()
  gpu: ipu-v3: Add ipu_get_num()
  gpu: ipu-v3: Add IDMA channel linking support
  gpu: ipu-v3: Add ipu_set_vdi_src_mux()
  gpu: ipu-v3: Add VDI input IDMAC channels
  gpu: ipu-v3: Add ipu_csi_set_src()
  gpu: ipu-v3: Add ipu_ic_set_src()
  gpu: ipu-v3: set correct full sensor frame for PAL/NTSC
  gpu: ipu-v3: Fix CSI data format for 16-bit media bus formats
  gpu: ipu-v3: Fix IRT usage
  gpu: ipu-ic: Add complete image conversion support with tiling
  gpu: ipu-ic: allow multiple handles to ic
  gpu: ipu-v3: rename CSI client device
  ARM: dts: imx6qdl: Flesh out MIPI CSI2 receiver node
  ARM: dts: imx6-sabrelite: add video capture ports and connections
  ARM: dts: imx6-sabresd: add video capture ports and connections
  ARM: dts: imx6-sabreauto: create i2cmux for i2c3
  ARM: dts: imx6-sabreauto: add reset-gpios property for max7310
  ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
  ARM: dts: imx6-sabreauto: add video capture ports and connections
  ARM: dts: imx6qdl: add mem2mem device for sabre* boards
  gpio: pca953x: Add reset-gpios property
  clocksource/drivers/imx: add input capture support
  v4l: Add signal lock status to source change events
  media: Add camera interface driver for i.MX5/6
  media: imx: Add MIPI CSI-2 Receiver driver
  media: imx: Add support for MIPI CSI-2 OV5640
  media: imx: Add support for Parallel OV5642
  media: imx: Add support for ADV7180 Video Decoder
  media: adv7180: add power pin control
  media: adv7180: implement g_parm
  media: Add i.MX5/6 mem2mem driver
  ARM: imx_v6_v7_defconfig: Enable staging video4linux drivers

Suresh Dhandapani (1):
  gpu: ipu-v3: Fix CSI0 blur in NTSC format

 Documentation/DocBook/media/v4l/vidioc-dqevent.xml |   12 +-
 Documentation/devicetree/bindings/media/imx.txt|  449 ++
 Documentation/video4linux/imx_camera.txt   |  243 ++
 arch/arm/boot/dts/imx6dl-sabresd.dts   |   44 +
 arch/arm/boot/dts/imx6dl.dtsi  |  183 +
 arch/arm/boot/dts/imx6q-sabreauto.dts  |7 +
 arch/arm/boot/dts/imx6q-sabrelite.dts  |6 +
 arch/arm/boot/dts/imx6q-sabresd.dts|   22 +
 arch/arm/boot/dts/imx6q.dtsi   |  120 +
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi   |  166 +-
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi   |   95 +
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi |  145 +-
 arch/arm/boot/dts/imx6qdl.dtsi |   13 +
 arch/arm/configs/imx_v6_v7_defconfig   |2 +
 drivers/clocksource/timer-imx-gpt.c|  463 ++-
 drivers/gpio/gpio-pca953x.c|   28 +
 drivers/gpu/ipu-v3/Makefile|2 +-
 drivers/gpu/ipu-v3/ipu-common.c|  155 +-
 drivers/gpu/ipu-v3/ipu-cpmem.c |   13 +
 drivers/gpu/ipu-v3/ipu-csi.c   |   36 +-
 drivers/gpu/ipu-v3/ipu-ic.c| 1769 +++-
 drivers/gpu/ipu-v3/ipu-prv.h   |7 +
 drivers/gpu/ipu-v3/ipu-vdi.c   |  266 ++
 drivers/media/i2c/adv7180.c|   73 +
 drivers/staging/media/Kconfig  |2 +
 drivers/staging/media/Makefile |1 +
 drivers/staging/media/imx/Kconfig  |   35 +
 drivers/staging/media/imx/Makefile |2 +
 drivers/staging/media/imx/capture/Kconfig  |   42 +
 drivers/staging/media/imx/capture/Makefile |   10 +
 drivers/staging/media/imx/capture/adv7180.c| 1533 +++
 drivers/staging/media/imx/capture/imx-camif.c  | 2496 +++
 drivers/staging/media/imx/capture/imx-camif.h  |  281 ++
 drivers/staging/media/imx/capture/imx-csi.c|  195 +
 drivers/staging/media/imx/capture/imx-ic-prpenc.c  |  660 +++
 drivers/staging/media/imx/capture/imx-of.c |  354 ++
 drivers/staging/media/imx/capture/imx-of.h |   18 +
 drivers/staging/media/imx/capture/imx-smfc.c   |  505 +++
 drivers/staging/media/imx/capture/imx-vdic.c   |  994 +
 .../staging/media/imx/capture/imx-video-switch.c   |  348 ++
 drivers/staging/media/imx/capture/mipi-csi2.c  |  373 ++
 drivers/staging/media/imx/capture/ov5640-mipi.c| 2318 +++
 drivers/staging/media/imx/capture/ov5642.c | 4333 
 drivers/staging

[PATCH 01/38] gpu: ipu-v3: Add Video Deinterlacer unit

[Steve Longerbeam]

Adds the Video Deinterlacer (VDIC) unit.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/Makefile |   2 +-
 drivers/gpu/ipu-v3/ipu-common.c |  11 ++
 drivers/gpu/ipu-v3/ipu-prv.h|   6 +
 drivers/gpu/ipu-v3/ipu-vdi.c| 266 
 include/video/imx-ipu-v3.h  |  27 
 5 files changed, 311 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/ipu-v3/ipu-vdi.c

diff --git a/drivers/gpu/ipu-v3/Makefile b/drivers/gpu/ipu-v3/Makefile
index 107ec23..aeba9dc 100644
--- a/drivers/gpu/ipu-v3/Makefile
+++ b/drivers/gpu/ipu-v3/Makefile
@@ -1,4 +1,4 @@
 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
 
 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
-   ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o
+   ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o ipu-vdi.o
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 99dcacf..30dc115 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -833,6 +833,14 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
goto err_ic;
}
 
+   ret = ipu_vdi_init(ipu, dev, ipu_base + devtype->vdi_ofs,
+  IPU_CONF_VDI_EN | IPU_CONF_ISP_EN |
+  IPU_CONF_IC_INPUT);
+   if (ret) {
+   unit = "vdi";
+   goto err_vdi;
+   }
+
ret = ipu_di_init(ipu, dev, 0, ipu_base + devtype->disp0_ofs,
  IPU_CONF_DI0_EN, ipu_clk);
if (ret) {
@@ -887,6 +895,8 @@ err_dc:
 err_di_1:
ipu_di_exit(ipu, 0);
 err_di_0:
+   ipu_vdi_exit(ipu);
+err_vdi:
ipu_ic_exit(ipu);
 err_ic:
ipu_csi_exit(ipu, 1);
@@ -971,6 +981,7 @@ static void ipu_submodules_exit(struct ipu_soc *ipu)
ipu_dc_exit(ipu);
ipu_di_exit(ipu, 1);
ipu_di_exit(ipu, 0);
+   ipu_vdi_exit(ipu);
ipu_ic_exit(ipu);
ipu_csi_exit(ipu, 1);
ipu_csi_exit(ipu, 0);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index bfb1e8a..845f64c 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -138,6 +138,7 @@ struct ipu_dc_priv;
 struct ipu_dmfc_priv;
 struct ipu_di;
 struct ipu_ic_priv;
+struct ipu_vdi;
 struct ipu_smfc_priv;
 
 struct ipu_devtype;
@@ -169,6 +170,7 @@ struct ipu_soc {
struct ipu_di   *di_priv[2];
struct ipu_csi  *csi_priv[2];
struct ipu_ic_priv  *ic_priv;
+   struct ipu_vdi  *vdi_priv;
struct ipu_smfc_priv*smfc_priv;
 };
 
@@ -199,6 +201,10 @@ int ipu_ic_init(struct ipu_soc *ipu, struct device *dev,
unsigned long base, unsigned long tpmem_base);
 void ipu_ic_exit(struct ipu_soc *ipu);
 
+int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev,
+unsigned long base, u32 module);
+void ipu_vdi_exit(struct ipu_soc *ipu);
+
 int ipu_di_init(struct ipu_soc *ipu, struct device *dev, int id,
unsigned long base, u32 module, struct clk *ipu_clk);
 void ipu_di_exit(struct ipu_soc *ipu, int id);
diff --git a/drivers/gpu/ipu-v3/ipu-vdi.c b/drivers/gpu/ipu-v3/ipu-vdi.c
new file mode 100644
index 000..1303bcc
--- /dev/null
+++ b/drivers/gpu/ipu-v3/ipu-vdi.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2012 Mentor Graphics Inc.
+ * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ipu-prv.h"
+
+struct ipu_vdi {
+   void __iomem *base;
+   u32 module;
+   spinlock_t lock;
+   int use_count;
+   struct ipu_soc *ipu;
+};
+
+
+/* VDI Register Offsets */
+#define VDI_FSIZE 0x
+#define VDI_C 0x0004
+
+/* VDI Register Fields */
+#define VDI_C_CH_420 (0 << 1)
+#define VDI_C_CH_422 (1 << 1)
+#define VDI_C_MOT_SEL_MASK   (0x3 << 2)
+#define VDI_C_MOT_SEL_FULL   (2 << 2)
+#define VDI_C_MOT_SEL_LOW(1 << 2)
+#define VDI_C_MOT_SEL_MED(0 << 2)
+#define VDI_C_BURST_SIZE1_4  (3 << 4)
+#define VDI_C_BURST_SIZE2_4  (3 << 8)
+#define VDI_C_BURST_SIZE3_4  (3 << 12)
+#define VDI_C_BURST_SIZE_MASK0xF
+#define VDI_C_BURST_SIZE1_OFFSET 4
+#define VDI_C_BURST_SIZE2_OFFSET 8
+#define VDI_C_BURST

[PATCH 02/38] gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()

[Steve Longerbeam]

Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-cpmem.c | 7 +++
 include/video/imx-ipu-v3.h | 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 6494a4d..a36c35e 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -253,6 +253,13 @@ void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int 
bufnum, dma_addr_t buf)
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_buffer);
 
+void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off)
+{
+   ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8);
+   ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset);
+
 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)
 {
ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 22662a1..904fd12 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -194,6 +194,7 @@ void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int 
xres, int yres);
 void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride);
 void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
 void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t 
buf);
+void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off);
 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
 void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
-- 
1.9.1

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[PATCH 04/38] gpu: ipu-v3: Add ipu_get_num()

[Steve Longerbeam]

Adds of-alias id to ipu_soc and retrieve with ipu_get_num().

Signed-off-by: Steve Longerbeam <steve_longerb...@mentor.com>
---
 drivers/gpu/ipu-v3/ipu-common.c | 8 
 drivers/gpu/ipu-v3/ipu-prv.h| 1 +
 include/video/imx-ipu-v3.h  | 1 +
 3 files changed, 10 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 30dc115..49af121 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -45,6 +45,12 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32 
value, unsigned offset)
writel(value, ipu->cm_reg + offset);
 }
 
+int ipu_get_num(struct ipu_soc *ipu)
+{
+   return ipu->id;
+}
+EXPORT_SYMBOL_GPL(ipu_get_num);
+
 void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
 {
u32 val;
@@ -1220,6 +1226,7 @@ static int ipu_probe(struct platform_device *pdev)
 {
const struct of_device_id *of_id =
of_match_device(imx_ipu_dt_ids, >dev);
+   struct device_node *np = pdev->dev.of_node;
struct ipu_soc *ipu;
struct resource *res;
unsigned long ipu_base;
@@ -1248,6 +1255,7 @@ static int ipu_probe(struct platform_device *pdev)
ipu->channel[i].ipu = ipu;
ipu->devtype = devtype;
ipu->ipu_type = devtype->type;
+   ipu->id = of_alias_get_id(np, "ipu");
 
spin_lock_init(>lock);
mutex_init(>channel_lock);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 845f64c..02057d8 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -153,6 +153,7 @@ struct ipu_soc {
void __iomem*cm_reg;
void __iomem*idmac_reg;
 
+   int id;
int usecount;
 
struct clk  *clk;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 60540ead..b174f8a 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -148,6 +148,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
 /*
  * IPU Common functions
  */
+int ipu_get_num(struct ipu_soc *ipu);
 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
 void ipu_dump(struct ipu_soc *ipu);
-- 
1.9.1

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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

On 06/10/2016 08:58 AM, Jack Mitchell wrote:
>
> 
>
>>
>> Hi all, I need a few more days. I would like to bring in the video-switch
>> subdev from Pengutronix, which will replace the platform data set_video_mux
>> method. Also re-org the device-tree to better define all the possible
>> hardware
>> connections, and split out mx6-encode.c into mx6-smfc and mx6-ic subdevs.
>> Once this is done we should have a better base for adding media control
>> later. I should have this done by end of this week.
>>
>> Steve
>>
>
> Hi Steve,
>
> Just a heads up that I've also tested and confirmed partially working support 
> on a sabrelite + mipi ov5640. The two gotchas I came across were 
> dma_allocations fail in the higher resolutions (4x1080p
> buffers), a limit may need to be upped somewhere, the code says it should be 
> able to handle up to 64MB? Secondly I can't get the 5MP resolution by default 
> as in ov5640_find_nearest_mode, the array
> ov5640_mode_info_data is hard coded to 0.

Hi Jack, the ov5640 native 5MP (2592x1944) mode is only available at 15 fps, but
the default framerate is 30. So to allow the 5MP mode, set to 15 fps beforehand
with a call to vidioc_s_parm.

>
> I gave your v2 branch a quick whirl also but it fails to compile.

Yes, the v2 branch is the WIP I mentioned above. Making good progress and
hope to have a patchset to post in a few days.


Steve

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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

On 06/02/2016 09:50 AM, Steve Longerbeam wrote:

On 06/02/2016 06:55 AM, Hans Verkuil wrote:

On 06/02/2016 03:29 PM, Tim Harvey wrote:

On Wed, Mar 9, 2016 at 4:12 PM, Steve Longerbeam
<steve_longerb...@mentor.com> wrote:

On 03/09/2016 02:44 PM, Tim Harvey wrote:

On Tue, Mar 8, 2016 at 6:06 PM, Steve Longerbeam
<steve_longerb...@mentor.com> wrote:

On 03/07/2016 08:19 AM, Tim Harvey wrote:



Hi Tim, good to hear it works for you on the Ventana boards.

I've just pushed some more commits to the mx6-media-staging branch that
get the drivers/media/i2c/adv7180.c subdev working with the imx6 capture
backend. Images look perfect when switching to UYVY8_2X8 mbus code instead
of YUYV8_2X8. But I'm holding off on that change because this subdev is used
by Renesas targets and would likely corrupt captured images for those
targets. But I believe UYVY is the correct transmit order according to the
BT.656 standard.

Another thing that should also be changed in drivers/media/i2c/adv7180.c
is the field type. It should be V4L2_FIELD_SEQ_TB for NTSC and V4L2_FIELD_SEQ_BT
for PAL.

Steve



Steve,

with your latest patches, I'm crashing with an null-pointer-deref in
adv7180_set_pad_format. What is your kernel config for
CONFIG_MEDIA_CONTROLLER and CONFIG_VIDEO_V4L2_SUBDEV_API?

Right, I thought I fixed that, I was passing a NULL pad_cfg for
TRY_FORMAT, but that was fixed. Maybe you fetched a version
of mx6-media-staging while I was in the middle of debugging?
Try fetching again.

I tried with both CONFIG_MEDIA_CONTROLLER and
CONFIG_VIDEO_V4L2_SUBDEV_API enabled and both disabled, and
I don't get the null deref in adv7180_set_pad_format.



Your tree contains about 16 or so patches on top of linux-media for
imx6 capture. Are you close to the point where you will be posting a
patch series? If so, please CC me for testing with the adv7180 sensor.

I guess I can try posting a series again, but there will likely be push-back 
from
Pengutronix. They have their own video capture driver for imx6. Last I heard (a 
while ago!)
their version did not implement scaling, colorspace conversion, or image 
rotation via
the IC. Instead their driver sends raw camera frames directly to memory, and 
image
conversion is carried out by separate mem2mem device. Our capture driver does
image conversion (scaling, CSC, and rotation) natively using the IC 
pre-processing channel.
We also have a mem2mem device that does conversion using IC post-processing,
which I have included in mx6-media-staging.

Also IIRC they did some pretty slick stuff with a video bus multiplexer subdev, 
which
can multiplex video from different sensors either using the internal mux in the 
SoC,
or can control an external mux via gpio. Our driver only supports the internal 
mux,
and does it with a platform data function.

But like I said, I don't what the latest status is of the Pengutronix video 
capture support.

Btw, I just pushed an update of mx6-media-staging that implements 
vidioc_[gs]_selection.

Steve



Steve,

Some time has passed without any IMX6 CSI drivers or response from
Pengutronix and Hans has agreed to add either/both drivers to staging.
Do you have time to rebase and re-post your driver(s)? Maybe that will
get the ball rolling on this final huge missing feature for the IMX6
in mainline.

Right. All that is needed is for someone to take the latest version, make it 
compile
in the media_tree in drivers/media/staging and post the patch (just take care 
to keep
the correct copyrights, Signed-off-by's etc.) and I'll be happy to take it. 
This is
exactly what staging is for. I think it will greatly increases the chances of 
this
code being improved for mainline. And I'm happy to take both drivers as well, 
again,
that's what staging is for.

I've been thinking of doing this myself, but I just don't have the time.

Ideally this is done by the authors, but if they don't have time either then 
someone
else can do this.


Hi Hans and Tim,

No problem, I will repost the patch-set this week. I've been meaning to,
just busy lately with other tasks.


Hi all, I need a few more days. I would like to bring in the video-switch
subdev from Pengutronix, which will replace the platform data set_video_mux
method. Also re-org the device-tree to better define all the possible 
hardware

connections, and split out mx6-encode.c into mx6-smfc and mx6-ic subdevs.
Once this is done we should have a better base for adding media control
later. I should have this done by end of this week.

Steve


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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

On 06/02/2016 06:55 AM, Hans Verkuil wrote:
>
> On 06/02/2016 03:29 PM, Tim Harvey wrote:
>> On Wed, Mar 9, 2016 at 4:12 PM, Steve Longerbeam
>> <steve_longerb...@mentor.com> wrote:
>>> On 03/09/2016 02:44 PM, Tim Harvey wrote:
>>>> On Tue, Mar 8, 2016 at 6:06 PM, Steve Longerbeam
>>>> <steve_longerb...@mentor.com> wrote:
>>>>> On 03/07/2016 08:19 AM, Tim Harvey wrote:
>>>> 
>>>>> Hi Tim, good to hear it works for you on the Ventana boards.
>>>>>
>>>>> I've just pushed some more commits to the mx6-media-staging branch that
>>>>> get the drivers/media/i2c/adv7180.c subdev working with the imx6 capture
>>>>> backend. Images look perfect when switching to UYVY8_2X8 mbus code instead
>>>>> of YUYV8_2X8. But I'm holding off on that change because this subdev is 
>>>>> used
>>>>> by Renesas targets and would likely corrupt captured images for those
>>>>> targets. But I believe UYVY is the correct transmit order according to the
>>>>> BT.656 standard.
>>>>>
>>>>> Another thing that should also be changed in drivers/media/i2c/adv7180.c
>>>>> is the field type. It should be V4L2_FIELD_SEQ_TB for NTSC and 
>>>>> V4L2_FIELD_SEQ_BT
>>>>> for PAL.
>>>>>
>>>>> Steve
>>>>>
>>>>>
>>>> Steve,
>>>>
>>>> with your latest patches, I'm crashing with an null-pointer-deref in
>>>> adv7180_set_pad_format. What is your kernel config for
>>>> CONFIG_MEDIA_CONTROLLER and CONFIG_VIDEO_V4L2_SUBDEV_API?
>>> Right, I thought I fixed that, I was passing a NULL pad_cfg for
>>> TRY_FORMAT, but that was fixed. Maybe you fetched a version
>>> of mx6-media-staging while I was in the middle of debugging?
>>> Try fetching again.
>>>
>>> I tried with both CONFIG_MEDIA_CONTROLLER and
>>> CONFIG_VIDEO_V4L2_SUBDEV_API enabled and both disabled, and
>>> I don't get the null deref in adv7180_set_pad_format.
>>>
>>>
>>>> Your tree contains about 16 or so patches on top of linux-media for
>>>> imx6 capture. Are you close to the point where you will be posting a
>>>> patch series? If so, please CC me for testing with the adv7180 sensor.
>>> I guess I can try posting a series again, but there will likely be 
>>> push-back from
>>> Pengutronix. They have their own video capture driver for imx6. Last I 
>>> heard (a while ago!)
>>> their version did not implement scaling, colorspace conversion, or image 
>>> rotation via
>>> the IC. Instead their driver sends raw camera frames directly to memory, 
>>> and image
>>> conversion is carried out by separate mem2mem device. Our capture driver 
>>> does
>>> image conversion (scaling, CSC, and rotation) natively using the IC 
>>> pre-processing channel.
>>> We also have a mem2mem device that does conversion using IC post-processing,
>>> which I have included in mx6-media-staging.
>>>
>>> Also IIRC they did some pretty slick stuff with a video bus multiplexer 
>>> subdev, which
>>> can multiplex video from different sensors either using the internal mux in 
>>> the SoC,
>>> or can control an external mux via gpio. Our driver only supports the 
>>> internal mux,
>>> and does it with a platform data function.
>>>
>>> But like I said, I don't what the latest status is of the Pengutronix video 
>>> capture support.
>>>
>>> Btw, I just pushed an update of mx6-media-staging that implements 
>>> vidioc_[gs]_selection.
>>>
>>> Steve
>>>
>>>
>> Steve,
>>
>> Some time has passed without any IMX6 CSI drivers or response from
>> Pengutronix and Hans has agreed to add either/both drivers to staging.
>> Do you have time to rebase and re-post your driver(s)? Maybe that will
>> get the ball rolling on this final huge missing feature for the IMX6
>> in mainline.
> Right. All that is needed is for someone to take the latest version, make it 
> compile
> in the media_tree in drivers/media/staging and post the patch (just take care 
> to keep
> the correct copyrights, Signed-off-by's etc.) and I'll be happy to take it. 
> This is
> exactly what staging is for. I think it will greatly increases the chances of 
> this
> code being improved for mainline. And I'm happy to take both drivers as well, 
> again,
> that's what staging is for.
>
> I've been thinking of doing this myself, but I just don't have the time.
>
> Ideally this is done by the authors, but if they don't have time either then 
> someone
> else can do this.
>

Hi Hans and Tim,

No problem, I will repost the patch-set this week. I've been meaning to,
just busy lately with other tasks.

Steve

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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

On 03/09/2016 02:44 PM, Tim Harvey wrote:
> On Tue, Mar 8, 2016 at 6:06 PM, Steve Longerbeam
> <steve_longerb...@mentor.com> wrote:
>> On 03/07/2016 08:19 AM, Tim Harvey wrote:
> 
>>
>> Hi Tim, good to hear it works for you on the Ventana boards.
>>
>> I've just pushed some more commits to the mx6-media-staging branch that
>> get the drivers/media/i2c/adv7180.c subdev working with the imx6 capture
>> backend. Images look perfect when switching to UYVY8_2X8 mbus code instead
>> of YUYV8_2X8. But I'm holding off on that change because this subdev is used
>> by Renesas targets and would likely corrupt captured images for those
>> targets. But I believe UYVY is the correct transmit order according to the
>> BT.656 standard.
>>
>> Another thing that should also be changed in drivers/media/i2c/adv7180.c
>> is the field type. It should be V4L2_FIELD_SEQ_TB for NTSC and 
>> V4L2_FIELD_SEQ_BT
>> for PAL.
>>
>> Steve
>>
>>
> Steve,
>
> with your latest patches, I'm crashing with an null-pointer-deref in
> adv7180_set_pad_format. What is your kernel config for
> CONFIG_MEDIA_CONTROLLER and CONFIG_VIDEO_V4L2_SUBDEV_API?

Right, I thought I fixed that, I was passing a NULL pad_cfg for
TRY_FORMAT, but that was fixed. Maybe you fetched a version
of mx6-media-staging while I was in the middle of debugging?
Try fetching again.

I tried with both CONFIG_MEDIA_CONTROLLER and
CONFIG_VIDEO_V4L2_SUBDEV_API enabled and both disabled, and
I don't get the null deref in adv7180_set_pad_format.


>
> Your tree contains about 16 or so patches on top of linux-media for
> imx6 capture. Are you close to the point where you will be posting a
> patch series? If so, please CC me for testing with the adv7180 sensor.

I guess I can try posting a series again, but there will likely be push-back 
from
Pengutronix. They have their own video capture driver for imx6. Last I heard (a 
while ago!)
their version did not implement scaling, colorspace conversion, or image 
rotation via
the IC. Instead their driver sends raw camera frames directly to memory, and 
image
conversion is carried out by separate mem2mem device. Our capture driver does
image conversion (scaling, CSC, and rotation) natively using the IC 
pre-processing channel.
We also have a mem2mem device that does conversion using IC post-processing,
which I have included in mx6-media-staging.

Also IIRC they did some pretty slick stuff with a video bus multiplexer subdev, 
which
can multiplex video from different sensors either using the internal mux in the 
SoC,
or can control an external mux via gpio. Our driver only supports the internal 
mux,
and does it with a platform data function.

But like I said, I don't what the latest status is of the Pengutronix video 
capture support.

Btw, I just pushed an update of mx6-media-staging that implements 
vidioc_[gs]_selection.

Steve


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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

On 03/07/2016 08:19 AM, Tim Harvey wrote:
> On Thu, Mar 3, 2016 at 9:45 AM, Steve Longerbeam
> <steve_longerb...@mentor.com> wrote:
>> Hi Philippe,
>>
>> On 03/03/2016 12:36 AM, Philippe De Muyter wrote:
>>> Just to be sure : do you mean  https://github.com/slongerbeam/mediatree.git
>>> or something else ?
>> Sorry, yes I meant https://github.com/slongerbeam/mediatree.git.
>>
>>>>> So far I have retested video capture with the SabreAuto/ADV7180 and
>>>>> the SabreSD/OV5640-mipi-csi2, and video capture is working fine on
>>>>> those platforms.
>>>>>
>>>>> There is also a mem2mem that should work fine, but haven't tested yet.
>>>>>
>>>>> I removed camera preview support. At Mentor Graphics we have made
>>>>> quite a few changes to ipu-v3 driver to allow camera preview to initialize
>>>>> and control an overlay display plane independently of imx-drm, by adding
>>>>> a subsystem independent ipu-plane sub-unit. Note we also have a video
>>>>> output overlay driver that also makes use of ipu-plane. But those changes 
>>>>> are
>>>>> extensive and touch imx-drm as well as ipu-v3, so I am leaving camera 
>>>>> preview
>>>>> and the output overlay driver out (in fact, camera preview is not of much
>>>>> utility so I probably won't bring it back in upstream version).
>>>>>
>>>>> The video capture driver is not quite ready for upstream review yet. It 
>>>>> still:
>>>>>
>>>>> - uses the old cropping APIs but should move forward to selection APIs.
>>>>>
>>>>> - uses custom sensor subdev drivers for ADV7180 and OV564x. Still
>>>>>   need to switch to upstream subdevs.
>>> Is it only a problem of those sensor drivers (which exact files ?) or
>>> is it a problem of the capture driver itself ?
>> The camera interface driver (drivers/staging/media/imx6/capture/mx6-camif.c)
>> is binding to these subdevs:
>>
>> drivers/staging/media/imx6/capture/adv7180.c
>> drivers/staging/media/imx6/capture/ov5642.c
>> drivers/staging/media/imx6/capture/ov5640-mipi.c
>>
>> But instead should use the subdevs under drivers/media/i2c, specifically:
>>
>> drivers/media/i2c/adv7180.c (and adding whatever standard subdev features
>> the imx6 interface driver requires).
>>
>> There is a drivers/media/i2c/soc_camera/ov5642.c, but there is no mipi-csi2
>> capable subdev for the ov5640 with the mipi-csi2 interface, so that would 
>> have
>> to be created.
>>
> Steve,
>
> I've built your mx6-media-staging branch and added device-tree config
> for the Gateworks Ventana boards which have an on-board ADV7180 and it
> works great. I've tested it capturing frames via v4l2-ctl as well as
> gstreamer.
>
> Please let me know what kind of testing you need. I would love to see
> this get mainlined!
>


Hi Tim, good to hear it works for you on the Ventana boards.

I've just pushed some more commits to the mx6-media-staging branch that
get the drivers/media/i2c/adv7180.c subdev working with the imx6 capture
backend. Images look perfect when switching to UYVY8_2X8 mbus code instead
of YUYV8_2X8. But I'm holding off on that change because this subdev is used
by Renesas targets and would likely corrupt captured images for those
targets. But I believe UYVY is the correct transmit order according to the
BT.656 standard.

Another thing that should also be changed in drivers/media/i2c/adv7180.c
is the field type. It should be V4L2_FIELD_SEQ_TB for NTSC and V4L2_FIELD_SEQ_BT
for PAL.

Steve


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Re: i.mx6 camera interface (CSI) and mainline kernel

[Steve Longerbeam]

Hi Philippe,

On 03/03/2016 12:36 AM, Philippe De Muyter wrote:
>
> Just to be sure : do you mean  https://github.com/slongerbeam/mediatree.git
> or something else ?

Sorry, yes I meant https://github.com/slongerbeam/mediatree.git.

>
>>> So far I have retested video capture with the SabreAuto/ADV7180 and
>>> the SabreSD/OV5640-mipi-csi2, and video capture is working fine on
>>> those platforms.
>>>
>>> There is also a mem2mem that should work fine, but haven't tested yet.
>>>
>>> I removed camera preview support. At Mentor Graphics we have made
>>> quite a few changes to ipu-v3 driver to allow camera preview to initialize
>>> and control an overlay display plane independently of imx-drm, by adding
>>> a subsystem independent ipu-plane sub-unit. Note we also have a video
>>> output overlay driver that also makes use of ipu-plane. But those changes 
>>> are
>>> extensive and touch imx-drm as well as ipu-v3, so I am leaving camera 
>>> preview
>>> and the output overlay driver out (in fact, camera preview is not of much
>>> utility so I probably won't bring it back in upstream version).
>>>
>>> The video capture driver is not quite ready for upstream review yet. It 
>>> still:
>>>
>>> - uses the old cropping APIs but should move forward to selection APIs.
>>>
>>> - uses custom sensor subdev drivers for ADV7180 and OV564x. Still
>>>   need to switch to upstream subdevs.
> Is it only a problem of those sensor drivers (which exact files ?) or
> is it a problem of the capture driver itself ?

The camera interface driver (drivers/staging/media/imx6/capture/mx6-camif.c)
is binding to these subdevs:

drivers/staging/media/imx6/capture/adv7180.c
drivers/staging/media/imx6/capture/ov5642.c
drivers/staging/media/imx6/capture/ov5640-mipi.c

But instead should use the subdevs under drivers/media/i2c, specifically:

drivers/media/i2c/adv7180.c (and adding whatever standard subdev features
the imx6 interface driver requires).

There is a drivers/media/i2c/soc_camera/ov5642.c, but there is no mipi-csi2
capable subdev for the ov5640 with the mipi-csi2 interface, so that would have
to be created.



> I must update a sensor driver I wrote for the intdev interface found
> in the freescale kernel, and I'd like to start from a working subdev
> example.  Which driver should I choose as an example ?

There's lots of good examples under drivers/media/i2c/.


Steve

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Re: i.MX6 Video combiner

[Steve Longerbeam]

On 02/25/2015 02:57 AM, Jean-Michel Hautbois wrote:
 Hi all,

 I read in the i.MX6 TRM that it can do combining or deinterlacing with VDIC.
 Has it been tested by anyone ?
 Could it be a driver, which would allow to do some simple compositing
 of souces ?

 Thanks,
 JM

I've added VDIC support (deinterlace with motion compensation) to the
capture driver, it's in the my media tree clone:

g...@github.com:slongerbeam/mediatree.git, mx6-media-staging

Steve
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Re: i.MX6 Video combiner

[Steve Longerbeam]

On 02/25/2015 09:37 AM, Steve Longerbeam wrote:
 On 02/25/2015 02:57 AM, Jean-Michel Hautbois wrote:
 Hi all,

 I read in the i.MX6 TRM that it can do combining or deinterlacing with VDIC.
 Has it been tested by anyone ?
 Could it be a driver, which would allow to do some simple compositing
 of souces ?

 Thanks,
 JM
 I've added VDIC support (deinterlace with motion compensation) to the
 capture driver, it's in the my media tree clone:

 g...@github.com:slongerbeam/mediatree.git, mx6-media-staging

it is activated if user sets the motion compensation control to
1 (low motion), 2 (medium motion), or 3 (high motion), for
example:

# v4l2-ctl --set-ctrl=motion_compensation=2

Steve

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Re: i.MX6 Video combiner

[Steve Longerbeam]

On 02/25/2015 11:40 AM, Jean-Michel Hautbois wrote:
 Hi Steve,

 2015-02-25 18:54 GMT+01:00 Steve Longerbeam slongerb...@gmail.com:
 On 02/25/2015 09:37 AM, Steve Longerbeam wrote:
 On 02/25/2015 02:57 AM, Jean-Michel Hautbois wrote:
 Hi all,

 I read in the i.MX6 TRM that it can do combining or deinterlacing with 
 VDIC.
 Has it been tested by anyone ?
 Could it be a driver, which would allow to do some simple compositing
 of souces ?

 Thanks,
 JM
 I've added VDIC support (deinterlace with motion compensation) to the
 capture driver, it's in the my media tree clone:

 g...@github.com:slongerbeam/mediatree.git, mx6-media-staging
 it is activated if user sets the motion compensation control to
 1 (low motion), 2 (medium motion), or 3 (high motion), for
 example:

 # v4l2-ctl --set-ctrl=motion_compensation=2
 Thx for the tip :).
 And in fact, it is only deinterlacing, not combining two planes with
 background as specified in the TRM (or did I miss something ?).

Hi JM, yes it is deinterlace only, the combiner in the VDIC is not
being used.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 10/02/2014 07:50 AM, Jean-Michel Hautbois wrote:
 Hi Steve,
 
 2014-09-09 18:28 GMT+02:00 Steve Longerbeam slongerb...@gmail.com:
 On 09/09/2014 12:49 AM, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline based
 on the traditional inputs from user (video format and controls).
 
 Here is my first step toward MC support from your work :
 https://github.com/Vodalys/linux-2.6-imx/commit/8f0318f53c48a9638a1963b395bc79fbd7ba4c07
 
 This is a WIP, so some parts of code are commented out awaiting a
 nicer solution.
 I also keep using your eplist array for the moment, and open will
 obviously fail when trying to power sensor.
 But what I wanted was a complete MC support with parsing links from DT
 and I used Laurent's work intensively :).

Hi Jean-Michel,

Ok thanks for the work, I will try to find time to study it.


 
 I've also worked out what I think is a workable video pipeline graph for 
 i.MX,
 suitable for defining the entities, pads, and links. Unfortunately I 
 haven't
 been able to spend as much time as I'd like on it.
 
 Did you find some time to write the pdf you mentioned ?

Finally did. I will send it directly to you, as I'm sure it will get
stripped here.

Steve
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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 09/10/2014 09:08 AM, Jean-Michel Hautbois wrote:
 2014-09-09 18:28 GMT+02:00 Steve Longerbeam slongerb...@gmail.com:
 On 09/09/2014 12:49 AM, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline based
 on the traditional inputs from user (video format and controls).

 If there is interest I can submit another version of the traditional driver
 to resolve the issues. But media device is a major rework, so I don't
 know whether it would make sense to start from the traditional driver
 and then implement media device on top later, since media device
 is almost a complete rewrite.
 I, at least, am interested by this driver, even in its traditionnal
 form :). If you don't want to submit it directly because this is not
 using media controller, this is ok, you can provide me a git repo in
 order to get it, or send a patchset.
 Hi Jean-Michel, I forgot to mention I will be working on the staging
 capture driver in a copy of the media-tree on github at:

 g...@github.com:slongerbeam/mediatree.git

 I took your mx6-camera-staging branch and merger it, but compile fails :
 drivers/staging/media/imx6/capture/mx6-vdic.c:815:2: error: implicit
 declaration of function 'ipu_mbus_code_to_fourcc'

 Maybe isn't it ready yet ? I always want to go faster than music... :)

Hi JM, yes I'm still working on it, I'll let you know when I think it's
in a good-enough state.

Steve
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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 09/10/2014 09:25 AM, Steve Longerbeam wrote:
 On 09/10/2014 09:08 AM, Jean-Michel Hautbois wrote:
 2014-09-09 18:28 GMT+02:00 Steve Longerbeam slongerb...@gmail.com:
 On 09/09/2014 12:49 AM, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline 
 based
 on the traditional inputs from user (video format and controls).

 If there is interest I can submit another version of the traditional 
 driver
 to resolve the issues. But media device is a major rework, so I don't
 know whether it would make sense to start from the traditional driver
 and then implement media device on top later, since media device
 is almost a complete rewrite.
 I, at least, am interested by this driver, even in its traditionnal
 form :). If you don't want to submit it directly because this is not
 using media controller, this is ok, you can provide me a git repo in
 order to get it, or send a patchset.
 Hi Jean-Michel, I forgot to mention I will be working on the staging
 capture driver in a copy of the media-tree on github at:

 g...@github.com:slongerbeam/mediatree.git

 I took your mx6-camera-staging branch and merger it, but compile fails :
 drivers/staging/media/imx6/capture/mx6-vdic.c:815:2: error: implicit
 declaration of function 'ipu_mbus_code_to_fourcc'

 Maybe isn't it ready yet ? I always want to go faster than music... :)
 Hi JM, yes I'm still working on it, I'll let you know when I think it's
 in a good-enough state.

Hi JM, staging capture driver now compiles at
g...@github.com:slongerbeam/mediatree.git, mx6-camera-staging
branch.

It is lightly tested on sabrelite quad (with parallel ov5642), sabreauto quad
(with adv7180 and NTSC/PAL sources), and sabresd quad (with MIPI CSI-2
ov5640).

I have not yet made most of the suggested changes from my version 1 posting
a couple months ago, so for the most part it is in the same state. Still in the 
process
of making those suggested changes.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

Hi Phillip,

On 09/09/2014 10:40 AM, Philipp Zabel wrote:

 I've also worked out what I think is a workable video pipeline graph for 
 i.MX,
 suitable for defining the entities, pads, and links. Unfortunately I 
 haven't
 been able to spend as much time as I'd like on it.
 This is very interesting, do you have written this somewhere ?
 Yes, I'll try to find some time to create a pdf image.
 I'd be very interested in this, too.

I should have something to show tomorrow.

  I have in the meantime started to
 implement everything that has a source or destination selector in the
 Frame Synchronization Unit (FSU) as media entity. I wonder which of
 these parts should reasonably be unified into a single entity:

   CSI0
   CSI1

Yes, we need a CSI subdev/entity, and it can be instantiated twice for
the two CSI ports.

   SMFC0
   SMFC1
   SMFC2
   SMFC3

I don't really see the need for an SMFC entity. The SMFC control can
be integrated into the CSI subdev.

   IC preprocessor (input to VF and ENC, if I understood correctly)
   IC viewfinder task (scaling, csc)
   IC encoding task
   IC post processing task

I see either three different IC subdev entities (IC prpenc, IC prpvf,
IC pp), or a single IC entity with three sink pads for each IC task.

   IRT viewfinder task (rotation)
   IRT encoding task
   IRT post processing task

well, the IRT is really just a submodule enable bit, I see no need
for an IRT subdev, in fact IRT has already been folded into ipu-ic.c
as a simple submodule enable/disable. Rotation support can be
implemented as part of the IC entities.

   VDIC (deinterlacing, combining)

I am thinking VDIC support can be part of the IC prpvf entity (well,
combining is not really on my radar, I haven't given that much thought).

   (and probably some entry for DP/DC/DMFC for the direct
viewfinder path)

Ugh, I've been ignoring that path as well. Freescale's BSP releases
and sample code from their SDK's have no example code for the
direct-to-DP/DC/DMFC camera viewfinder path, so given the quality
of the imx TRM, this could be a challenge to implement. Have you
gotten this path to work?


 I suppose the SMFC channels need to be separate because they can belong
 to different pipelines (and each entity can only belong to one).

I see the chosen SMFC channel as an internal decision by the
CSI subdev.

 The three IC task entities could probably be combined with their
 corresponding IRT task entity somehow, but that would be at the cost of
 not being able to tell the kernel whether to rotate before or after
 scaling, which might be useful when handling chroma subsampled formats.

I'm fairly sure IC rotation must always occur _after_ scaling. I.e.
raw frames are first passed through IC prpenc/prpvf/pp for scaling/CSC,
then EOF completion of that task is hardware linked to IRT.


 I have put my current state up here:

 git://git.pengutronix.de/git/pza/linux.git test/nitrogen6x-ipu-media

 So far I've captured video through the SMFC on a Nitrogen6X board with
 OV5652 parallel camera with this.

Thanks Phillip, I'll take a look! Sounds like a good place to start.
I assume this is with the video mux entity and CSI driver? I.e. no
IC entity support yet for scaling, CSC, or rotation.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 09/09/2014 12:52 AM, Hans Verkuil wrote:
 On 09/09/14 09:49, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 Hi Jean-Michel, Phillip,
 Hi Steve,

 I've done some work on Philipp's June 12 patchset, converting
 the CSI driver to a CSI subdev entity, and fixing some issues here
 and there. This June 12 patchset doesn't appear to be a fully working
 driver, Phillip correct me if I am wrong. I can post this work as it
 exists, it is incomplete but compiles.
 Dos it compile against a 3.17-rc3 kernel :) ?

 I've also worked out what I think is a workable video pipeline graph for 
 i.MX,
 suitable for defining the entities, pads, and links. Unfortunately I haven't
 been able to spend as much time as I'd like on it.
 This is very interesting, do you have written this somewhere ?

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline based
 on the traditional inputs from user (video format and controls).

 If there is interest I can submit another version of the traditional driver
 to resolve the issues. But media device is a major rework, so I don't
 know whether it would make sense to start from the traditional driver
 and then implement media device on top later, since media device
 is almost a complete rewrite.
 I, at least, am interested by this driver, even in its traditionnal
 form :). If you don't want to submit it directly because this is not
 using media controller, this is ok, you can provide me a git repo in
 order to get it, or send a patchset.
 Is it possible to create a staging driver? Even if there are bits missing,
 having the code in the kernel as a staging driver would help a lot.

Hi Hans, that's a good idea. I can post it as a staging driver.

The capture driver does require more support in the i.MX IPU driver which is
not yet merged or proposed. Phillip has forwarded most of them to drm-next,
but there are a few more required. I need to post those patches to drm-next
as a first step.

I can start working on converting the driver to staging and addressing
the earlier issues, but posting it to media-tree will need to wait until the IPU
patches are merged, unless I include the IPU patches along with the capture
driver patchset.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

Hi Jean-Michel,


On 09/09/2014 12:49 AM, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 Hi Jean-Michel, Phillip,
 Hi Steve,

 I've done some work on Philipp's June 12 patchset, converting
 the CSI driver to a CSI subdev entity, and fixing some issues here
 and there. This June 12 patchset doesn't appear to be a fully working
 driver, Phillip correct me if I am wrong. I can post this work as it
 exists, it is incomplete but compiles.
 Dos it compile against a 3.17-rc3 kernel :) ?

No, not anymore, the original posted driver was against 3.16 IIRC.


 I've also worked out what I think is a workable video pipeline graph for 
 i.MX,
 suitable for defining the entities, pads, and links. Unfortunately I haven't
 been able to spend as much time as I'd like on it.
 This is very interesting, do you have written this somewhere ?

Yes, I'll try to find some time to create a pdf image.

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline based
 on the traditional inputs from user (video format and controls).

 If there is interest I can submit another version of the traditional driver
 to resolve the issues. But media device is a major rework, so I don't
 know whether it would make sense to start from the traditional driver
 and then implement media device on top later, since media device
 is almost a complete rewrite.
 I, at least, am interested by this driver, even in its traditionnal
 form :). If you don't want to submit it directly because this is not
 using media controller, this is ok, you can provide me a git repo in
 order to get it, or send a patchset.

I think I'll follow Hans' proposal and submit it again to media-tree as
a staging driver.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 09/09/2014 12:49 AM, Jean-Michel Hautbois wrote:
 2014-08-27 16:23 GMT+02:00 Steve Longerbeam steve_longerb...@mentor.com:

 The complete driver I posted to the list does have some minor issues
 mostly suggested by Hans Verkuil (switch to new selection API instead
 of cropping API for example). It is a full featured driver but it does not
 implement the media device framework, i.e. user does not have direct
 control of the video pipeline, rather the driver chooses the pipeline based
 on the traditional inputs from user (video format and controls).

 If there is interest I can submit another version of the traditional driver
 to resolve the issues. But media device is a major rework, so I don't
 know whether it would make sense to start from the traditional driver
 and then implement media device on top later, since media device
 is almost a complete rewrite.
 I, at least, am interested by this driver, even in its traditionnal
 form :). If you don't want to submit it directly because this is not
 using media controller, this is ok, you can provide me a git repo in
 order to get it, or send a patchset.

Hi Jean-Michel, I forgot to mention I will be working on the staging
capture driver in a copy of the media-tree on github at:

g...@github.com:slongerbeam/mediatree.git

Steve


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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 08/27/2014 12:13 AM, Jean-Michel Hautbois wrote:
 Hi Phillip,

 2014-08-04 13:54 GMT+02:00 Philipp Zabel p.za...@pengutronix.de:
 We should take this step by step. First I'd like to get Steve's ipu-v3
 series in, those don't have any major issues and are a prerequisite for
 the media patches anyway.

 The capture patches had a few more issues than just missing media device
 support. But this is indeed the biggest one, especially where it
 involves a userspace interface that we don't want to have to support in
 the future.
 My RFC series wasn't without problems either. I'll work on the IPU this
 week and then post another RFC.
 Any news about this ? I saw your patchset from june 12th.
 What is the current status of this RFC and is there a way to help
 integrating/testing it ? Do you have a public git repository I can
 fetch and merge in order to test ?



Hi Jean-Michel, Phillip,

I've done some work on Philipp's June 12 patchset, converting
the CSI driver to a CSI subdev entity, and fixing some issues here
and there. This June 12 patchset doesn't appear to be a fully working
driver, Phillip correct me if I am wrong. I can post this work as it
exists, it is incomplete but compiles.

I've also worked out what I think is a workable video pipeline graph for i.MX,
suitable for defining the entities, pads, and links. Unfortunately I haven't
been able to spend as much time as I'd like on it.

The complete driver I posted to the list does have some minor issues
mostly suggested by Hans Verkuil (switch to new selection API instead
of cropping API for example). It is a full featured driver but it does not
implement the media device framework, i.e. user does not have direct
control of the video pipeline, rather the driver chooses the pipeline based
on the traditional inputs from user (video format and controls).

If there is interest I can submit another version of the traditional driver
to resolve the issues. But media device is a major rework, so I don't
know whether it would make sense to start from the traditional driver
and then implement media device on top later, since media device
is almost a complete rewrite.

Steve

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Re: i.MX6 status for IPU/VPU/GPU

[Steve Longerbeam]

On 07/28/2014 11:59 AM, Robert Schwebel wrote:
 Hi,

 On Mon, Jul 28, 2014 at 06:24:45PM +0200, Jean-Michel Hautbois wrote:
 We have a custom board, based on i.MX6 SoC.
 We are currently using Freescale's release of Linux, but this is a
 3.10.17 kernel, and several drivers are lacking (adv7611 for instance)
 or badly written (all the MXC part).
 As we want to have nice things :) we would like to use a mainline
 kernel, or at least a tree which can be mainlined.

 It seems (#v4l told me so) that some people (Steeve :) ?) are working
 on a rewriting of the IPU and all DRM part for i.MX6.
 What is the current status (compared to Freescale's release maybe) ?
 And what can we expect in a near future? Maybe, how can we help too ?

Hi Jean-Michel,

I did post a v4l2 video capture driver for i.MX6 to linux-media.
The main complaint from Philip at Pengutronix is that it does not
support the media device framework.

The customer I am currently working for has no real interest in the
media controller API, and the driver I posted has all the features they
require, so any work I do to add that support to the driver would have
to be in my spare time, and I don't have much. If our customer were to
request and fund media control support, that would be ideal, but as it is
I can only spend limited time on it. So if you are interested in helping
out in the media device effort I can send what I have so far.

I have not provided any patches to i.MX6 DRM/KMS drivers. We have
developed new features (overlay plane global/local alpha, hardware gamma
correction, color-keying, and others) for for that component but haven't
posted them yet.

Steve

 Pengutronix is continuously working on mainlining more parts of the
 i.MX6 video and graphics subsystem, including the components you have
 mentioned. We are posting patches here when they are ready for mainline
 review.

 Regards,
 Robert (for commercial help, please contact me by email)

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Re: [PATCH 00/28] IPUv3 prep for video capture

[Steve Longerbeam]

On 07/23/2014 06:17 AM, Laurent Pinchart wrote:
 Hi Steve,

 On Thursday 17 July 2014 13:44:12 Steve Longerbeam wrote:
 On 07/17/2014 04:10 AM, Hans Verkuil wrote:
 Hi Steve,

 I don't know what your plan is, but when you want to mainline this it is
 the gpu subsystem that needs to review it. I noticed it wasn't
 cross-posted
 to the dri-devel mailinglist.
 Hi Hans,

 I'm reworking these patches, I've merged in some of the changes
 posted by Philip Zabel ([RFC PATCH 00/26] i.MX5/6 IPUv3 CSI/IC),
 specifically I've decided to use their version of ipu-ic.c, and
 also brought in their video-mux subdev driver. So I'm fine with
 cancelling this patch set.

 When/if I post the reworked v4l2 drivers that implement the media
 entity/device framework I will post the ipu-v3 specific changes
 to dri-devel as well.

 The reason I like Philip's version of ipu-ic is that it implements
 tiling to allow resizing output frames larger than 1024x1024. We
 (Mentor Graphics) did the same IC tiling, but it was done inside
 a separate mem2mem driver. By moving the tiling into ipu-ic, it
 allows 1024x1024 resizing to be part of an imx-ipuv3-ic media
 entity, and this entity can be part of multiple video pipelines
 (capture, video output, mem2mem).

 I am a bit worried about the amount of v4l2-specific stuff that is going
 into drivers/gpu/ipu-v3. Do things like csc and csi really belong there
 instead of under drivers/media?
 The current philosophy of the ipu-v3 driver seems to be that it is a
 library of IPU register-level primitives, so ipu-csi and ipu-ic follow
 that model. There will be nothing v4l2-specific in ipu-csi and ipu-ic,
 although the v4l2 subdev's will be the only clients of ipu-csi and
 ipu-ic.

Hi Laurent,

 I have a bit of trouble following up, due to my lack of knowledge of the 
 Freescale platforms. It would help if you could explain briefly how the 
 various IPU modules interact with each other at the hardware and software 
 level, and what the acronyms stand for (I assume IPU means Image Processing 
 Unit, CSI means Camera Serial Interface, but I don't know what IC is in this 
 context).

Yes, IPU and CSI are acronyms as you describe. IC stands for Image
Converter. The IC carries out scaling, color-space conversion, and
rotation. The IC has three independent task sub-blocks that can carry
out those three operations concurrently using some kind of task time-
sharing mechanism. The three IC tasks are referred to as pre-processing
for encode (PRP ENC), pre-processing for viewfinder (PRP VF) and
post-processing (PP). So for example, a video capture pipeline could
be actively streaming the PRP ENC task while a mem2mem pipeline
could concurrently be using the PP task.


 Are the CSI receivers linked to the graphics IP cores at the hardware level ?]

Yes, the raw frames from the CSI can be directed to either memory, the
IC, or to a video deinterlacing controller (VDIC).

The IPU contains a custom DMA controller (the IDMAC). There is a set
of ~64 IDMAC channels that are dedicated to specific video pipelines.
IDMAC channels can be linked together in hardware (a frame-completion
signal from a source channel can trigger start of DMA in a sink channel).

Here is one example hardware video pipeline in i.MX6 (there are many
more). This example is to send raw interlaced frames from the CSI to
the VDIC, and then the progressive frames to IC PRP VF task for additional
scaling/CSC/rotation:

CSI0 -- VDIC -- IC PRP VF --- idmac channel 21 --- memory


If you're interested in knowing more about the i.MX6 you can pick
up Freescale's TRM at:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Qfpsp=1tab=Documentation_Tab

The i.MX6 TRM is of poor quality, not good enough for actual register-level
programming in many areas, especially the IPU chapter. But good enough for
getting a general overview.

Steve

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Re: [PATCH 00/28] IPUv3 prep for video capture

[Steve Longerbeam]

On 07/17/2014 04:10 AM, Hans Verkuil wrote:
 Hi Steve,
 
 I don't know what your plan is, but when you want to mainline this it is
 the gpu subsystem that needs to review it. I noticed it wasn't cross-posted
 to the dri-devel mailinglist.

Hi Hans,

I'm reworking these patches, I've merged in some of the changes
posted by Philip Zabel ([RFC PATCH 00/26] i.MX5/6 IPUv3 CSI/IC),
specifically I've decided to use their version of ipu-ic.c, and
also brought in their video-mux subdev driver. So I'm fine with
cancelling this patch set.

When/if I post the reworked v4l2 drivers that implement the media
entity/device framework I will post the ipu-v3 specific changes
to dri-devel as well.

The reason I like Philip's version of ipu-ic is that it implements
tiling to allow resizing output frames larger than 1024x1024. We
(Mentor Graphics) did the same IC tiling, but it was done inside
a separate mem2mem driver. By moving the tiling into ipu-ic, it
allows 1024x1024 resizing to be part of an imx-ipuv3-ic media
entity, and this entity can be part of multiple video pipelines
(capture, video output, mem2mem).


 
 I am a bit worried about the amount of v4l2-specific stuff that is going
 into drivers/gpu/ipu-v3. Do things like csc and csi really belong there
 instead of under drivers/media?

The current philosophy of the ipu-v3 driver seems to be that it is a
library of IPU register-level primitives, so ipu-csi and ipu-ic follow
that model. There will be nothing v4l2-specific in ipu-csi and ipu-ic,
although the v4l2 subdev's will be the only clients of ipu-csi and
ipu-ic.


 
 Let me know if this was just preliminary code, or if this was intended to
 be the final code. I suspect the former.

This is all been reworked so go ahead and cancel it.

Thanks,
Steve


 

 
 On 06/26/2014 03:05 AM, Steve Longerbeam wrote:
 Hi Philip, Sascha,

 Here is a rebased set of IPU patches that prepares for video capture
 support. Video capture is not included in this set. I've addressed
 all your IPU-specific concerns from the previous patch set, the
 major ones being:

 - the IOMUXC control for CSI input selection has been removed. This
   should be part of a future CSI media entity driver.

 - the ipu-irt unit has been removed. Enabling the IRT module is
   folded into ipu-ic unit. The ipu-ic unit is also cleaned up a bit.

 - the ipu-csi APIs are consolidated/simplified.

 - added CSI and IC base offsets for i.MX51/i.MX53.


 Steve Longerbeam (28):
   ARM: dts: imx6qdl: Add ipu aliases
   gpu: ipu-v3: Add ipu_get_num()
   gpu: ipu-v3: Add functions to set CSI/IC source muxes
   gpu: ipu-v3: Rename and add IDMAC channels
   gpu: ipu-v3: Add units required for video capture
   gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c
   gpu: ipu-v3: smfc: Convert to per-channel
   gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()
   gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()
   gpu: ipu-v3: Add rotation mode conversion utilities
   gpu: ipu-v3: Add helper function checking if pixfmt is planar
   gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h
   gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()
   gpu: ipu-v3: Add ipu_idmac_clear_buffer()
   gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer()
   gpu: ipu-v3: Add ipu_stride_to_bytes()
   gpu: ipu-v3: Add ipu_idmac_enable_watermark()
   gpu: ipu-v3: Add ipu_idmac_lock_enable()
   gpu: ipu-v3: Add idmac channel linking support
   gpu: ipu-v3: Add ipu-cpmem unit
   staging: imx-drm: Convert to new ipu_cpmem API
   gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()
   gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()
   gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()
   gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()
   gpu: ipu-v3: Add more planar formats support
   gpu: ipu-cpmem: Add ipu_cpmem_dump()
   gpu: ipu-v3: Add ipu_dump()

  arch/arm/boot/dts/imx6q.dtsi  |1 +
  arch/arm/boot/dts/imx6qdl.dtsi|1 +
  drivers/gpu/ipu-v3/Makefile   |3 +-
  drivers/gpu/ipu-v3/ipu-common.c   | 1077 
 +++--
  drivers/gpu/ipu-v3/ipu-cpmem.c|  817 +
  drivers/gpu/ipu-v3/ipu-csi.c  |  701 +
  drivers/gpu/ipu-v3/ipu-ic.c   |  812 +
  drivers/gpu/ipu-v3/ipu-prv.h  |  103 +++-
  drivers/gpu/ipu-v3/ipu-smfc.c |  156 -
  drivers/staging/imx-drm/ipuv3-plane.c |   16 +-
  include/video/imx-ipu-v3.h|  371 +++-
  11 files changed, 3389 insertions(+), 669 deletions(-)
  create mode 100644 drivers/gpu/ipu-v3/ipu-cpmem.c
  create mode 100644 drivers/gpu/ipu-v3/ipu-csi.c
  create mode 100644 drivers/gpu/ipu-v3/ipu-ic.c

 


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[PATCH 28/28] gpu: ipu-v3: Add ipu_dump()

[Steve Longerbeam]

Adds ipu_dump() which dumps IPU register state to debug.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   38 ++
 include/video/imx-ipu-v3.h  |1 +
 2 files changed, 39 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 115572e..af00e8c 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1310,6 +1310,44 @@ static void ipu_irq_exit(struct ipu_soc *ipu)
irq_domain_remove(ipu-domain);
 }
 
+void ipu_dump(struct ipu_soc *ipu)
+{
+   int i;
+
+   dev_dbg(ipu-dev, IPU_CONF = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_CONF));
+   dev_dbg(ipu-dev, IDMAC_CONF = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_CONF));
+   dev_dbg(ipu-dev, IDMAC_CHA_EN1 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_CHA_EN(0)));
+   dev_dbg(ipu-dev, IDMAC_CHA_EN2 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_CHA_EN(32)));
+   dev_dbg(ipu-dev, IDMAC_CHA_PRI1 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_CHA_PRI(0)));
+   dev_dbg(ipu-dev, IDMAC_CHA_PRI2 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_CHA_PRI(32)));
+   dev_dbg(ipu-dev, IDMAC_BAND_EN1 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_BAND_EN(0)));
+   dev_dbg(ipu-dev, IDMAC_BAND_EN2 = \t0x%08X\n,
+   ipu_idmac_read(ipu, IDMAC_BAND_EN(32)));
+   dev_dbg(ipu-dev, IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(0)));
+   dev_dbg(ipu-dev, IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(32)));
+   dev_dbg(ipu-dev, IPU_FS_PROC_FLOW1 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_FS_PROC_FLOW1));
+   dev_dbg(ipu-dev, IPU_FS_PROC_FLOW2 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_FS_PROC_FLOW2));
+   dev_dbg(ipu-dev, IPU_FS_PROC_FLOW3 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_FS_PROC_FLOW3));
+   dev_dbg(ipu-dev, IPU_FS_DISP_FLOW1 = \t0x%08X\n,
+   ipu_cm_read(ipu, IPU_FS_DISP_FLOW1));
+   for (i = 0; i  15; i++)
+   dev_dbg(ipu-dev, IPU_INT_CTRL(%d) = \t%08X\n, i,
+   ipu_cm_read(ipu, IPU_INT_CTRL(i)));
+}
+EXPORT_SYMBOL_GPL(ipu_dump);
+
 static int ipu_probe(struct platform_device *pdev)
 {
const struct of_device_id *of_id =
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 62f9c4b..1ed1062 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -187,6 +187,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
 int ipu_get_num(struct ipu_soc *ipu);
 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
+void ipu_dump(struct ipu_soc *ipu);
 
 /*
  * IPU Image DMA Controller (idmac) functions
-- 
1.7.9.5

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[PATCH 19/28] gpu: ipu-v3: Add idmac channel linking support

[Steve Longerbeam]

Add idmac channel linking/unlinking functions for specific IPU
client use cases. The following linkings are currently needed:

- ipu_link_prp_enc_rot_enc():

Link IPUV3_CHANNEL_IC_PRP_ENC_MEM to IPUV3_CHANNEL_MEM_ROT_ENC.

- ipu_link_prpvf_rot_prpvf():

Links IPUV3_CHANNEL_IC_PRP_VF_MEM to IPUV3_CHANNEL_MEM_ROT_VF.

- ipu_link_pp_rot_pp():

Links IPUV3_CHANNEL_IC_PP_MEM to IPUV3_CHANNEL_MEM_ROT_PP.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |  159 +++
 drivers/gpu/ipu-v3/ipu-prv.h|   58 ++
 include/video/imx-ipu-v3.h  |8 ++
 3 files changed, 225 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index b808ee0..3f91e14 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -955,6 +955,165 @@ void ipu_idmac_clear_buffer(struct ipuv3_channel 
*channel, u32 buf_num)
 }
 EXPORT_SYMBOL_GPL(ipu_idmac_clear_buffer);
 
+/*
+ * Links IPUV3_CHANNEL_IC_PRP_ENC_MEM to IPUV3_CHANNEL_MEM_ROT_ENC
+ */
+int ipu_link_prp_enc_rot_enc(struct ipu_soc *ipu)
+{
+   unsigned long flags;
+   u32 fs_proc_flow1;
+   u32 fs_proc_flow2;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+   fs_proc_flow1 = ~FS_PRPENC_ROT_SRC_SEL_MASK;
+   fs_proc_flow1 |= (0x07  FS_PRPENC_ROT_SRC_SEL_OFFSET);
+
+   fs_proc_flow2 = ~FS_PRPENC_DEST_SEL_MASK;
+   fs_proc_flow2 |= (0x01  FS_PRPENC_DEST_SEL_OFFSET);
+
+   ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+   ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_link_prp_enc_rot_enc);
+
+/*
+ * Unlinks IPUV3_CHANNEL_IC_PRP_ENC_MEM from IPUV3_CHANNEL_MEM_ROT_ENC
+ */
+int ipu_unlink_prp_enc_rot_enc(struct ipu_soc *ipu)
+{
+   unsigned long flags;
+   u32 fs_proc_flow1;
+   u32 fs_proc_flow2;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+   fs_proc_flow1 = ~FS_PRPENC_ROT_SRC_SEL_MASK;
+   fs_proc_flow2 = ~FS_PRPENC_DEST_SEL_MASK;
+
+   ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+   ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_unlink_prp_enc_rot_enc);
+
+/*
+ * Links IPUV3_CHANNEL_IC_PRP_VF_MEM to IPUV3_CHANNEL_MEM_ROT_VF
+ */
+int ipu_link_prpvf_rot_prpvf(struct ipu_soc *ipu)
+{
+   unsigned long flags;
+   u32 fs_proc_flow1;
+   u32 fs_proc_flow2;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+   fs_proc_flow1 = ~FS_PRPVF_ROT_SRC_SEL_MASK;
+   fs_proc_flow1 |= (0x08  FS_PRPVF_ROT_SRC_SEL_OFFSET);
+
+   fs_proc_flow2 = ~FS_PRPVF_DEST_SEL_MASK;
+   fs_proc_flow2 |= (0x01  FS_PRPVF_DEST_SEL_OFFSET);
+
+   ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+   ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_link_prpvf_rot_prpvf);
+
+/*
+ * Unlinks IPUV3_CHANNEL_IC_PRP_VF_MEM from IPUV3_CHANNEL_MEM_ROT_VF
+ */
+int ipu_unlink_prpvf_rot_prpvf(struct ipu_soc *ipu)
+{
+   unsigned long flags;
+   u32 fs_proc_flow1;
+   u32 fs_proc_flow2;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+   fs_proc_flow1 = ~FS_PRPVF_ROT_SRC_SEL_MASK;
+   fs_proc_flow2 = ~FS_PRPVF_DEST_SEL_MASK;
+
+   ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+   ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_unlink_prpvf_rot_prpvf);
+
+/*
+ * Links IPUV3_CHANNEL_IC_PP_MEM to IPUV3_CHANNEL_MEM_ROT_PP
+ */
+int ipu_link_pp_rot_pp(struct ipu_soc *ipu)
+{
+   unsigned long flags;
+   u32 fs_proc_flow1;
+   u32 fs_proc_flow2;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+   fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+   fs_proc_flow1 = ~FS_PP_ROT_SRC_SEL_MASK;
+   fs_proc_flow1 |= (0x05  FS_PP_ROT_SRC_SEL_OFFSET);
+
+   fs_proc_flow2 = ~FS_PP_DEST_SEL_MASK;
+   fs_proc_flow2 |= (0x03  FS_PP_DEST_SEL_OFFSET);
+
+   ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+   ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+   return 0

[PATCH 26/28] gpu: ipu-v3: Add more planar formats support

[Steve Longerbeam]

Adds support for the following planar and partial-planar formats:

YUV422
NV12
NV21
NV16
NV61

Signed-off-by: Dmitry Eremin-Solenikov dmitry_ere...@mentor.com
Signed-off-by: Mohsin Kazmi mohsin_ka...@mentor.com
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   21 ++
 drivers/gpu/ipu-v3/ipu-cpmem.c  |  146 +--
 2 files changed, 161 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 81930f3..115572e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -80,6 +80,12 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 
drm_fourcc)
case DRM_FORMAT_UYVY:
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
+   case DRM_FORMAT_YUV422:
+   case DRM_FORMAT_YVU422:
+   case DRM_FORMAT_NV12:
+   case DRM_FORMAT_NV21:
+   case DRM_FORMAT_NV16:
+   case DRM_FORMAT_NV61:
return IPUV3_COLORSPACE_YUV;
default:
return IPUV3_COLORSPACE_UNKNOWN;
@@ -92,8 +98,13 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32 
pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+   case V4L2_PIX_FMT_YUV422P:
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
+   case V4L2_PIX_FMT_NV12:
+   case V4L2_PIX_FMT_NV21:
+   case V4L2_PIX_FMT_NV16:
+   case V4L2_PIX_FMT_NV61:
return IPUV3_COLORSPACE_YUV;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
@@ -112,6 +123,11 @@ bool ipu_pixelformat_is_planar(u32 pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+   case V4L2_PIX_FMT_YUV422P:
+   case V4L2_PIX_FMT_NV12:
+   case V4L2_PIX_FMT_NV21:
+   case V4L2_PIX_FMT_NV16:
+   case V4L2_PIX_FMT_NV61:
return true;
}
 
@@ -137,6 +153,11 @@ int ipu_stride_to_bytes(u32 pixel_stride, u32 pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+   case V4L2_PIX_FMT_YUV422P:
+   case V4L2_PIX_FMT_NV12:
+   case V4L2_PIX_FMT_NV21:
+   case V4L2_PIX_FMT_NV16:
+   case V4L2_PIX_FMT_NV61:
/*
 * for the planar YUV formats, the stride passed to
 * cpmem must be the stride in bytes of the Y plane.
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index cfe2f53..45a014e 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -193,8 +193,18 @@ static int v4l2_pix_fmt_to_drm_fourcc(u32 pixelformat)
return DRM_FORMAT_YUYV;
case V4L2_PIX_FMT_YUV420:
return DRM_FORMAT_YUV420;
+   case V4L2_PIX_FMT_YUV422P:
+   return DRM_FORMAT_YUV422;
case V4L2_PIX_FMT_YVU420:
return DRM_FORMAT_YVU420;
+   case V4L2_PIX_FMT_NV12:
+   return DRM_FORMAT_NV12;
+   case V4L2_PIX_FMT_NV21:
+   return DRM_FORMAT_NV21;
+   case V4L2_PIX_FMT_NV16:
+   return DRM_FORMAT_NV16;
+   case V4L2_PIX_FMT_NV61:
+   return DRM_FORMAT_NV61;
}
 
return -EINVAL;
@@ -394,6 +404,7 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch,
 {
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
+   case V4L2_PIX_FMT_YUV422P:
ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8);
@@ -403,6 +414,18 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel 
*ch,
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8);
break;
+   case V4L2_PIX_FMT_NV12:
+   case V4L2_PIX_FMT_NV16:
+   ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, stride - 1);
+   ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8);
+   ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8);
+   break;
+   case V4L2_PIX_FMT_NV21:
+   case V4L2_PIX_FMT_NV61:
+   ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, stride - 1);
+   ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8);
+   ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8);
+   break;
}
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full);
@@ -422,6 +445,25 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride,
  u_offset, v_offset);
break;
+   case V4L2_PIX_FMT_YUV422P

[PATCH 22/28] gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()

[Steve Longerbeam]

Adds ipu_cpmem_set_block_mode().

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-cpmem.c |6 ++
 include/video/imx-ipu-v3.h |1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 7adfa78..28adf39 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -260,6 +260,12 @@ void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int 
burstsize)
 };
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_burstsize);
 
+void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch)
+{
+   ipu_ch_param_write_field(ch, IPU_FIELD_BM, 1);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_block_mode);
+
 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
 const struct ipu_rgb *rgb)
 {
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index a86a98a..6146bc7 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -231,6 +231,7 @@ void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
 void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t 
buf);
 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
+void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
 const struct ipu_rgb *rgb);
 int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width);
-- 
1.7.9.5

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[PATCH 27/28] gpu: ipu-cpmem: Add ipu_cpmem_dump()

[Steve Longerbeam]

Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-cpmem.c |   63 
 include/video/imx-ipu-v3.h |1 +
 2 files changed, 64 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 45a014e..5cb36d3 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -727,6 +727,69 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct 
ipu_image *image)
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
 
+void ipu_cpmem_dump(struct ipuv3_channel *ch)
+{
+   struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch);
+   struct ipu_soc *ipu = ch-ipu;
+   int chno = ch-num;
+
+   dev_dbg(ipu-dev, ch %d word 0 - %08X %08X %08X %08X %08X\n, chno,
+   readl(p-word[0].data[0]),
+   readl(p-word[0].data[1]),
+   readl(p-word[0].data[2]),
+   readl(p-word[0].data[3]),
+   readl(p-word[0].data[4]));
+   dev_dbg(ipu-dev, ch %d word 1 - %08X %08X %08X %08X %08X\n, chno,
+   readl(p-word[1].data[0]),
+   readl(p-word[1].data[1]),
+   readl(p-word[1].data[2]),
+   readl(p-word[1].data[3]),
+   readl(p-word[1].data[4]));
+   dev_dbg(ipu-dev, PFS 0x%x, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_PFS));
+   dev_dbg(ipu-dev, BPP 0x%x, ,
+   ipu_ch_param_read_field(ch, IPU_FIELD_BPP));
+   dev_dbg(ipu-dev, NPB 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_NPB));
+
+   dev_dbg(ipu-dev, FW %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_FW));
+   dev_dbg(ipu-dev, FH %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_FH));
+   dev_dbg(ipu-dev, EBA0 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_EBA0)  3);
+   dev_dbg(ipu-dev, EBA1 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_EBA1)  3);
+   dev_dbg(ipu-dev, Stride %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SL));
+   dev_dbg(ipu-dev, scan_order %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SO));
+   dev_dbg(ipu-dev, uv_stride %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SLUV));
+   dev_dbg(ipu-dev, u_offset 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_UBO)  3);
+   dev_dbg(ipu-dev, v_offset 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_VBO)  3);
+
+   dev_dbg(ipu-dev, Width0 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID0));
+   dev_dbg(ipu-dev, Width1 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID1));
+   dev_dbg(ipu-dev, Width2 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID2));
+   dev_dbg(ipu-dev, Width3 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID3));
+   dev_dbg(ipu-dev, Offset0 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS0));
+   dev_dbg(ipu-dev, Offset1 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS1));
+   dev_dbg(ipu-dev, Offset2 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS2));
+   dev_dbg(ipu-dev, Offset3 %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS3));
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_dump);
+
 int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
 {
struct ipu_cpmem *cpmem;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 542652f..62f9c4b 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -247,6 +247,7 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
  u32 pixel_format, int stride, int height);
 int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc);
 int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image);
+void ipu_cpmem_dump(struct ipuv3_channel *ch);
 
 /* Channel linking functions */
 int ipu_link_prp_enc_rot_enc(struct ipu_soc *ipu);
-- 
1.7.9.5

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[PATCH 06/28] gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c

[Steve Longerbeam]

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   12 
 drivers/gpu/ipu-v3/ipu-smfc.c   |   12 
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 0ac2103..85220ae 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -667,18 +667,6 @@ int ipu_module_disable(struct ipu_soc *ipu, u32 mask)
 }
 EXPORT_SYMBOL_GPL(ipu_module_disable);
 
-int ipu_smfc_enable(struct ipu_soc *ipu)
-{
-   return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_smfc_enable);
-
-int ipu_smfc_disable(struct ipu_soc *ipu)
-{
-   return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_smfc_disable);
-
 int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel)
 {
struct ipu_soc *ipu = channel-ipu;
diff --git a/drivers/gpu/ipu-v3/ipu-smfc.c b/drivers/gpu/ipu-v3/ipu-smfc.c
index e4f85ad..87ac624d 100644
--- a/drivers/gpu/ipu-v3/ipu-smfc.c
+++ b/drivers/gpu/ipu-v3/ipu-smfc.c
@@ -71,6 +71,18 @@ int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, 
int csi_id, int mipi_
 }
 EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
 
+int ipu_smfc_enable(struct ipu_soc *ipu)
+{
+   return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_enable);
+
+int ipu_smfc_disable(struct ipu_soc *ipu)
+{
+   return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_disable);
+
 int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
  unsigned long base)
 {
-- 
1.7.9.5

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[PATCH 09/28] gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()

[Steve Longerbeam]

Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a
media bus pixel format code.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   13 +
 include/video/imx-ipu-v3.h  |1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 85220ae..579f03c 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -551,6 +551,19 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32 
pixelformat)
 }
 EXPORT_SYMBOL_GPL(ipu_pixelformat_to_colorspace);
 
+enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code)
+{
+   switch (mbus_code  0xf000) {
+   case 0x1000:
+   return IPUV3_COLORSPACE_RGB;
+   case 0x2000:
+   return IPUV3_COLORSPACE_YUV;
+   default:
+   return IPUV3_COLORSPACE_UNKNOWN;
+   }
+}
+EXPORT_SYMBOL_GPL(ipu_mbus_code_to_colorspace);
+
 struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned num)
 {
struct ipuv3_channel *channel;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index e69b247..91aeb65 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -447,6 +447,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
 
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
 enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
+enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
 
 static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
int burstsize)
-- 
1.7.9.5

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[PATCH 11/28] gpu: ipu-v3: Add helper function checking if pixfmt is planar

[Steve Longerbeam]

Add simple helper function returning true if passed pixel format is one
of supported planar ones.

Signed-off-by: Dmitry Eremin-Solenikov dmitry_ere...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   12 
 include/video/imx-ipu-v3.h  |1 +
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index d472b27..909ef71 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -551,6 +551,18 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32 
pixelformat)
 }
 EXPORT_SYMBOL_GPL(ipu_pixelformat_to_colorspace);
 
+bool ipu_pixelformat_is_planar(u32 pixelformat)
+{
+   switch (pixelformat) {
+   case V4L2_PIX_FMT_YUV420:
+   case V4L2_PIX_FMT_YVU420:
+   return true;
+   }
+
+   return false;
+}
+EXPORT_SYMBOL_GPL(ipu_pixelformat_is_planar);
+
 enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code)
 {
switch (mbus_code  0xf000) {
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 99cf370..20776cf 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -448,6 +448,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
 enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
 enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
+bool ipu_pixelformat_is_planar(u32 pixelformat);
 int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
bool hflip, bool vflip);
 int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
-- 
1.7.9.5

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[PATCH 03/28] gpu: ipu-v3: Add functions to set CSI/IC source muxes

[Steve Longerbeam]

Adds two new functions, ipu_set_csi_src_mux() and ipu_set_ic_src_mux(),
that select the inputs to the CSI and IC respectively. Both muxes are
programmed in the IPU_CONF register.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   51 +++
 include/video/imx-ipu-v3.h  |2 ++
 2 files changed, 53 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index a92f48b..1155eb9 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -832,6 +832,57 @@ static int ipu_memory_reset(struct ipu_soc *ipu)
return 0;
 }
 
+/*
+ * Set the source mux for the given CSI. Selects either parallel or
+ * MIPI CSI2 sources.
+ */
+void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2)
+{
+   unsigned long flags;
+   u32 val, mask;
+
+   mask = (csi_id == 1) ? IPU_CONF_CSI1_DATA_SOURCE :
+   IPU_CONF_CSI0_DATA_SOURCE;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   val = ipu_cm_read(ipu, IPU_CONF);
+   if (mipi_csi2)
+   val |= mask;
+   else
+   val = ~mask;
+   ipu_cm_write(ipu, val, IPU_CONF);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_csi_src_mux);
+
+/*
+ * Set the source mux for the IC. Selects either CSI[01] or the VDI.
+ */
+void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi)
+{
+   unsigned long flags;
+   u32 val;
+
+   spin_lock_irqsave(ipu-lock, flags);
+
+   val = ipu_cm_read(ipu, IPU_CONF);
+   if (vdi) {
+   val |= IPU_CONF_IC_INPUT;
+   } else {
+   val = ~IPU_CONF_IC_INPUT;
+   if (csi_id == 1)
+   val |= IPU_CONF_CSI_SEL;
+   else
+   val = ~IPU_CONF_CSI_SEL;
+   }
+   ipu_cm_write(ipu, val, IPU_CONF);
+
+   spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
+
 struct ipu_devtype {
const char *name;
unsigned long cm_ofs;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 739d204..52fa277 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -96,6 +96,8 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct 
ipuv3_channel *channel,
  * IPU Common functions
  */
 int ipu_get_num(struct ipu_soc *ipu);
+void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
+void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
 
 /*
  * IPU Image DMA Controller (idmac) functions
-- 
1.7.9.5

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[PATCH 10/28] gpu: ipu-v3: Add rotation mode conversion utilities

[Steve Longerbeam]

Add two functions:

- ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting
  to an IPU rotation mode.
- ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip
  and vflip settings to degrees.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-common.c |   64 +++
 include/video/imx-ipu-v3.h  |4 +++
 2 files changed, 68 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 579f03c..d472b27 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -564,6 +564,70 @@ enum ipu_color_space ipu_mbus_code_to_colorspace(u32 
mbus_code)
 }
 EXPORT_SYMBOL_GPL(ipu_mbus_code_to_colorspace);
 
+int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
+   bool hflip, bool vflip)
+{
+   u32 r90, vf, hf;
+
+   switch (degrees) {
+   case 0:
+   vf = hf = r90 = 0;
+   break;
+   case 90:
+   vf = hf = 0;
+   r90 = 1;
+   break;
+   case 180:
+   vf = hf = 1;
+   r90 = 0;
+   break;
+   case 270:
+   vf = hf = r90 = 1;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   hf ^= (u32)hflip;
+   vf ^= (u32)vflip;
+
+   *mode = (enum ipu_rotate_mode)((r90  2) | (hf  1) | vf);
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_degrees_to_rot_mode);
+
+int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
+   bool hflip, bool vflip)
+{
+   u32 r90, vf, hf;
+
+   r90 = ((u32)mode  2)  0x1;
+   hf = ((u32)mode  1)  0x1;
+   vf = ((u32)mode  0)  0x1;
+   hf ^= (u32)hflip;
+   vf ^= (u32)vflip;
+
+   switch ((enum ipu_rotate_mode)((r90  2) | (hf  1) | vf)) {
+   case IPU_ROTATE_NONE:
+   *degrees = 0;
+   break;
+   case IPU_ROTATE_90_RIGHT:
+   *degrees = 90;
+   break;
+   case IPU_ROTATE_180:
+   *degrees = 180;
+   break;
+   case IPU_ROTATE_90_LEFT:
+   *degrees = 270;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_rot_mode_to_degrees);
+
 struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned num)
 {
struct ipuv3_channel *channel;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 91aeb65..99cf370 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -448,6 +448,10 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
 enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
 enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
 enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
+int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
+   bool hflip, bool vflip);
+int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
+   bool hflip, bool vflip);
 
 static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
int burstsize)
-- 
1.7.9.5

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[PATCH 24/28] gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()

[Steve Longerbeam]

Adds ipu_cpmem_set_rotation().

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-cpmem.c |   10 ++
 include/video/imx-ipu-v3.h |2 ++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 2d1b376..f52e4b4 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -64,6 +64,7 @@ struct ipu_cpmem {
 #define IPU_FIELD_BNDM IPU_CPMEM_WORD(0, 114, 3)
 #define IPU_FIELD_BM   IPU_CPMEM_WORD(0, 117, 2)
 #define IPU_FIELD_ROT  IPU_CPMEM_WORD(0, 119, 1)
+#define IPU_FIELD_ROT_HF_VFIPU_CPMEM_WORD(0, 119, 3)
 #define IPU_FIELD_HF   IPU_CPMEM_WORD(0, 120, 1)
 #define IPU_FIELD_VF   IPU_CPMEM_WORD(0, 121, 1)
 #define IPU_FIELD_THE  IPU_CPMEM_WORD(0, 122, 1)
@@ -273,6 +274,15 @@ void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch)
 }
 EXPORT_SYMBOL_GPL(ipu_cpmem_set_block_mode);
 
+void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
+   enum ipu_rotate_mode rot)
+{
+   u32 temp_rot = bitrev8(rot)  5;
+
+   ipu_ch_param_write_field(ch, IPU_FIELD_ROT_HF_VF, temp_rot);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_rotation);
+
 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
 const struct ipu_rgb *rgb)
 {
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 066b10d..3d3cea0 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -233,6 +233,8 @@ void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, 
int stride);
 void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
 void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
+void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
+   enum ipu_rotate_mode rot);
 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
 const struct ipu_rgb *rgb);
 int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width);
-- 
1.7.9.5

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[PATCH 20/28] gpu: ipu-v3: Add ipu-cpmem unit

[Steve Longerbeam]

Move channel parameter memory setup functions and macros into a new
submodule ipu-cpmem. In the process, cleanup arguments to the functions
to take a channel pointer instead of a pointer into cpmem for that
channel. That allows the structure of the parameter memory to be
private to ipu-cpmem.c.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/Makefile |4 +-
 drivers/gpu/ipu-v3/ipu-common.c |  457 +-
 drivers/gpu/ipu-v3/ipu-cpmem.c  |  597 +++
 drivers/gpu/ipu-v3/ipu-prv.h|   14 +-
 include/video/imx-ipu-v3.h  |  188 +++-
 5 files changed, 658 insertions(+), 602 deletions(-)
 create mode 100644 drivers/gpu/ipu-v3/ipu-cpmem.c

diff --git a/drivers/gpu/ipu-v3/Makefile b/drivers/gpu/ipu-v3/Makefile
index 830804f..107ec23 100644
--- a/drivers/gpu/ipu-v3/Makefile
+++ b/drivers/gpu/ipu-v3/Makefile
@@ -1,4 +1,4 @@
 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
 
-imx-ipu-v3-objs := ipu-common.o ipu-csi.o ipu-dc.o ipu-di.o ipu-dp.o \
-   ipu-dmfc.o ipu-ic.o ipu-smfc.o
+imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
+   ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 3f91e14..81930f3 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -44,17 +44,6 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32 
value, unsigned offset)
writel(value, ipu-cm_reg + offset);
 }
 
-static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
-{
-   return readl(ipu-idmac_reg + offset);
-}
-
-static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
-   unsigned offset)
-{
-   writel(value, ipu-idmac_reg + offset);
-}
-
 int ipu_get_num(struct ipu_soc *ipu)
 {
return ipu-id;
@@ -71,379 +60,6 @@ void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
 }
 EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
 
-struct ipu_ch_param __iomem *ipu_get_cpmem(struct ipuv3_channel *channel)
-{
-   struct ipu_soc *ipu = channel-ipu;
-
-   return ipu-cpmem_base + channel-num;
-}
-EXPORT_SYMBOL_GPL(ipu_get_cpmem);
-
-void ipu_cpmem_set_high_priority(struct ipuv3_channel *channel)
-{
-   struct ipu_soc *ipu = channel-ipu;
-   struct ipu_ch_param __iomem *p = ipu_get_cpmem(channel);
-   u32 val;
-
-   if (ipu-ipu_type == IPUV3EX)
-   ipu_ch_param_write_field(p, IPU_FIELD_ID, 1);
-
-   val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(channel-num));
-   val |= 1  (channel-num % 32);
-   ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(channel-num));
-};
-EXPORT_SYMBOL_GPL(ipu_cpmem_set_high_priority);
-
-void ipu_ch_param_write_field(struct ipu_ch_param __iomem *base, u32 wbs, u32 
v)
-{
-   u32 bit = (wbs  8) % 160;
-   u32 size = wbs  0xff;
-   u32 word = (wbs  8) / 160;
-   u32 i = bit / 32;
-   u32 ofs = bit % 32;
-   u32 mask = (1  size) - 1;
-   u32 val;
-
-   pr_debug(%s %d %d %d\n, __func__, word, bit , size);
-
-   val = readl(base-word[word].data[i]);
-   val = ~(mask  ofs);
-   val |= v  ofs;
-   writel(val, base-word[word].data[i]);
-
-   if ((bit + size - 1) / 32  i) {
-   val = readl(base-word[word].data[i + 1]);
-   val = ~(mask  (ofs ? (32 - ofs) : 0));
-   val |= v  (ofs ? (32 - ofs) : 0);
-   writel(val, base-word[word].data[i + 1]);
-   }
-}
-EXPORT_SYMBOL_GPL(ipu_ch_param_write_field);
-
-u32 ipu_ch_param_read_field(struct ipu_ch_param __iomem *base, u32 wbs)
-{
-   u32 bit = (wbs  8) % 160;
-   u32 size = wbs  0xff;
-   u32 word = (wbs  8) / 160;
-   u32 i = bit / 32;
-   u32 ofs = bit % 32;
-   u32 mask = (1  size) - 1;
-   u32 val = 0;
-
-   pr_debug(%s %d %d %d\n, __func__, word, bit , size);
-
-   val = (readl(base-word[word].data[i])  ofs)  mask;
-
-   if ((bit + size - 1) / 32  i) {
-   u32 tmp;
-   tmp = readl(base-word[word].data[i + 1]);
-   tmp = mask  (ofs ? (32 - ofs) : 0);
-   val |= tmp  (ofs ? (32 - ofs) : 0);
-   }
-
-   return val;
-}
-EXPORT_SYMBOL_GPL(ipu_ch_param_read_field);
-
-int ipu_cpmem_set_format_rgb(struct ipu_ch_param __iomem *p,
-   const struct ipu_rgb *rgb)
-{
-   int bpp = 0, npb = 0, ro, go, bo, to;
-
-   ro = rgb-bits_per_pixel - rgb-red.length - rgb-red.offset;
-   go = rgb-bits_per_pixel - rgb-green.length - rgb-green.offset;
-   bo = rgb-bits_per_pixel - rgb-blue.length - rgb-blue.offset;
-   to = rgb-bits_per_pixel - rgb-transp.length - rgb-transp.offset;
-
-   ipu_ch_param_write_field(p, IPU_FIELD_WID0, rgb-red.length - 1);
-   ipu_ch_param_write_field(p, IPU_FIELD_OFS0, ro);
-   ipu_ch_param_write_field(p, IPU_FIELD_WID1, rgb-green.length - 1);
-   ipu_ch_param_write_field(p, IPU_FIELD_OFS1

[PATCH 25/28] gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()

[Steve Longerbeam]

Add a second buffer physaddr to struct ipu_image, for double-buffering
support.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-cpmem.c |   32 
 include/video/imx-ipu-v3.h |3 ++-
 2 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index f52e4b4..cfe2f53 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -538,7 +538,7 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_fmt);
 int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
 {
struct v4l2_pix_format *pix = image-pix;
-   int y_offset, u_offset, v_offset;
+   int offset, y_offset, u_offset, v_offset;
 
pr_debug(%s: resolution: %dx%d stride: %d\n,
 __func__, pix-width, pix-height,
@@ -560,30 +560,30 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct 
ipu_image *image)
 
ipu_cpmem_set_yuv_planar_full(ch, pix-pixelformat,
pix-bytesperline, u_offset, v_offset);
-   ipu_cpmem_set_buffer(ch, 0, image-phys + y_offset);
+   ipu_cpmem_set_buffer(ch, 0, image-phys0 + y_offset);
+   ipu_cpmem_set_buffer(ch, 1, image-phys1 + y_offset);
break;
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
-   ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 2 +
-image-rect.top * image-pix.bytesperline);
+   case V4L2_PIX_FMT_RGB565:
+   offset = image-rect.left * 2 +
+   image-rect.top * pix-bytesperline;
+   ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+   ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
-   ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 4 +
-image-rect.top * image-pix.bytesperline);
-   break;
-   case V4L2_PIX_FMT_RGB565:
-   ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 2 +
-image-rect.top * image-pix.bytesperline);
+   offset = image-rect.left * 4 +
+   image-rect.top * pix-bytesperline;
+   ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+   ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
case V4L2_PIX_FMT_RGB24:
case V4L2_PIX_FMT_BGR24:
-   ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 3 +
-image-rect.top * image-pix.bytesperline);
+   offset = image-rect.left * 3 +
+   image-rect.top * pix-bytesperline;
+   ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+   ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
default:
return -EINVAL;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 3d3cea0..542652f 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -221,7 +221,8 @@ struct ipu_rgb {
 struct ipu_image {
struct v4l2_pix_format pix;
struct v4l2_rect rect;
-   dma_addr_t phys;
+   dma_addr_t phys0;
+   dma_addr_t phys1;
 };
 
 void ipu_cpmem_zero(struct ipuv3_channel *ch);
-- 
1.7.9.5

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[PATCH 23/28] gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()

[Steve Longerbeam]

Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel
will use to transfer data onto AXI bus.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/gpu/ipu-v3/ipu-cpmem.c |7 +++
 include/video/imx-ipu-v3.h |1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 28adf39..2d1b376 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -254,6 +254,13 @@ void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, 
int stride)
 };
 EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);
 
+void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id)
+{
+   id = 0x3;
+   ipu_ch_param_write_field(ch, IPU_FIELD_ID, id);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_axi_id);
+
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize)
 {
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 6146bc7..066b10d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -230,6 +230,7 @@ void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int 
stride);
 void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
 void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t 
buf);
 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
+void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
 void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
-- 
1.7.9.5

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[PATCH 21/28] staging: imx-drm: Convert to new ipu_cpmem API

[Steve Longerbeam]

The ipu_cpmem_*() calls now take a channel pointer instead of a
pointer into cpmem for that channel.

Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
 drivers/staging/imx-drm/ipuv3-plane.c |   16 ++--
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/imx-drm/ipuv3-plane.c 
b/drivers/staging/imx-drm/ipuv3-plane.c
index 6f393a1..6ffe1bb 100644
--- a/drivers/staging/imx-drm/ipuv3-plane.c
+++ b/drivers/staging/imx-drm/ipuv3-plane.c
@@ -62,7 +62,6 @@ static inline int calc_bandwidth(int width, int height, 
unsigned int vref)
 int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
   int x, int y)
 {
-   struct ipu_ch_param __iomem *cpmem;
struct drm_gem_cma_object *cma_obj;
unsigned long eba;
 
@@ -75,13 +74,12 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct 
drm_framebuffer *fb,
dev_dbg(ipu_plane-base.dev-dev, phys = %pad, x = %d, y = %d,
cma_obj-paddr, x, y);
 
-   cpmem = ipu_get_cpmem(ipu_plane-ipu_ch);
-   ipu_cpmem_set_stride(cpmem, fb-pitches[0]);
+   ipu_cpmem_set_stride(ipu_plane-ipu_ch, fb-pitches[0]);
 
eba = cma_obj-paddr + fb-offsets[0] +
  fb-pitches[0] * y + (fb-bits_per_pixel  3) * x;
-   ipu_cpmem_set_buffer(cpmem, 0, eba);
-   ipu_cpmem_set_buffer(cpmem, 1, eba);
+   ipu_cpmem_set_buffer(ipu_plane-ipu_ch, 0, eba);
+   ipu_cpmem_set_buffer(ipu_plane-ipu_ch, 1, eba);
 
/* cache offsets for subsequent pageflips */
ipu_plane-x = x;
@@ -97,7 +95,6 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct 
drm_crtc *crtc,
   uint32_t src_x, uint32_t src_y,
   uint32_t src_w, uint32_t src_h)
 {
-   struct ipu_ch_param __iomem *cpmem;
struct device *dev = ipu_plane-base.dev-dev;
int ret;
 
@@ -175,10 +172,9 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct 
drm_crtc *crtc,
return ret;
}
 
-   cpmem = ipu_get_cpmem(ipu_plane-ipu_ch);
-   ipu_ch_param_zero(cpmem);
-   ipu_cpmem_set_resolution(cpmem, src_w, src_h);
-   ret = ipu_cpmem_set_fmt(cpmem, fb-pixel_format);
+   ipu_cpmem_zero(ipu_plane-ipu_ch);
+   ipu_cpmem_set_resolution(ipu_plane-ipu_ch, src_w, src_h);
+   ret = ipu_cpmem_set_fmt(ipu_plane-ipu_ch, fb-pixel_format);
if (ret  0) {
dev_err(dev, unsupported pixel format 0x%08x\n,
fb-pixel_format);
-- 
1.7.9.5

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