[PATCH] ARM: DaVinci: DM646x Video: Platform and board specific setup
Platform specific display device setup for DM646x EVM
Add platform device and resource structures. Also define a platform specific
clock setup function that can be accessed by the driver to configure the clock
and CPLD.
This patch is dependent on a patch submitted earlier, which adds
Pin Mux and clock definitions for Video on DM646x.
Signed-off-by: Manjunath Hadli m...@ti.com
Signed-off-by: Brijesh Jadav brijes...@ti.com
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Applies to Davinci GIT tree. This patch was previously submitted as a part
of the series of patches that added display device support to DM646x. This
patch has been reworked upon to apply to the tip of the DaVinci tree. The
previous version of this patch is at
http://linux.omap.com/pipermail/davinci-linux-open-source/2009-May/013213.html
arch/arm/mach-davinci/board-dm646x-evm.c| 122 +++
arch/arm/mach-davinci/dm646x.c | 62 ++
arch/arm/mach-davinci/include/mach/dm646x.h | 24 +
3 files changed, 208 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c
b/arch/arm/mach-davinci/board-dm646x-evm.c
index e17de63..eb4bd01 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -52,6 +52,19 @@
#define DM646X_EVM_PHY_MASK(0x2)
#define DM646X_EVM_MDIO_FREQUENCY (220) /* PHY bus frequency */
+#define VIDCLKCTL_OFFSET (0x38)
+#define VSCLKDIS_OFFSET(0x6c)
+
+#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
+#define VCH2CLK_SYSCLK8(BIT(9))
+#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
+#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
+#define VCH3CLK_SYSCLK8(BIT(13))
+#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
+
+#define VIDCH2CLK (BIT(10))
+#define VIDCH3CLK (BIT(11))
+
static struct davinci_uart_config uart_config __initdata = {
.enabled_uarts = (1 0),
};
@@ -207,6 +220,40 @@ static struct at24_platform_data eeprom_info = {
.context= (void *)0x7f00,
};
+static struct i2c_client *cpld_client;
+
+static int cpld_video_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ cpld_client = client;
+ return 0;
+}
+
+static int __devexit cpld_video_remove(struct i2c_client *client)
+{
+ cpld_client = NULL;
+ return 0;
+}
+
+static const struct i2c_device_id cpld_video_id[] = {
+ { cpld_video, 0 },
+ { }
+};
+
+static struct i2c_driver cpld_video_driver = {
+ .driver = {
+ .name = cpld_video,
+ },
+ .probe = cpld_video_probe,
+ .remove = cpld_video_remove,
+ .id_table = cpld_video_id,
+};
+
+static void evm_init_cpld(void)
+{
+ i2c_add_driver(cpld_video_driver);
+}
+
static struct i2c_board_info __initdata i2c_info[] = {
{
I2C_BOARD_INFO(24c256, 0x50),
@@ -216,6 +263,9 @@ static struct i2c_board_info __initdata i2c_info[] = {
I2C_BOARD_INFO(pcf8574a, 0x38),
.platform_data = pcf_data,
},
+ {
+ I2C_BOARD_INFO(cpld_video, 0x3B),
+ },
};
static struct davinci_i2c_platform_data i2c_pdata = {
@@ -223,10 +273,81 @@ static struct davinci_i2c_platform_data i2c_pdata = {
.bus_delay = 0 /* usec */,
};
+static int set_vpif_clock(int mux_mode, int hd)
+{
+ int val = 0;
+ int err = 0;
+ unsigned int value;
+ void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
+
+ /* disable the clock */
+ value = __raw_readl(base + VSCLKDIS_OFFSET);
+ value |= (VIDCH3CLK | VIDCH2CLK);
+ __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+ val = i2c_smbus_read_byte(cpld_client);
+ if (val 0)
+ return val;
+
+ if (mux_mode == 1)
+ val = ~0x40;
+ else
+ val |= 0x40;
+
+ err = i2c_smbus_write_byte(cpld_client, val);
+ if (err)
+ return err;
+
+ value = __raw_readl(base + VIDCLKCTL_OFFSET);
+ value = ~(VCH2CLK_MASK);
+ value = ~(VCH3CLK_MASK);
+
+ if (hd = 1)
+ value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
+ else
+ value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
+
+ __raw_writel(value, base + VIDCLKCTL_OFFSET);
+
+ /* enable the clock */
+ value = __raw_readl(base + VSCLKDIS_OFFSET);
+ value = ~(VIDCH3CLK | VIDCH2CLK);
+ __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+ return 0;
+}
+
+static const struct subdev_info dm646x_vpif_subdev[] = {
+ {
+ .addr = 0x2A,
+ .name = adv7343,
+ },
+ {
+ .addr = 0x2C,
+ .name = ths7303,
+ },
+};
+
+static const char *output[] = {
+
[PATCH] ARM: DaVinci: DM646x Video: Platform and board specific setup
Platform specific display device setup for DM646x EVM
Add platform device and resource structures. Also define a platform specific
clock setup function that can be accessed by the driver to configure the clock
and CPLD.
This patch is dependent on a patch submitted earlier, which adds
Pin Mux and clock definitions for Video on DM646x.
Signed-off-by: Manjunath Hadli m...@ti.com
Signed-off-by: Brijesh Jadav brijes...@ti.com
Signed-off-by: Chaithrika U S chaithr...@ti.com
---
Applies to Davinci GIT tree. This patch was previously submitted as a part
of the series of patches that added display device support to DM646x. This
patch has been reworked upon to apply to the tip of the DaVinci tree. The
previous version of this patch is at
http://linux.omap.com/pipermail/davinci-linux-open-source/2009-May/013213.html
arch/arm/mach-davinci/board-dm646x-evm.c| 122 +++
arch/arm/mach-davinci/dm646x.c | 62 ++
arch/arm/mach-davinci/include/mach/dm646x.h | 24 +
3 files changed, 208 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c
b/arch/arm/mach-davinci/board-dm646x-evm.c
index e17de63..eb4bd01 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -52,6 +52,19 @@
#define DM646X_EVM_PHY_MASK(0x2)
#define DM646X_EVM_MDIO_FREQUENCY (220) /* PHY bus frequency */
+#define VIDCLKCTL_OFFSET (0x38)
+#define VSCLKDIS_OFFSET(0x6c)
+
+#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
+#define VCH2CLK_SYSCLK8(BIT(9))
+#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
+#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
+#define VCH3CLK_SYSCLK8(BIT(13))
+#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
+
+#define VIDCH2CLK (BIT(10))
+#define VIDCH3CLK (BIT(11))
+
static struct davinci_uart_config uart_config __initdata = {
.enabled_uarts = (1 0),
};
@@ -207,6 +220,40 @@ static struct at24_platform_data eeprom_info = {
.context= (void *)0x7f00,
};
+static struct i2c_client *cpld_client;
+
+static int cpld_video_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ cpld_client = client;
+ return 0;
+}
+
+static int __devexit cpld_video_remove(struct i2c_client *client)
+{
+ cpld_client = NULL;
+ return 0;
+}
+
+static const struct i2c_device_id cpld_video_id[] = {
+ { cpld_video, 0 },
+ { }
+};
+
+static struct i2c_driver cpld_video_driver = {
+ .driver = {
+ .name = cpld_video,
+ },
+ .probe = cpld_video_probe,
+ .remove = cpld_video_remove,
+ .id_table = cpld_video_id,
+};
+
+static void evm_init_cpld(void)
+{
+ i2c_add_driver(cpld_video_driver);
+}
+
static struct i2c_board_info __initdata i2c_info[] = {
{
I2C_BOARD_INFO(24c256, 0x50),
@@ -216,6 +263,9 @@ static struct i2c_board_info __initdata i2c_info[] = {
I2C_BOARD_INFO(pcf8574a, 0x38),
.platform_data = pcf_data,
},
+ {
+ I2C_BOARD_INFO(cpld_video, 0x3B),
+ },
};
static struct davinci_i2c_platform_data i2c_pdata = {
@@ -223,10 +273,81 @@ static struct davinci_i2c_platform_data i2c_pdata = {
.bus_delay = 0 /* usec */,
};
+static int set_vpif_clock(int mux_mode, int hd)
+{
+ int val = 0;
+ int err = 0;
+ unsigned int value;
+ void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
+
+ /* disable the clock */
+ value = __raw_readl(base + VSCLKDIS_OFFSET);
+ value |= (VIDCH3CLK | VIDCH2CLK);
+ __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+ val = i2c_smbus_read_byte(cpld_client);
+ if (val 0)
+ return val;
+
+ if (mux_mode == 1)
+ val = ~0x40;
+ else
+ val |= 0x40;
+
+ err = i2c_smbus_write_byte(cpld_client, val);
+ if (err)
+ return err;
+
+ value = __raw_readl(base + VIDCLKCTL_OFFSET);
+ value = ~(VCH2CLK_MASK);
+ value = ~(VCH3CLK_MASK);
+
+ if (hd = 1)
+ value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
+ else
+ value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
+
+ __raw_writel(value, base + VIDCLKCTL_OFFSET);
+
+ /* enable the clock */
+ value = __raw_readl(base + VSCLKDIS_OFFSET);
+ value = ~(VIDCH3CLK | VIDCH2CLK);
+ __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+ return 0;
+}
+
+static const struct subdev_info dm646x_vpif_subdev[] = {
+ {
+ .addr = 0x2A,
+ .name = adv7343,
+ },
+ {
+ .addr = 0x2C,
+ .name = ths7303,
+ },
+};
+
+static const char *output[] = {
+
