Re: [PATCH] media: rcar-vin: enable support for r8a77965

2018-05-13 Thread Laurent Pinchart
Hi Niklas,

Thank you for the patch.

On Sunday, 13 May 2018 22:00:23 EEST Niklas Söderlund wrote:
> Add the SoC specific information for Renesas r8a77965.
> 
> Signed-off-by: Niklas Söderlund 

Reviewed-by: Laurent Pinchart 

> ---
>  drivers/media/platform/rcar-vin/rcar-core.c | 48 +
>  1 file changed, 48 insertions(+)
> 
> diff --git a/drivers/media/platform/rcar-vin/rcar-core.c
> b/drivers/media/platform/rcar-vin/rcar-core.c index
> d3072e166a1ca24f..f7bfd05accbfde67 100644
> --- a/drivers/media/platform/rcar-vin/rcar-core.c
> +++ b/drivers/media/platform/rcar-vin/rcar-core.c
> @@ -974,6 +974,50 @@ static const struct rvin_info rcar_info_r8a7796 = {
>   .routes = rcar_info_r8a7796_routes,
>  };
> 
> +static const struct rvin_group_route _rcar_info_r8a77965_routes[] = {
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 0, .mask = BIT(1) | BIT(4) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 0, .mask = BIT(2) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 1, .mask = BIT(0) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 1, .mask = BIT(1) | BIT(3) },
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 1, .mask = BIT(4) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 2, .mask = BIT(0) },
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 2, .mask = BIT(1) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 2, .mask = BIT(2) },
> + { .csi = RVIN_CSI40, .channel = 2, .vin = 2, .mask = BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 2, .vin = 2, .mask = BIT(4) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 3, .mask = BIT(0) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 3, .mask = BIT(1) | BIT(2) },
> + { .csi = RVIN_CSI40, .channel = 3, .vin = 3, .mask = BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 3, .vin = 3, .mask = BIT(4) },
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 4, .mask = BIT(0) | BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 4, .mask = BIT(1) | BIT(4) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 4, .mask = BIT(2) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 5, .mask = BIT(0) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 5, .mask = BIT(1) | BIT(3) },
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 5, .mask = BIT(2) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 5, .mask = BIT(4) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 6, .mask = BIT(0) },
> + { .csi = RVIN_CSI40, .channel = 0, .vin = 6, .mask = BIT(1) },
> + { .csi = RVIN_CSI20, .channel = 0, .vin = 6, .mask = BIT(2) },
> + { .csi = RVIN_CSI40, .channel = 2, .vin = 6, .mask = BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 2, .vin = 6, .mask = BIT(4) },
> + { .csi = RVIN_CSI40, .channel = 1, .vin = 7, .mask = BIT(0) },
> + { .csi = RVIN_CSI20, .channel = 1, .vin = 7, .mask = BIT(1) | BIT(2) },
> + { .csi = RVIN_CSI40, .channel = 3, .vin = 7, .mask = BIT(3) },
> + { .csi = RVIN_CSI20, .channel = 3, .vin = 7, .mask = BIT(4) },
> + { /* Sentinel */ }
> +};
> +
> +static const struct rvin_info rcar_info_r8a77965 = {
> + .model = RCAR_GEN3,
> + .use_mc = true,
> + .max_width = 4096,
> + .max_height = 4096,
> + .routes = _rcar_info_r8a77965_routes,
> +};
> +
>  static const struct rvin_group_route _rcar_info_r8a77970_routes[] = {
>   { .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
>   { .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
> @@ -1030,6 +1074,10 @@ static const struct of_device_id rvin_of_id_table[] =
> { .compatible = "renesas,vin-r8a7796",
>   .data = &rcar_info_r8a7796,
>   },
> + {
> + .compatible = "renesas,vin-r8a77965",
> + .data = &rcar_info_r8a77965,
> + },
>   {
>   .compatible = "renesas,vin-r8a77970",
>   .data = &rcar_info_r8a77970,

-- 
Regards,

Laurent Pinchart





[PATCH] media: rcar-vin: enable support for r8a77965

2018-05-13 Thread Niklas Söderlund
Add the SoC specific information for Renesas r8a77965.

Signed-off-by: Niklas Söderlund 
---
 drivers/media/platform/rcar-vin/rcar-core.c | 48 +
 1 file changed, 48 insertions(+)

diff --git a/drivers/media/platform/rcar-vin/rcar-core.c 
b/drivers/media/platform/rcar-vin/rcar-core.c
index d3072e166a1ca24f..f7bfd05accbfde67 100644
--- a/drivers/media/platform/rcar-vin/rcar-core.c
+++ b/drivers/media/platform/rcar-vin/rcar-core.c
@@ -974,6 +974,50 @@ static const struct rvin_info rcar_info_r8a7796 = {
.routes = rcar_info_r8a7796_routes,
 };
 
+static const struct rvin_group_route _rcar_info_r8a77965_routes[] = {
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 0, .mask = BIT(1) | BIT(4) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 0, .mask = BIT(2) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 1, .mask = BIT(0) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 1, .mask = BIT(1) | BIT(3) },
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 1, .mask = BIT(4) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 2, .mask = BIT(0) },
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 2, .mask = BIT(1) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 2, .mask = BIT(2) },
+   { .csi = RVIN_CSI40, .channel = 2, .vin = 2, .mask = BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 2, .vin = 2, .mask = BIT(4) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 3, .mask = BIT(0) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 3, .mask = BIT(1) | BIT(2) },
+   { .csi = RVIN_CSI40, .channel = 3, .vin = 3, .mask = BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 3, .vin = 3, .mask = BIT(4) },
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 4, .mask = BIT(0) | BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 4, .mask = BIT(1) | BIT(4) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 4, .mask = BIT(2) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 5, .mask = BIT(0) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 5, .mask = BIT(1) | BIT(3) },
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 5, .mask = BIT(2) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 5, .mask = BIT(4) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 6, .mask = BIT(0) },
+   { .csi = RVIN_CSI40, .channel = 0, .vin = 6, .mask = BIT(1) },
+   { .csi = RVIN_CSI20, .channel = 0, .vin = 6, .mask = BIT(2) },
+   { .csi = RVIN_CSI40, .channel = 2, .vin = 6, .mask = BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 2, .vin = 6, .mask = BIT(4) },
+   { .csi = RVIN_CSI40, .channel = 1, .vin = 7, .mask = BIT(0) },
+   { .csi = RVIN_CSI20, .channel = 1, .vin = 7, .mask = BIT(1) | BIT(2) },
+   { .csi = RVIN_CSI40, .channel = 3, .vin = 7, .mask = BIT(3) },
+   { .csi = RVIN_CSI20, .channel = 3, .vin = 7, .mask = BIT(4) },
+   { /* Sentinel */ }
+};
+
+static const struct rvin_info rcar_info_r8a77965 = {
+   .model = RCAR_GEN3,
+   .use_mc = true,
+   .max_width = 4096,
+   .max_height = 4096,
+   .routes = _rcar_info_r8a77965_routes,
+};
+
 static const struct rvin_group_route _rcar_info_r8a77970_routes[] = {
{ .csi = RVIN_CSI40, .channel = 0, .vin = 0, .mask = BIT(0) | BIT(3) },
{ .csi = RVIN_CSI40, .channel = 0, .vin = 1, .mask = BIT(2) },
@@ -1030,6 +1074,10 @@ static const struct of_device_id rvin_of_id_table[] = {
.compatible = "renesas,vin-r8a7796",
.data = &rcar_info_r8a7796,
},
+   {
+   .compatible = "renesas,vin-r8a77965",
+   .data = &rcar_info_r8a77965,
+   },
{
.compatible = "renesas,vin-r8a77970",
.data = &rcar_info_r8a77970,
-- 
2.17.0