Re: [PATCH 1/9] [media] s5p-jpeg: Reset the Codec before doing a soft reset
Hi, W dniu 13.06.2017 o 20:46, Jacek Anaszewski pisze: Hi Thierry, On 06/07/2017 02:34 PM, Thierry Escande wrote: Hi Jacek, On 02/06/2017 21:50, Jacek Anaszewski wrote: Hi Thierry, On 06/02/2017 06:02 PM, Thierry Escande wrote: From: Abhilash Kesavan This patch resets the encoding and decoding register bits before doing a soft reset. Signed-off-by: Tony K Nadackal Signed-off-by: Thierry Escande --- drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c index a1d823a..9ad8f6d 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) unsigned int reg; reg = readl(base + EXYNOS4_JPEG_CNTL_REG); +writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), + base + EXYNOS4_JPEG_CNTL_REG); Why is it required? It would be nice if commit message explained that. Unfortunately the bug entry in the ChromeOS issue tracker does not mention more information about that and the patch author is no more reachable on that email address. So unless someone else knows the answer I won't be able to give more explanation in the commit message... Unfortunately I don't have longer access to the hardware and can't test these changes. Have you tested them, or just cherry-picked from the bug tracker? I do have access to the hardware and will look into the series, however results can be expected next week. Andrzej
Re: [PATCH 1/9] [media] s5p-jpeg: Reset the Codec before doing a soft reset
Hi Thierry, On 06/07/2017 02:34 PM, Thierry Escande wrote: > Hi Jacek, > > On 02/06/2017 21:50, Jacek Anaszewski wrote: >> Hi Thierry, >> >> On 06/02/2017 06:02 PM, Thierry Escande wrote: >>> From: Abhilash Kesavan >>> >>> This patch resets the encoding and decoding register bits before doing a >>> soft reset. >>> >>> Signed-off-by: Tony K Nadackal >>> Signed-off-by: Thierry Escande >>> --- >>> drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c >>> b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c >>> index a1d823a..9ad8f6d 100644 >>> --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c >>> +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c >>> @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) >>> unsigned int reg; >>> reg = readl(base + EXYNOS4_JPEG_CNTL_REG); >>> +writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), >>> + base + EXYNOS4_JPEG_CNTL_REG); >> >> Why is it required? It would be nice if commit message explained that. > > Unfortunately the bug entry in the ChromeOS issue tracker does not > mention more information about that and the patch author is no more > reachable on that email address. > > So unless someone else knows the answer I won't be able to give more > explanation in the commit message... Unfortunately I don't have longer access to the hardware and can't test these changes. Have you tested them, or just cherry-picked from the bug tracker? -- Best regards, Jacek Anaszewski
Re: [PATCH 1/9] [media] s5p-jpeg: Reset the Codec before doing a soft reset
Hi Jacek, On 02/06/2017 21:50, Jacek Anaszewski wrote: Hi Thierry, On 06/02/2017 06:02 PM, Thierry Escande wrote: From: Abhilash Kesavan This patch resets the encoding and decoding register bits before doing a soft reset. Signed-off-by: Tony K Nadackal Signed-off-by: Thierry Escande --- drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c index a1d823a..9ad8f6d 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) unsigned int reg; reg = readl(base + EXYNOS4_JPEG_CNTL_REG); + writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), + base + EXYNOS4_JPEG_CNTL_REG); Why is it required? It would be nice if commit message explained that. Unfortunately the bug entry in the ChromeOS issue tracker does not mention more information about that and the patch author is no more reachable on that email address. So unless someone else knows the answer I won't be able to give more explanation in the commit message... Regards, Thierry
Re: [PATCH 1/9] [media] s5p-jpeg: Reset the Codec before doing a soft reset
Hi Thierry, On 06/02/2017 06:02 PM, Thierry Escande wrote: > From: Abhilash Kesavan > > This patch resets the encoding and decoding register bits before doing a > soft reset. > > Signed-off-by: Tony K Nadackal > Signed-off-by: Thierry Escande > --- > drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > index a1d823a..9ad8f6d 100644 > --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) > unsigned int reg; > > reg = readl(base + EXYNOS4_JPEG_CNTL_REG); > + writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), > +base + EXYNOS4_JPEG_CNTL_REG); Why is it required? It would be nice if commit message explained that. > + reg = readl(base + EXYNOS4_JPEG_CNTL_REG); > writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); > > udelay(100); > -- Best regards, Jacek Anaszewski
[PATCH 1/9] [media] s5p-jpeg: Reset the Codec before doing a soft reset
From: Abhilash Kesavan This patch resets the encoding and decoding register bits before doing a soft reset. Signed-off-by: Tony K Nadackal Signed-off-by: Thierry Escande --- drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c index a1d823a..9ad8f6d 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) unsigned int reg; reg = readl(base + EXYNOS4_JPEG_CNTL_REG); + writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), + base + EXYNOS4_JPEG_CNTL_REG); + + reg = readl(base + EXYNOS4_JPEG_CNTL_REG); writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); udelay(100); -- 2.7.4
