Re: [PATCH 2/3] radio: Add support for SAA7706H Car Radio DSP
Hi Richard, Here is a quick review of this driver: On Wednesday 20 January 2010 14:51:19 Richard Röjfors wrote: > This patch contains initial support for the SAA7706H Car Radio DSP. > > It is a I2C device and currently the mute control is supported. > > When the device is unmuted it is brought out of reset and initiated > using the proposed intialisation sequence. > > When muted the DSP is brought into reset state. > > Signed-off-by: Richard Röjfors > --- > diff --git a/drivers/media/radio/saa7706h.c b/drivers/media/radio/saa7706h.c > new file mode 100644 > index 000..278de06 > --- /dev/null > +++ b/drivers/media/radio/saa7706h.c > @@ -0,0 +1,491 @@ > +/* > + * saa7706.c Philips SAA7706H Car Radio DSP driver > + * Copyright (c) 2009 Intel Corporation > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include Header i2c-id.h shouldn't be needed. > +#include Ditto for this header. > +#include > +#include > + > +#define DRIVER_NAME "saa7706h" > + > +/* the I2C memory map looks like this > + > + $1C00 - $ Not Used > + $2200 - $3FFF Reserved YRAM (DSP2) space > + $2000 - $21FF YRAM (DSP2) > + $1FF0 - $1FFF Hardware Registers > + $1280 - $1FEF Reserved XRAM (DSP2) space > + $1000 - $127F XRAM (DSP2) > + $0FFFDSP CONTROL > + $0A00 - $0FFE Reserved > + $0980 - $09FF Reserved YRAM (DSP1) space > + $0800 - $097F YRAM (DSP1) > + $0200 - $07FF Not Used > + $0180 - $01FF Reserved XRAM (DSP1) space > + $ - $017F XRAM (DSP1) > +*/ > + > +#define SAA7706H_REG_CTRL0x0fff > +#define SAA7706H_CTRL_BYP_PLL0x0001 > +#define SAA7706H_CTRL_PLL_DIV_MASK 0x003e > +#define SAA7706H_CTRL_PLL3_62975MHZ 0x003e > +#define SAA7706H_CTRL_DSP_TURBO 0x0040 > +#define SAA7706H_CTRL_PC_RESET_DSP1 0x0080 > +#define SAA7706H_CTRL_PC_RESET_DSP2 0x0100 > +#define SAA7706H_CTRL_DSP1_ROM_EN_MASK 0x0600 > +#define SAA7706H_CTRL_DSP1_FUNC_PROM 0x > +#define SAA7706H_CTRL_DSP2_ROM_EN_MASK 0x1800 > +#define SAA7706H_CTRL_DSP2_FUNC_PROM 0x > +#define SAA7706H_CTRL_DIG_SIL_INTERPOL 0x8000 > + > +#define SAA7706H_REG_EVALUATION 0x1ff0 > +#define SAA7706H_EVAL_DISABLE_CHARGE_PUMP0x01 > +#define SAA7706H_EVAL_DCS_CLOCK 0x02 > +#define SAA7706H_EVAL_GNDRC1_ENABLE 0x04 > +#define SAA7706H_EVAL_GNDRC2_ENABLE 0x08 > + > +#define SAA7706H_REG_CL_GEN1 0x1ff3 > +#define SAA7706H_CL_GEN1_MIN_LOOPGAIN_MASK 0x0f > +#define SAA7706H_CL_GEN1_LOOPGAIN_MASK 0xf0 > +#define SAA7706H_CL_GEN1_COARSE_RATION 0x00 > + > +#define SAA7706H_REG_CL_GEN2 0x1ff4 > +#define SAA7706H_CL_GEN2_WSEDGE_FALLING 0x01 > +#define SAA7706H_CL_GEN2_STOP_VCO0x02 > +#define SAA7706H_CL_GEN2_FRERUN 0x04 > +#define SAA7706H_CL_GEN2_ADAPTIVE0x08 > +#define SAA7706H_CL_GEN2_FINE_RATIO_MASK 0x00 > + > +#define SAA7706H_REG_CL_GEN4 0x1ff6 > +#define SAA7706H_CL_GEN4_BYPASS_PLL1 0x001000 > +#define SAA7706H_CL_GEN4_PLL1_DIV_MASK 0x03e000 > +#define SAA7706H_CL_GEN4_DSP1_TURBO 0x04 > + > +#define SAA7706H_REG_SEL 0x1ff7 > +#define SAA7706H_SEL_DSP2_SRCA_MASK 0x07 > +#define SAA7706H_SEL_DSP2_FMTA_MASK 0x31 > +#define SAA7706H_SEL_DSP2_SRCB_MASK 0x0001c0 > +#define SAA7706H_SEL_DSP2_FMTB_MASK 0x000e00 > +#define SAA7706H_SEL_DSP1_SRC_MASK 0x003000 > +#define SAA7706H_SEL_DSP1_FMT_MASK 0x01c003 > +#define SAA7706H_SEL_SPDIF2 0x02 > +#define SAA7706H_SEL_HOST_IO_FMT_MASK0x1c > +#define SAA7706H_SEL_EN_HOST_IO 0x20 > + > +#define SAA7706H_REG_IAC 0x1ff8 > +#define SAA7706H_REG_CLK_SET 0x1ff9 > +#define SAA7706H_REG_CLK_COEFF 0x1ffa > +#define SAA7706H_REG_INPUT_SENS 0x1ffb > +#define SAA7706H_INPUT_SENS_RDS_VOL_MASK 0x0003f > +#define SAA7706H_INPUT_SENS_FM_VOL_MASK 0x00fc0 > +#define SAA7706H_INPUT_SENS_FM_MPX 0x01000 > +#define SAA7706H_INPUT_SENS_OFF_FILTER_A_EN 0x02000 > +#define SAA7706H_INPUT_SENS_OFF_FILTER_B_EN 0x04000 > +#define SAA7706H_REG_PHONE_NAV_AUD
[PATCH 2/3] radio: Add support for SAA7706H Car Radio DSP
This patch contains initial support for the SAA7706H Car Radio DSP. It is a I2C device and currently the mute control is supported. When the device is unmuted it is brought out of reset and initiated using the proposed intialisation sequence. When muted the DSP is brought into reset state. Signed-off-by: Richard Röjfors --- diff --git a/drivers/media/radio/saa7706h.c b/drivers/media/radio/saa7706h.c new file mode 100644 index 000..278de06 --- /dev/null +++ b/drivers/media/radio/saa7706h.c @@ -0,0 +1,491 @@ +/* + * saa7706.c Philips SAA7706H Car Radio DSP driver + * Copyright (c) 2009 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "saa7706h" + +/* the I2C memory map looks like this + + $1C00 - $ Not Used + $2200 - $3FFF Reserved YRAM (DSP2) space + $2000 - $21FF YRAM (DSP2) + $1FF0 - $1FFF Hardware Registers + $1280 - $1FEF Reserved XRAM (DSP2) space + $1000 - $127F XRAM (DSP2) + $0FFFDSP CONTROL + $0A00 - $0FFE Reserved + $0980 - $09FF Reserved YRAM (DSP1) space + $0800 - $097F YRAM (DSP1) + $0200 - $07FF Not Used + $0180 - $01FF Reserved XRAM (DSP1) space + $ - $017F XRAM (DSP1) +*/ + +#define SAA7706H_REG_CTRL 0x0fff +#define SAA7706H_CTRL_BYP_PLL 0x0001 +#define SAA7706H_CTRL_PLL_DIV_MASK 0x003e +#define SAA7706H_CTRL_PLL3_62975MHZ0x003e +#define SAA7706H_CTRL_DSP_TURBO0x0040 +#define SAA7706H_CTRL_PC_RESET_DSP10x0080 +#define SAA7706H_CTRL_PC_RESET_DSP20x0100 +#define SAA7706H_CTRL_DSP1_ROM_EN_MASK 0x0600 +#define SAA7706H_CTRL_DSP1_FUNC_PROM 0x +#define SAA7706H_CTRL_DSP2_ROM_EN_MASK 0x1800 +#define SAA7706H_CTRL_DSP2_FUNC_PROM 0x +#define SAA7706H_CTRL_DIG_SIL_INTERPOL 0x8000 + +#define SAA7706H_REG_EVALUATION0x1ff0 +#define SAA7706H_EVAL_DISABLE_CHARGE_PUMP 0x01 +#define SAA7706H_EVAL_DCS_CLOCK0x02 +#define SAA7706H_EVAL_GNDRC1_ENABLE0x04 +#define SAA7706H_EVAL_GNDRC2_ENABLE0x08 + +#define SAA7706H_REG_CL_GEN1 0x1ff3 +#define SAA7706H_CL_GEN1_MIN_LOOPGAIN_MASK 0x0f +#define SAA7706H_CL_GEN1_LOOPGAIN_MASK 0xf0 +#define SAA7706H_CL_GEN1_COARSE_RATION 0x00 + +#define SAA7706H_REG_CL_GEN2 0x1ff4 +#define SAA7706H_CL_GEN2_WSEDGE_FALLING0x01 +#define SAA7706H_CL_GEN2_STOP_VCO 0x02 +#define SAA7706H_CL_GEN2_FRERUN0x04 +#define SAA7706H_CL_GEN2_ADAPTIVE 0x08 +#define SAA7706H_CL_GEN2_FINE_RATIO_MASK 0x00 + +#define SAA7706H_REG_CL_GEN4 0x1ff6 +#define SAA7706H_CL_GEN4_BYPASS_PLL1 0x001000 +#define SAA7706H_CL_GEN4_PLL1_DIV_MASK 0x03e000 +#define SAA7706H_CL_GEN4_DSP1_TURBO0x04 + +#define SAA7706H_REG_SEL 0x1ff7 +#define SAA7706H_SEL_DSP2_SRCA_MASK0x07 +#define SAA7706H_SEL_DSP2_FMTA_MASK0x31 +#define SAA7706H_SEL_DSP2_SRCB_MASK0x0001c0 +#define SAA7706H_SEL_DSP2_FMTB_MASK0x000e00 +#define SAA7706H_SEL_DSP1_SRC_MASK 0x003000 +#define SAA7706H_SEL_DSP1_FMT_MASK 0x01c003 +#define SAA7706H_SEL_SPDIF20x02 +#define SAA7706H_SEL_HOST_IO_FMT_MASK 0x1c +#define SAA7706H_SEL_EN_HOST_IO0x20 + +#define SAA7706H_REG_IAC 0x1ff8 +#define SAA7706H_REG_CLK_SET 0x1ff9 +#define SAA7706H_REG_CLK_COEFF 0x1ffa +#define SAA7706H_REG_INPUT_SENS0x1ffb +#define SAA7706H_INPUT_SENS_RDS_VOL_MASK 0x0003f +#define SAA7706H_INPUT_SENS_FM_VOL_MASK0x00fc0 +#define SAA7706H_INPUT_SENS_FM_MPX 0x01000 +#define SAA7706H_INPUT_SENS_OFF_FILTER_A_EN0x02000 +#define SAA7706H_INPUT_SENS_OFF_FILTER_B_EN0x04000 +#define SAA7706H_REG_PHONE_NAV_AUDIO 0x1ffc +#define SAA7706H_REG_IO_CONF_DSP2 0x1ffd +#define SAA7706H_REG_STATUS_DSP2 0x1ffe +#define SAA7706H_REG_PC_DSP2 0x1fff + +#define SAA7706H_DSP1_MOD0 0x0800 +#define SAA7706H_DSP1_ROM_VER 0x097f +#define SAA7706H_DSP2_MPTR00x1000 + +#define SAA7706H_DSP1_MODPNTR 0x + +#define SAA7706H_DSP2_XMEM_CONTLLCW0x113e +#defi